core.h 27 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
  4. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  5. *
  6. * Permission to use, copy, modify, and/or distribute this software for any
  7. * purpose with or without fee is hereby granted, provided that the above
  8. * copyright notice and this permission notice appear in all copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _CORE_H_
  19. #define _CORE_H_
  20. #include <linux/completion.h>
  21. #include <linux/if_ether.h>
  22. #include <linux/types.h>
  23. #include <linux/pci.h>
  24. #include <linux/uuid.h>
  25. #include <linux/time.h>
  26. #include "htt.h"
  27. #include "htc.h"
  28. #include "hw.h"
  29. #include "targaddrs.h"
  30. #include "wmi.h"
  31. #include "../ath.h"
  32. #include "../regd.h"
  33. #include "../dfs_pattern_detector.h"
  34. #include "spectral.h"
  35. #include "thermal.h"
  36. #include "wow.h"
  37. #include "swap.h"
  38. #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
  39. #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
  40. #define WO(_f) ((_f##_OFFSET) >> 2)
  41. #define ATH10K_SCAN_ID 0
  42. #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */
  43. #define WMI_READY_TIMEOUT (5 * HZ)
  44. #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
  45. #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
  46. #define ATH10K_NUM_CHANS 40
  47. /* Antenna noise floor */
  48. #define ATH10K_DEFAULT_NOISE_FLOOR -95
  49. #define ATH10K_INVALID_RSSI 128
  50. #define ATH10K_MAX_NUM_MGMT_PENDING 128
  51. /* number of failed packets (20 packets with 16 sw reties each) */
  52. #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
  53. /*
  54. * Use insanely high numbers to make sure that the firmware implementation
  55. * won't start, we have the same functionality already in hostapd. Unit
  56. * is seconds.
  57. */
  58. #define ATH10K_KEEPALIVE_MIN_IDLE 3747
  59. #define ATH10K_KEEPALIVE_MAX_IDLE 3895
  60. #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
  61. /* NAPI poll budget */
  62. #define ATH10K_NAPI_BUDGET 64
  63. /* SMBIOS type containing Board Data File Name Extension */
  64. #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8
  65. /* SMBIOS type structure length (excluding strings-set) */
  66. #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9
  67. /* Offset pointing to Board Data File Name Extension */
  68. #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8
  69. /* Board Data File Name Extension string length.
  70. * String format: BDF_<Customer ID>_<Extension>\0
  71. */
  72. #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20
  73. /* The magic used by QCA spec */
  74. #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_"
  75. struct ath10k;
  76. enum ath10k_bus {
  77. ATH10K_BUS_PCI,
  78. ATH10K_BUS_AHB,
  79. ATH10K_BUS_SDIO,
  80. ATH10K_BUS_USB,
  81. ATH10K_BUS_SNOC,
  82. };
  83. static inline const char *ath10k_bus_str(enum ath10k_bus bus)
  84. {
  85. switch (bus) {
  86. case ATH10K_BUS_PCI:
  87. return "pci";
  88. case ATH10K_BUS_AHB:
  89. return "ahb";
  90. case ATH10K_BUS_SDIO:
  91. return "sdio";
  92. case ATH10K_BUS_USB:
  93. return "usb";
  94. case ATH10K_BUS_SNOC:
  95. return "snoc";
  96. }
  97. return "unknown";
  98. }
  99. enum ath10k_skb_flags {
  100. ATH10K_SKB_F_NO_HWCRYPT = BIT(0),
  101. ATH10K_SKB_F_DTIM_ZERO = BIT(1),
  102. ATH10K_SKB_F_DELIVER_CAB = BIT(2),
  103. ATH10K_SKB_F_MGMT = BIT(3),
  104. ATH10K_SKB_F_QOS = BIT(4),
  105. };
  106. struct ath10k_skb_cb {
  107. dma_addr_t paddr;
  108. u8 flags;
  109. u8 eid;
  110. u16 msdu_id;
  111. struct ieee80211_vif *vif;
  112. struct ieee80211_txq *txq;
  113. } __packed;
  114. struct ath10k_skb_rxcb {
  115. dma_addr_t paddr;
  116. struct hlist_node hlist;
  117. };
  118. static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
  119. {
  120. BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
  121. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  122. return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
  123. }
  124. static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
  125. {
  126. BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
  127. return (struct ath10k_skb_rxcb *)skb->cb;
  128. }
  129. #define ATH10K_RXCB_SKB(rxcb) \
  130. container_of((void *)rxcb, struct sk_buff, cb)
  131. static inline u32 host_interest_item_address(u32 item_offset)
  132. {
  133. return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
  134. }
  135. struct ath10k_bmi {
  136. bool done_sent;
  137. };
  138. struct ath10k_mem_chunk {
  139. void *vaddr;
  140. dma_addr_t paddr;
  141. u32 len;
  142. u32 req_id;
  143. };
  144. struct ath10k_wmi {
  145. enum ath10k_htc_ep_id eid;
  146. struct completion service_ready;
  147. struct completion unified_ready;
  148. struct completion barrier;
  149. struct completion radar_confirm;
  150. wait_queue_head_t tx_credits_wq;
  151. DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
  152. struct wmi_cmd_map *cmd;
  153. struct wmi_vdev_param_map *vdev_param;
  154. struct wmi_pdev_param_map *pdev_param;
  155. const struct wmi_ops *ops;
  156. const struct wmi_peer_flags_map *peer_flags;
  157. u32 num_mem_chunks;
  158. u32 rx_decap_mode;
  159. struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
  160. };
  161. struct ath10k_fw_stats_peer {
  162. struct list_head list;
  163. u8 peer_macaddr[ETH_ALEN];
  164. u32 peer_rssi;
  165. u32 peer_tx_rate;
  166. u32 peer_rx_rate; /* 10x only */
  167. u32 rx_duration;
  168. };
  169. struct ath10k_fw_extd_stats_peer {
  170. struct list_head list;
  171. u8 peer_macaddr[ETH_ALEN];
  172. u32 rx_duration;
  173. };
  174. struct ath10k_fw_stats_vdev {
  175. struct list_head list;
  176. u32 vdev_id;
  177. u32 beacon_snr;
  178. u32 data_snr;
  179. u32 num_tx_frames[4];
  180. u32 num_rx_frames;
  181. u32 num_tx_frames_retries[4];
  182. u32 num_tx_frames_failures[4];
  183. u32 num_rts_fail;
  184. u32 num_rts_success;
  185. u32 num_rx_err;
  186. u32 num_rx_discard;
  187. u32 num_tx_not_acked;
  188. u32 tx_rate_history[10];
  189. u32 beacon_rssi_history[10];
  190. };
  191. struct ath10k_fw_stats_vdev_extd {
  192. struct list_head list;
  193. u32 vdev_id;
  194. u32 ppdu_aggr_cnt;
  195. u32 ppdu_noack;
  196. u32 mpdu_queued;
  197. u32 ppdu_nonaggr_cnt;
  198. u32 mpdu_sw_requeued;
  199. u32 mpdu_suc_retry;
  200. u32 mpdu_suc_multitry;
  201. u32 mpdu_fail_retry;
  202. u32 tx_ftm_suc;
  203. u32 tx_ftm_suc_retry;
  204. u32 tx_ftm_fail;
  205. u32 rx_ftmr_cnt;
  206. u32 rx_ftmr_dup_cnt;
  207. u32 rx_iftmr_cnt;
  208. u32 rx_iftmr_dup_cnt;
  209. };
  210. struct ath10k_fw_stats_pdev {
  211. struct list_head list;
  212. /* PDEV stats */
  213. s32 ch_noise_floor;
  214. u32 tx_frame_count; /* Cycles spent transmitting frames */
  215. u32 rx_frame_count; /* Cycles spent receiving frames */
  216. u32 rx_clear_count; /* Total channel busy time, evidently */
  217. u32 cycle_count; /* Total on-channel time */
  218. u32 phy_err_count;
  219. u32 chan_tx_power;
  220. u32 ack_rx_bad;
  221. u32 rts_bad;
  222. u32 rts_good;
  223. u32 fcs_bad;
  224. u32 no_beacons;
  225. u32 mib_int_count;
  226. /* PDEV TX stats */
  227. s32 comp_queued;
  228. s32 comp_delivered;
  229. s32 msdu_enqued;
  230. s32 mpdu_enqued;
  231. s32 wmm_drop;
  232. s32 local_enqued;
  233. s32 local_freed;
  234. s32 hw_queued;
  235. s32 hw_reaped;
  236. s32 underrun;
  237. u32 hw_paused;
  238. s32 tx_abort;
  239. s32 mpdus_requed;
  240. u32 tx_ko;
  241. u32 data_rc;
  242. u32 self_triggers;
  243. u32 sw_retry_failure;
  244. u32 illgl_rate_phy_err;
  245. u32 pdev_cont_xretry;
  246. u32 pdev_tx_timeout;
  247. u32 pdev_resets;
  248. u32 phy_underrun;
  249. u32 txop_ovf;
  250. u32 seq_posted;
  251. u32 seq_failed_queueing;
  252. u32 seq_completed;
  253. u32 seq_restarted;
  254. u32 mu_seq_posted;
  255. u32 mpdus_sw_flush;
  256. u32 mpdus_hw_filter;
  257. u32 mpdus_truncated;
  258. u32 mpdus_ack_failed;
  259. u32 mpdus_expired;
  260. /* PDEV RX stats */
  261. s32 mid_ppdu_route_change;
  262. s32 status_rcvd;
  263. s32 r0_frags;
  264. s32 r1_frags;
  265. s32 r2_frags;
  266. s32 r3_frags;
  267. s32 htt_msdus;
  268. s32 htt_mpdus;
  269. s32 loc_msdus;
  270. s32 loc_mpdus;
  271. s32 oversize_amsdu;
  272. s32 phy_errs;
  273. s32 phy_err_drop;
  274. s32 mpdu_errs;
  275. s32 rx_ovfl_errs;
  276. };
  277. struct ath10k_fw_stats {
  278. bool extended;
  279. struct list_head pdevs;
  280. struct list_head vdevs;
  281. struct list_head peers;
  282. struct list_head peers_extd;
  283. };
  284. #define ATH10K_TPC_TABLE_TYPE_FLAG 1
  285. #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF
  286. struct ath10k_tpc_table {
  287. u32 pream_idx[WMI_TPC_RATE_MAX];
  288. u8 rate_code[WMI_TPC_RATE_MAX];
  289. char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  290. };
  291. struct ath10k_tpc_stats {
  292. u32 reg_domain;
  293. u32 chan_freq;
  294. u32 phy_mode;
  295. u32 twice_antenna_reduction;
  296. u32 twice_max_rd_power;
  297. s32 twice_antenna_gain;
  298. u32 power_limit;
  299. u32 num_tx_chain;
  300. u32 ctl;
  301. u32 rate_max;
  302. u8 flag[WMI_TPC_FLAG];
  303. struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
  304. };
  305. struct ath10k_tpc_table_final {
  306. u32 pream_idx[WMI_TPC_FINAL_RATE_MAX];
  307. u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
  308. char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  309. };
  310. struct ath10k_tpc_stats_final {
  311. u32 reg_domain;
  312. u32 chan_freq;
  313. u32 phy_mode;
  314. u32 twice_antenna_reduction;
  315. u32 twice_max_rd_power;
  316. s32 twice_antenna_gain;
  317. u32 power_limit;
  318. u32 num_tx_chain;
  319. u32 ctl;
  320. u32 rate_max;
  321. u8 flag[WMI_TPC_FLAG];
  322. struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG];
  323. };
  324. struct ath10k_dfs_stats {
  325. u32 phy_errors;
  326. u32 pulses_total;
  327. u32 pulses_detected;
  328. u32 pulses_discarded;
  329. u32 radar_detected;
  330. };
  331. enum ath10k_radar_confirmation_state {
  332. ATH10K_RADAR_CONFIRMATION_IDLE = 0,
  333. ATH10K_RADAR_CONFIRMATION_INPROGRESS,
  334. ATH10K_RADAR_CONFIRMATION_STOPPED,
  335. };
  336. struct ath10k_radar_found_info {
  337. u32 pri_min;
  338. u32 pri_max;
  339. u32 width_min;
  340. u32 width_max;
  341. u32 sidx_min;
  342. u32 sidx_max;
  343. };
  344. #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
  345. struct ath10k_peer {
  346. struct list_head list;
  347. struct ieee80211_vif *vif;
  348. struct ieee80211_sta *sta;
  349. bool removed;
  350. int vdev_id;
  351. u8 addr[ETH_ALEN];
  352. DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
  353. /* protected by ar->data_lock */
  354. struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
  355. };
  356. struct ath10k_txq {
  357. struct list_head list;
  358. unsigned long num_fw_queued;
  359. unsigned long num_push_allowed;
  360. };
  361. enum ath10k_pkt_rx_err {
  362. ATH10K_PKT_RX_ERR_FCS,
  363. ATH10K_PKT_RX_ERR_TKIP,
  364. ATH10K_PKT_RX_ERR_CRYPT,
  365. ATH10K_PKT_RX_ERR_PEER_IDX_INVAL,
  366. ATH10K_PKT_RX_ERR_MAX,
  367. };
  368. enum ath10k_ampdu_subfrm_num {
  369. ATH10K_AMPDU_SUBFRM_NUM_10,
  370. ATH10K_AMPDU_SUBFRM_NUM_20,
  371. ATH10K_AMPDU_SUBFRM_NUM_30,
  372. ATH10K_AMPDU_SUBFRM_NUM_40,
  373. ATH10K_AMPDU_SUBFRM_NUM_50,
  374. ATH10K_AMPDU_SUBFRM_NUM_60,
  375. ATH10K_AMPDU_SUBFRM_NUM_MORE,
  376. ATH10K_AMPDU_SUBFRM_NUM_MAX,
  377. };
  378. enum ath10k_amsdu_subfrm_num {
  379. ATH10K_AMSDU_SUBFRM_NUM_1,
  380. ATH10K_AMSDU_SUBFRM_NUM_2,
  381. ATH10K_AMSDU_SUBFRM_NUM_3,
  382. ATH10K_AMSDU_SUBFRM_NUM_4,
  383. ATH10K_AMSDU_SUBFRM_NUM_MORE,
  384. ATH10K_AMSDU_SUBFRM_NUM_MAX,
  385. };
  386. struct ath10k_sta_tid_stats {
  387. unsigned long int rx_pkt_from_fw;
  388. unsigned long int rx_pkt_unchained;
  389. unsigned long int rx_pkt_drop_chained;
  390. unsigned long int rx_pkt_drop_filter;
  391. unsigned long int rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];
  392. unsigned long int rx_pkt_queued_for_mac;
  393. unsigned long int rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];
  394. unsigned long int rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];
  395. };
  396. struct ath10k_sta {
  397. struct ath10k_vif *arvif;
  398. /* the following are protected by ar->data_lock */
  399. u32 changed; /* IEEE80211_RC_* */
  400. u32 bw;
  401. u32 nss;
  402. u32 smps;
  403. u16 peer_id;
  404. struct rate_info txrate;
  405. struct work_struct update_wk;
  406. u64 rx_duration;
  407. #ifdef CONFIG_MAC80211_DEBUGFS
  408. /* protected by conf_mutex */
  409. bool aggr_mode;
  410. /* Protected with ar->data_lock */
  411. struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1];
  412. #endif
  413. };
  414. #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ)
  415. enum ath10k_beacon_state {
  416. ATH10K_BEACON_SCHEDULED = 0,
  417. ATH10K_BEACON_SENDING,
  418. ATH10K_BEACON_SENT,
  419. };
  420. struct ath10k_vif {
  421. struct list_head list;
  422. u32 vdev_id;
  423. u16 peer_id;
  424. enum wmi_vdev_type vdev_type;
  425. enum wmi_vdev_subtype vdev_subtype;
  426. u32 beacon_interval;
  427. u32 dtim_period;
  428. struct sk_buff *beacon;
  429. /* protected by data_lock */
  430. enum ath10k_beacon_state beacon_state;
  431. void *beacon_buf;
  432. dma_addr_t beacon_paddr;
  433. unsigned long tx_paused; /* arbitrary values defined by target */
  434. struct ath10k *ar;
  435. struct ieee80211_vif *vif;
  436. bool is_started;
  437. bool is_up;
  438. bool spectral_enabled;
  439. bool ps;
  440. u32 aid;
  441. u8 bssid[ETH_ALEN];
  442. struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
  443. s8 def_wep_key_idx;
  444. u16 tx_seq_no;
  445. union {
  446. struct {
  447. u32 uapsd;
  448. } sta;
  449. struct {
  450. /* 512 stations */
  451. u8 tim_bitmap[64];
  452. u8 tim_len;
  453. u32 ssid_len;
  454. u8 ssid[IEEE80211_MAX_SSID_LEN];
  455. bool hidden_ssid;
  456. /* P2P_IE with NoA attribute for P2P_GO case */
  457. u32 noa_len;
  458. u8 *noa_data;
  459. } ap;
  460. } u;
  461. bool use_cts_prot;
  462. bool nohwcrypt;
  463. int num_legacy_stations;
  464. int txpower;
  465. struct wmi_wmm_params_all_arg wmm_params;
  466. struct work_struct ap_csa_work;
  467. struct delayed_work connection_loss_work;
  468. struct cfg80211_bitrate_mask bitrate_mask;
  469. };
  470. struct ath10k_vif_iter {
  471. u32 vdev_id;
  472. struct ath10k_vif *arvif;
  473. };
  474. /* Copy Engine register dump, protected by ce-lock */
  475. struct ath10k_ce_crash_data {
  476. __le32 base_addr;
  477. __le32 src_wr_idx;
  478. __le32 src_r_idx;
  479. __le32 dst_wr_idx;
  480. __le32 dst_r_idx;
  481. };
  482. struct ath10k_ce_crash_hdr {
  483. __le32 ce_count;
  484. __le32 reserved[3]; /* for future use */
  485. struct ath10k_ce_crash_data entries[];
  486. };
  487. #define MAX_MEM_DUMP_TYPE 5
  488. /* used for crash-dump storage, protected by data-lock */
  489. struct ath10k_fw_crash_data {
  490. guid_t guid;
  491. struct timespec64 timestamp;
  492. __le32 registers[REG_DUMP_COUNT_QCA988X];
  493. struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX];
  494. u8 *ramdump_buf;
  495. size_t ramdump_buf_len;
  496. };
  497. struct ath10k_debug {
  498. struct dentry *debugfs_phy;
  499. struct ath10k_fw_stats fw_stats;
  500. struct completion fw_stats_complete;
  501. bool fw_stats_done;
  502. unsigned long htt_stats_mask;
  503. struct delayed_work htt_stats_dwork;
  504. struct ath10k_dfs_stats dfs_stats;
  505. struct ath_dfs_pool_stats dfs_pool_stats;
  506. /* used for tpc-dump storage, protected by data-lock */
  507. struct ath10k_tpc_stats *tpc_stats;
  508. struct ath10k_tpc_stats_final *tpc_stats_final;
  509. struct completion tpc_complete;
  510. /* protected by conf_mutex */
  511. u64 fw_dbglog_mask;
  512. u32 fw_dbglog_level;
  513. u32 reg_addr;
  514. u32 nf_cal_period;
  515. void *cal_data;
  516. };
  517. enum ath10k_state {
  518. ATH10K_STATE_OFF = 0,
  519. ATH10K_STATE_ON,
  520. /* When doing firmware recovery the device is first powered down.
  521. * mac80211 is supposed to call in to start() hook later on. It is
  522. * however possible that driver unloading and firmware crash overlap.
  523. * mac80211 can wait on conf_mutex in stop() while the device is
  524. * stopped in ath10k_core_restart() work holding conf_mutex. The state
  525. * RESTARTED means that the device is up and mac80211 has started hw
  526. * reconfiguration. Once mac80211 is done with the reconfiguration we
  527. * set the state to STATE_ON in reconfig_complete().
  528. */
  529. ATH10K_STATE_RESTARTING,
  530. ATH10K_STATE_RESTARTED,
  531. /* The device has crashed while restarting hw. This state is like ON
  532. * but commands are blocked in HTC and -ECOMM response is given. This
  533. * prevents completion timeouts and makes the driver more responsive to
  534. * userspace commands. This is also prevents recursive recovery.
  535. */
  536. ATH10K_STATE_WEDGED,
  537. /* factory tests */
  538. ATH10K_STATE_UTF,
  539. };
  540. enum ath10k_firmware_mode {
  541. /* the default mode, standard 802.11 functionality */
  542. ATH10K_FIRMWARE_MODE_NORMAL,
  543. /* factory tests etc */
  544. ATH10K_FIRMWARE_MODE_UTF,
  545. };
  546. enum ath10k_fw_features {
  547. /* wmi_mgmt_rx_hdr contains extra RSSI information */
  548. ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
  549. /* Firmware from 10X branch. Deprecated, don't use in new code. */
  550. ATH10K_FW_FEATURE_WMI_10X = 1,
  551. /* firmware support tx frame management over WMI, otherwise it's HTT */
  552. ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
  553. /* Firmware does not support P2P */
  554. ATH10K_FW_FEATURE_NO_P2P = 3,
  555. /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
  556. * bit is required to be set as well. Deprecated, don't use in new
  557. * code.
  558. */
  559. ATH10K_FW_FEATURE_WMI_10_2 = 4,
  560. /* Some firmware revisions lack proper multi-interface client powersave
  561. * implementation. Enabling PS could result in connection drops,
  562. * traffic stalls, etc.
  563. */
  564. ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
  565. /* Some firmware revisions have an incomplete WoWLAN implementation
  566. * despite WMI service bit being advertised. This feature flag is used
  567. * to distinguish whether WoWLAN is really supported or not.
  568. */
  569. ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
  570. /* Don't trust error code from otp.bin */
  571. ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
  572. /* Some firmware revisions pad 4th hw address to 4 byte boundary making
  573. * it 8 bytes long in Native Wifi Rx decap.
  574. */
  575. ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
  576. /* Firmware supports bypassing PLL setting on init. */
  577. ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
  578. /* Raw mode support. If supported, FW supports receiving and trasmitting
  579. * frames in raw mode.
  580. */
  581. ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
  582. /* Firmware Supports Adaptive CCA*/
  583. ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
  584. /* Firmware supports management frame protection */
  585. ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
  586. /* Firmware supports pull-push model where host shares it's software
  587. * queue state with firmware and firmware generates fetch requests
  588. * telling host which queues to dequeue tx from.
  589. *
  590. * Primary function of this is improved MU-MIMO performance with
  591. * multiple clients.
  592. */
  593. ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,
  594. /* Firmware supports BT-Coex without reloading firmware via pdev param.
  595. * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of
  596. * extended resource config should be enabled always. This firmware IE
  597. * is used to configure WMI_COEX_GPIO_SUPPORT.
  598. */
  599. ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,
  600. /* Unused flag and proven to be not working, enable this if you want
  601. * to experiment sending NULL func data frames in HTT TX
  602. */
  603. ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,
  604. /* Firmware allow other BSS mesh broadcast/multicast frames without
  605. * creating monitor interface. Appropriate rxfilters are programmed for
  606. * mesh vdev by firmware itself. This feature flags will be used for
  607. * not creating monitor vdev while configuring mesh node.
  608. */
  609. ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16,
  610. /* Firmware does not support power save in station mode. */
  611. ATH10K_FW_FEATURE_NO_PS = 17,
  612. /* Firmware allows management tx by reference instead of by value. */
  613. ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18,
  614. /* Firmware load is done externally, not by bmi */
  615. ATH10K_FW_FEATURE_NON_BMI = 19,
  616. /* keep last */
  617. ATH10K_FW_FEATURE_COUNT,
  618. };
  619. enum ath10k_dev_flags {
  620. /* Indicates that ath10k device is during CAC phase of DFS */
  621. ATH10K_CAC_RUNNING,
  622. ATH10K_FLAG_CORE_REGISTERED,
  623. /* Device has crashed and needs to restart. This indicates any pending
  624. * waiters should immediately cancel instead of waiting for a time out.
  625. */
  626. ATH10K_FLAG_CRASH_FLUSH,
  627. /* Use Raw mode instead of native WiFi Tx/Rx encap mode.
  628. * Raw mode supports both hardware and software crypto. Native WiFi only
  629. * supports hardware crypto.
  630. */
  631. ATH10K_FLAG_RAW_MODE,
  632. /* Disable HW crypto engine */
  633. ATH10K_FLAG_HW_CRYPTO_DISABLED,
  634. /* Bluetooth coexistance enabled */
  635. ATH10K_FLAG_BTCOEX,
  636. /* Per Station statistics service */
  637. ATH10K_FLAG_PEER_STATS,
  638. };
  639. enum ath10k_cal_mode {
  640. ATH10K_CAL_MODE_FILE,
  641. ATH10K_CAL_MODE_OTP,
  642. ATH10K_CAL_MODE_DT,
  643. ATH10K_PRE_CAL_MODE_FILE,
  644. ATH10K_PRE_CAL_MODE_DT,
  645. ATH10K_CAL_MODE_EEPROM,
  646. };
  647. enum ath10k_crypt_mode {
  648. /* Only use hardware crypto engine */
  649. ATH10K_CRYPT_MODE_HW,
  650. /* Only use software crypto engine */
  651. ATH10K_CRYPT_MODE_SW,
  652. };
  653. static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
  654. {
  655. switch (mode) {
  656. case ATH10K_CAL_MODE_FILE:
  657. return "file";
  658. case ATH10K_CAL_MODE_OTP:
  659. return "otp";
  660. case ATH10K_CAL_MODE_DT:
  661. return "dt";
  662. case ATH10K_PRE_CAL_MODE_FILE:
  663. return "pre-cal-file";
  664. case ATH10K_PRE_CAL_MODE_DT:
  665. return "pre-cal-dt";
  666. case ATH10K_CAL_MODE_EEPROM:
  667. return "eeprom";
  668. }
  669. return "unknown";
  670. }
  671. enum ath10k_scan_state {
  672. ATH10K_SCAN_IDLE,
  673. ATH10K_SCAN_STARTING,
  674. ATH10K_SCAN_RUNNING,
  675. ATH10K_SCAN_ABORTING,
  676. };
  677. static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
  678. {
  679. switch (state) {
  680. case ATH10K_SCAN_IDLE:
  681. return "idle";
  682. case ATH10K_SCAN_STARTING:
  683. return "starting";
  684. case ATH10K_SCAN_RUNNING:
  685. return "running";
  686. case ATH10K_SCAN_ABORTING:
  687. return "aborting";
  688. }
  689. return "unknown";
  690. }
  691. enum ath10k_tx_pause_reason {
  692. ATH10K_TX_PAUSE_Q_FULL,
  693. ATH10K_TX_PAUSE_MAX,
  694. };
  695. struct ath10k_fw_file {
  696. const struct firmware *firmware;
  697. char fw_version[ETHTOOL_FWVERS_LEN];
  698. DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
  699. enum ath10k_fw_wmi_op_version wmi_op_version;
  700. enum ath10k_fw_htt_op_version htt_op_version;
  701. const void *firmware_data;
  702. size_t firmware_len;
  703. const void *otp_data;
  704. size_t otp_len;
  705. const void *codeswap_data;
  706. size_t codeswap_len;
  707. /* The original idea of struct ath10k_fw_file was that it only
  708. * contains struct firmware and pointers to various parts (actual
  709. * firmware binary, otp, metadata etc) of the file. This seg_info
  710. * is actually created separate but as this is used similarly as
  711. * the other firmware components it's more convenient to have it
  712. * here.
  713. */
  714. struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
  715. };
  716. struct ath10k_fw_components {
  717. const struct firmware *board;
  718. const void *board_data;
  719. size_t board_len;
  720. struct ath10k_fw_file fw_file;
  721. };
  722. struct ath10k_per_peer_tx_stats {
  723. u32 succ_bytes;
  724. u32 retry_bytes;
  725. u32 failed_bytes;
  726. u8 ratecode;
  727. u8 flags;
  728. u16 peer_id;
  729. u16 succ_pkts;
  730. u16 retry_pkts;
  731. u16 failed_pkts;
  732. u16 duration;
  733. u32 reserved1;
  734. u32 reserved2;
  735. };
  736. struct ath10k {
  737. struct ath_common ath_common;
  738. struct ieee80211_hw *hw;
  739. struct ieee80211_ops *ops;
  740. struct device *dev;
  741. u8 mac_addr[ETH_ALEN];
  742. enum ath10k_hw_rev hw_rev;
  743. u16 dev_id;
  744. u32 chip_id;
  745. u32 target_version;
  746. u8 fw_version_major;
  747. u32 fw_version_minor;
  748. u16 fw_version_release;
  749. u16 fw_version_build;
  750. u32 fw_stats_req_mask;
  751. u32 phy_capability;
  752. u32 hw_min_tx_power;
  753. u32 hw_max_tx_power;
  754. u32 hw_eeprom_rd;
  755. u32 ht_cap_info;
  756. u32 vht_cap_info;
  757. u32 num_rf_chains;
  758. u32 max_spatial_stream;
  759. /* protected by conf_mutex */
  760. u32 low_5ghz_chan;
  761. u32 high_5ghz_chan;
  762. bool ani_enabled;
  763. bool p2p;
  764. struct {
  765. enum ath10k_bus bus;
  766. const struct ath10k_hif_ops *ops;
  767. } hif;
  768. struct completion target_suspend;
  769. const struct ath10k_hw_regs *regs;
  770. const struct ath10k_hw_ce_regs *hw_ce_regs;
  771. const struct ath10k_hw_values *hw_values;
  772. struct ath10k_bmi bmi;
  773. struct ath10k_wmi wmi;
  774. struct ath10k_htc htc;
  775. struct ath10k_htt htt;
  776. struct ath10k_hw_params hw_params;
  777. /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */
  778. struct ath10k_fw_components normal_mode_fw;
  779. /* READ-ONLY images of the running firmware, which can be either
  780. * normal or UTF. Do not modify, release etc!
  781. */
  782. const struct ath10k_fw_components *running_fw;
  783. const struct firmware *pre_cal_file;
  784. const struct firmware *cal_file;
  785. struct {
  786. u32 vendor;
  787. u32 device;
  788. u32 subsystem_vendor;
  789. u32 subsystem_device;
  790. bool bmi_ids_valid;
  791. u8 bmi_board_id;
  792. u8 bmi_chip_id;
  793. char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH];
  794. } id;
  795. int fw_api;
  796. int bd_api;
  797. enum ath10k_cal_mode cal_mode;
  798. struct {
  799. struct completion started;
  800. struct completion completed;
  801. struct completion on_channel;
  802. struct delayed_work timeout;
  803. enum ath10k_scan_state state;
  804. bool is_roc;
  805. int vdev_id;
  806. int roc_freq;
  807. bool roc_notify;
  808. } scan;
  809. struct {
  810. struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
  811. } mac;
  812. /* should never be NULL; needed for regular htt rx */
  813. struct ieee80211_channel *rx_channel;
  814. /* valid during scan; needed for mgmt rx during scan */
  815. struct ieee80211_channel *scan_channel;
  816. /* current operating channel definition */
  817. struct cfg80211_chan_def chandef;
  818. /* currently configured operating channel in firmware */
  819. struct ieee80211_channel *tgt_oper_chan;
  820. unsigned long long free_vdev_map;
  821. struct ath10k_vif *monitor_arvif;
  822. bool monitor;
  823. int monitor_vdev_id;
  824. bool monitor_started;
  825. unsigned int filter_flags;
  826. unsigned long dev_flags;
  827. bool dfs_block_radar_events;
  828. /* protected by conf_mutex */
  829. bool radar_enabled;
  830. int num_started_vdevs;
  831. /* Protected by conf-mutex */
  832. u8 cfg_tx_chainmask;
  833. u8 cfg_rx_chainmask;
  834. struct completion install_key_done;
  835. struct completion vdev_setup_done;
  836. struct workqueue_struct *workqueue;
  837. /* Auxiliary workqueue */
  838. struct workqueue_struct *workqueue_aux;
  839. /* prevents concurrent FW reconfiguration */
  840. struct mutex conf_mutex;
  841. /* protects shared structure data */
  842. spinlock_t data_lock;
  843. /* protects: ar->txqs, artxq->list */
  844. spinlock_t txqs_lock;
  845. struct list_head txqs;
  846. struct list_head arvifs;
  847. struct list_head peers;
  848. struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
  849. wait_queue_head_t peer_mapping_wq;
  850. /* protected by conf_mutex */
  851. int num_peers;
  852. int num_stations;
  853. int max_num_peers;
  854. int max_num_stations;
  855. int max_num_vdevs;
  856. int max_num_tdls_vdevs;
  857. int num_active_peers;
  858. int num_tids;
  859. struct work_struct svc_rdy_work;
  860. struct sk_buff *svc_rdy_skb;
  861. struct work_struct offchan_tx_work;
  862. struct sk_buff_head offchan_tx_queue;
  863. struct completion offchan_tx_completed;
  864. struct sk_buff *offchan_tx_skb;
  865. struct work_struct wmi_mgmt_tx_work;
  866. struct sk_buff_head wmi_mgmt_tx_queue;
  867. enum ath10k_state state;
  868. struct work_struct register_work;
  869. struct work_struct restart_work;
  870. /* cycle count is reported twice for each visited channel during scan.
  871. * access protected by data_lock
  872. */
  873. u32 survey_last_rx_clear_count;
  874. u32 survey_last_cycle_count;
  875. struct survey_info survey[ATH10K_NUM_CHANS];
  876. /* Channel info events are expected to come in pairs without and with
  877. * COMPLETE flag set respectively for each channel visit during scan.
  878. *
  879. * However there are deviations from this rule. This flag is used to
  880. * avoid reporting garbage data.
  881. */
  882. bool ch_info_can_report_survey;
  883. struct completion bss_survey_done;
  884. struct dfs_pattern_detector *dfs_detector;
  885. unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
  886. #ifdef CONFIG_ATH10K_DEBUGFS
  887. struct ath10k_debug debug;
  888. struct {
  889. /* relay(fs) channel for spectral scan */
  890. struct rchan *rfs_chan_spec_scan;
  891. /* spectral_mode and spec_config are protected by conf_mutex */
  892. enum ath10k_spectral_mode mode;
  893. struct ath10k_spec_scan config;
  894. } spectral;
  895. #endif
  896. u32 pktlog_filter;
  897. #ifdef CONFIG_DEV_COREDUMP
  898. struct {
  899. struct ath10k_fw_crash_data *fw_crash_data;
  900. } coredump;
  901. #endif
  902. struct {
  903. /* protected by conf_mutex */
  904. struct ath10k_fw_components utf_mode_fw;
  905. /* protected by data_lock */
  906. bool utf_monitor;
  907. } testmode;
  908. struct {
  909. /* protected by data_lock */
  910. u32 fw_crash_counter;
  911. u32 fw_warm_reset_counter;
  912. u32 fw_cold_reset_counter;
  913. } stats;
  914. struct ath10k_thermal thermal;
  915. struct ath10k_wow wow;
  916. struct ath10k_per_peer_tx_stats peer_tx_stats;
  917. /* NAPI */
  918. struct net_device napi_dev;
  919. struct napi_struct napi;
  920. struct work_struct set_coverage_class_work;
  921. /* protected by conf_mutex */
  922. struct {
  923. /* writing also protected by data_lock */
  924. s16 coverage_class;
  925. u32 reg_phyclk;
  926. u32 reg_slottime_conf;
  927. u32 reg_slottime_orig;
  928. u32 reg_ack_cts_timeout_conf;
  929. u32 reg_ack_cts_timeout_orig;
  930. } fw_coverage;
  931. u32 ampdu_reference;
  932. void *ce_priv;
  933. u32 sta_tid_stats_mask;
  934. /* protected by data_lock */
  935. enum ath10k_radar_confirmation_state radar_conf_state;
  936. struct ath10k_radar_found_info last_radar_info;
  937. struct work_struct radar_confirmation_work;
  938. /* must be last */
  939. u8 drv_priv[0] __aligned(sizeof(void *));
  940. };
  941. static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
  942. {
  943. if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&
  944. test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
  945. return true;
  946. return false;
  947. }
  948. extern unsigned long ath10k_coredump_mask;
  949. struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
  950. enum ath10k_bus bus,
  951. enum ath10k_hw_rev hw_rev,
  952. const struct ath10k_hif_ops *hif_ops);
  953. void ath10k_core_destroy(struct ath10k *ar);
  954. void ath10k_core_get_fw_features_str(struct ath10k *ar,
  955. char *buf,
  956. size_t max_len);
  957. int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
  958. struct ath10k_fw_file *fw_file);
  959. int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
  960. const struct ath10k_fw_components *fw_components);
  961. int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
  962. void ath10k_core_stop(struct ath10k *ar);
  963. int ath10k_core_register(struct ath10k *ar, u32 chip_id);
  964. void ath10k_core_unregister(struct ath10k *ar);
  965. #endif /* _CORE_H_ */