marvell.c 55 KB

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  1. /*
  2. * drivers/net/phy/marvell.c
  3. *
  4. * Driver for Marvell PHYs
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. *
  10. * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. *
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/string.h>
  20. #include <linux/ctype.h>
  21. #include <linux/errno.h>
  22. #include <linux/unistd.h>
  23. #include <linux/hwmon.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/init.h>
  26. #include <linux/delay.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/mm.h>
  32. #include <linux/module.h>
  33. #include <linux/mii.h>
  34. #include <linux/ethtool.h>
  35. #include <linux/phy.h>
  36. #include <linux/marvell_phy.h>
  37. #include <linux/of.h>
  38. #include <linux/io.h>
  39. #include <asm/irq.h>
  40. #include <linux/uaccess.h>
  41. #define MII_MARVELL_PHY_PAGE 22
  42. #define MII_MARVELL_COPPER_PAGE 0x00
  43. #define MII_MARVELL_FIBER_PAGE 0x01
  44. #define MII_MARVELL_MSCR_PAGE 0x02
  45. #define MII_MARVELL_LED_PAGE 0x03
  46. #define MII_MARVELL_MISC_TEST_PAGE 0x06
  47. #define MII_MARVELL_WOL_PAGE 0x11
  48. #define MII_M1011_IEVENT 0x13
  49. #define MII_M1011_IEVENT_CLEAR 0x0000
  50. #define MII_M1011_IMASK 0x12
  51. #define MII_M1011_IMASK_INIT 0x6400
  52. #define MII_M1011_IMASK_CLEAR 0x0000
  53. #define MII_M1011_PHY_SCR 0x10
  54. #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
  55. #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
  56. #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
  57. #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
  58. #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
  59. #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
  60. #define MII_M1111_PHY_LED_CONTROL 0x18
  61. #define MII_M1111_PHY_LED_DIRECT 0x4100
  62. #define MII_M1111_PHY_LED_COMBINE 0x411c
  63. #define MII_M1111_PHY_EXT_CR 0x14
  64. #define MII_M1111_RGMII_RX_DELAY BIT(7)
  65. #define MII_M1111_RGMII_TX_DELAY BIT(1)
  66. #define MII_M1111_PHY_EXT_SR 0x1b
  67. #define MII_M1111_HWCFG_MODE_MASK 0xf
  68. #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
  69. #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
  70. #define MII_M1111_HWCFG_MODE_RTBI 0x7
  71. #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
  72. #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
  73. #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
  74. #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
  75. #define MII_88E1121_PHY_MSCR_REG 21
  76. #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
  77. #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
  78. #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
  79. #define MII_88E1121_MISC_TEST 0x1a
  80. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
  81. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
  82. #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
  83. #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
  84. #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
  85. #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
  86. #define MII_88E1510_TEMP_SENSOR 0x1b
  87. #define MII_88E1510_TEMP_SENSOR_MASK 0xff
  88. #define MII_88E6390_MISC_TEST 0x1b
  89. #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
  90. #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
  91. #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
  92. #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
  93. #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
  94. #define MII_88E6390_TEMP_SENSOR 0x1c
  95. #define MII_88E6390_TEMP_SENSOR_MASK 0xff
  96. #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
  97. #define MII_88E1318S_PHY_MSCR1_REG 16
  98. #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
  99. /* Copper Specific Interrupt Enable Register */
  100. #define MII_88E1318S_PHY_CSIER 0x12
  101. /* WOL Event Interrupt Enable */
  102. #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
  103. /* LED Timer Control Register */
  104. #define MII_88E1318S_PHY_LED_TCR 0x12
  105. #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
  106. #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
  107. #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
  108. /* Magic Packet MAC address registers */
  109. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
  110. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
  111. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
  112. #define MII_88E1318S_PHY_WOL_CTRL 0x10
  113. #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
  114. #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
  115. #define MII_88E1121_PHY_LED_CTRL 16
  116. #define MII_88E1121_PHY_LED_DEF 0x0030
  117. #define MII_M1011_PHY_STATUS 0x11
  118. #define MII_M1011_PHY_STATUS_1000 0x8000
  119. #define MII_M1011_PHY_STATUS_100 0x4000
  120. #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
  121. #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  122. #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
  123. #define MII_M1011_PHY_STATUS_LINK 0x0400
  124. #define MII_88E3016_PHY_SPEC_CTRL 0x10
  125. #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
  126. #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
  127. #define MII_88E1510_GEN_CTRL_REG_1 0x14
  128. #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
  129. #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
  130. #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
  131. #define LPA_FIBER_1000HALF 0x40
  132. #define LPA_FIBER_1000FULL 0x20
  133. #define LPA_PAUSE_FIBER 0x180
  134. #define LPA_PAUSE_ASYM_FIBER 0x100
  135. #define ADVERTISE_FIBER_1000HALF 0x40
  136. #define ADVERTISE_FIBER_1000FULL 0x20
  137. #define ADVERTISE_PAUSE_FIBER 0x180
  138. #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
  139. #define REGISTER_LINK_STATUS 0x400
  140. #define NB_FIBER_STATS 1
  141. MODULE_DESCRIPTION("Marvell PHY driver");
  142. MODULE_AUTHOR("Andy Fleming");
  143. MODULE_LICENSE("GPL");
  144. struct marvell_hw_stat {
  145. const char *string;
  146. u8 page;
  147. u8 reg;
  148. u8 bits;
  149. };
  150. static struct marvell_hw_stat marvell_hw_stats[] = {
  151. { "phy_receive_errors_copper", 0, 21, 16},
  152. { "phy_idle_errors", 0, 10, 8 },
  153. { "phy_receive_errors_fiber", 1, 21, 16},
  154. };
  155. struct marvell_priv {
  156. u64 stats[ARRAY_SIZE(marvell_hw_stats)];
  157. char *hwmon_name;
  158. struct device *hwmon_dev;
  159. };
  160. static int marvell_read_page(struct phy_device *phydev)
  161. {
  162. return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
  163. }
  164. static int marvell_write_page(struct phy_device *phydev, int page)
  165. {
  166. return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  167. }
  168. static int marvell_set_page(struct phy_device *phydev, int page)
  169. {
  170. return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  171. }
  172. static int marvell_ack_interrupt(struct phy_device *phydev)
  173. {
  174. int err;
  175. /* Clear the interrupts by reading the reg */
  176. err = phy_read(phydev, MII_M1011_IEVENT);
  177. if (err < 0)
  178. return err;
  179. return 0;
  180. }
  181. static int marvell_config_intr(struct phy_device *phydev)
  182. {
  183. int err;
  184. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  185. err = phy_write(phydev, MII_M1011_IMASK,
  186. MII_M1011_IMASK_INIT);
  187. else
  188. err = phy_write(phydev, MII_M1011_IMASK,
  189. MII_M1011_IMASK_CLEAR);
  190. return err;
  191. }
  192. static int marvell_set_polarity(struct phy_device *phydev, int polarity)
  193. {
  194. int reg;
  195. int err;
  196. int val;
  197. /* get the current settings */
  198. reg = phy_read(phydev, MII_M1011_PHY_SCR);
  199. if (reg < 0)
  200. return reg;
  201. val = reg;
  202. val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
  203. switch (polarity) {
  204. case ETH_TP_MDI:
  205. val |= MII_M1011_PHY_SCR_MDI;
  206. break;
  207. case ETH_TP_MDI_X:
  208. val |= MII_M1011_PHY_SCR_MDI_X;
  209. break;
  210. case ETH_TP_MDI_AUTO:
  211. case ETH_TP_MDI_INVALID:
  212. default:
  213. val |= MII_M1011_PHY_SCR_AUTO_CROSS;
  214. break;
  215. }
  216. if (val != reg) {
  217. /* Set the new polarity value in the register */
  218. err = phy_write(phydev, MII_M1011_PHY_SCR, val);
  219. if (err)
  220. return err;
  221. }
  222. return 0;
  223. }
  224. static int marvell_set_downshift(struct phy_device *phydev, bool enable,
  225. u8 retries)
  226. {
  227. int reg;
  228. reg = phy_read(phydev, MII_M1011_PHY_SCR);
  229. if (reg < 0)
  230. return reg;
  231. reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
  232. reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
  233. if (enable)
  234. reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
  235. return phy_write(phydev, MII_M1011_PHY_SCR, reg);
  236. }
  237. static int marvell_config_aneg(struct phy_device *phydev)
  238. {
  239. int err;
  240. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  241. if (err < 0)
  242. return err;
  243. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  244. MII_M1111_PHY_LED_DIRECT);
  245. if (err < 0)
  246. return err;
  247. err = genphy_config_aneg(phydev);
  248. if (err < 0)
  249. return err;
  250. if (phydev->autoneg != AUTONEG_ENABLE) {
  251. /* A write to speed/duplex bits (that is performed by
  252. * genphy_config_aneg() call above) must be followed by
  253. * a software reset. Otherwise, the write has no effect.
  254. */
  255. err = genphy_soft_reset(phydev);
  256. if (err < 0)
  257. return err;
  258. }
  259. return 0;
  260. }
  261. static int m88e1101_config_aneg(struct phy_device *phydev)
  262. {
  263. int err;
  264. /* This Marvell PHY has an errata which requires
  265. * that certain registers get written in order
  266. * to restart autonegotiation
  267. */
  268. err = genphy_soft_reset(phydev);
  269. if (err < 0)
  270. return err;
  271. err = phy_write(phydev, 0x1d, 0x1f);
  272. if (err < 0)
  273. return err;
  274. err = phy_write(phydev, 0x1e, 0x200c);
  275. if (err < 0)
  276. return err;
  277. err = phy_write(phydev, 0x1d, 0x5);
  278. if (err < 0)
  279. return err;
  280. err = phy_write(phydev, 0x1e, 0);
  281. if (err < 0)
  282. return err;
  283. err = phy_write(phydev, 0x1e, 0x100);
  284. if (err < 0)
  285. return err;
  286. return marvell_config_aneg(phydev);
  287. }
  288. static int m88e1111_config_aneg(struct phy_device *phydev)
  289. {
  290. int err;
  291. /* The Marvell PHY has an errata which requires
  292. * that certain registers get written in order
  293. * to restart autonegotiation
  294. */
  295. err = genphy_soft_reset(phydev);
  296. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  297. if (err < 0)
  298. return err;
  299. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  300. MII_M1111_PHY_LED_DIRECT);
  301. if (err < 0)
  302. return err;
  303. err = genphy_config_aneg(phydev);
  304. if (err < 0)
  305. return err;
  306. if (phydev->autoneg != AUTONEG_ENABLE) {
  307. /* A write to speed/duplex bits (that is performed by
  308. * genphy_config_aneg() call above) must be followed by
  309. * a software reset. Otherwise, the write has no effect.
  310. */
  311. err = genphy_soft_reset(phydev);
  312. if (err < 0)
  313. return err;
  314. }
  315. return 0;
  316. }
  317. #ifdef CONFIG_OF_MDIO
  318. /* Set and/or override some configuration registers based on the
  319. * marvell,reg-init property stored in the of_node for the phydev.
  320. *
  321. * marvell,reg-init = <reg-page reg mask value>,...;
  322. *
  323. * There may be one or more sets of <reg-page reg mask value>:
  324. *
  325. * reg-page: which register bank to use.
  326. * reg: the register.
  327. * mask: if non-zero, ANDed with existing register value.
  328. * value: ORed with the masked value and written to the regiser.
  329. *
  330. */
  331. static int marvell_of_reg_init(struct phy_device *phydev)
  332. {
  333. const __be32 *paddr;
  334. int len, i, saved_page, current_page, ret = 0;
  335. if (!phydev->mdio.dev.of_node)
  336. return 0;
  337. paddr = of_get_property(phydev->mdio.dev.of_node,
  338. "marvell,reg-init", &len);
  339. if (!paddr || len < (4 * sizeof(*paddr)))
  340. return 0;
  341. saved_page = phy_save_page(phydev);
  342. if (saved_page < 0)
  343. goto err;
  344. current_page = saved_page;
  345. len /= sizeof(*paddr);
  346. for (i = 0; i < len - 3; i += 4) {
  347. u16 page = be32_to_cpup(paddr + i);
  348. u16 reg = be32_to_cpup(paddr + i + 1);
  349. u16 mask = be32_to_cpup(paddr + i + 2);
  350. u16 val_bits = be32_to_cpup(paddr + i + 3);
  351. int val;
  352. if (page != current_page) {
  353. current_page = page;
  354. ret = marvell_write_page(phydev, page);
  355. if (ret < 0)
  356. goto err;
  357. }
  358. val = 0;
  359. if (mask) {
  360. val = __phy_read(phydev, reg);
  361. if (val < 0) {
  362. ret = val;
  363. goto err;
  364. }
  365. val &= mask;
  366. }
  367. val |= val_bits;
  368. ret = __phy_write(phydev, reg, val);
  369. if (ret < 0)
  370. goto err;
  371. }
  372. err:
  373. return phy_restore_page(phydev, saved_page, ret);
  374. }
  375. #else
  376. static int marvell_of_reg_init(struct phy_device *phydev)
  377. {
  378. return 0;
  379. }
  380. #endif /* CONFIG_OF_MDIO */
  381. static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
  382. {
  383. int mscr;
  384. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
  385. mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
  386. MII_88E1121_PHY_MSCR_TX_DELAY;
  387. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
  388. mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
  389. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
  390. mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
  391. else
  392. mscr = 0;
  393. return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  394. MII_88E1121_PHY_MSCR_REG,
  395. MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
  396. }
  397. static int m88e1121_config_aneg(struct phy_device *phydev)
  398. {
  399. int err = 0;
  400. if (phy_interface_is_rgmii(phydev)) {
  401. err = m88e1121_config_aneg_rgmii_delays(phydev);
  402. if (err < 0)
  403. return err;
  404. }
  405. err = genphy_soft_reset(phydev);
  406. if (err < 0)
  407. return err;
  408. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  409. if (err < 0)
  410. return err;
  411. return genphy_config_aneg(phydev);
  412. }
  413. static int m88e1318_config_aneg(struct phy_device *phydev)
  414. {
  415. int err;
  416. err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  417. MII_88E1318S_PHY_MSCR1_REG,
  418. 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
  419. if (err < 0)
  420. return err;
  421. return m88e1121_config_aneg(phydev);
  422. }
  423. /**
  424. * ethtool_adv_to_fiber_adv_t
  425. * @ethadv: the ethtool advertisement settings
  426. *
  427. * A small helper function that translates ethtool advertisement
  428. * settings to phy autonegotiation advertisements for the
  429. * MII_ADV register for fiber link.
  430. */
  431. static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
  432. {
  433. u32 result = 0;
  434. if (ethadv & ADVERTISED_1000baseT_Half)
  435. result |= ADVERTISE_FIBER_1000HALF;
  436. if (ethadv & ADVERTISED_1000baseT_Full)
  437. result |= ADVERTISE_FIBER_1000FULL;
  438. if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
  439. result |= LPA_PAUSE_ASYM_FIBER;
  440. else if (ethadv & ADVERTISE_PAUSE_CAP)
  441. result |= (ADVERTISE_PAUSE_FIBER
  442. & (~ADVERTISE_PAUSE_ASYM_FIBER));
  443. return result;
  444. }
  445. /**
  446. * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
  447. * @phydev: target phy_device struct
  448. *
  449. * Description: If auto-negotiation is enabled, we configure the
  450. * advertising, and then restart auto-negotiation. If it is not
  451. * enabled, then we write the BMCR. Adapted for fiber link in
  452. * some Marvell's devices.
  453. */
  454. static int marvell_config_aneg_fiber(struct phy_device *phydev)
  455. {
  456. int changed = 0;
  457. int err;
  458. int adv, oldadv;
  459. u32 advertise;
  460. if (phydev->autoneg != AUTONEG_ENABLE)
  461. return genphy_setup_forced(phydev);
  462. /* Only allow advertising what this PHY supports */
  463. phydev->advertising &= phydev->supported;
  464. advertise = phydev->advertising;
  465. /* Setup fiber advertisement */
  466. adv = phy_read(phydev, MII_ADVERTISE);
  467. if (adv < 0)
  468. return adv;
  469. oldadv = adv;
  470. adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
  471. | LPA_PAUSE_FIBER);
  472. adv |= ethtool_adv_to_fiber_adv_t(advertise);
  473. if (adv != oldadv) {
  474. err = phy_write(phydev, MII_ADVERTISE, adv);
  475. if (err < 0)
  476. return err;
  477. changed = 1;
  478. }
  479. if (changed == 0) {
  480. /* Advertisement hasn't changed, but maybe aneg was never on to
  481. * begin with? Or maybe phy was isolated?
  482. */
  483. int ctl = phy_read(phydev, MII_BMCR);
  484. if (ctl < 0)
  485. return ctl;
  486. if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
  487. changed = 1; /* do restart aneg */
  488. }
  489. /* Only restart aneg if we are advertising something different
  490. * than we were before.
  491. */
  492. if (changed > 0)
  493. changed = genphy_restart_aneg(phydev);
  494. return changed;
  495. }
  496. static int m88e1510_config_aneg(struct phy_device *phydev)
  497. {
  498. int err;
  499. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  500. if (err < 0)
  501. goto error;
  502. /* Configure the copper link first */
  503. err = m88e1318_config_aneg(phydev);
  504. if (err < 0)
  505. goto error;
  506. /* Do not touch the fiber page if we're in copper->sgmii mode */
  507. if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
  508. return 0;
  509. /* Then the fiber link */
  510. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  511. if (err < 0)
  512. goto error;
  513. err = marvell_config_aneg_fiber(phydev);
  514. if (err < 0)
  515. goto error;
  516. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  517. error:
  518. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  519. return err;
  520. }
  521. static int marvell_config_init(struct phy_device *phydev)
  522. {
  523. /* Set registers from marvell,reg-init DT property */
  524. return marvell_of_reg_init(phydev);
  525. }
  526. static int m88e1116r_config_init(struct phy_device *phydev)
  527. {
  528. int err;
  529. err = genphy_soft_reset(phydev);
  530. if (err < 0)
  531. return err;
  532. mdelay(500);
  533. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  534. if (err < 0)
  535. return err;
  536. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  537. if (err < 0)
  538. return err;
  539. err = marvell_set_downshift(phydev, true, 8);
  540. if (err < 0)
  541. return err;
  542. if (phy_interface_is_rgmii(phydev)) {
  543. err = m88e1121_config_aneg_rgmii_delays(phydev);
  544. if (err < 0)
  545. return err;
  546. }
  547. err = genphy_soft_reset(phydev);
  548. if (err < 0)
  549. return err;
  550. return marvell_config_init(phydev);
  551. }
  552. static int m88e3016_config_init(struct phy_device *phydev)
  553. {
  554. int ret;
  555. /* Enable Scrambler and Auto-Crossover */
  556. ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
  557. MII_88E3016_DISABLE_SCRAMBLER,
  558. MII_88E3016_AUTO_MDIX_CROSSOVER);
  559. if (ret < 0)
  560. return ret;
  561. return marvell_config_init(phydev);
  562. }
  563. static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
  564. u16 mode,
  565. int fibre_copper_auto)
  566. {
  567. if (fibre_copper_auto)
  568. mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
  569. return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
  570. MII_M1111_HWCFG_MODE_MASK |
  571. MII_M1111_HWCFG_FIBER_COPPER_AUTO |
  572. MII_M1111_HWCFG_FIBER_COPPER_RES,
  573. mode);
  574. }
  575. static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
  576. {
  577. int delay;
  578. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  579. delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
  580. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
  581. delay = MII_M1111_RGMII_RX_DELAY;
  582. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
  583. delay = MII_M1111_RGMII_TX_DELAY;
  584. } else {
  585. delay = 0;
  586. }
  587. return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
  588. MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
  589. delay);
  590. }
  591. static int m88e1111_config_init_rgmii(struct phy_device *phydev)
  592. {
  593. int temp;
  594. int err;
  595. err = m88e1111_config_init_rgmii_delays(phydev);
  596. if (err < 0)
  597. return err;
  598. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  599. if (temp < 0)
  600. return temp;
  601. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  602. if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
  603. temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
  604. else
  605. temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
  606. return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  607. }
  608. static int m88e1111_config_init_sgmii(struct phy_device *phydev)
  609. {
  610. int err;
  611. err = m88e1111_config_init_hwcfg_mode(
  612. phydev,
  613. MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  614. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  615. if (err < 0)
  616. return err;
  617. /* make sure copper is selected */
  618. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  619. }
  620. static int m88e1111_config_init_rtbi(struct phy_device *phydev)
  621. {
  622. int err;
  623. err = m88e1111_config_init_rgmii_delays(phydev);
  624. if (err < 0)
  625. return err;
  626. err = m88e1111_config_init_hwcfg_mode(
  627. phydev,
  628. MII_M1111_HWCFG_MODE_RTBI,
  629. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  630. if (err < 0)
  631. return err;
  632. /* soft reset */
  633. err = genphy_soft_reset(phydev);
  634. if (err < 0)
  635. return err;
  636. return m88e1111_config_init_hwcfg_mode(
  637. phydev,
  638. MII_M1111_HWCFG_MODE_RTBI,
  639. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  640. }
  641. static int m88e1111_config_init(struct phy_device *phydev)
  642. {
  643. int err;
  644. if (phy_interface_is_rgmii(phydev)) {
  645. err = m88e1111_config_init_rgmii(phydev);
  646. if (err < 0)
  647. return err;
  648. }
  649. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  650. err = m88e1111_config_init_sgmii(phydev);
  651. if (err < 0)
  652. return err;
  653. }
  654. if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
  655. err = m88e1111_config_init_rtbi(phydev);
  656. if (err < 0)
  657. return err;
  658. }
  659. err = marvell_of_reg_init(phydev);
  660. if (err < 0)
  661. return err;
  662. return genphy_soft_reset(phydev);
  663. }
  664. static int m88e1121_config_init(struct phy_device *phydev)
  665. {
  666. int err;
  667. /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
  668. err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
  669. MII_88E1121_PHY_LED_CTRL,
  670. MII_88E1121_PHY_LED_DEF);
  671. if (err < 0)
  672. return err;
  673. /* Set marvell,reg-init configuration from device tree */
  674. return marvell_config_init(phydev);
  675. }
  676. static int m88e1318_config_init(struct phy_device *phydev)
  677. {
  678. if (phy_interrupt_is_valid(phydev)) {
  679. int err = phy_modify_paged(
  680. phydev, MII_MARVELL_LED_PAGE,
  681. MII_88E1318S_PHY_LED_TCR,
  682. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  683. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  684. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  685. if (err < 0)
  686. return err;
  687. }
  688. return m88e1121_config_init(phydev);
  689. }
  690. static int m88e1510_config_init(struct phy_device *phydev)
  691. {
  692. int err;
  693. /* SGMII-to-Copper mode initialization */
  694. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  695. u32 pause;
  696. /* Select page 18 */
  697. err = marvell_set_page(phydev, 18);
  698. if (err < 0)
  699. return err;
  700. /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
  701. err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
  702. MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
  703. MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
  704. if (err < 0)
  705. return err;
  706. /* PHY reset is necessary after changing MODE[2:0] */
  707. err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
  708. MII_88E1510_GEN_CTRL_REG_1_RESET);
  709. if (err < 0)
  710. return err;
  711. /* Reset page selection */
  712. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  713. if (err < 0)
  714. return err;
  715. /* There appears to be a bug in the 88e1512 when used in
  716. * SGMII to copper mode, where the AN advertisement register
  717. * clears the pause bits each time a negotiation occurs.
  718. * This means we can never be truely sure what was advertised,
  719. * so disable Pause support.
  720. */
  721. pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause;
  722. phydev->supported &= ~pause;
  723. phydev->advertising &= ~pause;
  724. }
  725. return m88e1318_config_init(phydev);
  726. }
  727. static int m88e1118_config_aneg(struct phy_device *phydev)
  728. {
  729. int err;
  730. err = genphy_soft_reset(phydev);
  731. if (err < 0)
  732. return err;
  733. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  734. if (err < 0)
  735. return err;
  736. err = genphy_config_aneg(phydev);
  737. return 0;
  738. }
  739. static int m88e1118_config_init(struct phy_device *phydev)
  740. {
  741. int err;
  742. /* Change address */
  743. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  744. if (err < 0)
  745. return err;
  746. /* Enable 1000 Mbit */
  747. err = phy_write(phydev, 0x15, 0x1070);
  748. if (err < 0)
  749. return err;
  750. /* Change address */
  751. err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
  752. if (err < 0)
  753. return err;
  754. /* Adjust LED Control */
  755. if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
  756. err = phy_write(phydev, 0x10, 0x1100);
  757. else
  758. err = phy_write(phydev, 0x10, 0x021e);
  759. if (err < 0)
  760. return err;
  761. err = marvell_of_reg_init(phydev);
  762. if (err < 0)
  763. return err;
  764. /* Reset address */
  765. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  766. if (err < 0)
  767. return err;
  768. return genphy_soft_reset(phydev);
  769. }
  770. static int m88e1149_config_init(struct phy_device *phydev)
  771. {
  772. int err;
  773. /* Change address */
  774. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  775. if (err < 0)
  776. return err;
  777. /* Enable 1000 Mbit */
  778. err = phy_write(phydev, 0x15, 0x1048);
  779. if (err < 0)
  780. return err;
  781. err = marvell_of_reg_init(phydev);
  782. if (err < 0)
  783. return err;
  784. /* Reset address */
  785. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  786. if (err < 0)
  787. return err;
  788. return genphy_soft_reset(phydev);
  789. }
  790. static int m88e1145_config_init_rgmii(struct phy_device *phydev)
  791. {
  792. int err;
  793. err = m88e1111_config_init_rgmii_delays(phydev);
  794. if (err < 0)
  795. return err;
  796. if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
  797. err = phy_write(phydev, 0x1d, 0x0012);
  798. if (err < 0)
  799. return err;
  800. err = phy_modify(phydev, 0x1e, 0x0fc0,
  801. 2 << 9 | /* 36 ohm */
  802. 2 << 6); /* 39 ohm */
  803. if (err < 0)
  804. return err;
  805. err = phy_write(phydev, 0x1d, 0x3);
  806. if (err < 0)
  807. return err;
  808. err = phy_write(phydev, 0x1e, 0x8000);
  809. }
  810. return err;
  811. }
  812. static int m88e1145_config_init_sgmii(struct phy_device *phydev)
  813. {
  814. return m88e1111_config_init_hwcfg_mode(
  815. phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  816. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  817. }
  818. static int m88e1145_config_init(struct phy_device *phydev)
  819. {
  820. int err;
  821. /* Take care of errata E0 & E1 */
  822. err = phy_write(phydev, 0x1d, 0x001b);
  823. if (err < 0)
  824. return err;
  825. err = phy_write(phydev, 0x1e, 0x418f);
  826. if (err < 0)
  827. return err;
  828. err = phy_write(phydev, 0x1d, 0x0016);
  829. if (err < 0)
  830. return err;
  831. err = phy_write(phydev, 0x1e, 0xa2da);
  832. if (err < 0)
  833. return err;
  834. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  835. err = m88e1145_config_init_rgmii(phydev);
  836. if (err < 0)
  837. return err;
  838. }
  839. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  840. err = m88e1145_config_init_sgmii(phydev);
  841. if (err < 0)
  842. return err;
  843. }
  844. err = marvell_of_reg_init(phydev);
  845. if (err < 0)
  846. return err;
  847. return 0;
  848. }
  849. /**
  850. * fiber_lpa_to_ethtool_lpa_t
  851. * @lpa: value of the MII_LPA register for fiber link
  852. *
  853. * A small helper function that translates MII_LPA
  854. * bits to ethtool LP advertisement settings.
  855. */
  856. static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
  857. {
  858. u32 result = 0;
  859. if (lpa & LPA_FIBER_1000HALF)
  860. result |= ADVERTISED_1000baseT_Half;
  861. if (lpa & LPA_FIBER_1000FULL)
  862. result |= ADVERTISED_1000baseT_Full;
  863. return result;
  864. }
  865. /**
  866. * marvell_update_link - update link status in real time in @phydev
  867. * @phydev: target phy_device struct
  868. *
  869. * Description: Update the value in phydev->link to reflect the
  870. * current link value.
  871. */
  872. static int marvell_update_link(struct phy_device *phydev, int fiber)
  873. {
  874. int status;
  875. /* Use the generic register for copper link, or specific
  876. * register for fiber case
  877. */
  878. if (fiber) {
  879. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  880. if (status < 0)
  881. return status;
  882. if ((status & REGISTER_LINK_STATUS) == 0)
  883. phydev->link = 0;
  884. else
  885. phydev->link = 1;
  886. } else {
  887. return genphy_update_link(phydev);
  888. }
  889. return 0;
  890. }
  891. static int marvell_read_status_page_an(struct phy_device *phydev,
  892. int fiber)
  893. {
  894. int status;
  895. int lpa;
  896. int lpagb;
  897. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  898. if (status < 0)
  899. return status;
  900. lpa = phy_read(phydev, MII_LPA);
  901. if (lpa < 0)
  902. return lpa;
  903. lpagb = phy_read(phydev, MII_STAT1000);
  904. if (lpagb < 0)
  905. return lpagb;
  906. if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
  907. phydev->duplex = DUPLEX_FULL;
  908. else
  909. phydev->duplex = DUPLEX_HALF;
  910. status = status & MII_M1011_PHY_STATUS_SPD_MASK;
  911. phydev->pause = 0;
  912. phydev->asym_pause = 0;
  913. switch (status) {
  914. case MII_M1011_PHY_STATUS_1000:
  915. phydev->speed = SPEED_1000;
  916. break;
  917. case MII_M1011_PHY_STATUS_100:
  918. phydev->speed = SPEED_100;
  919. break;
  920. default:
  921. phydev->speed = SPEED_10;
  922. break;
  923. }
  924. if (!fiber) {
  925. phydev->lp_advertising =
  926. mii_stat1000_to_ethtool_lpa_t(lpagb) |
  927. mii_lpa_to_ethtool_lpa_t(lpa);
  928. if (phydev->duplex == DUPLEX_FULL) {
  929. phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
  930. phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
  931. }
  932. } else {
  933. /* The fiber link is only 1000M capable */
  934. phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
  935. if (phydev->duplex == DUPLEX_FULL) {
  936. if (!(lpa & LPA_PAUSE_FIBER)) {
  937. phydev->pause = 0;
  938. phydev->asym_pause = 0;
  939. } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
  940. phydev->pause = 1;
  941. phydev->asym_pause = 1;
  942. } else {
  943. phydev->pause = 1;
  944. phydev->asym_pause = 0;
  945. }
  946. }
  947. }
  948. return 0;
  949. }
  950. static int marvell_read_status_page_fixed(struct phy_device *phydev)
  951. {
  952. int bmcr = phy_read(phydev, MII_BMCR);
  953. if (bmcr < 0)
  954. return bmcr;
  955. if (bmcr & BMCR_FULLDPLX)
  956. phydev->duplex = DUPLEX_FULL;
  957. else
  958. phydev->duplex = DUPLEX_HALF;
  959. if (bmcr & BMCR_SPEED1000)
  960. phydev->speed = SPEED_1000;
  961. else if (bmcr & BMCR_SPEED100)
  962. phydev->speed = SPEED_100;
  963. else
  964. phydev->speed = SPEED_10;
  965. phydev->pause = 0;
  966. phydev->asym_pause = 0;
  967. phydev->lp_advertising = 0;
  968. return 0;
  969. }
  970. /* marvell_read_status_page
  971. *
  972. * Description:
  973. * Check the link, then figure out the current state
  974. * by comparing what we advertise with what the link partner
  975. * advertises. Start by checking the gigabit possibilities,
  976. * then move on to 10/100.
  977. */
  978. static int marvell_read_status_page(struct phy_device *phydev, int page)
  979. {
  980. int fiber;
  981. int err;
  982. /* Detect and update the link, but return if there
  983. * was an error
  984. */
  985. if (page == MII_MARVELL_FIBER_PAGE)
  986. fiber = 1;
  987. else
  988. fiber = 0;
  989. err = marvell_update_link(phydev, fiber);
  990. if (err)
  991. return err;
  992. if (phydev->autoneg == AUTONEG_ENABLE)
  993. err = marvell_read_status_page_an(phydev, fiber);
  994. else
  995. err = marvell_read_status_page_fixed(phydev);
  996. return err;
  997. }
  998. /* marvell_read_status
  999. *
  1000. * Some Marvell's phys have two modes: fiber and copper.
  1001. * Both need status checked.
  1002. * Description:
  1003. * First, check the fiber link and status.
  1004. * If the fiber link is down, check the copper link and status which
  1005. * will be the default value if both link are down.
  1006. */
  1007. static int marvell_read_status(struct phy_device *phydev)
  1008. {
  1009. int err;
  1010. /* Check the fiber mode first */
  1011. if (phydev->supported & SUPPORTED_FIBRE &&
  1012. phydev->interface != PHY_INTERFACE_MODE_SGMII) {
  1013. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1014. if (err < 0)
  1015. goto error;
  1016. err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
  1017. if (err < 0)
  1018. goto error;
  1019. /* If the fiber link is up, it is the selected and
  1020. * used link. In this case, we need to stay in the
  1021. * fiber page. Please to be careful about that, avoid
  1022. * to restore Copper page in other functions which
  1023. * could break the behaviour for some fiber phy like
  1024. * 88E1512.
  1025. */
  1026. if (phydev->link)
  1027. return 0;
  1028. /* If fiber link is down, check and save copper mode state */
  1029. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1030. if (err < 0)
  1031. goto error;
  1032. }
  1033. return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
  1034. error:
  1035. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1036. return err;
  1037. }
  1038. /* marvell_suspend
  1039. *
  1040. * Some Marvell's phys have two modes: fiber and copper.
  1041. * Both need to be suspended
  1042. */
  1043. static int marvell_suspend(struct phy_device *phydev)
  1044. {
  1045. int err;
  1046. /* Suspend the fiber mode first */
  1047. if (!(phydev->supported & SUPPORTED_FIBRE)) {
  1048. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1049. if (err < 0)
  1050. goto error;
  1051. /* With the page set, use the generic suspend */
  1052. err = genphy_suspend(phydev);
  1053. if (err < 0)
  1054. goto error;
  1055. /* Then, the copper link */
  1056. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1057. if (err < 0)
  1058. goto error;
  1059. }
  1060. /* With the page set, use the generic suspend */
  1061. return genphy_suspend(phydev);
  1062. error:
  1063. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1064. return err;
  1065. }
  1066. /* marvell_resume
  1067. *
  1068. * Some Marvell's phys have two modes: fiber and copper.
  1069. * Both need to be resumed
  1070. */
  1071. static int marvell_resume(struct phy_device *phydev)
  1072. {
  1073. int err;
  1074. /* Resume the fiber mode first */
  1075. if (!(phydev->supported & SUPPORTED_FIBRE)) {
  1076. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1077. if (err < 0)
  1078. goto error;
  1079. /* With the page set, use the generic resume */
  1080. err = genphy_resume(phydev);
  1081. if (err < 0)
  1082. goto error;
  1083. /* Then, the copper link */
  1084. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1085. if (err < 0)
  1086. goto error;
  1087. }
  1088. /* With the page set, use the generic resume */
  1089. return genphy_resume(phydev);
  1090. error:
  1091. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1092. return err;
  1093. }
  1094. static int marvell_aneg_done(struct phy_device *phydev)
  1095. {
  1096. int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
  1097. return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
  1098. }
  1099. static int m88e1121_did_interrupt(struct phy_device *phydev)
  1100. {
  1101. int imask;
  1102. imask = phy_read(phydev, MII_M1011_IEVENT);
  1103. if (imask & MII_M1011_IMASK_INIT)
  1104. return 1;
  1105. return 0;
  1106. }
  1107. static void m88e1318_get_wol(struct phy_device *phydev,
  1108. struct ethtool_wolinfo *wol)
  1109. {
  1110. int oldpage, ret = 0;
  1111. wol->supported = WAKE_MAGIC;
  1112. wol->wolopts = 0;
  1113. oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
  1114. if (oldpage < 0)
  1115. goto error;
  1116. ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
  1117. if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
  1118. wol->wolopts |= WAKE_MAGIC;
  1119. error:
  1120. phy_restore_page(phydev, oldpage, ret);
  1121. }
  1122. static int m88e1318_set_wol(struct phy_device *phydev,
  1123. struct ethtool_wolinfo *wol)
  1124. {
  1125. int err = 0, oldpage;
  1126. oldpage = phy_save_page(phydev);
  1127. if (oldpage < 0)
  1128. goto error;
  1129. if (wol->wolopts & WAKE_MAGIC) {
  1130. /* Explicitly switch to page 0x00, just to be sure */
  1131. err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
  1132. if (err < 0)
  1133. goto error;
  1134. /* If WOL event happened once, the LED[2] interrupt pin
  1135. * will not be cleared unless we reading the interrupt status
  1136. * register. If interrupts are in use, the normal interrupt
  1137. * handling will clear the WOL event. Clear the WOL event
  1138. * before enabling it if !phy_interrupt_is_valid()
  1139. */
  1140. if (!phy_interrupt_is_valid(phydev))
  1141. phy_read(phydev, MII_M1011_IEVENT);
  1142. /* Enable the WOL interrupt */
  1143. err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
  1144. MII_88E1318S_PHY_CSIER_WOL_EIE);
  1145. if (err < 0)
  1146. goto error;
  1147. err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
  1148. if (err < 0)
  1149. goto error;
  1150. /* Setup LED[2] as interrupt pin (active low) */
  1151. err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
  1152. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  1153. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  1154. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  1155. if (err < 0)
  1156. goto error;
  1157. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1158. if (err < 0)
  1159. goto error;
  1160. /* Store the device address for the magic packet */
  1161. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
  1162. ((phydev->attached_dev->dev_addr[5] << 8) |
  1163. phydev->attached_dev->dev_addr[4]));
  1164. if (err < 0)
  1165. goto error;
  1166. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
  1167. ((phydev->attached_dev->dev_addr[3] << 8) |
  1168. phydev->attached_dev->dev_addr[2]));
  1169. if (err < 0)
  1170. goto error;
  1171. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
  1172. ((phydev->attached_dev->dev_addr[1] << 8) |
  1173. phydev->attached_dev->dev_addr[0]));
  1174. if (err < 0)
  1175. goto error;
  1176. /* Clear WOL status and enable magic packet matching */
  1177. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
  1178. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
  1179. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
  1180. if (err < 0)
  1181. goto error;
  1182. } else {
  1183. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1184. if (err < 0)
  1185. goto error;
  1186. /* Clear WOL status and disable magic packet matching */
  1187. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1188. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
  1189. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
  1190. if (err < 0)
  1191. goto error;
  1192. }
  1193. error:
  1194. return phy_restore_page(phydev, oldpage, err);
  1195. }
  1196. static int marvell_get_sset_count(struct phy_device *phydev)
  1197. {
  1198. if (phydev->supported & SUPPORTED_FIBRE)
  1199. return ARRAY_SIZE(marvell_hw_stats);
  1200. else
  1201. return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
  1202. }
  1203. static void marvell_get_strings(struct phy_device *phydev, u8 *data)
  1204. {
  1205. int i;
  1206. for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
  1207. strlcpy(data + i * ETH_GSTRING_LEN,
  1208. marvell_hw_stats[i].string, ETH_GSTRING_LEN);
  1209. }
  1210. }
  1211. static u64 marvell_get_stat(struct phy_device *phydev, int i)
  1212. {
  1213. struct marvell_hw_stat stat = marvell_hw_stats[i];
  1214. struct marvell_priv *priv = phydev->priv;
  1215. int val;
  1216. u64 ret;
  1217. val = phy_read_paged(phydev, stat.page, stat.reg);
  1218. if (val < 0) {
  1219. ret = U64_MAX;
  1220. } else {
  1221. val = val & ((1 << stat.bits) - 1);
  1222. priv->stats[i] += val;
  1223. ret = priv->stats[i];
  1224. }
  1225. return ret;
  1226. }
  1227. static void marvell_get_stats(struct phy_device *phydev,
  1228. struct ethtool_stats *stats, u64 *data)
  1229. {
  1230. int i;
  1231. for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
  1232. data[i] = marvell_get_stat(phydev, i);
  1233. }
  1234. #ifdef CONFIG_HWMON
  1235. static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
  1236. {
  1237. int oldpage;
  1238. int ret = 0;
  1239. int val;
  1240. *temp = 0;
  1241. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1242. if (oldpage < 0)
  1243. goto error;
  1244. /* Enable temperature sensor */
  1245. ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
  1246. if (ret < 0)
  1247. goto error;
  1248. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  1249. ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  1250. if (ret < 0)
  1251. goto error;
  1252. /* Wait for temperature to stabilize */
  1253. usleep_range(10000, 12000);
  1254. val = __phy_read(phydev, MII_88E1121_MISC_TEST);
  1255. if (val < 0) {
  1256. ret = val;
  1257. goto error;
  1258. }
  1259. /* Disable temperature sensor */
  1260. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  1261. ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  1262. if (ret < 0)
  1263. goto error;
  1264. *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
  1265. error:
  1266. return phy_restore_page(phydev, oldpage, ret);
  1267. }
  1268. static int m88e1121_hwmon_read(struct device *dev,
  1269. enum hwmon_sensor_types type,
  1270. u32 attr, int channel, long *temp)
  1271. {
  1272. struct phy_device *phydev = dev_get_drvdata(dev);
  1273. int err;
  1274. switch (attr) {
  1275. case hwmon_temp_input:
  1276. err = m88e1121_get_temp(phydev, temp);
  1277. break;
  1278. default:
  1279. return -EOPNOTSUPP;
  1280. }
  1281. return err;
  1282. }
  1283. static umode_t m88e1121_hwmon_is_visible(const void *data,
  1284. enum hwmon_sensor_types type,
  1285. u32 attr, int channel)
  1286. {
  1287. if (type != hwmon_temp)
  1288. return 0;
  1289. switch (attr) {
  1290. case hwmon_temp_input:
  1291. return 0444;
  1292. default:
  1293. return 0;
  1294. }
  1295. }
  1296. static u32 m88e1121_hwmon_chip_config[] = {
  1297. HWMON_C_REGISTER_TZ,
  1298. 0
  1299. };
  1300. static const struct hwmon_channel_info m88e1121_hwmon_chip = {
  1301. .type = hwmon_chip,
  1302. .config = m88e1121_hwmon_chip_config,
  1303. };
  1304. static u32 m88e1121_hwmon_temp_config[] = {
  1305. HWMON_T_INPUT,
  1306. 0
  1307. };
  1308. static const struct hwmon_channel_info m88e1121_hwmon_temp = {
  1309. .type = hwmon_temp,
  1310. .config = m88e1121_hwmon_temp_config,
  1311. };
  1312. static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
  1313. &m88e1121_hwmon_chip,
  1314. &m88e1121_hwmon_temp,
  1315. NULL
  1316. };
  1317. static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
  1318. .is_visible = m88e1121_hwmon_is_visible,
  1319. .read = m88e1121_hwmon_read,
  1320. };
  1321. static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
  1322. .ops = &m88e1121_hwmon_hwmon_ops,
  1323. .info = m88e1121_hwmon_info,
  1324. };
  1325. static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
  1326. {
  1327. int ret;
  1328. *temp = 0;
  1329. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1330. MII_88E1510_TEMP_SENSOR);
  1331. if (ret < 0)
  1332. return ret;
  1333. *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
  1334. return 0;
  1335. }
  1336. static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
  1337. {
  1338. int ret;
  1339. *temp = 0;
  1340. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1341. MII_88E1121_MISC_TEST);
  1342. if (ret < 0)
  1343. return ret;
  1344. *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
  1345. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
  1346. /* convert to mC */
  1347. *temp *= 1000;
  1348. return 0;
  1349. }
  1350. static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
  1351. {
  1352. temp = temp / 1000;
  1353. temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
  1354. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1355. MII_88E1121_MISC_TEST,
  1356. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
  1357. temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
  1358. }
  1359. static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
  1360. {
  1361. int ret;
  1362. *alarm = false;
  1363. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1364. MII_88E1121_MISC_TEST);
  1365. if (ret < 0)
  1366. return ret;
  1367. *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
  1368. return 0;
  1369. }
  1370. static int m88e1510_hwmon_read(struct device *dev,
  1371. enum hwmon_sensor_types type,
  1372. u32 attr, int channel, long *temp)
  1373. {
  1374. struct phy_device *phydev = dev_get_drvdata(dev);
  1375. int err;
  1376. switch (attr) {
  1377. case hwmon_temp_input:
  1378. err = m88e1510_get_temp(phydev, temp);
  1379. break;
  1380. case hwmon_temp_crit:
  1381. err = m88e1510_get_temp_critical(phydev, temp);
  1382. break;
  1383. case hwmon_temp_max_alarm:
  1384. err = m88e1510_get_temp_alarm(phydev, temp);
  1385. break;
  1386. default:
  1387. return -EOPNOTSUPP;
  1388. }
  1389. return err;
  1390. }
  1391. static int m88e1510_hwmon_write(struct device *dev,
  1392. enum hwmon_sensor_types type,
  1393. u32 attr, int channel, long temp)
  1394. {
  1395. struct phy_device *phydev = dev_get_drvdata(dev);
  1396. int err;
  1397. switch (attr) {
  1398. case hwmon_temp_crit:
  1399. err = m88e1510_set_temp_critical(phydev, temp);
  1400. break;
  1401. default:
  1402. return -EOPNOTSUPP;
  1403. }
  1404. return err;
  1405. }
  1406. static umode_t m88e1510_hwmon_is_visible(const void *data,
  1407. enum hwmon_sensor_types type,
  1408. u32 attr, int channel)
  1409. {
  1410. if (type != hwmon_temp)
  1411. return 0;
  1412. switch (attr) {
  1413. case hwmon_temp_input:
  1414. case hwmon_temp_max_alarm:
  1415. return 0444;
  1416. case hwmon_temp_crit:
  1417. return 0644;
  1418. default:
  1419. return 0;
  1420. }
  1421. }
  1422. static u32 m88e1510_hwmon_temp_config[] = {
  1423. HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
  1424. 0
  1425. };
  1426. static const struct hwmon_channel_info m88e1510_hwmon_temp = {
  1427. .type = hwmon_temp,
  1428. .config = m88e1510_hwmon_temp_config,
  1429. };
  1430. static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
  1431. &m88e1121_hwmon_chip,
  1432. &m88e1510_hwmon_temp,
  1433. NULL
  1434. };
  1435. static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
  1436. .is_visible = m88e1510_hwmon_is_visible,
  1437. .read = m88e1510_hwmon_read,
  1438. .write = m88e1510_hwmon_write,
  1439. };
  1440. static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
  1441. .ops = &m88e1510_hwmon_hwmon_ops,
  1442. .info = m88e1510_hwmon_info,
  1443. };
  1444. static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
  1445. {
  1446. int sum = 0;
  1447. int oldpage;
  1448. int ret = 0;
  1449. int i;
  1450. *temp = 0;
  1451. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1452. if (oldpage < 0)
  1453. goto error;
  1454. /* Enable temperature sensor */
  1455. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  1456. if (ret < 0)
  1457. goto error;
  1458. ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
  1459. ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
  1460. MII_88E6390_MISC_TEST_SAMPLE_1S;
  1461. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  1462. if (ret < 0)
  1463. goto error;
  1464. /* Wait for temperature to stabilize */
  1465. usleep_range(10000, 12000);
  1466. /* Reading the temperature sense has an errata. You need to read
  1467. * a number of times and take an average.
  1468. */
  1469. for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
  1470. ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
  1471. if (ret < 0)
  1472. goto error;
  1473. sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
  1474. }
  1475. sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
  1476. *temp = (sum - 75) * 1000;
  1477. /* Disable temperature sensor */
  1478. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  1479. if (ret < 0)
  1480. goto error;
  1481. ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
  1482. ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
  1483. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  1484. error:
  1485. phy_restore_page(phydev, oldpage, ret);
  1486. return ret;
  1487. }
  1488. static int m88e6390_hwmon_read(struct device *dev,
  1489. enum hwmon_sensor_types type,
  1490. u32 attr, int channel, long *temp)
  1491. {
  1492. struct phy_device *phydev = dev_get_drvdata(dev);
  1493. int err;
  1494. switch (attr) {
  1495. case hwmon_temp_input:
  1496. err = m88e6390_get_temp(phydev, temp);
  1497. break;
  1498. default:
  1499. return -EOPNOTSUPP;
  1500. }
  1501. return err;
  1502. }
  1503. static umode_t m88e6390_hwmon_is_visible(const void *data,
  1504. enum hwmon_sensor_types type,
  1505. u32 attr, int channel)
  1506. {
  1507. if (type != hwmon_temp)
  1508. return 0;
  1509. switch (attr) {
  1510. case hwmon_temp_input:
  1511. return 0444;
  1512. default:
  1513. return 0;
  1514. }
  1515. }
  1516. static u32 m88e6390_hwmon_temp_config[] = {
  1517. HWMON_T_INPUT,
  1518. 0
  1519. };
  1520. static const struct hwmon_channel_info m88e6390_hwmon_temp = {
  1521. .type = hwmon_temp,
  1522. .config = m88e6390_hwmon_temp_config,
  1523. };
  1524. static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
  1525. &m88e1121_hwmon_chip,
  1526. &m88e6390_hwmon_temp,
  1527. NULL
  1528. };
  1529. static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
  1530. .is_visible = m88e6390_hwmon_is_visible,
  1531. .read = m88e6390_hwmon_read,
  1532. };
  1533. static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
  1534. .ops = &m88e6390_hwmon_hwmon_ops,
  1535. .info = m88e6390_hwmon_info,
  1536. };
  1537. static int marvell_hwmon_name(struct phy_device *phydev)
  1538. {
  1539. struct marvell_priv *priv = phydev->priv;
  1540. struct device *dev = &phydev->mdio.dev;
  1541. const char *devname = dev_name(dev);
  1542. size_t len = strlen(devname);
  1543. int i, j;
  1544. priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
  1545. if (!priv->hwmon_name)
  1546. return -ENOMEM;
  1547. for (i = j = 0; i < len && devname[i]; i++) {
  1548. if (isalnum(devname[i]))
  1549. priv->hwmon_name[j++] = devname[i];
  1550. }
  1551. return 0;
  1552. }
  1553. static int marvell_hwmon_probe(struct phy_device *phydev,
  1554. const struct hwmon_chip_info *chip)
  1555. {
  1556. struct marvell_priv *priv = phydev->priv;
  1557. struct device *dev = &phydev->mdio.dev;
  1558. int err;
  1559. err = marvell_hwmon_name(phydev);
  1560. if (err)
  1561. return err;
  1562. priv->hwmon_dev = devm_hwmon_device_register_with_info(
  1563. dev, priv->hwmon_name, phydev, chip, NULL);
  1564. return PTR_ERR_OR_ZERO(priv->hwmon_dev);
  1565. }
  1566. static int m88e1121_hwmon_probe(struct phy_device *phydev)
  1567. {
  1568. return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
  1569. }
  1570. static int m88e1510_hwmon_probe(struct phy_device *phydev)
  1571. {
  1572. return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
  1573. }
  1574. static int m88e6390_hwmon_probe(struct phy_device *phydev)
  1575. {
  1576. return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
  1577. }
  1578. #else
  1579. static int m88e1121_hwmon_probe(struct phy_device *phydev)
  1580. {
  1581. return 0;
  1582. }
  1583. static int m88e1510_hwmon_probe(struct phy_device *phydev)
  1584. {
  1585. return 0;
  1586. }
  1587. static int m88e6390_hwmon_probe(struct phy_device *phydev)
  1588. {
  1589. return 0;
  1590. }
  1591. #endif
  1592. static int marvell_probe(struct phy_device *phydev)
  1593. {
  1594. struct marvell_priv *priv;
  1595. priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
  1596. if (!priv)
  1597. return -ENOMEM;
  1598. phydev->priv = priv;
  1599. return 0;
  1600. }
  1601. static int m88e1121_probe(struct phy_device *phydev)
  1602. {
  1603. int err;
  1604. err = marvell_probe(phydev);
  1605. if (err)
  1606. return err;
  1607. return m88e1121_hwmon_probe(phydev);
  1608. }
  1609. static int m88e1510_probe(struct phy_device *phydev)
  1610. {
  1611. int err;
  1612. err = marvell_probe(phydev);
  1613. if (err)
  1614. return err;
  1615. return m88e1510_hwmon_probe(phydev);
  1616. }
  1617. static int m88e6390_probe(struct phy_device *phydev)
  1618. {
  1619. int err;
  1620. err = marvell_probe(phydev);
  1621. if (err)
  1622. return err;
  1623. return m88e6390_hwmon_probe(phydev);
  1624. }
  1625. static struct phy_driver marvell_drivers[] = {
  1626. {
  1627. .phy_id = MARVELL_PHY_ID_88E1101,
  1628. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1629. .name = "Marvell 88E1101",
  1630. .features = PHY_GBIT_FEATURES,
  1631. .flags = PHY_HAS_INTERRUPT,
  1632. .probe = marvell_probe,
  1633. .config_init = &marvell_config_init,
  1634. .config_aneg = &m88e1101_config_aneg,
  1635. .ack_interrupt = &marvell_ack_interrupt,
  1636. .config_intr = &marvell_config_intr,
  1637. .resume = &genphy_resume,
  1638. .suspend = &genphy_suspend,
  1639. .read_page = marvell_read_page,
  1640. .write_page = marvell_write_page,
  1641. .get_sset_count = marvell_get_sset_count,
  1642. .get_strings = marvell_get_strings,
  1643. .get_stats = marvell_get_stats,
  1644. },
  1645. {
  1646. .phy_id = MARVELL_PHY_ID_88E1112,
  1647. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1648. .name = "Marvell 88E1112",
  1649. .features = PHY_GBIT_FEATURES,
  1650. .flags = PHY_HAS_INTERRUPT,
  1651. .probe = marvell_probe,
  1652. .config_init = &m88e1111_config_init,
  1653. .config_aneg = &marvell_config_aneg,
  1654. .ack_interrupt = &marvell_ack_interrupt,
  1655. .config_intr = &marvell_config_intr,
  1656. .resume = &genphy_resume,
  1657. .suspend = &genphy_suspend,
  1658. .read_page = marvell_read_page,
  1659. .write_page = marvell_write_page,
  1660. .get_sset_count = marvell_get_sset_count,
  1661. .get_strings = marvell_get_strings,
  1662. .get_stats = marvell_get_stats,
  1663. },
  1664. {
  1665. .phy_id = MARVELL_PHY_ID_88E1111,
  1666. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1667. .name = "Marvell 88E1111",
  1668. .features = PHY_GBIT_FEATURES,
  1669. .flags = PHY_HAS_INTERRUPT,
  1670. .probe = marvell_probe,
  1671. .config_init = &m88e1111_config_init,
  1672. .config_aneg = &m88e1111_config_aneg,
  1673. .read_status = &marvell_read_status,
  1674. .ack_interrupt = &marvell_ack_interrupt,
  1675. .config_intr = &marvell_config_intr,
  1676. .resume = &genphy_resume,
  1677. .suspend = &genphy_suspend,
  1678. .read_page = marvell_read_page,
  1679. .write_page = marvell_write_page,
  1680. .get_sset_count = marvell_get_sset_count,
  1681. .get_strings = marvell_get_strings,
  1682. .get_stats = marvell_get_stats,
  1683. },
  1684. {
  1685. .phy_id = MARVELL_PHY_ID_88E1118,
  1686. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1687. .name = "Marvell 88E1118",
  1688. .features = PHY_GBIT_FEATURES,
  1689. .flags = PHY_HAS_INTERRUPT,
  1690. .probe = marvell_probe,
  1691. .config_init = &m88e1118_config_init,
  1692. .config_aneg = &m88e1118_config_aneg,
  1693. .ack_interrupt = &marvell_ack_interrupt,
  1694. .config_intr = &marvell_config_intr,
  1695. .resume = &genphy_resume,
  1696. .suspend = &genphy_suspend,
  1697. .read_page = marvell_read_page,
  1698. .write_page = marvell_write_page,
  1699. .get_sset_count = marvell_get_sset_count,
  1700. .get_strings = marvell_get_strings,
  1701. .get_stats = marvell_get_stats,
  1702. },
  1703. {
  1704. .phy_id = MARVELL_PHY_ID_88E1121R,
  1705. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1706. .name = "Marvell 88E1121R",
  1707. .features = PHY_GBIT_FEATURES,
  1708. .flags = PHY_HAS_INTERRUPT,
  1709. .probe = &m88e1121_probe,
  1710. .config_init = &m88e1121_config_init,
  1711. .config_aneg = &m88e1121_config_aneg,
  1712. .read_status = &marvell_read_status,
  1713. .ack_interrupt = &marvell_ack_interrupt,
  1714. .config_intr = &marvell_config_intr,
  1715. .did_interrupt = &m88e1121_did_interrupt,
  1716. .resume = &genphy_resume,
  1717. .suspend = &genphy_suspend,
  1718. .read_page = marvell_read_page,
  1719. .write_page = marvell_write_page,
  1720. .get_sset_count = marvell_get_sset_count,
  1721. .get_strings = marvell_get_strings,
  1722. .get_stats = marvell_get_stats,
  1723. },
  1724. {
  1725. .phy_id = MARVELL_PHY_ID_88E1318S,
  1726. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1727. .name = "Marvell 88E1318S",
  1728. .features = PHY_GBIT_FEATURES,
  1729. .flags = PHY_HAS_INTERRUPT,
  1730. .probe = marvell_probe,
  1731. .config_init = &m88e1318_config_init,
  1732. .config_aneg = &m88e1318_config_aneg,
  1733. .read_status = &marvell_read_status,
  1734. .ack_interrupt = &marvell_ack_interrupt,
  1735. .config_intr = &marvell_config_intr,
  1736. .did_interrupt = &m88e1121_did_interrupt,
  1737. .get_wol = &m88e1318_get_wol,
  1738. .set_wol = &m88e1318_set_wol,
  1739. .resume = &genphy_resume,
  1740. .suspend = &genphy_suspend,
  1741. .read_page = marvell_read_page,
  1742. .write_page = marvell_write_page,
  1743. .get_sset_count = marvell_get_sset_count,
  1744. .get_strings = marvell_get_strings,
  1745. .get_stats = marvell_get_stats,
  1746. },
  1747. {
  1748. .phy_id = MARVELL_PHY_ID_88E1145,
  1749. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1750. .name = "Marvell 88E1145",
  1751. .features = PHY_GBIT_FEATURES,
  1752. .flags = PHY_HAS_INTERRUPT,
  1753. .probe = marvell_probe,
  1754. .config_init = &m88e1145_config_init,
  1755. .config_aneg = &m88e1101_config_aneg,
  1756. .read_status = &genphy_read_status,
  1757. .ack_interrupt = &marvell_ack_interrupt,
  1758. .config_intr = &marvell_config_intr,
  1759. .resume = &genphy_resume,
  1760. .suspend = &genphy_suspend,
  1761. .read_page = marvell_read_page,
  1762. .write_page = marvell_write_page,
  1763. .get_sset_count = marvell_get_sset_count,
  1764. .get_strings = marvell_get_strings,
  1765. .get_stats = marvell_get_stats,
  1766. },
  1767. {
  1768. .phy_id = MARVELL_PHY_ID_88E1149R,
  1769. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1770. .name = "Marvell 88E1149R",
  1771. .features = PHY_GBIT_FEATURES,
  1772. .flags = PHY_HAS_INTERRUPT,
  1773. .probe = marvell_probe,
  1774. .config_init = &m88e1149_config_init,
  1775. .config_aneg = &m88e1118_config_aneg,
  1776. .ack_interrupt = &marvell_ack_interrupt,
  1777. .config_intr = &marvell_config_intr,
  1778. .resume = &genphy_resume,
  1779. .suspend = &genphy_suspend,
  1780. .read_page = marvell_read_page,
  1781. .write_page = marvell_write_page,
  1782. .get_sset_count = marvell_get_sset_count,
  1783. .get_strings = marvell_get_strings,
  1784. .get_stats = marvell_get_stats,
  1785. },
  1786. {
  1787. .phy_id = MARVELL_PHY_ID_88E1240,
  1788. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1789. .name = "Marvell 88E1240",
  1790. .features = PHY_GBIT_FEATURES,
  1791. .flags = PHY_HAS_INTERRUPT,
  1792. .probe = marvell_probe,
  1793. .config_init = &m88e1111_config_init,
  1794. .config_aneg = &marvell_config_aneg,
  1795. .ack_interrupt = &marvell_ack_interrupt,
  1796. .config_intr = &marvell_config_intr,
  1797. .resume = &genphy_resume,
  1798. .suspend = &genphy_suspend,
  1799. .read_page = marvell_read_page,
  1800. .write_page = marvell_write_page,
  1801. .get_sset_count = marvell_get_sset_count,
  1802. .get_strings = marvell_get_strings,
  1803. .get_stats = marvell_get_stats,
  1804. },
  1805. {
  1806. .phy_id = MARVELL_PHY_ID_88E1116R,
  1807. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1808. .name = "Marvell 88E1116R",
  1809. .features = PHY_GBIT_FEATURES,
  1810. .flags = PHY_HAS_INTERRUPT,
  1811. .probe = marvell_probe,
  1812. .config_init = &m88e1116r_config_init,
  1813. .ack_interrupt = &marvell_ack_interrupt,
  1814. .config_intr = &marvell_config_intr,
  1815. .resume = &genphy_resume,
  1816. .suspend = &genphy_suspend,
  1817. .read_page = marvell_read_page,
  1818. .write_page = marvell_write_page,
  1819. .get_sset_count = marvell_get_sset_count,
  1820. .get_strings = marvell_get_strings,
  1821. .get_stats = marvell_get_stats,
  1822. },
  1823. {
  1824. .phy_id = MARVELL_PHY_ID_88E1510,
  1825. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1826. .name = "Marvell 88E1510",
  1827. .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
  1828. .flags = PHY_HAS_INTERRUPT,
  1829. .probe = &m88e1510_probe,
  1830. .config_init = &m88e1510_config_init,
  1831. .config_aneg = &m88e1510_config_aneg,
  1832. .read_status = &marvell_read_status,
  1833. .ack_interrupt = &marvell_ack_interrupt,
  1834. .config_intr = &marvell_config_intr,
  1835. .did_interrupt = &m88e1121_did_interrupt,
  1836. .get_wol = &m88e1318_get_wol,
  1837. .set_wol = &m88e1318_set_wol,
  1838. .resume = &marvell_resume,
  1839. .suspend = &marvell_suspend,
  1840. .read_page = marvell_read_page,
  1841. .write_page = marvell_write_page,
  1842. .get_sset_count = marvell_get_sset_count,
  1843. .get_strings = marvell_get_strings,
  1844. .get_stats = marvell_get_stats,
  1845. .set_loopback = genphy_loopback,
  1846. },
  1847. {
  1848. .phy_id = MARVELL_PHY_ID_88E1540,
  1849. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1850. .name = "Marvell 88E1540",
  1851. .features = PHY_GBIT_FEATURES,
  1852. .flags = PHY_HAS_INTERRUPT,
  1853. .probe = m88e1510_probe,
  1854. .config_init = &marvell_config_init,
  1855. .config_aneg = &m88e1510_config_aneg,
  1856. .read_status = &marvell_read_status,
  1857. .ack_interrupt = &marvell_ack_interrupt,
  1858. .config_intr = &marvell_config_intr,
  1859. .did_interrupt = &m88e1121_did_interrupt,
  1860. .resume = &genphy_resume,
  1861. .suspend = &genphy_suspend,
  1862. .read_page = marvell_read_page,
  1863. .write_page = marvell_write_page,
  1864. .get_sset_count = marvell_get_sset_count,
  1865. .get_strings = marvell_get_strings,
  1866. .get_stats = marvell_get_stats,
  1867. },
  1868. {
  1869. .phy_id = MARVELL_PHY_ID_88E1545,
  1870. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1871. .name = "Marvell 88E1545",
  1872. .probe = m88e1510_probe,
  1873. .features = PHY_GBIT_FEATURES,
  1874. .flags = PHY_HAS_INTERRUPT,
  1875. .config_init = &marvell_config_init,
  1876. .config_aneg = &m88e1510_config_aneg,
  1877. .read_status = &marvell_read_status,
  1878. .ack_interrupt = &marvell_ack_interrupt,
  1879. .config_intr = &marvell_config_intr,
  1880. .did_interrupt = &m88e1121_did_interrupt,
  1881. .resume = &genphy_resume,
  1882. .suspend = &genphy_suspend,
  1883. .read_page = marvell_read_page,
  1884. .write_page = marvell_write_page,
  1885. .get_sset_count = marvell_get_sset_count,
  1886. .get_strings = marvell_get_strings,
  1887. .get_stats = marvell_get_stats,
  1888. },
  1889. {
  1890. .phy_id = MARVELL_PHY_ID_88E3016,
  1891. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1892. .name = "Marvell 88E3016",
  1893. .features = PHY_BASIC_FEATURES,
  1894. .flags = PHY_HAS_INTERRUPT,
  1895. .probe = marvell_probe,
  1896. .config_init = &m88e3016_config_init,
  1897. .aneg_done = &marvell_aneg_done,
  1898. .read_status = &marvell_read_status,
  1899. .ack_interrupt = &marvell_ack_interrupt,
  1900. .config_intr = &marvell_config_intr,
  1901. .did_interrupt = &m88e1121_did_interrupt,
  1902. .resume = &genphy_resume,
  1903. .suspend = &genphy_suspend,
  1904. .read_page = marvell_read_page,
  1905. .write_page = marvell_write_page,
  1906. .get_sset_count = marvell_get_sset_count,
  1907. .get_strings = marvell_get_strings,
  1908. .get_stats = marvell_get_stats,
  1909. },
  1910. {
  1911. .phy_id = MARVELL_PHY_ID_88E6390,
  1912. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1913. .name = "Marvell 88E6390",
  1914. .features = PHY_GBIT_FEATURES,
  1915. .flags = PHY_HAS_INTERRUPT,
  1916. .probe = m88e6390_probe,
  1917. .config_init = &marvell_config_init,
  1918. .config_aneg = &m88e1510_config_aneg,
  1919. .read_status = &marvell_read_status,
  1920. .ack_interrupt = &marvell_ack_interrupt,
  1921. .config_intr = &marvell_config_intr,
  1922. .did_interrupt = &m88e1121_did_interrupt,
  1923. .resume = &genphy_resume,
  1924. .suspend = &genphy_suspend,
  1925. .read_page = marvell_read_page,
  1926. .write_page = marvell_write_page,
  1927. .get_sset_count = marvell_get_sset_count,
  1928. .get_strings = marvell_get_strings,
  1929. .get_stats = marvell_get_stats,
  1930. },
  1931. };
  1932. module_phy_driver(marvell_drivers);
  1933. static struct mdio_device_id __maybe_unused marvell_tbl[] = {
  1934. { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
  1935. { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
  1936. { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
  1937. { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
  1938. { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
  1939. { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
  1940. { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
  1941. { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
  1942. { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
  1943. { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
  1944. { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
  1945. { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
  1946. { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
  1947. { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
  1948. { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
  1949. { }
  1950. };
  1951. MODULE_DEVICE_TABLE(mdio, marvell_tbl);