qede_fp.c 47 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728
  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/netdevice.h>
  33. #include <linux/etherdevice.h>
  34. #include <linux/skbuff.h>
  35. #include <linux/bpf_trace.h>
  36. #include <net/udp_tunnel.h>
  37. #include <linux/ip.h>
  38. #include <net/ipv6.h>
  39. #include <net/tcp.h>
  40. #include <linux/if_ether.h>
  41. #include <linux/if_vlan.h>
  42. #include <net/ip6_checksum.h>
  43. #include "qede_ptp.h"
  44. #include <linux/qed/qed_if.h>
  45. #include "qede.h"
  46. /*********************************
  47. * Content also used by slowpath *
  48. *********************************/
  49. int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy)
  50. {
  51. struct sw_rx_data *sw_rx_data;
  52. struct eth_rx_bd *rx_bd;
  53. dma_addr_t mapping;
  54. struct page *data;
  55. /* In case lazy-allocation is allowed, postpone allocation until the
  56. * end of the NAPI run. We'd still need to make sure the Rx ring has
  57. * sufficient buffers to guarantee an additional Rx interrupt.
  58. */
  59. if (allow_lazy && likely(rxq->filled_buffers > 12)) {
  60. rxq->filled_buffers--;
  61. return 0;
  62. }
  63. data = alloc_pages(GFP_ATOMIC, 0);
  64. if (unlikely(!data))
  65. return -ENOMEM;
  66. /* Map the entire page as it would be used
  67. * for multiple RX buffer segment size mapping.
  68. */
  69. mapping = dma_map_page(rxq->dev, data, 0,
  70. PAGE_SIZE, rxq->data_direction);
  71. if (unlikely(dma_mapping_error(rxq->dev, mapping))) {
  72. __free_page(data);
  73. return -ENOMEM;
  74. }
  75. sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  76. sw_rx_data->page_offset = 0;
  77. sw_rx_data->data = data;
  78. sw_rx_data->mapping = mapping;
  79. /* Advance PROD and get BD pointer */
  80. rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
  81. WARN_ON(!rx_bd);
  82. rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
  83. rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping) +
  84. rxq->rx_headroom);
  85. rxq->sw_rx_prod++;
  86. rxq->filled_buffers++;
  87. return 0;
  88. }
  89. /* Unmap the data and free skb */
  90. int qede_free_tx_pkt(struct qede_dev *edev, struct qede_tx_queue *txq, int *len)
  91. {
  92. u16 idx = txq->sw_tx_cons;
  93. struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
  94. struct eth_tx_1st_bd *first_bd;
  95. struct eth_tx_bd *tx_data_bd;
  96. int bds_consumed = 0;
  97. int nbds;
  98. bool data_split = txq->sw_tx_ring.skbs[idx].flags & QEDE_TSO_SPLIT_BD;
  99. int i, split_bd_len = 0;
  100. if (unlikely(!skb)) {
  101. DP_ERR(edev,
  102. "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
  103. idx, txq->sw_tx_cons, txq->sw_tx_prod);
  104. return -1;
  105. }
  106. *len = skb->len;
  107. first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  108. bds_consumed++;
  109. nbds = first_bd->data.nbds;
  110. if (data_split) {
  111. struct eth_tx_bd *split = (struct eth_tx_bd *)
  112. qed_chain_consume(&txq->tx_pbl);
  113. split_bd_len = BD_UNMAP_LEN(split);
  114. bds_consumed++;
  115. }
  116. dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
  117. BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
  118. /* Unmap the data of the skb frags */
  119. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
  120. tx_data_bd = (struct eth_tx_bd *)
  121. qed_chain_consume(&txq->tx_pbl);
  122. dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
  123. BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
  124. }
  125. while (bds_consumed++ < nbds)
  126. qed_chain_consume(&txq->tx_pbl);
  127. /* Free skb */
  128. dev_kfree_skb_any(skb);
  129. txq->sw_tx_ring.skbs[idx].skb = NULL;
  130. txq->sw_tx_ring.skbs[idx].flags = 0;
  131. return 0;
  132. }
  133. /* Unmap the data and free skb when mapping failed during start_xmit */
  134. static void qede_free_failed_tx_pkt(struct qede_tx_queue *txq,
  135. struct eth_tx_1st_bd *first_bd,
  136. int nbd, bool data_split)
  137. {
  138. u16 idx = txq->sw_tx_prod;
  139. struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
  140. struct eth_tx_bd *tx_data_bd;
  141. int i, split_bd_len = 0;
  142. /* Return prod to its position before this skb was handled */
  143. qed_chain_set_prod(&txq->tx_pbl,
  144. le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
  145. first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
  146. if (data_split) {
  147. struct eth_tx_bd *split = (struct eth_tx_bd *)
  148. qed_chain_produce(&txq->tx_pbl);
  149. split_bd_len = BD_UNMAP_LEN(split);
  150. nbd--;
  151. }
  152. dma_unmap_single(txq->dev, BD_UNMAP_ADDR(first_bd),
  153. BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
  154. /* Unmap the data of the skb frags */
  155. for (i = 0; i < nbd; i++) {
  156. tx_data_bd = (struct eth_tx_bd *)
  157. qed_chain_produce(&txq->tx_pbl);
  158. if (tx_data_bd->nbytes)
  159. dma_unmap_page(txq->dev,
  160. BD_UNMAP_ADDR(tx_data_bd),
  161. BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
  162. }
  163. /* Return again prod to its position before this skb was handled */
  164. qed_chain_set_prod(&txq->tx_pbl,
  165. le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
  166. /* Free skb */
  167. dev_kfree_skb_any(skb);
  168. txq->sw_tx_ring.skbs[idx].skb = NULL;
  169. txq->sw_tx_ring.skbs[idx].flags = 0;
  170. }
  171. static u32 qede_xmit_type(struct sk_buff *skb, int *ipv6_ext)
  172. {
  173. u32 rc = XMIT_L4_CSUM;
  174. __be16 l3_proto;
  175. if (skb->ip_summed != CHECKSUM_PARTIAL)
  176. return XMIT_PLAIN;
  177. l3_proto = vlan_get_protocol(skb);
  178. if (l3_proto == htons(ETH_P_IPV6) &&
  179. (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
  180. *ipv6_ext = 1;
  181. if (skb->encapsulation) {
  182. rc |= XMIT_ENC;
  183. if (skb_is_gso(skb)) {
  184. unsigned short gso_type = skb_shinfo(skb)->gso_type;
  185. if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
  186. (gso_type & SKB_GSO_GRE_CSUM))
  187. rc |= XMIT_ENC_GSO_L4_CSUM;
  188. rc |= XMIT_LSO;
  189. return rc;
  190. }
  191. }
  192. if (skb_is_gso(skb))
  193. rc |= XMIT_LSO;
  194. return rc;
  195. }
  196. static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
  197. struct eth_tx_2nd_bd *second_bd,
  198. struct eth_tx_3rd_bd *third_bd)
  199. {
  200. u8 l4_proto;
  201. u16 bd2_bits1 = 0, bd2_bits2 = 0;
  202. bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
  203. bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
  204. ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
  205. << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
  206. bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
  207. ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
  208. if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
  209. l4_proto = ipv6_hdr(skb)->nexthdr;
  210. else
  211. l4_proto = ip_hdr(skb)->protocol;
  212. if (l4_proto == IPPROTO_UDP)
  213. bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
  214. if (third_bd)
  215. third_bd->data.bitfields |=
  216. cpu_to_le16(((tcp_hdrlen(skb) / 4) &
  217. ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
  218. ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
  219. second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
  220. second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
  221. }
  222. static int map_frag_to_bd(struct qede_tx_queue *txq,
  223. skb_frag_t *frag, struct eth_tx_bd *bd)
  224. {
  225. dma_addr_t mapping;
  226. /* Map skb non-linear frag data for DMA */
  227. mapping = skb_frag_dma_map(txq->dev, frag, 0,
  228. skb_frag_size(frag), DMA_TO_DEVICE);
  229. if (unlikely(dma_mapping_error(txq->dev, mapping)))
  230. return -ENOMEM;
  231. /* Setup the data pointer of the frag data */
  232. BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
  233. return 0;
  234. }
  235. static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
  236. {
  237. if (is_encap_pkt)
  238. return (skb_inner_transport_header(skb) +
  239. inner_tcp_hdrlen(skb) - skb->data);
  240. else
  241. return (skb_transport_header(skb) +
  242. tcp_hdrlen(skb) - skb->data);
  243. }
  244. /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
  245. #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
  246. static bool qede_pkt_req_lin(struct sk_buff *skb, u8 xmit_type)
  247. {
  248. int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
  249. if (xmit_type & XMIT_LSO) {
  250. int hlen;
  251. hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
  252. /* linear payload would require its own BD */
  253. if (skb_headlen(skb) > hlen)
  254. allowed_frags--;
  255. }
  256. return (skb_shinfo(skb)->nr_frags > allowed_frags);
  257. }
  258. #endif
  259. static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
  260. {
  261. /* wmb makes sure that the BDs data is updated before updating the
  262. * producer, otherwise FW may read old data from the BDs.
  263. */
  264. wmb();
  265. barrier();
  266. writel(txq->tx_db.raw, txq->doorbell_addr);
  267. /* Fence required to flush the write combined buffer, since another
  268. * CPU may write to the same doorbell address and data may be lost
  269. * due to relaxed order nature of write combined bar.
  270. */
  271. wmb();
  272. }
  273. static int qede_xdp_xmit(struct qede_dev *edev, struct qede_fastpath *fp,
  274. struct sw_rx_data *metadata, u16 padding, u16 length)
  275. {
  276. struct qede_tx_queue *txq = fp->xdp_tx;
  277. struct eth_tx_1st_bd *first_bd;
  278. u16 idx = txq->sw_tx_prod;
  279. u16 val;
  280. if (!qed_chain_get_elem_left(&txq->tx_pbl)) {
  281. txq->stopped_cnt++;
  282. return -ENOMEM;
  283. }
  284. first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
  285. memset(first_bd, 0, sizeof(*first_bd));
  286. first_bd->data.bd_flags.bitfields =
  287. BIT(ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT);
  288. val = (length & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
  289. ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
  290. first_bd->data.bitfields |= cpu_to_le16(val);
  291. first_bd->data.nbds = 1;
  292. /* We can safely ignore the offset, as it's 0 for XDP */
  293. BD_SET_UNMAP_ADDR_LEN(first_bd, metadata->mapping + padding, length);
  294. /* Synchronize the buffer back to device, as program [probably]
  295. * has changed it.
  296. */
  297. dma_sync_single_for_device(&edev->pdev->dev,
  298. metadata->mapping + padding,
  299. length, PCI_DMA_TODEVICE);
  300. txq->sw_tx_ring.xdp[idx].page = metadata->data;
  301. txq->sw_tx_ring.xdp[idx].mapping = metadata->mapping;
  302. txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
  303. /* Mark the fastpath for future XDP doorbell */
  304. fp->xdp_xmit = 1;
  305. return 0;
  306. }
  307. int qede_txq_has_work(struct qede_tx_queue *txq)
  308. {
  309. u16 hw_bd_cons;
  310. /* Tell compiler that consumer and producer can change */
  311. barrier();
  312. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  313. if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
  314. return 0;
  315. return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
  316. }
  317. static void qede_xdp_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
  318. {
  319. u16 hw_bd_cons, idx;
  320. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  321. barrier();
  322. while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
  323. qed_chain_consume(&txq->tx_pbl);
  324. idx = txq->sw_tx_cons;
  325. dma_unmap_page(&edev->pdev->dev,
  326. txq->sw_tx_ring.xdp[idx].mapping,
  327. PAGE_SIZE, DMA_BIDIRECTIONAL);
  328. __free_page(txq->sw_tx_ring.xdp[idx].page);
  329. txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
  330. txq->xmit_pkts++;
  331. }
  332. }
  333. static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
  334. {
  335. struct netdev_queue *netdev_txq;
  336. u16 hw_bd_cons;
  337. unsigned int pkts_compl = 0, bytes_compl = 0;
  338. int rc;
  339. netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
  340. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  341. barrier();
  342. while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
  343. int len = 0;
  344. rc = qede_free_tx_pkt(edev, txq, &len);
  345. if (rc) {
  346. DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
  347. hw_bd_cons,
  348. qed_chain_get_cons_idx(&txq->tx_pbl));
  349. break;
  350. }
  351. bytes_compl += len;
  352. pkts_compl++;
  353. txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
  354. txq->xmit_pkts++;
  355. }
  356. netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
  357. /* Need to make the tx_bd_cons update visible to start_xmit()
  358. * before checking for netif_tx_queue_stopped(). Without the
  359. * memory barrier, there is a small possibility that
  360. * start_xmit() will miss it and cause the queue to be stopped
  361. * forever.
  362. * On the other hand we need an rmb() here to ensure the proper
  363. * ordering of bit testing in the following
  364. * netif_tx_queue_stopped(txq) call.
  365. */
  366. smp_mb();
  367. if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
  368. /* Taking tx_lock is needed to prevent reenabling the queue
  369. * while it's empty. This could have happen if rx_action() gets
  370. * suspended in qede_tx_int() after the condition before
  371. * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
  372. *
  373. * stops the queue->sees fresh tx_bd_cons->releases the queue->
  374. * sends some packets consuming the whole queue again->
  375. * stops the queue
  376. */
  377. __netif_tx_lock(netdev_txq, smp_processor_id());
  378. if ((netif_tx_queue_stopped(netdev_txq)) &&
  379. (edev->state == QEDE_STATE_OPEN) &&
  380. (qed_chain_get_elem_left(&txq->tx_pbl)
  381. >= (MAX_SKB_FRAGS + 1))) {
  382. netif_tx_wake_queue(netdev_txq);
  383. DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
  384. "Wake queue was called\n");
  385. }
  386. __netif_tx_unlock(netdev_txq);
  387. }
  388. return 0;
  389. }
  390. bool qede_has_rx_work(struct qede_rx_queue *rxq)
  391. {
  392. u16 hw_comp_cons, sw_comp_cons;
  393. /* Tell compiler that status block fields can change */
  394. barrier();
  395. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  396. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  397. return hw_comp_cons != sw_comp_cons;
  398. }
  399. static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
  400. {
  401. qed_chain_consume(&rxq->rx_bd_ring);
  402. rxq->sw_rx_cons++;
  403. }
  404. /* This function reuses the buffer(from an offset) from
  405. * consumer index to producer index in the bd ring
  406. */
  407. static inline void qede_reuse_page(struct qede_rx_queue *rxq,
  408. struct sw_rx_data *curr_cons)
  409. {
  410. struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
  411. struct sw_rx_data *curr_prod;
  412. dma_addr_t new_mapping;
  413. curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  414. *curr_prod = *curr_cons;
  415. new_mapping = curr_prod->mapping + curr_prod->page_offset;
  416. rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
  417. rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping) +
  418. rxq->rx_headroom);
  419. rxq->sw_rx_prod++;
  420. curr_cons->data = NULL;
  421. }
  422. /* In case of allocation failures reuse buffers
  423. * from consumer index to produce buffers for firmware
  424. */
  425. void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count)
  426. {
  427. struct sw_rx_data *curr_cons;
  428. for (; count > 0; count--) {
  429. curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
  430. qede_reuse_page(rxq, curr_cons);
  431. qede_rx_bd_ring_consume(rxq);
  432. }
  433. }
  434. static inline int qede_realloc_rx_buffer(struct qede_rx_queue *rxq,
  435. struct sw_rx_data *curr_cons)
  436. {
  437. /* Move to the next segment in the page */
  438. curr_cons->page_offset += rxq->rx_buf_seg_size;
  439. if (curr_cons->page_offset == PAGE_SIZE) {
  440. if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
  441. /* Since we failed to allocate new buffer
  442. * current buffer can be used again.
  443. */
  444. curr_cons->page_offset -= rxq->rx_buf_seg_size;
  445. return -ENOMEM;
  446. }
  447. dma_unmap_page(rxq->dev, curr_cons->mapping,
  448. PAGE_SIZE, rxq->data_direction);
  449. } else {
  450. /* Increment refcount of the page as we don't want
  451. * network stack to take the ownership of the page
  452. * which can be recycled multiple times by the driver.
  453. */
  454. page_ref_inc(curr_cons->data);
  455. qede_reuse_page(rxq, curr_cons);
  456. }
  457. return 0;
  458. }
  459. void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
  460. {
  461. u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
  462. u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
  463. struct eth_rx_prod_data rx_prods = {0};
  464. /* Update producers */
  465. rx_prods.bd_prod = cpu_to_le16(bd_prod);
  466. rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
  467. /* Make sure that the BD and SGE data is updated before updating the
  468. * producers since FW might read the BD/SGE right after the producer
  469. * is updated.
  470. */
  471. wmb();
  472. internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
  473. (u32 *)&rx_prods);
  474. /* mmiowb is needed to synchronize doorbell writes from more than one
  475. * processor. It guarantees that the write arrives to the device before
  476. * the napi lock is released and another qede_poll is called (possibly
  477. * on another CPU). Without this barrier, the next doorbell can bypass
  478. * this doorbell. This is applicable to IA64/Altix systems.
  479. */
  480. mmiowb();
  481. }
  482. static void qede_get_rxhash(struct sk_buff *skb, u8 bitfields, __le32 rss_hash)
  483. {
  484. enum pkt_hash_types hash_type = PKT_HASH_TYPE_NONE;
  485. enum rss_hash_type htype;
  486. u32 hash = 0;
  487. htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
  488. if (htype) {
  489. hash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
  490. (htype == RSS_HASH_TYPE_IPV6)) ?
  491. PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
  492. hash = le32_to_cpu(rss_hash);
  493. }
  494. skb_set_hash(skb, hash, hash_type);
  495. }
  496. static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
  497. {
  498. skb_checksum_none_assert(skb);
  499. if (csum_flag & QEDE_CSUM_UNNECESSARY)
  500. skb->ip_summed = CHECKSUM_UNNECESSARY;
  501. if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) {
  502. skb->csum_level = 1;
  503. skb->encapsulation = 1;
  504. }
  505. }
  506. static inline void qede_skb_receive(struct qede_dev *edev,
  507. struct qede_fastpath *fp,
  508. struct qede_rx_queue *rxq,
  509. struct sk_buff *skb, u16 vlan_tag)
  510. {
  511. if (vlan_tag)
  512. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
  513. napi_gro_receive(&fp->napi, skb);
  514. }
  515. static void qede_set_gro_params(struct qede_dev *edev,
  516. struct sk_buff *skb,
  517. struct eth_fast_path_rx_tpa_start_cqe *cqe)
  518. {
  519. u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
  520. if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
  521. PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
  522. skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
  523. else
  524. skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
  525. skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
  526. cqe->header_len;
  527. }
  528. static int qede_fill_frag_skb(struct qede_dev *edev,
  529. struct qede_rx_queue *rxq,
  530. u8 tpa_agg_index, u16 len_on_bd)
  531. {
  532. struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
  533. NUM_RX_BDS_MAX];
  534. struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
  535. struct sk_buff *skb = tpa_info->skb;
  536. if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
  537. goto out;
  538. /* Add one frag and update the appropriate fields in the skb */
  539. skb_fill_page_desc(skb, tpa_info->frag_id++,
  540. current_bd->data,
  541. current_bd->page_offset + rxq->rx_headroom,
  542. len_on_bd);
  543. if (unlikely(qede_realloc_rx_buffer(rxq, current_bd))) {
  544. /* Incr page ref count to reuse on allocation failure
  545. * so that it doesn't get freed while freeing SKB.
  546. */
  547. page_ref_inc(current_bd->data);
  548. goto out;
  549. }
  550. qede_rx_bd_ring_consume(rxq);
  551. skb->data_len += len_on_bd;
  552. skb->truesize += rxq->rx_buf_seg_size;
  553. skb->len += len_on_bd;
  554. return 0;
  555. out:
  556. tpa_info->state = QEDE_AGG_STATE_ERROR;
  557. qede_recycle_rx_bd_ring(rxq, 1);
  558. return -ENOMEM;
  559. }
  560. static bool qede_tunn_exist(u16 flag)
  561. {
  562. return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
  563. PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
  564. }
  565. static u8 qede_check_tunn_csum(u16 flag)
  566. {
  567. u16 csum_flag = 0;
  568. u8 tcsum = 0;
  569. if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
  570. PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
  571. csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
  572. PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
  573. if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
  574. PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
  575. csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
  576. PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
  577. tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
  578. }
  579. csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
  580. PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
  581. PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
  582. PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
  583. if (csum_flag & flag)
  584. return QEDE_CSUM_ERROR;
  585. return QEDE_CSUM_UNNECESSARY | tcsum;
  586. }
  587. static inline struct sk_buff *
  588. qede_build_skb(struct qede_rx_queue *rxq,
  589. struct sw_rx_data *bd, u16 len, u16 pad)
  590. {
  591. struct sk_buff *skb;
  592. void *buf;
  593. buf = page_address(bd->data) + bd->page_offset;
  594. skb = build_skb(buf, rxq->rx_buf_seg_size);
  595. skb_reserve(skb, pad);
  596. skb_put(skb, len);
  597. return skb;
  598. }
  599. static struct sk_buff *
  600. qede_tpa_rx_build_skb(struct qede_dev *edev,
  601. struct qede_rx_queue *rxq,
  602. struct sw_rx_data *bd, u16 len, u16 pad,
  603. bool alloc_skb)
  604. {
  605. struct sk_buff *skb;
  606. skb = qede_build_skb(rxq, bd, len, pad);
  607. bd->page_offset += rxq->rx_buf_seg_size;
  608. if (bd->page_offset == PAGE_SIZE) {
  609. if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
  610. DP_NOTICE(edev,
  611. "Failed to allocate RX buffer for tpa start\n");
  612. bd->page_offset -= rxq->rx_buf_seg_size;
  613. page_ref_inc(bd->data);
  614. dev_kfree_skb_any(skb);
  615. return NULL;
  616. }
  617. } else {
  618. page_ref_inc(bd->data);
  619. qede_reuse_page(rxq, bd);
  620. }
  621. /* We've consumed the first BD and prepared an SKB */
  622. qede_rx_bd_ring_consume(rxq);
  623. return skb;
  624. }
  625. static struct sk_buff *
  626. qede_rx_build_skb(struct qede_dev *edev,
  627. struct qede_rx_queue *rxq,
  628. struct sw_rx_data *bd, u16 len, u16 pad)
  629. {
  630. struct sk_buff *skb = NULL;
  631. /* For smaller frames still need to allocate skb, memcpy
  632. * data and benefit in reusing the page segment instead of
  633. * un-mapping it.
  634. */
  635. if ((len + pad <= edev->rx_copybreak)) {
  636. unsigned int offset = bd->page_offset + pad;
  637. skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
  638. if (unlikely(!skb))
  639. return NULL;
  640. skb_reserve(skb, pad);
  641. memcpy(skb_put(skb, len),
  642. page_address(bd->data) + offset, len);
  643. qede_reuse_page(rxq, bd);
  644. goto out;
  645. }
  646. skb = qede_build_skb(rxq, bd, len, pad);
  647. if (unlikely(qede_realloc_rx_buffer(rxq, bd))) {
  648. /* Incr page ref count to reuse on allocation failure so
  649. * that it doesn't get freed while freeing SKB [as its
  650. * already mapped there].
  651. */
  652. page_ref_inc(bd->data);
  653. dev_kfree_skb_any(skb);
  654. return NULL;
  655. }
  656. out:
  657. /* We've consumed the first BD and prepared an SKB */
  658. qede_rx_bd_ring_consume(rxq);
  659. return skb;
  660. }
  661. static void qede_tpa_start(struct qede_dev *edev,
  662. struct qede_rx_queue *rxq,
  663. struct eth_fast_path_rx_tpa_start_cqe *cqe)
  664. {
  665. struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
  666. struct sw_rx_data *sw_rx_data_cons;
  667. u16 pad;
  668. sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
  669. pad = cqe->placement_offset + rxq->rx_headroom;
  670. tpa_info->skb = qede_tpa_rx_build_skb(edev, rxq, sw_rx_data_cons,
  671. le16_to_cpu(cqe->len_on_first_bd),
  672. pad, false);
  673. tpa_info->buffer.page_offset = sw_rx_data_cons->page_offset;
  674. tpa_info->buffer.mapping = sw_rx_data_cons->mapping;
  675. if (unlikely(!tpa_info->skb)) {
  676. DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
  677. /* Consume from ring but do not produce since
  678. * this might be used by FW still, it will be re-used
  679. * at TPA end.
  680. */
  681. tpa_info->tpa_start_fail = true;
  682. qede_rx_bd_ring_consume(rxq);
  683. tpa_info->state = QEDE_AGG_STATE_ERROR;
  684. goto cons_buf;
  685. }
  686. tpa_info->frag_id = 0;
  687. tpa_info->state = QEDE_AGG_STATE_START;
  688. if ((le16_to_cpu(cqe->pars_flags.flags) >>
  689. PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
  690. PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
  691. tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
  692. else
  693. tpa_info->vlan_tag = 0;
  694. qede_get_rxhash(tpa_info->skb, cqe->bitfields, cqe->rss_hash);
  695. /* This is needed in order to enable forwarding support */
  696. qede_set_gro_params(edev, tpa_info->skb, cqe);
  697. cons_buf: /* We still need to handle bd_len_list to consume buffers */
  698. if (likely(cqe->ext_bd_len_list[0]))
  699. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  700. le16_to_cpu(cqe->ext_bd_len_list[0]));
  701. if (unlikely(cqe->ext_bd_len_list[1])) {
  702. DP_ERR(edev,
  703. "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
  704. tpa_info->state = QEDE_AGG_STATE_ERROR;
  705. }
  706. }
  707. #ifdef CONFIG_INET
  708. static void qede_gro_ip_csum(struct sk_buff *skb)
  709. {
  710. const struct iphdr *iph = ip_hdr(skb);
  711. struct tcphdr *th;
  712. skb_set_transport_header(skb, sizeof(struct iphdr));
  713. th = tcp_hdr(skb);
  714. th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
  715. iph->saddr, iph->daddr, 0);
  716. tcp_gro_complete(skb);
  717. }
  718. static void qede_gro_ipv6_csum(struct sk_buff *skb)
  719. {
  720. struct ipv6hdr *iph = ipv6_hdr(skb);
  721. struct tcphdr *th;
  722. skb_set_transport_header(skb, sizeof(struct ipv6hdr));
  723. th = tcp_hdr(skb);
  724. th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
  725. &iph->saddr, &iph->daddr, 0);
  726. tcp_gro_complete(skb);
  727. }
  728. #endif
  729. static void qede_gro_receive(struct qede_dev *edev,
  730. struct qede_fastpath *fp,
  731. struct sk_buff *skb,
  732. u16 vlan_tag)
  733. {
  734. /* FW can send a single MTU sized packet from gro flow
  735. * due to aggregation timeout/last segment etc. which
  736. * is not expected to be a gro packet. If a skb has zero
  737. * frags then simply push it in the stack as non gso skb.
  738. */
  739. if (unlikely(!skb->data_len)) {
  740. skb_shinfo(skb)->gso_type = 0;
  741. skb_shinfo(skb)->gso_size = 0;
  742. goto send_skb;
  743. }
  744. #ifdef CONFIG_INET
  745. if (skb_shinfo(skb)->gso_size) {
  746. skb_reset_network_header(skb);
  747. switch (skb->protocol) {
  748. case htons(ETH_P_IP):
  749. qede_gro_ip_csum(skb);
  750. break;
  751. case htons(ETH_P_IPV6):
  752. qede_gro_ipv6_csum(skb);
  753. break;
  754. default:
  755. DP_ERR(edev,
  756. "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
  757. ntohs(skb->protocol));
  758. }
  759. }
  760. #endif
  761. send_skb:
  762. skb_record_rx_queue(skb, fp->rxq->rxq_id);
  763. qede_skb_receive(edev, fp, fp->rxq, skb, vlan_tag);
  764. }
  765. static inline void qede_tpa_cont(struct qede_dev *edev,
  766. struct qede_rx_queue *rxq,
  767. struct eth_fast_path_rx_tpa_cont_cqe *cqe)
  768. {
  769. int i;
  770. for (i = 0; cqe->len_list[i]; i++)
  771. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  772. le16_to_cpu(cqe->len_list[i]));
  773. if (unlikely(i > 1))
  774. DP_ERR(edev,
  775. "Strange - TPA cont with more than a single len_list entry\n");
  776. }
  777. static int qede_tpa_end(struct qede_dev *edev,
  778. struct qede_fastpath *fp,
  779. struct eth_fast_path_rx_tpa_end_cqe *cqe)
  780. {
  781. struct qede_rx_queue *rxq = fp->rxq;
  782. struct qede_agg_info *tpa_info;
  783. struct sk_buff *skb;
  784. int i;
  785. tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
  786. skb = tpa_info->skb;
  787. if (tpa_info->buffer.page_offset == PAGE_SIZE)
  788. dma_unmap_page(rxq->dev, tpa_info->buffer.mapping,
  789. PAGE_SIZE, rxq->data_direction);
  790. for (i = 0; cqe->len_list[i]; i++)
  791. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  792. le16_to_cpu(cqe->len_list[i]));
  793. if (unlikely(i > 1))
  794. DP_ERR(edev,
  795. "Strange - TPA emd with more than a single len_list entry\n");
  796. if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
  797. goto err;
  798. /* Sanity */
  799. if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
  800. DP_ERR(edev,
  801. "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
  802. cqe->num_of_bds, tpa_info->frag_id);
  803. if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
  804. DP_ERR(edev,
  805. "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
  806. le16_to_cpu(cqe->total_packet_len), skb->len);
  807. /* Finalize the SKB */
  808. skb->protocol = eth_type_trans(skb, edev->ndev);
  809. skb->ip_summed = CHECKSUM_UNNECESSARY;
  810. /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
  811. * to skb_shinfo(skb)->gso_segs
  812. */
  813. NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
  814. qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
  815. tpa_info->state = QEDE_AGG_STATE_NONE;
  816. return 1;
  817. err:
  818. tpa_info->state = QEDE_AGG_STATE_NONE;
  819. if (tpa_info->tpa_start_fail) {
  820. qede_reuse_page(rxq, &tpa_info->buffer);
  821. tpa_info->tpa_start_fail = false;
  822. }
  823. dev_kfree_skb_any(tpa_info->skb);
  824. tpa_info->skb = NULL;
  825. return 0;
  826. }
  827. static u8 qede_check_notunn_csum(u16 flag)
  828. {
  829. u16 csum_flag = 0;
  830. u8 csum = 0;
  831. if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
  832. PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
  833. csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
  834. PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
  835. csum = QEDE_CSUM_UNNECESSARY;
  836. }
  837. csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
  838. PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
  839. if (csum_flag & flag)
  840. return QEDE_CSUM_ERROR;
  841. return csum;
  842. }
  843. static u8 qede_check_csum(u16 flag)
  844. {
  845. if (!qede_tunn_exist(flag))
  846. return qede_check_notunn_csum(flag);
  847. else
  848. return qede_check_tunn_csum(flag);
  849. }
  850. static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
  851. u16 flag)
  852. {
  853. u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
  854. if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
  855. ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
  856. (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
  857. PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
  858. return true;
  859. return false;
  860. }
  861. /* Return true iff packet is to be passed to stack */
  862. static bool qede_rx_xdp(struct qede_dev *edev,
  863. struct qede_fastpath *fp,
  864. struct qede_rx_queue *rxq,
  865. struct bpf_prog *prog,
  866. struct sw_rx_data *bd,
  867. struct eth_fast_path_rx_reg_cqe *cqe,
  868. u16 *data_offset, u16 *len)
  869. {
  870. struct xdp_buff xdp;
  871. enum xdp_action act;
  872. xdp.data_hard_start = page_address(bd->data);
  873. xdp.data = xdp.data_hard_start + *data_offset;
  874. xdp_set_data_meta_invalid(&xdp);
  875. xdp.data_end = xdp.data + *len;
  876. xdp.rxq = &rxq->xdp_rxq;
  877. /* Queues always have a full reset currently, so for the time
  878. * being until there's atomic program replace just mark read
  879. * side for map helpers.
  880. */
  881. rcu_read_lock();
  882. act = bpf_prog_run_xdp(prog, &xdp);
  883. rcu_read_unlock();
  884. /* Recalculate, as XDP might have changed the headers */
  885. *data_offset = xdp.data - xdp.data_hard_start;
  886. *len = xdp.data_end - xdp.data;
  887. if (act == XDP_PASS)
  888. return true;
  889. /* Count number of packets not to be passed to stack */
  890. rxq->xdp_no_pass++;
  891. switch (act) {
  892. case XDP_TX:
  893. /* We need the replacement buffer before transmit. */
  894. if (qede_alloc_rx_buffer(rxq, true)) {
  895. qede_recycle_rx_bd_ring(rxq, 1);
  896. trace_xdp_exception(edev->ndev, prog, act);
  897. return false;
  898. }
  899. /* Now if there's a transmission problem, we'd still have to
  900. * throw current buffer, as replacement was already allocated.
  901. */
  902. if (qede_xdp_xmit(edev, fp, bd, *data_offset, *len)) {
  903. dma_unmap_page(rxq->dev, bd->mapping,
  904. PAGE_SIZE, DMA_BIDIRECTIONAL);
  905. __free_page(bd->data);
  906. trace_xdp_exception(edev->ndev, prog, act);
  907. }
  908. /* Regardless, we've consumed an Rx BD */
  909. qede_rx_bd_ring_consume(rxq);
  910. return false;
  911. default:
  912. bpf_warn_invalid_xdp_action(act);
  913. case XDP_ABORTED:
  914. trace_xdp_exception(edev->ndev, prog, act);
  915. case XDP_DROP:
  916. qede_recycle_rx_bd_ring(rxq, cqe->bd_num);
  917. }
  918. return false;
  919. }
  920. static int qede_rx_build_jumbo(struct qede_dev *edev,
  921. struct qede_rx_queue *rxq,
  922. struct sk_buff *skb,
  923. struct eth_fast_path_rx_reg_cqe *cqe,
  924. u16 first_bd_len)
  925. {
  926. u16 pkt_len = le16_to_cpu(cqe->pkt_len);
  927. struct sw_rx_data *bd;
  928. u16 bd_cons_idx;
  929. u8 num_frags;
  930. pkt_len -= first_bd_len;
  931. /* We've already used one BD for the SKB. Now take care of the rest */
  932. for (num_frags = cqe->bd_num - 1; num_frags > 0; num_frags--) {
  933. u16 cur_size = pkt_len > rxq->rx_buf_size ? rxq->rx_buf_size :
  934. pkt_len;
  935. if (unlikely(!cur_size)) {
  936. DP_ERR(edev,
  937. "Still got %d BDs for mapping jumbo, but length became 0\n",
  938. num_frags);
  939. goto out;
  940. }
  941. /* We need a replacement buffer for each BD */
  942. if (unlikely(qede_alloc_rx_buffer(rxq, true)))
  943. goto out;
  944. /* Now that we've allocated the replacement buffer,
  945. * we can safely consume the next BD and map it to the SKB.
  946. */
  947. bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  948. bd = &rxq->sw_rx_ring[bd_cons_idx];
  949. qede_rx_bd_ring_consume(rxq);
  950. dma_unmap_page(rxq->dev, bd->mapping,
  951. PAGE_SIZE, DMA_FROM_DEVICE);
  952. skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
  953. bd->data, rxq->rx_headroom, cur_size);
  954. skb->truesize += PAGE_SIZE;
  955. skb->data_len += cur_size;
  956. skb->len += cur_size;
  957. pkt_len -= cur_size;
  958. }
  959. if (unlikely(pkt_len))
  960. DP_ERR(edev,
  961. "Mapped all BDs of jumbo, but still have %d bytes\n",
  962. pkt_len);
  963. out:
  964. return num_frags;
  965. }
  966. static int qede_rx_process_tpa_cqe(struct qede_dev *edev,
  967. struct qede_fastpath *fp,
  968. struct qede_rx_queue *rxq,
  969. union eth_rx_cqe *cqe,
  970. enum eth_rx_cqe_type type)
  971. {
  972. switch (type) {
  973. case ETH_RX_CQE_TYPE_TPA_START:
  974. qede_tpa_start(edev, rxq, &cqe->fast_path_tpa_start);
  975. return 0;
  976. case ETH_RX_CQE_TYPE_TPA_CONT:
  977. qede_tpa_cont(edev, rxq, &cqe->fast_path_tpa_cont);
  978. return 0;
  979. case ETH_RX_CQE_TYPE_TPA_END:
  980. return qede_tpa_end(edev, fp, &cqe->fast_path_tpa_end);
  981. default:
  982. return 0;
  983. }
  984. }
  985. static int qede_rx_process_cqe(struct qede_dev *edev,
  986. struct qede_fastpath *fp,
  987. struct qede_rx_queue *rxq)
  988. {
  989. struct bpf_prog *xdp_prog = READ_ONCE(rxq->xdp_prog);
  990. struct eth_fast_path_rx_reg_cqe *fp_cqe;
  991. u16 len, pad, bd_cons_idx, parse_flag;
  992. enum eth_rx_cqe_type cqe_type;
  993. union eth_rx_cqe *cqe;
  994. struct sw_rx_data *bd;
  995. struct sk_buff *skb;
  996. __le16 flags;
  997. u8 csum_flag;
  998. /* Get the CQE from the completion ring */
  999. cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
  1000. cqe_type = cqe->fast_path_regular.type;
  1001. /* Process an unlikely slowpath event */
  1002. if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
  1003. struct eth_slow_path_rx_cqe *sp_cqe;
  1004. sp_cqe = (struct eth_slow_path_rx_cqe *)cqe;
  1005. edev->ops->eth_cqe_completion(edev->cdev, fp->id, sp_cqe);
  1006. return 0;
  1007. }
  1008. /* Handle TPA cqes */
  1009. if (cqe_type != ETH_RX_CQE_TYPE_REGULAR)
  1010. return qede_rx_process_tpa_cqe(edev, fp, rxq, cqe, cqe_type);
  1011. /* Get the data from the SW ring; Consume it only after it's evident
  1012. * we wouldn't recycle it.
  1013. */
  1014. bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  1015. bd = &rxq->sw_rx_ring[bd_cons_idx];
  1016. fp_cqe = &cqe->fast_path_regular;
  1017. len = le16_to_cpu(fp_cqe->len_on_first_bd);
  1018. pad = fp_cqe->placement_offset + rxq->rx_headroom;
  1019. /* Run eBPF program if one is attached */
  1020. if (xdp_prog)
  1021. if (!qede_rx_xdp(edev, fp, rxq, xdp_prog, bd, fp_cqe,
  1022. &pad, &len))
  1023. return 0;
  1024. /* If this is an error packet then drop it */
  1025. flags = cqe->fast_path_regular.pars_flags.flags;
  1026. parse_flag = le16_to_cpu(flags);
  1027. csum_flag = qede_check_csum(parse_flag);
  1028. if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
  1029. if (qede_pkt_is_ip_fragmented(fp_cqe, parse_flag))
  1030. rxq->rx_ip_frags++;
  1031. else
  1032. rxq->rx_hw_errors++;
  1033. }
  1034. /* Basic validation passed; Need to prepare an SKB. This would also
  1035. * guarantee to finally consume the first BD upon success.
  1036. */
  1037. skb = qede_rx_build_skb(edev, rxq, bd, len, pad);
  1038. if (!skb) {
  1039. rxq->rx_alloc_errors++;
  1040. qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
  1041. return 0;
  1042. }
  1043. /* In case of Jumbo packet, several PAGE_SIZEd buffers will be pointed
  1044. * by a single cqe.
  1045. */
  1046. if (fp_cqe->bd_num > 1) {
  1047. u16 unmapped_frags = qede_rx_build_jumbo(edev, rxq, skb,
  1048. fp_cqe, len);
  1049. if (unlikely(unmapped_frags > 0)) {
  1050. qede_recycle_rx_bd_ring(rxq, unmapped_frags);
  1051. dev_kfree_skb_any(skb);
  1052. return 0;
  1053. }
  1054. }
  1055. /* The SKB contains all the data. Now prepare meta-magic */
  1056. skb->protocol = eth_type_trans(skb, edev->ndev);
  1057. qede_get_rxhash(skb, fp_cqe->bitfields, fp_cqe->rss_hash);
  1058. qede_set_skb_csum(skb, csum_flag);
  1059. skb_record_rx_queue(skb, rxq->rxq_id);
  1060. qede_ptp_record_rx_ts(edev, cqe, skb);
  1061. /* SKB is prepared - pass it to stack */
  1062. qede_skb_receive(edev, fp, rxq, skb, le16_to_cpu(fp_cqe->vlan_tag));
  1063. return 1;
  1064. }
  1065. static int qede_rx_int(struct qede_fastpath *fp, int budget)
  1066. {
  1067. struct qede_rx_queue *rxq = fp->rxq;
  1068. struct qede_dev *edev = fp->edev;
  1069. int work_done = 0, rcv_pkts = 0;
  1070. u16 hw_comp_cons, sw_comp_cons;
  1071. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  1072. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1073. /* Memory barrier to prevent the CPU from doing speculative reads of CQE
  1074. * / BD in the while-loop before reading hw_comp_cons. If the CQE is
  1075. * read before it is written by FW, then FW writes CQE and SB, and then
  1076. * the CPU reads the hw_comp_cons, it will use an old CQE.
  1077. */
  1078. rmb();
  1079. /* Loop to complete all indicated BDs */
  1080. while ((sw_comp_cons != hw_comp_cons) && (work_done < budget)) {
  1081. rcv_pkts += qede_rx_process_cqe(edev, fp, rxq);
  1082. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1083. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1084. work_done++;
  1085. }
  1086. rxq->rcv_pkts += rcv_pkts;
  1087. /* Allocate replacement buffers */
  1088. while (rxq->num_rx_buffers - rxq->filled_buffers)
  1089. if (qede_alloc_rx_buffer(rxq, false))
  1090. break;
  1091. /* Update producers */
  1092. qede_update_rx_prod(edev, rxq);
  1093. return work_done;
  1094. }
  1095. static bool qede_poll_is_more_work(struct qede_fastpath *fp)
  1096. {
  1097. qed_sb_update_sb_idx(fp->sb_info);
  1098. /* *_has_*_work() reads the status block, thus we need to ensure that
  1099. * status block indices have been actually read (qed_sb_update_sb_idx)
  1100. * prior to this check (*_has_*_work) so that we won't write the
  1101. * "newer" value of the status block to HW (if there was a DMA right
  1102. * after qede_has_rx_work and if there is no rmb, the memory reading
  1103. * (qed_sb_update_sb_idx) may be postponed to right before *_ack_sb).
  1104. * In this case there will never be another interrupt until there is
  1105. * another update of the status block, while there is still unhandled
  1106. * work.
  1107. */
  1108. rmb();
  1109. if (likely(fp->type & QEDE_FASTPATH_RX))
  1110. if (qede_has_rx_work(fp->rxq))
  1111. return true;
  1112. if (fp->type & QEDE_FASTPATH_XDP)
  1113. if (qede_txq_has_work(fp->xdp_tx))
  1114. return true;
  1115. if (likely(fp->type & QEDE_FASTPATH_TX))
  1116. if (qede_txq_has_work(fp->txq))
  1117. return true;
  1118. return false;
  1119. }
  1120. /*********************
  1121. * NDO & API related *
  1122. *********************/
  1123. int qede_poll(struct napi_struct *napi, int budget)
  1124. {
  1125. struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
  1126. napi);
  1127. struct qede_dev *edev = fp->edev;
  1128. int rx_work_done = 0;
  1129. if (likely(fp->type & QEDE_FASTPATH_TX) && qede_txq_has_work(fp->txq))
  1130. qede_tx_int(edev, fp->txq);
  1131. if ((fp->type & QEDE_FASTPATH_XDP) && qede_txq_has_work(fp->xdp_tx))
  1132. qede_xdp_tx_int(edev, fp->xdp_tx);
  1133. rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
  1134. qede_has_rx_work(fp->rxq)) ?
  1135. qede_rx_int(fp, budget) : 0;
  1136. if (rx_work_done < budget) {
  1137. if (!qede_poll_is_more_work(fp)) {
  1138. napi_complete_done(napi, rx_work_done);
  1139. /* Update and reenable interrupts */
  1140. qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1);
  1141. } else {
  1142. rx_work_done = budget;
  1143. }
  1144. }
  1145. if (fp->xdp_xmit) {
  1146. u16 xdp_prod = qed_chain_get_prod_idx(&fp->xdp_tx->tx_pbl);
  1147. fp->xdp_xmit = 0;
  1148. fp->xdp_tx->tx_db.data.bd_prod = cpu_to_le16(xdp_prod);
  1149. qede_update_tx_producer(fp->xdp_tx);
  1150. }
  1151. return rx_work_done;
  1152. }
  1153. irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
  1154. {
  1155. struct qede_fastpath *fp = fp_cookie;
  1156. qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
  1157. napi_schedule_irqoff(&fp->napi);
  1158. return IRQ_HANDLED;
  1159. }
  1160. /* Main transmit function */
  1161. netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev)
  1162. {
  1163. struct qede_dev *edev = netdev_priv(ndev);
  1164. struct netdev_queue *netdev_txq;
  1165. struct qede_tx_queue *txq;
  1166. struct eth_tx_1st_bd *first_bd;
  1167. struct eth_tx_2nd_bd *second_bd = NULL;
  1168. struct eth_tx_3rd_bd *third_bd = NULL;
  1169. struct eth_tx_bd *tx_data_bd = NULL;
  1170. u16 txq_index, val = 0;
  1171. u8 nbd = 0;
  1172. dma_addr_t mapping;
  1173. int rc, frag_idx = 0, ipv6_ext = 0;
  1174. u8 xmit_type;
  1175. u16 idx;
  1176. u16 hlen;
  1177. bool data_split = false;
  1178. /* Get tx-queue context and netdev index */
  1179. txq_index = skb_get_queue_mapping(skb);
  1180. WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
  1181. txq = edev->fp_array[edev->fp_num_rx + txq_index].txq;
  1182. netdev_txq = netdev_get_tx_queue(ndev, txq_index);
  1183. WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
  1184. xmit_type = qede_xmit_type(skb, &ipv6_ext);
  1185. #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
  1186. if (qede_pkt_req_lin(skb, xmit_type)) {
  1187. if (skb_linearize(skb)) {
  1188. DP_NOTICE(edev,
  1189. "SKB linearization failed - silently dropping this SKB\n");
  1190. dev_kfree_skb_any(skb);
  1191. return NETDEV_TX_OK;
  1192. }
  1193. }
  1194. #endif
  1195. /* Fill the entry in the SW ring and the BDs in the FW ring */
  1196. idx = txq->sw_tx_prod;
  1197. txq->sw_tx_ring.skbs[idx].skb = skb;
  1198. first_bd = (struct eth_tx_1st_bd *)
  1199. qed_chain_produce(&txq->tx_pbl);
  1200. memset(first_bd, 0, sizeof(*first_bd));
  1201. first_bd->data.bd_flags.bitfields =
  1202. 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
  1203. if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))
  1204. qede_ptp_tx_ts(edev, skb);
  1205. /* Map skb linear data for DMA and set in the first BD */
  1206. mapping = dma_map_single(txq->dev, skb->data,
  1207. skb_headlen(skb), DMA_TO_DEVICE);
  1208. if (unlikely(dma_mapping_error(txq->dev, mapping))) {
  1209. DP_NOTICE(edev, "SKB mapping failed\n");
  1210. qede_free_failed_tx_pkt(txq, first_bd, 0, false);
  1211. qede_update_tx_producer(txq);
  1212. return NETDEV_TX_OK;
  1213. }
  1214. nbd++;
  1215. BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
  1216. /* In case there is IPv6 with extension headers or LSO we need 2nd and
  1217. * 3rd BDs.
  1218. */
  1219. if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
  1220. second_bd = (struct eth_tx_2nd_bd *)
  1221. qed_chain_produce(&txq->tx_pbl);
  1222. memset(second_bd, 0, sizeof(*second_bd));
  1223. nbd++;
  1224. third_bd = (struct eth_tx_3rd_bd *)
  1225. qed_chain_produce(&txq->tx_pbl);
  1226. memset(third_bd, 0, sizeof(*third_bd));
  1227. nbd++;
  1228. /* We need to fill in additional data in second_bd... */
  1229. tx_data_bd = (struct eth_tx_bd *)second_bd;
  1230. }
  1231. if (skb_vlan_tag_present(skb)) {
  1232. first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
  1233. first_bd->data.bd_flags.bitfields |=
  1234. 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
  1235. }
  1236. /* Fill the parsing flags & params according to the requested offload */
  1237. if (xmit_type & XMIT_L4_CSUM) {
  1238. /* We don't re-calculate IP checksum as it is already done by
  1239. * the upper stack
  1240. */
  1241. first_bd->data.bd_flags.bitfields |=
  1242. 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
  1243. if (xmit_type & XMIT_ENC) {
  1244. first_bd->data.bd_flags.bitfields |=
  1245. 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
  1246. val |= (1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT);
  1247. }
  1248. /* Legacy FW had flipped behavior in regard to this bit -
  1249. * I.e., needed to set to prevent FW from touching encapsulated
  1250. * packets when it didn't need to.
  1251. */
  1252. if (unlikely(txq->is_legacy))
  1253. val ^= (1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT);
  1254. /* If the packet is IPv6 with extension header, indicate that
  1255. * to FW and pass few params, since the device cracker doesn't
  1256. * support parsing IPv6 with extension header/s.
  1257. */
  1258. if (unlikely(ipv6_ext))
  1259. qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
  1260. }
  1261. if (xmit_type & XMIT_LSO) {
  1262. first_bd->data.bd_flags.bitfields |=
  1263. (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
  1264. third_bd->data.lso_mss =
  1265. cpu_to_le16(skb_shinfo(skb)->gso_size);
  1266. if (unlikely(xmit_type & XMIT_ENC)) {
  1267. first_bd->data.bd_flags.bitfields |=
  1268. 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
  1269. if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
  1270. u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
  1271. first_bd->data.bd_flags.bitfields |= 1 << tmp;
  1272. }
  1273. hlen = qede_get_skb_hlen(skb, true);
  1274. } else {
  1275. first_bd->data.bd_flags.bitfields |=
  1276. 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
  1277. hlen = qede_get_skb_hlen(skb, false);
  1278. }
  1279. /* @@@TBD - if will not be removed need to check */
  1280. third_bd->data.bitfields |=
  1281. cpu_to_le16(1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT);
  1282. /* Make life easier for FW guys who can't deal with header and
  1283. * data on same BD. If we need to split, use the second bd...
  1284. */
  1285. if (unlikely(skb_headlen(skb) > hlen)) {
  1286. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1287. "TSO split header size is %d (%x:%x)\n",
  1288. first_bd->nbytes, first_bd->addr.hi,
  1289. first_bd->addr.lo);
  1290. mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
  1291. le32_to_cpu(first_bd->addr.lo)) +
  1292. hlen;
  1293. BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
  1294. le16_to_cpu(first_bd->nbytes) -
  1295. hlen);
  1296. /* this marks the BD as one that has no
  1297. * individual mapping
  1298. */
  1299. txq->sw_tx_ring.skbs[idx].flags |= QEDE_TSO_SPLIT_BD;
  1300. first_bd->nbytes = cpu_to_le16(hlen);
  1301. tx_data_bd = (struct eth_tx_bd *)third_bd;
  1302. data_split = true;
  1303. }
  1304. } else {
  1305. val |= ((skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
  1306. ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT);
  1307. }
  1308. first_bd->data.bitfields = cpu_to_le16(val);
  1309. /* Handle fragmented skb */
  1310. /* special handle for frags inside 2nd and 3rd bds.. */
  1311. while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
  1312. rc = map_frag_to_bd(txq,
  1313. &skb_shinfo(skb)->frags[frag_idx],
  1314. tx_data_bd);
  1315. if (rc) {
  1316. qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
  1317. qede_update_tx_producer(txq);
  1318. return NETDEV_TX_OK;
  1319. }
  1320. if (tx_data_bd == (struct eth_tx_bd *)second_bd)
  1321. tx_data_bd = (struct eth_tx_bd *)third_bd;
  1322. else
  1323. tx_data_bd = NULL;
  1324. frag_idx++;
  1325. }
  1326. /* map last frags into 4th, 5th .... */
  1327. for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
  1328. tx_data_bd = (struct eth_tx_bd *)
  1329. qed_chain_produce(&txq->tx_pbl);
  1330. memset(tx_data_bd, 0, sizeof(*tx_data_bd));
  1331. rc = map_frag_to_bd(txq,
  1332. &skb_shinfo(skb)->frags[frag_idx],
  1333. tx_data_bd);
  1334. if (rc) {
  1335. qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
  1336. qede_update_tx_producer(txq);
  1337. return NETDEV_TX_OK;
  1338. }
  1339. }
  1340. /* update the first BD with the actual num BDs */
  1341. first_bd->data.nbds = nbd;
  1342. netdev_tx_sent_queue(netdev_txq, skb->len);
  1343. skb_tx_timestamp(skb);
  1344. /* Advance packet producer only before sending the packet since mapping
  1345. * of pages may fail.
  1346. */
  1347. txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
  1348. /* 'next page' entries are counted in the producer value */
  1349. txq->tx_db.data.bd_prod =
  1350. cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
  1351. if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
  1352. qede_update_tx_producer(txq);
  1353. if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
  1354. < (MAX_SKB_FRAGS + 1))) {
  1355. if (skb->xmit_more)
  1356. qede_update_tx_producer(txq);
  1357. netif_tx_stop_queue(netdev_txq);
  1358. txq->stopped_cnt++;
  1359. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1360. "Stop queue was called\n");
  1361. /* paired memory barrier is in qede_tx_int(), we have to keep
  1362. * ordering of set_bit() in netif_tx_stop_queue() and read of
  1363. * fp->bd_tx_cons
  1364. */
  1365. smp_mb();
  1366. if ((qed_chain_get_elem_left(&txq->tx_pbl) >=
  1367. (MAX_SKB_FRAGS + 1)) &&
  1368. (edev->state == QEDE_STATE_OPEN)) {
  1369. netif_tx_wake_queue(netdev_txq);
  1370. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1371. "Wake queue was called\n");
  1372. }
  1373. }
  1374. return NETDEV_TX_OK;
  1375. }
  1376. /* 8B udp header + 8B base tunnel header + 32B option length */
  1377. #define QEDE_MAX_TUN_HDR_LEN 48
  1378. netdev_features_t qede_features_check(struct sk_buff *skb,
  1379. struct net_device *dev,
  1380. netdev_features_t features)
  1381. {
  1382. if (skb->encapsulation) {
  1383. u8 l4_proto = 0;
  1384. switch (vlan_get_protocol(skb)) {
  1385. case htons(ETH_P_IP):
  1386. l4_proto = ip_hdr(skb)->protocol;
  1387. break;
  1388. case htons(ETH_P_IPV6):
  1389. l4_proto = ipv6_hdr(skb)->nexthdr;
  1390. break;
  1391. default:
  1392. return features;
  1393. }
  1394. /* Disable offloads for geneve tunnels, as HW can't parse
  1395. * the geneve header which has option length greater than 32b
  1396. * and disable offloads for the ports which are not offloaded.
  1397. */
  1398. if (l4_proto == IPPROTO_UDP) {
  1399. struct qede_dev *edev = netdev_priv(dev);
  1400. u16 hdrlen, vxln_port, gnv_port;
  1401. hdrlen = QEDE_MAX_TUN_HDR_LEN;
  1402. vxln_port = edev->vxlan_dst_port;
  1403. gnv_port = edev->geneve_dst_port;
  1404. if ((skb_inner_mac_header(skb) -
  1405. skb_transport_header(skb)) > hdrlen ||
  1406. (ntohs(udp_hdr(skb)->dest) != vxln_port &&
  1407. ntohs(udp_hdr(skb)->dest) != gnv_port))
  1408. return features & ~(NETIF_F_CSUM_MASK |
  1409. NETIF_F_GSO_MASK);
  1410. }
  1411. }
  1412. return features;
  1413. }