qede_ethtool.c 51 KB

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  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/version.h>
  33. #include <linux/types.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/etherdevice.h>
  36. #include <linux/ethtool.h>
  37. #include <linux/string.h>
  38. #include <linux/pci.h>
  39. #include <linux/capability.h>
  40. #include <linux/vmalloc.h>
  41. #include "qede.h"
  42. #include "qede_ptp.h"
  43. #define QEDE_RQSTAT_OFFSET(stat_name) \
  44. (offsetof(struct qede_rx_queue, stat_name))
  45. #define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
  46. #define QEDE_RQSTAT(stat_name) \
  47. {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
  48. #define QEDE_SELFTEST_POLL_COUNT 100
  49. static const struct {
  50. u64 offset;
  51. char string[ETH_GSTRING_LEN];
  52. } qede_rqstats_arr[] = {
  53. QEDE_RQSTAT(rcv_pkts),
  54. QEDE_RQSTAT(rx_hw_errors),
  55. QEDE_RQSTAT(rx_alloc_errors),
  56. QEDE_RQSTAT(rx_ip_frags),
  57. QEDE_RQSTAT(xdp_no_pass),
  58. };
  59. #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
  60. #define QEDE_TQSTAT_OFFSET(stat_name) \
  61. (offsetof(struct qede_tx_queue, stat_name))
  62. #define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
  63. #define QEDE_TQSTAT(stat_name) \
  64. {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
  65. #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
  66. static const struct {
  67. u64 offset;
  68. char string[ETH_GSTRING_LEN];
  69. } qede_tqstats_arr[] = {
  70. QEDE_TQSTAT(xmit_pkts),
  71. QEDE_TQSTAT(stopped_cnt),
  72. };
  73. #define QEDE_STAT_OFFSET(stat_name, type, base) \
  74. (offsetof(type, stat_name) + (base))
  75. #define QEDE_STAT_STRING(stat_name) (#stat_name)
  76. #define _QEDE_STAT(stat_name, type, base, attr) \
  77. {QEDE_STAT_OFFSET(stat_name, type, base), \
  78. QEDE_STAT_STRING(stat_name), \
  79. attr}
  80. #define QEDE_STAT(stat_name) \
  81. _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
  82. #define QEDE_PF_STAT(stat_name) \
  83. _QEDE_STAT(stat_name, struct qede_stats_common, 0, \
  84. BIT(QEDE_STAT_PF_ONLY))
  85. #define QEDE_PF_BB_STAT(stat_name) \
  86. _QEDE_STAT(stat_name, struct qede_stats_bb, \
  87. offsetof(struct qede_stats, bb), \
  88. BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
  89. #define QEDE_PF_AH_STAT(stat_name) \
  90. _QEDE_STAT(stat_name, struct qede_stats_ah, \
  91. offsetof(struct qede_stats, ah), \
  92. BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
  93. static const struct {
  94. u64 offset;
  95. char string[ETH_GSTRING_LEN];
  96. unsigned long attr;
  97. #define QEDE_STAT_PF_ONLY 0
  98. #define QEDE_STAT_BB_ONLY 1
  99. #define QEDE_STAT_AH_ONLY 2
  100. } qede_stats_arr[] = {
  101. QEDE_STAT(rx_ucast_bytes),
  102. QEDE_STAT(rx_mcast_bytes),
  103. QEDE_STAT(rx_bcast_bytes),
  104. QEDE_STAT(rx_ucast_pkts),
  105. QEDE_STAT(rx_mcast_pkts),
  106. QEDE_STAT(rx_bcast_pkts),
  107. QEDE_STAT(tx_ucast_bytes),
  108. QEDE_STAT(tx_mcast_bytes),
  109. QEDE_STAT(tx_bcast_bytes),
  110. QEDE_STAT(tx_ucast_pkts),
  111. QEDE_STAT(tx_mcast_pkts),
  112. QEDE_STAT(tx_bcast_pkts),
  113. QEDE_PF_STAT(rx_64_byte_packets),
  114. QEDE_PF_STAT(rx_65_to_127_byte_packets),
  115. QEDE_PF_STAT(rx_128_to_255_byte_packets),
  116. QEDE_PF_STAT(rx_256_to_511_byte_packets),
  117. QEDE_PF_STAT(rx_512_to_1023_byte_packets),
  118. QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
  119. QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
  120. QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
  121. QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
  122. QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
  123. QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
  124. QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
  125. QEDE_PF_STAT(tx_64_byte_packets),
  126. QEDE_PF_STAT(tx_65_to_127_byte_packets),
  127. QEDE_PF_STAT(tx_128_to_255_byte_packets),
  128. QEDE_PF_STAT(tx_256_to_511_byte_packets),
  129. QEDE_PF_STAT(tx_512_to_1023_byte_packets),
  130. QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
  131. QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
  132. QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
  133. QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
  134. QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
  135. QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
  136. QEDE_PF_STAT(rx_mac_crtl_frames),
  137. QEDE_PF_STAT(tx_mac_ctrl_frames),
  138. QEDE_PF_STAT(rx_pause_frames),
  139. QEDE_PF_STAT(tx_pause_frames),
  140. QEDE_PF_STAT(rx_pfc_frames),
  141. QEDE_PF_STAT(tx_pfc_frames),
  142. QEDE_PF_STAT(rx_crc_errors),
  143. QEDE_PF_STAT(rx_align_errors),
  144. QEDE_PF_STAT(rx_carrier_errors),
  145. QEDE_PF_STAT(rx_oversize_packets),
  146. QEDE_PF_STAT(rx_jabbers),
  147. QEDE_PF_STAT(rx_undersize_packets),
  148. QEDE_PF_STAT(rx_fragments),
  149. QEDE_PF_BB_STAT(tx_lpi_entry_count),
  150. QEDE_PF_BB_STAT(tx_total_collisions),
  151. QEDE_PF_STAT(brb_truncates),
  152. QEDE_PF_STAT(brb_discards),
  153. QEDE_STAT(no_buff_discards),
  154. QEDE_PF_STAT(mftag_filter_discards),
  155. QEDE_PF_STAT(mac_filter_discards),
  156. QEDE_PF_STAT(gft_filter_drop),
  157. QEDE_STAT(tx_err_drop_pkts),
  158. QEDE_STAT(ttl0_discard),
  159. QEDE_STAT(packet_too_big_discard),
  160. QEDE_STAT(coalesced_pkts),
  161. QEDE_STAT(coalesced_events),
  162. QEDE_STAT(coalesced_aborts_num),
  163. QEDE_STAT(non_coalesced_pkts),
  164. QEDE_STAT(coalesced_bytes),
  165. QEDE_STAT(link_change_count),
  166. };
  167. #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
  168. #define QEDE_STAT_IS_PF_ONLY(i) \
  169. test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
  170. #define QEDE_STAT_IS_BB_ONLY(i) \
  171. test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
  172. #define QEDE_STAT_IS_AH_ONLY(i) \
  173. test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
  174. enum {
  175. QEDE_PRI_FLAG_CMT,
  176. QEDE_PRI_FLAG_LEN,
  177. };
  178. static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
  179. "Coupled-Function",
  180. };
  181. enum qede_ethtool_tests {
  182. QEDE_ETHTOOL_INT_LOOPBACK,
  183. QEDE_ETHTOOL_INTERRUPT_TEST,
  184. QEDE_ETHTOOL_MEMORY_TEST,
  185. QEDE_ETHTOOL_REGISTER_TEST,
  186. QEDE_ETHTOOL_CLOCK_TEST,
  187. QEDE_ETHTOOL_NVRAM_TEST,
  188. QEDE_ETHTOOL_TEST_MAX
  189. };
  190. static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
  191. "Internal loopback (offline)",
  192. "Interrupt (online)\t",
  193. "Memory (online)\t\t",
  194. "Register (online)\t",
  195. "Clock (online)\t\t",
  196. "Nvram (online)\t\t",
  197. };
  198. static void qede_get_strings_stats_txq(struct qede_dev *edev,
  199. struct qede_tx_queue *txq, u8 **buf)
  200. {
  201. int i;
  202. for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
  203. if (txq->is_xdp)
  204. sprintf(*buf, "%d [XDP]: %s",
  205. QEDE_TXQ_XDP_TO_IDX(edev, txq),
  206. qede_tqstats_arr[i].string);
  207. else
  208. sprintf(*buf, "%d: %s", txq->index,
  209. qede_tqstats_arr[i].string);
  210. *buf += ETH_GSTRING_LEN;
  211. }
  212. }
  213. static void qede_get_strings_stats_rxq(struct qede_dev *edev,
  214. struct qede_rx_queue *rxq, u8 **buf)
  215. {
  216. int i;
  217. for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
  218. sprintf(*buf, "%d: %s", rxq->rxq_id,
  219. qede_rqstats_arr[i].string);
  220. *buf += ETH_GSTRING_LEN;
  221. }
  222. }
  223. static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
  224. {
  225. return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
  226. (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
  227. (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
  228. }
  229. static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
  230. {
  231. struct qede_fastpath *fp;
  232. int i;
  233. /* Account for queue statistics */
  234. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  235. fp = &edev->fp_array[i];
  236. if (fp->type & QEDE_FASTPATH_RX)
  237. qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
  238. if (fp->type & QEDE_FASTPATH_XDP)
  239. qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
  240. if (fp->type & QEDE_FASTPATH_TX)
  241. qede_get_strings_stats_txq(edev, fp->txq, &buf);
  242. }
  243. /* Account for non-queue statistics */
  244. for (i = 0; i < QEDE_NUM_STATS; i++) {
  245. if (qede_is_irrelevant_stat(edev, i))
  246. continue;
  247. strcpy(buf, qede_stats_arr[i].string);
  248. buf += ETH_GSTRING_LEN;
  249. }
  250. }
  251. static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  252. {
  253. struct qede_dev *edev = netdev_priv(dev);
  254. switch (stringset) {
  255. case ETH_SS_STATS:
  256. qede_get_strings_stats(edev, buf);
  257. break;
  258. case ETH_SS_PRIV_FLAGS:
  259. memcpy(buf, qede_private_arr,
  260. ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
  261. break;
  262. case ETH_SS_TEST:
  263. memcpy(buf, qede_tests_str_arr,
  264. ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
  265. break;
  266. default:
  267. DP_VERBOSE(edev, QED_MSG_DEBUG,
  268. "Unsupported stringset 0x%08x\n", stringset);
  269. }
  270. }
  271. static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
  272. {
  273. int i;
  274. for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
  275. **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
  276. (*buf)++;
  277. }
  278. }
  279. static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
  280. {
  281. int i;
  282. for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
  283. **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
  284. (*buf)++;
  285. }
  286. }
  287. static void qede_get_ethtool_stats(struct net_device *dev,
  288. struct ethtool_stats *stats, u64 *buf)
  289. {
  290. struct qede_dev *edev = netdev_priv(dev);
  291. struct qede_fastpath *fp;
  292. int i;
  293. qede_fill_by_demand_stats(edev);
  294. /* Need to protect the access to the fastpath array */
  295. __qede_lock(edev);
  296. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  297. fp = &edev->fp_array[i];
  298. if (fp->type & QEDE_FASTPATH_RX)
  299. qede_get_ethtool_stats_rxq(fp->rxq, &buf);
  300. if (fp->type & QEDE_FASTPATH_XDP)
  301. qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
  302. if (fp->type & QEDE_FASTPATH_TX)
  303. qede_get_ethtool_stats_txq(fp->txq, &buf);
  304. }
  305. for (i = 0; i < QEDE_NUM_STATS; i++) {
  306. if (qede_is_irrelevant_stat(edev, i))
  307. continue;
  308. *buf = *((u64 *)(((void *)&edev->stats) +
  309. qede_stats_arr[i].offset));
  310. buf++;
  311. }
  312. __qede_unlock(edev);
  313. }
  314. static int qede_get_sset_count(struct net_device *dev, int stringset)
  315. {
  316. struct qede_dev *edev = netdev_priv(dev);
  317. int num_stats = QEDE_NUM_STATS, i;
  318. switch (stringset) {
  319. case ETH_SS_STATS:
  320. for (i = 0; i < QEDE_NUM_STATS; i++)
  321. if (qede_is_irrelevant_stat(edev, i))
  322. num_stats--;
  323. /* Account for the Regular Tx statistics */
  324. num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS;
  325. /* Account for the Regular Rx statistics */
  326. num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
  327. /* Account for XDP statistics [if needed] */
  328. if (edev->xdp_prog)
  329. num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
  330. return num_stats;
  331. case ETH_SS_PRIV_FLAGS:
  332. return QEDE_PRI_FLAG_LEN;
  333. case ETH_SS_TEST:
  334. if (!IS_VF(edev))
  335. return QEDE_ETHTOOL_TEST_MAX;
  336. else
  337. return 0;
  338. default:
  339. DP_VERBOSE(edev, QED_MSG_DEBUG,
  340. "Unsupported stringset 0x%08x\n", stringset);
  341. return -EINVAL;
  342. }
  343. }
  344. static u32 qede_get_priv_flags(struct net_device *dev)
  345. {
  346. struct qede_dev *edev = netdev_priv(dev);
  347. return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT;
  348. }
  349. struct qede_link_mode_mapping {
  350. u32 qed_link_mode;
  351. u32 ethtool_link_mode;
  352. };
  353. static const struct qede_link_mode_mapping qed_lm_map[] = {
  354. {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT},
  355. {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},
  356. {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT},
  357. {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT},
  358. {QED_LM_1000baseT_Half_BIT, ETHTOOL_LINK_MODE_1000baseT_Half_BIT},
  359. {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},
  360. {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
  361. {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
  362. {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
  363. {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT},
  364. {QED_LM_100000baseKR4_Full_BIT,
  365. ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
  366. };
  367. #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \
  368. { \
  369. int i; \
  370. \
  371. for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
  372. if ((caps) & (qed_lm_map[i].qed_link_mode)) \
  373. __set_bit(qed_lm_map[i].ethtool_link_mode,\
  374. lk_ksettings->link_modes.name); \
  375. } \
  376. }
  377. #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \
  378. { \
  379. int i; \
  380. \
  381. for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
  382. if (test_bit(qed_lm_map[i].ethtool_link_mode, \
  383. lk_ksettings->link_modes.name)) \
  384. caps |= qed_lm_map[i].qed_link_mode; \
  385. } \
  386. }
  387. static int qede_get_link_ksettings(struct net_device *dev,
  388. struct ethtool_link_ksettings *cmd)
  389. {
  390. struct ethtool_link_settings *base = &cmd->base;
  391. struct qede_dev *edev = netdev_priv(dev);
  392. struct qed_link_output current_link;
  393. __qede_lock(edev);
  394. memset(&current_link, 0, sizeof(current_link));
  395. edev->ops->common->get_link(edev->cdev, &current_link);
  396. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  397. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported)
  398. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  399. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising)
  400. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  401. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising)
  402. if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
  403. base->speed = current_link.speed;
  404. base->duplex = current_link.duplex;
  405. } else {
  406. base->speed = SPEED_UNKNOWN;
  407. base->duplex = DUPLEX_UNKNOWN;
  408. }
  409. __qede_unlock(edev);
  410. base->port = current_link.port;
  411. base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
  412. AUTONEG_DISABLE;
  413. return 0;
  414. }
  415. static int qede_set_link_ksettings(struct net_device *dev,
  416. const struct ethtool_link_ksettings *cmd)
  417. {
  418. const struct ethtool_link_settings *base = &cmd->base;
  419. struct qede_dev *edev = netdev_priv(dev);
  420. struct qed_link_output current_link;
  421. struct qed_link_params params;
  422. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  423. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  424. return -EOPNOTSUPP;
  425. }
  426. memset(&current_link, 0, sizeof(current_link));
  427. memset(&params, 0, sizeof(params));
  428. edev->ops->common->get_link(edev->cdev, &current_link);
  429. params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
  430. params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
  431. if (base->autoneg == AUTONEG_ENABLE) {
  432. if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
  433. DP_INFO(edev, "Auto negotiation is not supported\n");
  434. return -EOPNOTSUPP;
  435. }
  436. params.autoneg = true;
  437. params.forced_speed = 0;
  438. QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising)
  439. } else { /* forced speed */
  440. params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
  441. params.autoneg = false;
  442. params.forced_speed = base->speed;
  443. switch (base->speed) {
  444. case SPEED_1000:
  445. if (!(current_link.supported_caps &
  446. QED_LM_1000baseT_Full_BIT)) {
  447. DP_INFO(edev, "1G speed not supported\n");
  448. return -EINVAL;
  449. }
  450. params.adv_speeds = QED_LM_1000baseT_Full_BIT;
  451. break;
  452. case SPEED_10000:
  453. if (!(current_link.supported_caps &
  454. QED_LM_10000baseKR_Full_BIT)) {
  455. DP_INFO(edev, "10G speed not supported\n");
  456. return -EINVAL;
  457. }
  458. params.adv_speeds = QED_LM_10000baseKR_Full_BIT;
  459. break;
  460. case SPEED_25000:
  461. if (!(current_link.supported_caps &
  462. QED_LM_25000baseKR_Full_BIT)) {
  463. DP_INFO(edev, "25G speed not supported\n");
  464. return -EINVAL;
  465. }
  466. params.adv_speeds = QED_LM_25000baseKR_Full_BIT;
  467. break;
  468. case SPEED_40000:
  469. if (!(current_link.supported_caps &
  470. QED_LM_40000baseLR4_Full_BIT)) {
  471. DP_INFO(edev, "40G speed not supported\n");
  472. return -EINVAL;
  473. }
  474. params.adv_speeds = QED_LM_40000baseLR4_Full_BIT;
  475. break;
  476. case SPEED_50000:
  477. if (!(current_link.supported_caps &
  478. QED_LM_50000baseKR2_Full_BIT)) {
  479. DP_INFO(edev, "50G speed not supported\n");
  480. return -EINVAL;
  481. }
  482. params.adv_speeds = QED_LM_50000baseKR2_Full_BIT;
  483. break;
  484. case SPEED_100000:
  485. if (!(current_link.supported_caps &
  486. QED_LM_100000baseKR4_Full_BIT)) {
  487. DP_INFO(edev, "100G speed not supported\n");
  488. return -EINVAL;
  489. }
  490. params.adv_speeds = QED_LM_100000baseKR4_Full_BIT;
  491. break;
  492. default:
  493. DP_INFO(edev, "Unsupported speed %u\n", base->speed);
  494. return -EINVAL;
  495. }
  496. }
  497. params.link_up = true;
  498. edev->ops->common->set_link(edev->cdev, &params);
  499. return 0;
  500. }
  501. static void qede_get_drvinfo(struct net_device *ndev,
  502. struct ethtool_drvinfo *info)
  503. {
  504. char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
  505. struct qede_dev *edev = netdev_priv(ndev);
  506. strlcpy(info->driver, "qede", sizeof(info->driver));
  507. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  508. snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
  509. edev->dev_info.common.fw_major,
  510. edev->dev_info.common.fw_minor,
  511. edev->dev_info.common.fw_rev,
  512. edev->dev_info.common.fw_eng);
  513. snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
  514. (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
  515. (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
  516. (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
  517. edev->dev_info.common.mfw_rev & 0xFF);
  518. if ((strlen(storm) + strlen(mfw) + strlen("mfw storm ")) <
  519. sizeof(info->fw_version)) {
  520. snprintf(info->fw_version, sizeof(info->fw_version),
  521. "mfw %s storm %s", mfw, storm);
  522. } else {
  523. snprintf(info->fw_version, sizeof(info->fw_version),
  524. "%s %s", mfw, storm);
  525. }
  526. strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
  527. }
  528. static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
  529. {
  530. struct qede_dev *edev = netdev_priv(ndev);
  531. if (edev->dev_info.common.wol_support) {
  532. wol->supported = WAKE_MAGIC;
  533. wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
  534. }
  535. }
  536. static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
  537. {
  538. struct qede_dev *edev = netdev_priv(ndev);
  539. bool wol_requested;
  540. int rc;
  541. if (wol->wolopts & ~WAKE_MAGIC) {
  542. DP_INFO(edev,
  543. "Can't support WoL options other than magic-packet\n");
  544. return -EINVAL;
  545. }
  546. wol_requested = !!(wol->wolopts & WAKE_MAGIC);
  547. if (wol_requested == edev->wol_enabled)
  548. return 0;
  549. /* Need to actually change configuration */
  550. if (!edev->dev_info.common.wol_support) {
  551. DP_INFO(edev, "Device doesn't support WoL\n");
  552. return -EINVAL;
  553. }
  554. rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
  555. if (!rc)
  556. edev->wol_enabled = wol_requested;
  557. return rc;
  558. }
  559. static u32 qede_get_msglevel(struct net_device *ndev)
  560. {
  561. struct qede_dev *edev = netdev_priv(ndev);
  562. return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
  563. }
  564. static void qede_set_msglevel(struct net_device *ndev, u32 level)
  565. {
  566. struct qede_dev *edev = netdev_priv(ndev);
  567. u32 dp_module = 0;
  568. u8 dp_level = 0;
  569. qede_config_debug(level, &dp_module, &dp_level);
  570. edev->dp_level = dp_level;
  571. edev->dp_module = dp_module;
  572. edev->ops->common->update_msglvl(edev->cdev,
  573. dp_module, dp_level);
  574. }
  575. static int qede_nway_reset(struct net_device *dev)
  576. {
  577. struct qede_dev *edev = netdev_priv(dev);
  578. struct qed_link_output current_link;
  579. struct qed_link_params link_params;
  580. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  581. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  582. return -EOPNOTSUPP;
  583. }
  584. if (!netif_running(dev))
  585. return 0;
  586. memset(&current_link, 0, sizeof(current_link));
  587. edev->ops->common->get_link(edev->cdev, &current_link);
  588. if (!current_link.link_up)
  589. return 0;
  590. /* Toggle the link */
  591. memset(&link_params, 0, sizeof(link_params));
  592. link_params.link_up = false;
  593. edev->ops->common->set_link(edev->cdev, &link_params);
  594. link_params.link_up = true;
  595. edev->ops->common->set_link(edev->cdev, &link_params);
  596. return 0;
  597. }
  598. static u32 qede_get_link(struct net_device *dev)
  599. {
  600. struct qede_dev *edev = netdev_priv(dev);
  601. struct qed_link_output current_link;
  602. memset(&current_link, 0, sizeof(current_link));
  603. edev->ops->common->get_link(edev->cdev, &current_link);
  604. return current_link.link_up;
  605. }
  606. static int qede_flash_device(struct net_device *dev,
  607. struct ethtool_flash *flash)
  608. {
  609. struct qede_dev *edev = netdev_priv(dev);
  610. return edev->ops->common->nvm_flash(edev->cdev, flash->data);
  611. }
  612. static int qede_get_coalesce(struct net_device *dev,
  613. struct ethtool_coalesce *coal)
  614. {
  615. void *rx_handle = NULL, *tx_handle = NULL;
  616. struct qede_dev *edev = netdev_priv(dev);
  617. u16 rx_coal, tx_coal, i, rc = 0;
  618. struct qede_fastpath *fp;
  619. rx_coal = QED_DEFAULT_RX_USECS;
  620. tx_coal = QED_DEFAULT_TX_USECS;
  621. memset(coal, 0, sizeof(struct ethtool_coalesce));
  622. __qede_lock(edev);
  623. if (edev->state == QEDE_STATE_OPEN) {
  624. for_each_queue(i) {
  625. fp = &edev->fp_array[i];
  626. if (fp->type & QEDE_FASTPATH_RX) {
  627. rx_handle = fp->rxq->handle;
  628. break;
  629. }
  630. }
  631. rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
  632. if (rc) {
  633. DP_INFO(edev, "Read Rx coalesce error\n");
  634. goto out;
  635. }
  636. for_each_queue(i) {
  637. fp = &edev->fp_array[i];
  638. if (fp->type & QEDE_FASTPATH_TX) {
  639. tx_handle = fp->txq->handle;
  640. break;
  641. }
  642. }
  643. rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
  644. if (rc)
  645. DP_INFO(edev, "Read Tx coalesce error\n");
  646. }
  647. out:
  648. __qede_unlock(edev);
  649. coal->rx_coalesce_usecs = rx_coal;
  650. coal->tx_coalesce_usecs = tx_coal;
  651. return rc;
  652. }
  653. static int qede_set_coalesce(struct net_device *dev,
  654. struct ethtool_coalesce *coal)
  655. {
  656. struct qede_dev *edev = netdev_priv(dev);
  657. struct qede_fastpath *fp;
  658. int i, rc = 0;
  659. u16 rxc, txc;
  660. if (!netif_running(dev)) {
  661. DP_INFO(edev, "Interface is down\n");
  662. return -EINVAL;
  663. }
  664. if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
  665. coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
  666. DP_INFO(edev,
  667. "Can't support requested %s coalesce value [max supported value %d]\n",
  668. coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
  669. "tx", QED_COALESCE_MAX);
  670. return -EINVAL;
  671. }
  672. rxc = (u16)coal->rx_coalesce_usecs;
  673. txc = (u16)coal->tx_coalesce_usecs;
  674. for_each_queue(i) {
  675. fp = &edev->fp_array[i];
  676. if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
  677. rc = edev->ops->common->set_coalesce(edev->cdev,
  678. rxc, 0,
  679. fp->rxq->handle);
  680. if (rc) {
  681. DP_INFO(edev,
  682. "Set RX coalesce error, rc = %d\n", rc);
  683. return rc;
  684. }
  685. }
  686. if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
  687. rc = edev->ops->common->set_coalesce(edev->cdev,
  688. 0, txc,
  689. fp->txq->handle);
  690. if (rc) {
  691. DP_INFO(edev,
  692. "Set TX coalesce error, rc = %d\n", rc);
  693. return rc;
  694. }
  695. }
  696. }
  697. return rc;
  698. }
  699. static void qede_get_ringparam(struct net_device *dev,
  700. struct ethtool_ringparam *ering)
  701. {
  702. struct qede_dev *edev = netdev_priv(dev);
  703. ering->rx_max_pending = NUM_RX_BDS_MAX;
  704. ering->rx_pending = edev->q_num_rx_buffers;
  705. ering->tx_max_pending = NUM_TX_BDS_MAX;
  706. ering->tx_pending = edev->q_num_tx_buffers;
  707. }
  708. static int qede_set_ringparam(struct net_device *dev,
  709. struct ethtool_ringparam *ering)
  710. {
  711. struct qede_dev *edev = netdev_priv(dev);
  712. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  713. "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
  714. ering->rx_pending, ering->tx_pending);
  715. /* Validate legality of configuration */
  716. if (ering->rx_pending > NUM_RX_BDS_MAX ||
  717. ering->rx_pending < NUM_RX_BDS_MIN ||
  718. ering->tx_pending > NUM_TX_BDS_MAX ||
  719. ering->tx_pending < NUM_TX_BDS_MIN) {
  720. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  721. "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
  722. NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
  723. NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
  724. return -EINVAL;
  725. }
  726. /* Change ring size and re-load */
  727. edev->q_num_rx_buffers = ering->rx_pending;
  728. edev->q_num_tx_buffers = ering->tx_pending;
  729. qede_reload(edev, NULL, false);
  730. return 0;
  731. }
  732. static void qede_get_pauseparam(struct net_device *dev,
  733. struct ethtool_pauseparam *epause)
  734. {
  735. struct qede_dev *edev = netdev_priv(dev);
  736. struct qed_link_output current_link;
  737. memset(&current_link, 0, sizeof(current_link));
  738. edev->ops->common->get_link(edev->cdev, &current_link);
  739. if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
  740. epause->autoneg = true;
  741. if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
  742. epause->rx_pause = true;
  743. if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
  744. epause->tx_pause = true;
  745. DP_VERBOSE(edev, QED_MSG_DEBUG,
  746. "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
  747. epause->cmd, epause->autoneg, epause->rx_pause,
  748. epause->tx_pause);
  749. }
  750. static int qede_set_pauseparam(struct net_device *dev,
  751. struct ethtool_pauseparam *epause)
  752. {
  753. struct qede_dev *edev = netdev_priv(dev);
  754. struct qed_link_params params;
  755. struct qed_link_output current_link;
  756. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  757. DP_INFO(edev,
  758. "Pause settings are not allowed to be changed\n");
  759. return -EOPNOTSUPP;
  760. }
  761. memset(&current_link, 0, sizeof(current_link));
  762. edev->ops->common->get_link(edev->cdev, &current_link);
  763. memset(&params, 0, sizeof(params));
  764. params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
  765. if (epause->autoneg) {
  766. if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
  767. DP_INFO(edev, "autoneg not supported\n");
  768. return -EINVAL;
  769. }
  770. params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
  771. }
  772. if (epause->rx_pause)
  773. params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
  774. if (epause->tx_pause)
  775. params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
  776. params.link_up = true;
  777. edev->ops->common->set_link(edev->cdev, &params);
  778. return 0;
  779. }
  780. static void qede_get_regs(struct net_device *ndev,
  781. struct ethtool_regs *regs, void *buffer)
  782. {
  783. struct qede_dev *edev = netdev_priv(ndev);
  784. regs->version = 0;
  785. memset(buffer, 0, regs->len);
  786. if (edev->ops && edev->ops->common)
  787. edev->ops->common->dbg_all_data(edev->cdev, buffer);
  788. }
  789. static int qede_get_regs_len(struct net_device *ndev)
  790. {
  791. struct qede_dev *edev = netdev_priv(ndev);
  792. if (edev->ops && edev->ops->common)
  793. return edev->ops->common->dbg_all_data_size(edev->cdev);
  794. else
  795. return -EINVAL;
  796. }
  797. static void qede_update_mtu(struct qede_dev *edev,
  798. struct qede_reload_args *args)
  799. {
  800. edev->ndev->mtu = args->u.mtu;
  801. }
  802. /* Netdevice NDOs */
  803. int qede_change_mtu(struct net_device *ndev, int new_mtu)
  804. {
  805. struct qede_dev *edev = netdev_priv(ndev);
  806. struct qede_reload_args args;
  807. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  808. "Configuring MTU size of %d\n", new_mtu);
  809. if (new_mtu > PAGE_SIZE)
  810. ndev->features &= ~NETIF_F_GRO_HW;
  811. /* Set the mtu field and re-start the interface if needed */
  812. args.u.mtu = new_mtu;
  813. args.func = &qede_update_mtu;
  814. qede_reload(edev, &args, false);
  815. edev->ops->common->update_mtu(edev->cdev, new_mtu);
  816. return 0;
  817. }
  818. static void qede_get_channels(struct net_device *dev,
  819. struct ethtool_channels *channels)
  820. {
  821. struct qede_dev *edev = netdev_priv(dev);
  822. channels->max_combined = QEDE_MAX_RSS_CNT(edev);
  823. channels->max_rx = QEDE_MAX_RSS_CNT(edev);
  824. channels->max_tx = QEDE_MAX_RSS_CNT(edev);
  825. channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
  826. edev->fp_num_rx;
  827. channels->tx_count = edev->fp_num_tx;
  828. channels->rx_count = edev->fp_num_rx;
  829. }
  830. static int qede_set_channels(struct net_device *dev,
  831. struct ethtool_channels *channels)
  832. {
  833. struct qede_dev *edev = netdev_priv(dev);
  834. u32 count;
  835. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  836. "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
  837. channels->rx_count, channels->tx_count,
  838. channels->other_count, channels->combined_count);
  839. count = channels->rx_count + channels->tx_count +
  840. channels->combined_count;
  841. /* We don't support `other' channels */
  842. if (channels->other_count) {
  843. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  844. "command parameters not supported\n");
  845. return -EINVAL;
  846. }
  847. if (!(channels->combined_count || (channels->rx_count &&
  848. channels->tx_count))) {
  849. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  850. "need to request at least one transmit and one receive channel\n");
  851. return -EINVAL;
  852. }
  853. if (count > QEDE_MAX_RSS_CNT(edev)) {
  854. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  855. "requested channels = %d max supported channels = %d\n",
  856. count, QEDE_MAX_RSS_CNT(edev));
  857. return -EINVAL;
  858. }
  859. /* Check if there was a change in the active parameters */
  860. if ((count == QEDE_QUEUE_CNT(edev)) &&
  861. (channels->tx_count == edev->fp_num_tx) &&
  862. (channels->rx_count == edev->fp_num_rx)) {
  863. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  864. "No change in active parameters\n");
  865. return 0;
  866. }
  867. /* We need the number of queues to be divisible between the hwfns */
  868. if ((count % edev->dev_info.common.num_hwfns) ||
  869. (channels->tx_count % edev->dev_info.common.num_hwfns) ||
  870. (channels->rx_count % edev->dev_info.common.num_hwfns)) {
  871. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  872. "Number of channels must be divisible by %04x\n",
  873. edev->dev_info.common.num_hwfns);
  874. return -EINVAL;
  875. }
  876. /* Set number of queues and reload if necessary */
  877. edev->req_queues = count;
  878. edev->req_num_tx = channels->tx_count;
  879. edev->req_num_rx = channels->rx_count;
  880. /* Reset the indirection table if rx queue count is updated */
  881. if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
  882. edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
  883. memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
  884. }
  885. qede_reload(edev, NULL, false);
  886. return 0;
  887. }
  888. static int qede_get_ts_info(struct net_device *dev,
  889. struct ethtool_ts_info *info)
  890. {
  891. struct qede_dev *edev = netdev_priv(dev);
  892. return qede_ptp_get_ts_info(edev, info);
  893. }
  894. static int qede_set_phys_id(struct net_device *dev,
  895. enum ethtool_phys_id_state state)
  896. {
  897. struct qede_dev *edev = netdev_priv(dev);
  898. u8 led_state = 0;
  899. switch (state) {
  900. case ETHTOOL_ID_ACTIVE:
  901. return 1; /* cycle on/off once per second */
  902. case ETHTOOL_ID_ON:
  903. led_state = QED_LED_MODE_ON;
  904. break;
  905. case ETHTOOL_ID_OFF:
  906. led_state = QED_LED_MODE_OFF;
  907. break;
  908. case ETHTOOL_ID_INACTIVE:
  909. led_state = QED_LED_MODE_RESTORE;
  910. break;
  911. }
  912. edev->ops->common->set_led(edev->cdev, led_state);
  913. return 0;
  914. }
  915. static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
  916. {
  917. info->data = RXH_IP_SRC | RXH_IP_DST;
  918. switch (info->flow_type) {
  919. case TCP_V4_FLOW:
  920. case TCP_V6_FLOW:
  921. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  922. break;
  923. case UDP_V4_FLOW:
  924. if (edev->rss_caps & QED_RSS_IPV4_UDP)
  925. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  926. break;
  927. case UDP_V6_FLOW:
  928. if (edev->rss_caps & QED_RSS_IPV6_UDP)
  929. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  930. break;
  931. case IPV4_FLOW:
  932. case IPV6_FLOW:
  933. break;
  934. default:
  935. info->data = 0;
  936. break;
  937. }
  938. return 0;
  939. }
  940. static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
  941. u32 *rule_locs)
  942. {
  943. struct qede_dev *edev = netdev_priv(dev);
  944. int rc = 0;
  945. switch (info->cmd) {
  946. case ETHTOOL_GRXRINGS:
  947. info->data = QEDE_RSS_COUNT(edev);
  948. break;
  949. case ETHTOOL_GRXFH:
  950. rc = qede_get_rss_flags(edev, info);
  951. break;
  952. case ETHTOOL_GRXCLSRLCNT:
  953. info->rule_cnt = qede_get_arfs_filter_count(edev);
  954. info->data = QEDE_RFS_MAX_FLTR;
  955. break;
  956. case ETHTOOL_GRXCLSRULE:
  957. rc = qede_get_cls_rule_entry(edev, info);
  958. break;
  959. case ETHTOOL_GRXCLSRLALL:
  960. rc = qede_get_cls_rule_all(edev, info, rule_locs);
  961. break;
  962. default:
  963. DP_ERR(edev, "Command parameters not supported\n");
  964. rc = -EOPNOTSUPP;
  965. }
  966. return rc;
  967. }
  968. static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
  969. {
  970. struct qed_update_vport_params *vport_update_params;
  971. u8 set_caps = 0, clr_caps = 0;
  972. int rc = 0;
  973. DP_VERBOSE(edev, QED_MSG_DEBUG,
  974. "Set rss flags command parameters: flow type = %d, data = %llu\n",
  975. info->flow_type, info->data);
  976. switch (info->flow_type) {
  977. case TCP_V4_FLOW:
  978. case TCP_V6_FLOW:
  979. /* For TCP only 4-tuple hash is supported */
  980. if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
  981. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  982. DP_INFO(edev, "Command parameters not supported\n");
  983. return -EINVAL;
  984. }
  985. return 0;
  986. case UDP_V4_FLOW:
  987. /* For UDP either 2-tuple hash or 4-tuple hash is supported */
  988. if (info->data == (RXH_IP_SRC | RXH_IP_DST |
  989. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  990. set_caps = QED_RSS_IPV4_UDP;
  991. DP_VERBOSE(edev, QED_MSG_DEBUG,
  992. "UDP 4-tuple enabled\n");
  993. } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
  994. clr_caps = QED_RSS_IPV4_UDP;
  995. DP_VERBOSE(edev, QED_MSG_DEBUG,
  996. "UDP 4-tuple disabled\n");
  997. } else {
  998. return -EINVAL;
  999. }
  1000. break;
  1001. case UDP_V6_FLOW:
  1002. /* For UDP either 2-tuple hash or 4-tuple hash is supported */
  1003. if (info->data == (RXH_IP_SRC | RXH_IP_DST |
  1004. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  1005. set_caps = QED_RSS_IPV6_UDP;
  1006. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1007. "UDP 4-tuple enabled\n");
  1008. } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
  1009. clr_caps = QED_RSS_IPV6_UDP;
  1010. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1011. "UDP 4-tuple disabled\n");
  1012. } else {
  1013. return -EINVAL;
  1014. }
  1015. break;
  1016. case IPV4_FLOW:
  1017. case IPV6_FLOW:
  1018. /* For IP only 2-tuple hash is supported */
  1019. if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
  1020. DP_INFO(edev, "Command parameters not supported\n");
  1021. return -EINVAL;
  1022. }
  1023. return 0;
  1024. case SCTP_V4_FLOW:
  1025. case AH_ESP_V4_FLOW:
  1026. case AH_V4_FLOW:
  1027. case ESP_V4_FLOW:
  1028. case SCTP_V6_FLOW:
  1029. case AH_ESP_V6_FLOW:
  1030. case AH_V6_FLOW:
  1031. case ESP_V6_FLOW:
  1032. case IP_USER_FLOW:
  1033. case ETHER_FLOW:
  1034. /* RSS is not supported for these protocols */
  1035. if (info->data) {
  1036. DP_INFO(edev, "Command parameters not supported\n");
  1037. return -EINVAL;
  1038. }
  1039. return 0;
  1040. default:
  1041. return -EINVAL;
  1042. }
  1043. /* No action is needed if there is no change in the rss capability */
  1044. if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
  1045. return 0;
  1046. /* Update internal configuration */
  1047. edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
  1048. edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
  1049. /* Re-configure if possible */
  1050. __qede_lock(edev);
  1051. if (edev->state == QEDE_STATE_OPEN) {
  1052. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1053. if (!vport_update_params) {
  1054. __qede_unlock(edev);
  1055. return -ENOMEM;
  1056. }
  1057. qede_fill_rss_params(edev, &vport_update_params->rss_params,
  1058. &vport_update_params->update_rss_flg);
  1059. rc = edev->ops->vport_update(edev->cdev, vport_update_params);
  1060. vfree(vport_update_params);
  1061. }
  1062. __qede_unlock(edev);
  1063. return rc;
  1064. }
  1065. static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
  1066. {
  1067. struct qede_dev *edev = netdev_priv(dev);
  1068. int rc;
  1069. switch (info->cmd) {
  1070. case ETHTOOL_SRXFH:
  1071. rc = qede_set_rss_flags(edev, info);
  1072. break;
  1073. case ETHTOOL_SRXCLSRLINS:
  1074. rc = qede_add_cls_rule(edev, info);
  1075. break;
  1076. case ETHTOOL_SRXCLSRLDEL:
  1077. rc = qede_del_cls_rule(edev, info);
  1078. break;
  1079. default:
  1080. DP_INFO(edev, "Command parameters not supported\n");
  1081. rc = -EOPNOTSUPP;
  1082. }
  1083. return rc;
  1084. }
  1085. static u32 qede_get_rxfh_indir_size(struct net_device *dev)
  1086. {
  1087. return QED_RSS_IND_TABLE_SIZE;
  1088. }
  1089. static u32 qede_get_rxfh_key_size(struct net_device *dev)
  1090. {
  1091. struct qede_dev *edev = netdev_priv(dev);
  1092. return sizeof(edev->rss_key);
  1093. }
  1094. static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
  1095. {
  1096. struct qede_dev *edev = netdev_priv(dev);
  1097. int i;
  1098. if (hfunc)
  1099. *hfunc = ETH_RSS_HASH_TOP;
  1100. if (!indir)
  1101. return 0;
  1102. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
  1103. indir[i] = edev->rss_ind_table[i];
  1104. if (key)
  1105. memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
  1106. return 0;
  1107. }
  1108. static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
  1109. const u8 *key, const u8 hfunc)
  1110. {
  1111. struct qed_update_vport_params *vport_update_params;
  1112. struct qede_dev *edev = netdev_priv(dev);
  1113. int i, rc = 0;
  1114. if (edev->dev_info.common.num_hwfns > 1) {
  1115. DP_INFO(edev,
  1116. "RSS configuration is not supported for 100G devices\n");
  1117. return -EOPNOTSUPP;
  1118. }
  1119. if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
  1120. return -EOPNOTSUPP;
  1121. if (!indir && !key)
  1122. return 0;
  1123. if (indir) {
  1124. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
  1125. edev->rss_ind_table[i] = indir[i];
  1126. edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
  1127. }
  1128. if (key) {
  1129. memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
  1130. edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
  1131. }
  1132. __qede_lock(edev);
  1133. if (edev->state == QEDE_STATE_OPEN) {
  1134. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1135. if (!vport_update_params) {
  1136. __qede_unlock(edev);
  1137. return -ENOMEM;
  1138. }
  1139. qede_fill_rss_params(edev, &vport_update_params->rss_params,
  1140. &vport_update_params->update_rss_flg);
  1141. rc = edev->ops->vport_update(edev->cdev, vport_update_params);
  1142. vfree(vport_update_params);
  1143. }
  1144. __qede_unlock(edev);
  1145. return rc;
  1146. }
  1147. /* This function enables the interrupt generation and the NAPI on the device */
  1148. static void qede_netif_start(struct qede_dev *edev)
  1149. {
  1150. int i;
  1151. if (!netif_running(edev->ndev))
  1152. return;
  1153. for_each_queue(i) {
  1154. /* Update and reenable interrupts */
  1155. qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
  1156. napi_enable(&edev->fp_array[i].napi);
  1157. }
  1158. }
  1159. /* This function disables the NAPI and the interrupt generation on the device */
  1160. static void qede_netif_stop(struct qede_dev *edev)
  1161. {
  1162. int i;
  1163. for_each_queue(i) {
  1164. napi_disable(&edev->fp_array[i].napi);
  1165. /* Disable interrupts */
  1166. qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
  1167. }
  1168. }
  1169. static int qede_selftest_transmit_traffic(struct qede_dev *edev,
  1170. struct sk_buff *skb)
  1171. {
  1172. struct qede_tx_queue *txq = NULL;
  1173. struct eth_tx_1st_bd *first_bd;
  1174. dma_addr_t mapping;
  1175. int i, idx;
  1176. u16 val;
  1177. for_each_queue(i) {
  1178. if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
  1179. txq = edev->fp_array[i].txq;
  1180. break;
  1181. }
  1182. }
  1183. if (!txq) {
  1184. DP_NOTICE(edev, "Tx path is not available\n");
  1185. return -1;
  1186. }
  1187. /* Fill the entry in the SW ring and the BDs in the FW ring */
  1188. idx = txq->sw_tx_prod;
  1189. txq->sw_tx_ring.skbs[idx].skb = skb;
  1190. first_bd = qed_chain_produce(&txq->tx_pbl);
  1191. memset(first_bd, 0, sizeof(*first_bd));
  1192. val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
  1193. first_bd->data.bd_flags.bitfields = val;
  1194. val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
  1195. val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
  1196. first_bd->data.bitfields |= cpu_to_le16(val);
  1197. /* Map skb linear data for DMA and set in the first BD */
  1198. mapping = dma_map_single(&edev->pdev->dev, skb->data,
  1199. skb_headlen(skb), DMA_TO_DEVICE);
  1200. if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
  1201. DP_NOTICE(edev, "SKB mapping failed\n");
  1202. return -ENOMEM;
  1203. }
  1204. BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
  1205. /* update the first BD with the actual num BDs */
  1206. first_bd->data.nbds = 1;
  1207. txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
  1208. /* 'next page' entries are counted in the producer value */
  1209. val = qed_chain_get_prod_idx(&txq->tx_pbl);
  1210. txq->tx_db.data.bd_prod = cpu_to_le16(val);
  1211. /* wmb makes sure that the BDs data is updated before updating the
  1212. * producer, otherwise FW may read old data from the BDs.
  1213. */
  1214. wmb();
  1215. barrier();
  1216. writel(txq->tx_db.raw, txq->doorbell_addr);
  1217. /* mmiowb is needed to synchronize doorbell writes from more than one
  1218. * processor. It guarantees that the write arrives to the device before
  1219. * the queue lock is released and another start_xmit is called (possibly
  1220. * on another CPU). Without this barrier, the next doorbell can bypass
  1221. * this doorbell. This is applicable to IA64/Altix systems.
  1222. */
  1223. mmiowb();
  1224. for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
  1225. if (qede_txq_has_work(txq))
  1226. break;
  1227. usleep_range(100, 200);
  1228. }
  1229. if (!qede_txq_has_work(txq)) {
  1230. DP_NOTICE(edev, "Tx completion didn't happen\n");
  1231. return -1;
  1232. }
  1233. first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  1234. dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
  1235. BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
  1236. txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
  1237. txq->sw_tx_ring.skbs[idx].skb = NULL;
  1238. return 0;
  1239. }
  1240. static int qede_selftest_receive_traffic(struct qede_dev *edev)
  1241. {
  1242. u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len;
  1243. struct eth_fast_path_rx_reg_cqe *fp_cqe;
  1244. struct qede_rx_queue *rxq = NULL;
  1245. struct sw_rx_data *sw_rx_data;
  1246. union eth_rx_cqe *cqe;
  1247. int i, iter, rc = 0;
  1248. u8 *data_ptr;
  1249. for_each_queue(i) {
  1250. if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
  1251. rxq = edev->fp_array[i].rxq;
  1252. break;
  1253. }
  1254. }
  1255. if (!rxq) {
  1256. DP_NOTICE(edev, "Rx path is not available\n");
  1257. return -1;
  1258. }
  1259. /* The packet is expected to receive on rx-queue 0 even though RSS is
  1260. * enabled. This is because the queue 0 is configured as the default
  1261. * queue and that the loopback traffic is not IP.
  1262. */
  1263. for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
  1264. if (!qede_has_rx_work(rxq)) {
  1265. usleep_range(100, 200);
  1266. continue;
  1267. }
  1268. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  1269. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1270. /* Memory barrier to prevent the CPU from doing speculative
  1271. * reads of CQE/BD before reading hw_comp_cons. If the CQE is
  1272. * read before it is written by FW, then FW writes CQE and SB,
  1273. * and then the CPU reads the hw_comp_cons, it will use an old
  1274. * CQE.
  1275. */
  1276. rmb();
  1277. /* Get the CQE from the completion ring */
  1278. cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
  1279. /* Get the data from the SW ring */
  1280. sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  1281. sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
  1282. fp_cqe = &cqe->fast_path_regular;
  1283. len = le16_to_cpu(fp_cqe->len_on_first_bd);
  1284. data_ptr = (u8 *)(page_address(sw_rx_data->data) +
  1285. fp_cqe->placement_offset +
  1286. sw_rx_data->page_offset +
  1287. rxq->rx_headroom);
  1288. if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
  1289. ether_addr_equal(data_ptr + ETH_ALEN,
  1290. edev->ndev->dev_addr)) {
  1291. for (i = ETH_HLEN; i < len; i++)
  1292. if (data_ptr[i] != (unsigned char)(i & 0xff)) {
  1293. rc = -1;
  1294. break;
  1295. }
  1296. qede_recycle_rx_bd_ring(rxq, 1);
  1297. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1298. break;
  1299. }
  1300. DP_INFO(edev, "Not the transmitted packet\n");
  1301. qede_recycle_rx_bd_ring(rxq, 1);
  1302. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1303. }
  1304. if (iter == QEDE_SELFTEST_POLL_COUNT) {
  1305. DP_NOTICE(edev, "Failed to receive the traffic\n");
  1306. return -1;
  1307. }
  1308. qede_update_rx_prod(edev, rxq);
  1309. return rc;
  1310. }
  1311. static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
  1312. {
  1313. struct qed_link_params link_params;
  1314. struct sk_buff *skb = NULL;
  1315. int rc = 0, i;
  1316. u32 pkt_size;
  1317. u8 *packet;
  1318. if (!netif_running(edev->ndev)) {
  1319. DP_NOTICE(edev, "Interface is down\n");
  1320. return -EINVAL;
  1321. }
  1322. qede_netif_stop(edev);
  1323. /* Bring up the link in Loopback mode */
  1324. memset(&link_params, 0, sizeof(link_params));
  1325. link_params.link_up = true;
  1326. link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
  1327. link_params.loopback_mode = loopback_mode;
  1328. edev->ops->common->set_link(edev->cdev, &link_params);
  1329. /* Wait for loopback configuration to apply */
  1330. msleep_interruptible(500);
  1331. /* prepare the loopback packet */
  1332. pkt_size = edev->ndev->mtu + ETH_HLEN;
  1333. skb = netdev_alloc_skb(edev->ndev, pkt_size);
  1334. if (!skb) {
  1335. DP_INFO(edev, "Can't allocate skb\n");
  1336. rc = -ENOMEM;
  1337. goto test_loopback_exit;
  1338. }
  1339. packet = skb_put(skb, pkt_size);
  1340. ether_addr_copy(packet, edev->ndev->dev_addr);
  1341. ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
  1342. memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
  1343. for (i = ETH_HLEN; i < pkt_size; i++)
  1344. packet[i] = (unsigned char)(i & 0xff);
  1345. rc = qede_selftest_transmit_traffic(edev, skb);
  1346. if (rc)
  1347. goto test_loopback_exit;
  1348. rc = qede_selftest_receive_traffic(edev);
  1349. if (rc)
  1350. goto test_loopback_exit;
  1351. DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
  1352. test_loopback_exit:
  1353. dev_kfree_skb(skb);
  1354. /* Bring up the link in Normal mode */
  1355. memset(&link_params, 0, sizeof(link_params));
  1356. link_params.link_up = true;
  1357. link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
  1358. link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
  1359. edev->ops->common->set_link(edev->cdev, &link_params);
  1360. /* Wait for loopback configuration to apply */
  1361. msleep_interruptible(500);
  1362. qede_netif_start(edev);
  1363. return rc;
  1364. }
  1365. static void qede_self_test(struct net_device *dev,
  1366. struct ethtool_test *etest, u64 *buf)
  1367. {
  1368. struct qede_dev *edev = netdev_priv(dev);
  1369. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1370. "Self-test command parameters: offline = %d, external_lb = %d\n",
  1371. (etest->flags & ETH_TEST_FL_OFFLINE),
  1372. (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
  1373. memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
  1374. if (etest->flags & ETH_TEST_FL_OFFLINE) {
  1375. if (qede_selftest_run_loopback(edev,
  1376. QED_LINK_LOOPBACK_INT_PHY)) {
  1377. buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
  1378. etest->flags |= ETH_TEST_FL_FAILED;
  1379. }
  1380. }
  1381. if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
  1382. buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
  1383. etest->flags |= ETH_TEST_FL_FAILED;
  1384. }
  1385. if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
  1386. buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
  1387. etest->flags |= ETH_TEST_FL_FAILED;
  1388. }
  1389. if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
  1390. buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
  1391. etest->flags |= ETH_TEST_FL_FAILED;
  1392. }
  1393. if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
  1394. buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
  1395. etest->flags |= ETH_TEST_FL_FAILED;
  1396. }
  1397. if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
  1398. buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
  1399. etest->flags |= ETH_TEST_FL_FAILED;
  1400. }
  1401. }
  1402. static int qede_set_tunable(struct net_device *dev,
  1403. const struct ethtool_tunable *tuna,
  1404. const void *data)
  1405. {
  1406. struct qede_dev *edev = netdev_priv(dev);
  1407. u32 val;
  1408. switch (tuna->id) {
  1409. case ETHTOOL_RX_COPYBREAK:
  1410. val = *(u32 *)data;
  1411. if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
  1412. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1413. "Invalid rx copy break value, range is [%u, %u]",
  1414. QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
  1415. return -EINVAL;
  1416. }
  1417. edev->rx_copybreak = *(u32 *)data;
  1418. break;
  1419. default:
  1420. return -EOPNOTSUPP;
  1421. }
  1422. return 0;
  1423. }
  1424. static int qede_get_tunable(struct net_device *dev,
  1425. const struct ethtool_tunable *tuna, void *data)
  1426. {
  1427. struct qede_dev *edev = netdev_priv(dev);
  1428. switch (tuna->id) {
  1429. case ETHTOOL_RX_COPYBREAK:
  1430. *(u32 *)data = edev->rx_copybreak;
  1431. break;
  1432. default:
  1433. return -EOPNOTSUPP;
  1434. }
  1435. return 0;
  1436. }
  1437. static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata)
  1438. {
  1439. struct qede_dev *edev = netdev_priv(dev);
  1440. struct qed_link_output current_link;
  1441. memset(&current_link, 0, sizeof(current_link));
  1442. edev->ops->common->get_link(edev->cdev, &current_link);
  1443. if (!current_link.eee_supported) {
  1444. DP_INFO(edev, "EEE is not supported\n");
  1445. return -EOPNOTSUPP;
  1446. }
  1447. if (current_link.eee.adv_caps & QED_EEE_1G_ADV)
  1448. edata->advertised = ADVERTISED_1000baseT_Full;
  1449. if (current_link.eee.adv_caps & QED_EEE_10G_ADV)
  1450. edata->advertised |= ADVERTISED_10000baseT_Full;
  1451. if (current_link.sup_caps & QED_EEE_1G_ADV)
  1452. edata->supported = ADVERTISED_1000baseT_Full;
  1453. if (current_link.sup_caps & QED_EEE_10G_ADV)
  1454. edata->supported |= ADVERTISED_10000baseT_Full;
  1455. if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV)
  1456. edata->lp_advertised = ADVERTISED_1000baseT_Full;
  1457. if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV)
  1458. edata->lp_advertised |= ADVERTISED_10000baseT_Full;
  1459. edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
  1460. edata->eee_enabled = current_link.eee.enable;
  1461. edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
  1462. edata->eee_active = current_link.eee_active;
  1463. return 0;
  1464. }
  1465. static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata)
  1466. {
  1467. struct qede_dev *edev = netdev_priv(dev);
  1468. struct qed_link_output current_link;
  1469. struct qed_link_params params;
  1470. if (!edev->ops->common->can_link_change(edev->cdev)) {
  1471. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  1472. return -EOPNOTSUPP;
  1473. }
  1474. memset(&current_link, 0, sizeof(current_link));
  1475. edev->ops->common->get_link(edev->cdev, &current_link);
  1476. if (!current_link.eee_supported) {
  1477. DP_INFO(edev, "EEE is not supported\n");
  1478. return -EOPNOTSUPP;
  1479. }
  1480. memset(&params, 0, sizeof(params));
  1481. params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
  1482. if (!(edata->advertised & (ADVERTISED_1000baseT_Full |
  1483. ADVERTISED_10000baseT_Full)) ||
  1484. ((edata->advertised & (ADVERTISED_1000baseT_Full |
  1485. ADVERTISED_10000baseT_Full)) !=
  1486. edata->advertised)) {
  1487. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1488. "Invalid advertised capabilities %d\n",
  1489. edata->advertised);
  1490. return -EINVAL;
  1491. }
  1492. if (edata->advertised & ADVERTISED_1000baseT_Full)
  1493. params.eee.adv_caps = QED_EEE_1G_ADV;
  1494. if (edata->advertised & ADVERTISED_10000baseT_Full)
  1495. params.eee.adv_caps |= QED_EEE_10G_ADV;
  1496. params.eee.enable = edata->eee_enabled;
  1497. params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
  1498. params.eee.tx_lpi_timer = edata->tx_lpi_timer;
  1499. params.link_up = true;
  1500. edev->ops->common->set_link(edev->cdev, &params);
  1501. return 0;
  1502. }
  1503. static const struct ethtool_ops qede_ethtool_ops = {
  1504. .get_link_ksettings = qede_get_link_ksettings,
  1505. .set_link_ksettings = qede_set_link_ksettings,
  1506. .get_drvinfo = qede_get_drvinfo,
  1507. .get_regs_len = qede_get_regs_len,
  1508. .get_regs = qede_get_regs,
  1509. .get_wol = qede_get_wol,
  1510. .set_wol = qede_set_wol,
  1511. .get_msglevel = qede_get_msglevel,
  1512. .set_msglevel = qede_set_msglevel,
  1513. .nway_reset = qede_nway_reset,
  1514. .get_link = qede_get_link,
  1515. .get_coalesce = qede_get_coalesce,
  1516. .set_coalesce = qede_set_coalesce,
  1517. .get_ringparam = qede_get_ringparam,
  1518. .set_ringparam = qede_set_ringparam,
  1519. .get_pauseparam = qede_get_pauseparam,
  1520. .set_pauseparam = qede_set_pauseparam,
  1521. .get_strings = qede_get_strings,
  1522. .set_phys_id = qede_set_phys_id,
  1523. .get_ethtool_stats = qede_get_ethtool_stats,
  1524. .get_priv_flags = qede_get_priv_flags,
  1525. .get_sset_count = qede_get_sset_count,
  1526. .get_rxnfc = qede_get_rxnfc,
  1527. .set_rxnfc = qede_set_rxnfc,
  1528. .get_rxfh_indir_size = qede_get_rxfh_indir_size,
  1529. .get_rxfh_key_size = qede_get_rxfh_key_size,
  1530. .get_rxfh = qede_get_rxfh,
  1531. .set_rxfh = qede_set_rxfh,
  1532. .get_ts_info = qede_get_ts_info,
  1533. .get_channels = qede_get_channels,
  1534. .set_channels = qede_set_channels,
  1535. .self_test = qede_self_test,
  1536. .get_eee = qede_get_eee,
  1537. .set_eee = qede_set_eee,
  1538. .get_tunable = qede_get_tunable,
  1539. .set_tunable = qede_set_tunable,
  1540. .flash_device = qede_flash_device,
  1541. };
  1542. static const struct ethtool_ops qede_vf_ethtool_ops = {
  1543. .get_link_ksettings = qede_get_link_ksettings,
  1544. .get_drvinfo = qede_get_drvinfo,
  1545. .get_msglevel = qede_get_msglevel,
  1546. .set_msglevel = qede_set_msglevel,
  1547. .get_link = qede_get_link,
  1548. .get_coalesce = qede_get_coalesce,
  1549. .set_coalesce = qede_set_coalesce,
  1550. .get_ringparam = qede_get_ringparam,
  1551. .set_ringparam = qede_set_ringparam,
  1552. .get_strings = qede_get_strings,
  1553. .get_ethtool_stats = qede_get_ethtool_stats,
  1554. .get_priv_flags = qede_get_priv_flags,
  1555. .get_sset_count = qede_get_sset_count,
  1556. .get_rxnfc = qede_get_rxnfc,
  1557. .set_rxnfc = qede_set_rxnfc,
  1558. .get_rxfh_indir_size = qede_get_rxfh_indir_size,
  1559. .get_rxfh_key_size = qede_get_rxfh_key_size,
  1560. .get_rxfh = qede_get_rxfh,
  1561. .set_rxfh = qede_set_rxfh,
  1562. .get_channels = qede_get_channels,
  1563. .set_channels = qede_set_channels,
  1564. .get_tunable = qede_get_tunable,
  1565. .set_tunable = qede_set_tunable,
  1566. };
  1567. void qede_set_ethtool_ops(struct net_device *dev)
  1568. {
  1569. struct qede_dev *edev = netdev_priv(dev);
  1570. if (IS_VF(edev))
  1571. dev->ethtool_ops = &qede_vf_ethtool_ops;
  1572. else
  1573. dev->ethtool_ops = &qede_ethtool_ops;
  1574. }