vxge-main.c 128 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853
  1. /******************************************************************************
  2. * This software may be used and distributed according to the terms of
  3. * the GNU General Public License (GPL), incorporated herein by reference.
  4. * Drivers based on or derived from this code fall under the GPL and must
  5. * retain the authorship, copyright and license notice. This file is not
  6. * a complete program and may only be used when the entire operating
  7. * system is licensed under the GPL.
  8. * See the file COPYING in this distribution for more information.
  9. *
  10. * vxge-main.c: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
  11. * Virtualized Server Adapter.
  12. * Copyright(c) 2002-2010 Exar Corp.
  13. *
  14. * The module loadable parameters that are supported by the driver and a brief
  15. * explanation of all the variables:
  16. * vlan_tag_strip:
  17. * Strip VLAN Tag enable/disable. Instructs the device to remove
  18. * the VLAN tag from all received tagged frames that are not
  19. * replicated at the internal L2 switch.
  20. * 0 - Do not strip the VLAN tag.
  21. * 1 - Strip the VLAN tag.
  22. *
  23. * addr_learn_en:
  24. * Enable learning the mac address of the guest OS interface in
  25. * a virtualization environment.
  26. * 0 - DISABLE
  27. * 1 - ENABLE
  28. *
  29. * max_config_port:
  30. * Maximum number of port to be supported.
  31. * MIN -1 and MAX - 2
  32. *
  33. * max_config_vpath:
  34. * This configures the maximum no of VPATH configures for each
  35. * device function.
  36. * MIN - 1 and MAX - 17
  37. *
  38. * max_config_dev:
  39. * This configures maximum no of Device function to be enabled.
  40. * MIN - 1 and MAX - 17
  41. *
  42. ******************************************************************************/
  43. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  44. #include <linux/bitops.h>
  45. #include <linux/if_vlan.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/pci.h>
  48. #include <linux/slab.h>
  49. #include <linux/tcp.h>
  50. #include <net/ip.h>
  51. #include <linux/netdevice.h>
  52. #include <linux/etherdevice.h>
  53. #include <linux/firmware.h>
  54. #include <linux/net_tstamp.h>
  55. #include <linux/prefetch.h>
  56. #include <linux/module.h>
  57. #include "vxge-main.h"
  58. #include "vxge-reg.h"
  59. MODULE_LICENSE("Dual BSD/GPL");
  60. MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
  61. "Virtualized Server Adapter");
  62. static const struct pci_device_id vxge_id_table[] = {
  63. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
  64. PCI_ANY_ID},
  65. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
  66. PCI_ANY_ID},
  67. {0}
  68. };
  69. MODULE_DEVICE_TABLE(pci, vxge_id_table);
  70. VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
  71. VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
  72. VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
  73. VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
  74. VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
  75. VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
  76. static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
  77. {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
  78. static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
  79. {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
  80. module_param_array(bw_percentage, uint, NULL, 0);
  81. static struct vxge_drv_config *driver_config;
  82. static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
  83. static inline int is_vxge_card_up(struct vxgedev *vdev)
  84. {
  85. return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  86. }
  87. static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
  88. {
  89. struct sk_buff **skb_ptr = NULL;
  90. struct sk_buff **temp;
  91. #define NR_SKB_COMPLETED 128
  92. struct sk_buff *completed[NR_SKB_COMPLETED];
  93. int more;
  94. do {
  95. more = 0;
  96. skb_ptr = completed;
  97. if (__netif_tx_trylock(fifo->txq)) {
  98. vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
  99. NR_SKB_COMPLETED, &more);
  100. __netif_tx_unlock(fifo->txq);
  101. }
  102. /* free SKBs */
  103. for (temp = completed; temp != skb_ptr; temp++)
  104. dev_kfree_skb_irq(*temp);
  105. } while (more);
  106. }
  107. static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
  108. {
  109. int i;
  110. /* Complete all transmits */
  111. for (i = 0; i < vdev->no_of_vpath; i++)
  112. VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
  113. }
  114. static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
  115. {
  116. int i;
  117. struct vxge_ring *ring;
  118. /* Complete all receives*/
  119. for (i = 0; i < vdev->no_of_vpath; i++) {
  120. ring = &vdev->vpaths[i].ring;
  121. vxge_hw_vpath_poll_rx(ring->handle);
  122. }
  123. }
  124. /*
  125. * vxge_callback_link_up
  126. *
  127. * This function is called during interrupt context to notify link up state
  128. * change.
  129. */
  130. static void vxge_callback_link_up(struct __vxge_hw_device *hldev)
  131. {
  132. struct net_device *dev = hldev->ndev;
  133. struct vxgedev *vdev = netdev_priv(dev);
  134. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  135. vdev->ndev->name, __func__, __LINE__);
  136. netdev_notice(vdev->ndev, "Link Up\n");
  137. vdev->stats.link_up++;
  138. netif_carrier_on(vdev->ndev);
  139. netif_tx_wake_all_queues(vdev->ndev);
  140. vxge_debug_entryexit(VXGE_TRACE,
  141. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  142. }
  143. /*
  144. * vxge_callback_link_down
  145. *
  146. * This function is called during interrupt context to notify link down state
  147. * change.
  148. */
  149. static void vxge_callback_link_down(struct __vxge_hw_device *hldev)
  150. {
  151. struct net_device *dev = hldev->ndev;
  152. struct vxgedev *vdev = netdev_priv(dev);
  153. vxge_debug_entryexit(VXGE_TRACE,
  154. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  155. netdev_notice(vdev->ndev, "Link Down\n");
  156. vdev->stats.link_down++;
  157. netif_carrier_off(vdev->ndev);
  158. netif_tx_stop_all_queues(vdev->ndev);
  159. vxge_debug_entryexit(VXGE_TRACE,
  160. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  161. }
  162. /*
  163. * vxge_rx_alloc
  164. *
  165. * Allocate SKB.
  166. */
  167. static struct sk_buff *
  168. vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
  169. {
  170. struct net_device *dev;
  171. struct sk_buff *skb;
  172. struct vxge_rx_priv *rx_priv;
  173. dev = ring->ndev;
  174. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  175. ring->ndev->name, __func__, __LINE__);
  176. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  177. /* try to allocate skb first. this one may fail */
  178. skb = netdev_alloc_skb(dev, skb_size +
  179. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  180. if (skb == NULL) {
  181. vxge_debug_mem(VXGE_ERR,
  182. "%s: out of memory to allocate SKB", dev->name);
  183. ring->stats.skb_alloc_fail++;
  184. return NULL;
  185. }
  186. vxge_debug_mem(VXGE_TRACE,
  187. "%s: %s:%d Skb : 0x%p", ring->ndev->name,
  188. __func__, __LINE__, skb);
  189. skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  190. rx_priv->skb = skb;
  191. rx_priv->skb_data = NULL;
  192. rx_priv->data_size = skb_size;
  193. vxge_debug_entryexit(VXGE_TRACE,
  194. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  195. return skb;
  196. }
  197. /*
  198. * vxge_rx_map
  199. */
  200. static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
  201. {
  202. struct vxge_rx_priv *rx_priv;
  203. dma_addr_t dma_addr;
  204. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  205. ring->ndev->name, __func__, __LINE__);
  206. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  207. rx_priv->skb_data = rx_priv->skb->data;
  208. dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
  209. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  210. if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
  211. ring->stats.pci_map_fail++;
  212. return -EIO;
  213. }
  214. vxge_debug_mem(VXGE_TRACE,
  215. "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
  216. ring->ndev->name, __func__, __LINE__,
  217. (unsigned long long)dma_addr);
  218. vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
  219. rx_priv->data_dma = dma_addr;
  220. vxge_debug_entryexit(VXGE_TRACE,
  221. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  222. return 0;
  223. }
  224. /*
  225. * vxge_rx_initial_replenish
  226. * Allocation of RxD as an initial replenish procedure.
  227. */
  228. static enum vxge_hw_status
  229. vxge_rx_initial_replenish(void *dtrh, void *userdata)
  230. {
  231. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  232. struct vxge_rx_priv *rx_priv;
  233. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  234. ring->ndev->name, __func__, __LINE__);
  235. if (vxge_rx_alloc(dtrh, ring,
  236. VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
  237. return VXGE_HW_FAIL;
  238. if (vxge_rx_map(dtrh, ring)) {
  239. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  240. dev_kfree_skb(rx_priv->skb);
  241. return VXGE_HW_FAIL;
  242. }
  243. vxge_debug_entryexit(VXGE_TRACE,
  244. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  245. return VXGE_HW_OK;
  246. }
  247. static inline void
  248. vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
  249. int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
  250. {
  251. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  252. ring->ndev->name, __func__, __LINE__);
  253. skb_record_rx_queue(skb, ring->driver_id);
  254. skb->protocol = eth_type_trans(skb, ring->ndev);
  255. u64_stats_update_begin(&ring->stats.syncp);
  256. ring->stats.rx_frms++;
  257. ring->stats.rx_bytes += pkt_length;
  258. if (skb->pkt_type == PACKET_MULTICAST)
  259. ring->stats.rx_mcast++;
  260. u64_stats_update_end(&ring->stats.syncp);
  261. vxge_debug_rx(VXGE_TRACE,
  262. "%s: %s:%d skb protocol = %d",
  263. ring->ndev->name, __func__, __LINE__, skb->protocol);
  264. if (ext_info->vlan &&
  265. ring->vlan_tag_strip == VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE)
  266. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ext_info->vlan);
  267. napi_gro_receive(ring->napi_p, skb);
  268. vxge_debug_entryexit(VXGE_TRACE,
  269. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  270. }
  271. static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
  272. struct vxge_rx_priv *rx_priv)
  273. {
  274. pci_dma_sync_single_for_device(ring->pdev,
  275. rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
  276. vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
  277. vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
  278. }
  279. static inline void vxge_post(int *dtr_cnt, void **first_dtr,
  280. void *post_dtr, struct __vxge_hw_ring *ringh)
  281. {
  282. int dtr_count = *dtr_cnt;
  283. if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
  284. if (*first_dtr)
  285. vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
  286. *first_dtr = post_dtr;
  287. } else
  288. vxge_hw_ring_rxd_post_post(ringh, post_dtr);
  289. dtr_count++;
  290. *dtr_cnt = dtr_count;
  291. }
  292. /*
  293. * vxge_rx_1b_compl
  294. *
  295. * If the interrupt is because of a received frame or if the receive ring
  296. * contains fresh as yet un-processed frames, this function is called.
  297. */
  298. static enum vxge_hw_status
  299. vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
  300. u8 t_code, void *userdata)
  301. {
  302. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  303. struct net_device *dev = ring->ndev;
  304. unsigned int dma_sizes;
  305. void *first_dtr = NULL;
  306. int dtr_cnt = 0;
  307. int data_size;
  308. dma_addr_t data_dma;
  309. int pkt_length;
  310. struct sk_buff *skb;
  311. struct vxge_rx_priv *rx_priv;
  312. struct vxge_hw_ring_rxd_info ext_info;
  313. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  314. ring->ndev->name, __func__, __LINE__);
  315. if (ring->budget <= 0)
  316. goto out;
  317. do {
  318. prefetch((char *)dtr + L1_CACHE_BYTES);
  319. rx_priv = vxge_hw_ring_rxd_private_get(dtr);
  320. skb = rx_priv->skb;
  321. data_size = rx_priv->data_size;
  322. data_dma = rx_priv->data_dma;
  323. prefetch(rx_priv->skb_data);
  324. vxge_debug_rx(VXGE_TRACE,
  325. "%s: %s:%d skb = 0x%p",
  326. ring->ndev->name, __func__, __LINE__, skb);
  327. vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
  328. pkt_length = dma_sizes;
  329. pkt_length -= ETH_FCS_LEN;
  330. vxge_debug_rx(VXGE_TRACE,
  331. "%s: %s:%d Packet Length = %d",
  332. ring->ndev->name, __func__, __LINE__, pkt_length);
  333. vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
  334. /* check skb validity */
  335. vxge_assert(skb);
  336. prefetch((char *)skb + L1_CACHE_BYTES);
  337. if (unlikely(t_code)) {
  338. if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
  339. VXGE_HW_OK) {
  340. ring->stats.rx_errors++;
  341. vxge_debug_rx(VXGE_TRACE,
  342. "%s: %s :%d Rx T_code is %d",
  343. ring->ndev->name, __func__,
  344. __LINE__, t_code);
  345. /* If the t_code is not supported and if the
  346. * t_code is other than 0x5 (unparseable packet
  347. * such as unknown UPV6 header), Drop it !!!
  348. */
  349. vxge_re_pre_post(dtr, ring, rx_priv);
  350. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  351. ring->stats.rx_dropped++;
  352. continue;
  353. }
  354. }
  355. if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
  356. if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
  357. if (!vxge_rx_map(dtr, ring)) {
  358. skb_put(skb, pkt_length);
  359. pci_unmap_single(ring->pdev, data_dma,
  360. data_size, PCI_DMA_FROMDEVICE);
  361. vxge_hw_ring_rxd_pre_post(ringh, dtr);
  362. vxge_post(&dtr_cnt, &first_dtr, dtr,
  363. ringh);
  364. } else {
  365. dev_kfree_skb(rx_priv->skb);
  366. rx_priv->skb = skb;
  367. rx_priv->data_size = data_size;
  368. vxge_re_pre_post(dtr, ring, rx_priv);
  369. vxge_post(&dtr_cnt, &first_dtr, dtr,
  370. ringh);
  371. ring->stats.rx_dropped++;
  372. break;
  373. }
  374. } else {
  375. vxge_re_pre_post(dtr, ring, rx_priv);
  376. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  377. ring->stats.rx_dropped++;
  378. break;
  379. }
  380. } else {
  381. struct sk_buff *skb_up;
  382. skb_up = netdev_alloc_skb(dev, pkt_length +
  383. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  384. if (skb_up != NULL) {
  385. skb_reserve(skb_up,
  386. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  387. pci_dma_sync_single_for_cpu(ring->pdev,
  388. data_dma, data_size,
  389. PCI_DMA_FROMDEVICE);
  390. vxge_debug_mem(VXGE_TRACE,
  391. "%s: %s:%d skb_up = %p",
  392. ring->ndev->name, __func__,
  393. __LINE__, skb);
  394. memcpy(skb_up->data, skb->data, pkt_length);
  395. vxge_re_pre_post(dtr, ring, rx_priv);
  396. vxge_post(&dtr_cnt, &first_dtr, dtr,
  397. ringh);
  398. /* will netif_rx small SKB instead */
  399. skb = skb_up;
  400. skb_put(skb, pkt_length);
  401. } else {
  402. vxge_re_pre_post(dtr, ring, rx_priv);
  403. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  404. vxge_debug_rx(VXGE_ERR,
  405. "%s: vxge_rx_1b_compl: out of "
  406. "memory", dev->name);
  407. ring->stats.skb_alloc_fail++;
  408. break;
  409. }
  410. }
  411. if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
  412. !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
  413. (dev->features & NETIF_F_RXCSUM) && /* Offload Rx side CSUM */
  414. ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
  415. ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
  416. skb->ip_summed = CHECKSUM_UNNECESSARY;
  417. else
  418. skb_checksum_none_assert(skb);
  419. if (ring->rx_hwts) {
  420. struct skb_shared_hwtstamps *skb_hwts;
  421. u32 ns = *(u32 *)(skb->head + pkt_length);
  422. skb_hwts = skb_hwtstamps(skb);
  423. skb_hwts->hwtstamp = ns_to_ktime(ns);
  424. }
  425. /* rth_hash_type and rth_it_hit are non-zero regardless of
  426. * whether rss is enabled. Only the rth_value is zero/non-zero
  427. * if rss is disabled/enabled, so key off of that.
  428. */
  429. if (ext_info.rth_value)
  430. skb_set_hash(skb, ext_info.rth_value,
  431. PKT_HASH_TYPE_L3);
  432. vxge_rx_complete(ring, skb, ext_info.vlan,
  433. pkt_length, &ext_info);
  434. ring->budget--;
  435. ring->pkts_processed++;
  436. if (!ring->budget)
  437. break;
  438. } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
  439. &t_code) == VXGE_HW_OK);
  440. if (first_dtr)
  441. vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
  442. out:
  443. vxge_debug_entryexit(VXGE_TRACE,
  444. "%s:%d Exiting...",
  445. __func__, __LINE__);
  446. return VXGE_HW_OK;
  447. }
  448. /*
  449. * vxge_xmit_compl
  450. *
  451. * If an interrupt was raised to indicate DMA complete of the Tx packet,
  452. * this function is called. It identifies the last TxD whose buffer was
  453. * freed and frees all skbs whose data have already DMA'ed into the NICs
  454. * internal memory.
  455. */
  456. static enum vxge_hw_status
  457. vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
  458. enum vxge_hw_fifo_tcode t_code, void *userdata,
  459. struct sk_buff ***skb_ptr, int nr_skb, int *more)
  460. {
  461. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  462. struct sk_buff *skb, **done_skb = *skb_ptr;
  463. int pkt_cnt = 0;
  464. vxge_debug_entryexit(VXGE_TRACE,
  465. "%s:%d Entered....", __func__, __LINE__);
  466. do {
  467. int frg_cnt;
  468. skb_frag_t *frag;
  469. int i = 0, j;
  470. struct vxge_tx_priv *txd_priv =
  471. vxge_hw_fifo_txdl_private_get(dtr);
  472. skb = txd_priv->skb;
  473. frg_cnt = skb_shinfo(skb)->nr_frags;
  474. frag = &skb_shinfo(skb)->frags[0];
  475. vxge_debug_tx(VXGE_TRACE,
  476. "%s: %s:%d fifo_hw = %p dtr = %p "
  477. "tcode = 0x%x", fifo->ndev->name, __func__,
  478. __LINE__, fifo_hw, dtr, t_code);
  479. /* check skb validity */
  480. vxge_assert(skb);
  481. vxge_debug_tx(VXGE_TRACE,
  482. "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
  483. fifo->ndev->name, __func__, __LINE__,
  484. skb, txd_priv, frg_cnt);
  485. if (unlikely(t_code)) {
  486. fifo->stats.tx_errors++;
  487. vxge_debug_tx(VXGE_ERR,
  488. "%s: tx: dtr %p completed due to "
  489. "error t_code %01x", fifo->ndev->name,
  490. dtr, t_code);
  491. vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
  492. }
  493. /* for unfragmented skb */
  494. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  495. skb_headlen(skb), PCI_DMA_TODEVICE);
  496. for (j = 0; j < frg_cnt; j++) {
  497. pci_unmap_page(fifo->pdev,
  498. txd_priv->dma_buffers[i++],
  499. skb_frag_size(frag), PCI_DMA_TODEVICE);
  500. frag += 1;
  501. }
  502. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  503. /* Updating the statistics block */
  504. u64_stats_update_begin(&fifo->stats.syncp);
  505. fifo->stats.tx_frms++;
  506. fifo->stats.tx_bytes += skb->len;
  507. u64_stats_update_end(&fifo->stats.syncp);
  508. *done_skb++ = skb;
  509. if (--nr_skb <= 0) {
  510. *more = 1;
  511. break;
  512. }
  513. pkt_cnt++;
  514. if (pkt_cnt > fifo->indicate_max_pkts)
  515. break;
  516. } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
  517. &dtr, &t_code) == VXGE_HW_OK);
  518. *skb_ptr = done_skb;
  519. if (netif_tx_queue_stopped(fifo->txq))
  520. netif_tx_wake_queue(fifo->txq);
  521. vxge_debug_entryexit(VXGE_TRACE,
  522. "%s: %s:%d Exiting...",
  523. fifo->ndev->name, __func__, __LINE__);
  524. return VXGE_HW_OK;
  525. }
  526. /* select a vpath to transmit the packet */
  527. static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
  528. {
  529. u16 queue_len, counter = 0;
  530. if (skb->protocol == htons(ETH_P_IP)) {
  531. struct iphdr *ip;
  532. struct tcphdr *th;
  533. ip = ip_hdr(skb);
  534. if (!ip_is_fragment(ip)) {
  535. th = (struct tcphdr *)(((unsigned char *)ip) +
  536. ip->ihl*4);
  537. queue_len = vdev->no_of_vpath;
  538. counter = (ntohs(th->source) +
  539. ntohs(th->dest)) &
  540. vdev->vpath_selector[queue_len - 1];
  541. if (counter >= queue_len)
  542. counter = queue_len - 1;
  543. }
  544. }
  545. return counter;
  546. }
  547. static enum vxge_hw_status vxge_search_mac_addr_in_list(
  548. struct vxge_vpath *vpath, u64 del_mac)
  549. {
  550. struct list_head *entry, *next;
  551. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  552. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
  553. return TRUE;
  554. }
  555. return FALSE;
  556. }
  557. static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
  558. {
  559. struct vxge_mac_addrs *new_mac_entry;
  560. u8 *mac_address = NULL;
  561. if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
  562. return TRUE;
  563. new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
  564. if (!new_mac_entry) {
  565. vxge_debug_mem(VXGE_ERR,
  566. "%s: memory allocation failed",
  567. VXGE_DRIVER_NAME);
  568. return FALSE;
  569. }
  570. list_add(&new_mac_entry->item, &vpath->mac_addr_list);
  571. /* Copy the new mac address to the list */
  572. mac_address = (u8 *)&new_mac_entry->macaddr;
  573. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  574. new_mac_entry->state = mac->state;
  575. vpath->mac_addr_cnt++;
  576. if (is_multicast_ether_addr(mac->macaddr))
  577. vpath->mcast_addr_cnt++;
  578. return TRUE;
  579. }
  580. /* Add a mac address to DA table */
  581. static enum vxge_hw_status
  582. vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
  583. {
  584. enum vxge_hw_status status = VXGE_HW_OK;
  585. struct vxge_vpath *vpath;
  586. enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
  587. if (is_multicast_ether_addr(mac->macaddr))
  588. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
  589. else
  590. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
  591. vpath = &vdev->vpaths[mac->vpath_no];
  592. status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
  593. mac->macmask, duplicate_mode);
  594. if (status != VXGE_HW_OK) {
  595. vxge_debug_init(VXGE_ERR,
  596. "DA config add entry failed for vpath:%d",
  597. vpath->device_id);
  598. } else
  599. if (FALSE == vxge_mac_list_add(vpath, mac))
  600. status = -EPERM;
  601. return status;
  602. }
  603. static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
  604. {
  605. struct macInfo mac_info;
  606. u8 *mac_address = NULL;
  607. u64 mac_addr = 0, vpath_vector = 0;
  608. int vpath_idx = 0;
  609. enum vxge_hw_status status = VXGE_HW_OK;
  610. struct vxge_vpath *vpath = NULL;
  611. mac_address = (u8 *)&mac_addr;
  612. memcpy(mac_address, mac_header, ETH_ALEN);
  613. /* Is this mac address already in the list? */
  614. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  615. vpath = &vdev->vpaths[vpath_idx];
  616. if (vxge_search_mac_addr_in_list(vpath, mac_addr))
  617. return vpath_idx;
  618. }
  619. memset(&mac_info, 0, sizeof(struct macInfo));
  620. memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
  621. /* Any vpath has room to add mac address to its da table? */
  622. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  623. vpath = &vdev->vpaths[vpath_idx];
  624. if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
  625. /* Add this mac address to this vpath */
  626. mac_info.vpath_no = vpath_idx;
  627. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  628. status = vxge_add_mac_addr(vdev, &mac_info);
  629. if (status != VXGE_HW_OK)
  630. return -EPERM;
  631. return vpath_idx;
  632. }
  633. }
  634. mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
  635. vpath_idx = 0;
  636. mac_info.vpath_no = vpath_idx;
  637. /* Is the first vpath already selected as catch-basin ? */
  638. vpath = &vdev->vpaths[vpath_idx];
  639. if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
  640. /* Add this mac address to this vpath */
  641. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  642. return -EPERM;
  643. return vpath_idx;
  644. }
  645. /* Select first vpath as catch-basin */
  646. vpath_vector = vxge_mBIT(vpath->device_id);
  647. status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
  648. vxge_hw_mgmt_reg_type_mrpcim,
  649. 0,
  650. (ulong)offsetof(
  651. struct vxge_hw_mrpcim_reg,
  652. rts_mgr_cbasin_cfg),
  653. vpath_vector);
  654. if (status != VXGE_HW_OK) {
  655. vxge_debug_tx(VXGE_ERR,
  656. "%s: Unable to set the vpath-%d in catch-basin mode",
  657. VXGE_DRIVER_NAME, vpath->device_id);
  658. return -EPERM;
  659. }
  660. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  661. return -EPERM;
  662. return vpath_idx;
  663. }
  664. /**
  665. * vxge_xmit
  666. * @skb : the socket buffer containing the Tx data.
  667. * @dev : device pointer.
  668. *
  669. * This function is the Tx entry point of the driver. Neterion NIC supports
  670. * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
  671. */
  672. static netdev_tx_t
  673. vxge_xmit(struct sk_buff *skb, struct net_device *dev)
  674. {
  675. struct vxge_fifo *fifo = NULL;
  676. void *dtr_priv;
  677. void *dtr = NULL;
  678. struct vxgedev *vdev = NULL;
  679. enum vxge_hw_status status;
  680. int frg_cnt, first_frg_len;
  681. skb_frag_t *frag;
  682. int i = 0, j = 0, avail;
  683. u64 dma_pointer;
  684. struct vxge_tx_priv *txdl_priv = NULL;
  685. struct __vxge_hw_fifo *fifo_hw;
  686. int offload_type;
  687. int vpath_no = 0;
  688. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  689. dev->name, __func__, __LINE__);
  690. /* A buffer with no data will be dropped */
  691. if (unlikely(skb->len <= 0)) {
  692. vxge_debug_tx(VXGE_ERR,
  693. "%s: Buffer has no data..", dev->name);
  694. dev_kfree_skb_any(skb);
  695. return NETDEV_TX_OK;
  696. }
  697. vdev = netdev_priv(dev);
  698. if (unlikely(!is_vxge_card_up(vdev))) {
  699. vxge_debug_tx(VXGE_ERR,
  700. "%s: vdev not initialized", dev->name);
  701. dev_kfree_skb_any(skb);
  702. return NETDEV_TX_OK;
  703. }
  704. if (vdev->config.addr_learn_en) {
  705. vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
  706. if (vpath_no == -EPERM) {
  707. vxge_debug_tx(VXGE_ERR,
  708. "%s: Failed to store the mac address",
  709. dev->name);
  710. dev_kfree_skb_any(skb);
  711. return NETDEV_TX_OK;
  712. }
  713. }
  714. if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
  715. vpath_no = skb_get_queue_mapping(skb);
  716. else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
  717. vpath_no = vxge_get_vpath_no(vdev, skb);
  718. vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
  719. if (vpath_no >= vdev->no_of_vpath)
  720. vpath_no = 0;
  721. fifo = &vdev->vpaths[vpath_no].fifo;
  722. fifo_hw = fifo->handle;
  723. if (netif_tx_queue_stopped(fifo->txq))
  724. return NETDEV_TX_BUSY;
  725. avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
  726. if (avail == 0) {
  727. vxge_debug_tx(VXGE_ERR,
  728. "%s: No free TXDs available", dev->name);
  729. fifo->stats.txd_not_free++;
  730. goto _exit0;
  731. }
  732. /* Last TXD? Stop tx queue to avoid dropping packets. TX
  733. * completion will resume the queue.
  734. */
  735. if (avail == 1)
  736. netif_tx_stop_queue(fifo->txq);
  737. status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
  738. if (unlikely(status != VXGE_HW_OK)) {
  739. vxge_debug_tx(VXGE_ERR,
  740. "%s: Out of descriptors .", dev->name);
  741. fifo->stats.txd_out_of_desc++;
  742. goto _exit0;
  743. }
  744. vxge_debug_tx(VXGE_TRACE,
  745. "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
  746. dev->name, __func__, __LINE__,
  747. fifo_hw, dtr, dtr_priv);
  748. if (skb_vlan_tag_present(skb)) {
  749. u16 vlan_tag = skb_vlan_tag_get(skb);
  750. vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
  751. }
  752. first_frg_len = skb_headlen(skb);
  753. dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
  754. PCI_DMA_TODEVICE);
  755. if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
  756. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  757. fifo->stats.pci_map_fail++;
  758. goto _exit0;
  759. }
  760. txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
  761. txdl_priv->skb = skb;
  762. txdl_priv->dma_buffers[j] = dma_pointer;
  763. frg_cnt = skb_shinfo(skb)->nr_frags;
  764. vxge_debug_tx(VXGE_TRACE,
  765. "%s: %s:%d skb = %p txdl_priv = %p "
  766. "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
  767. __func__, __LINE__, skb, txdl_priv,
  768. frg_cnt, (unsigned long long)dma_pointer);
  769. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  770. first_frg_len);
  771. frag = &skb_shinfo(skb)->frags[0];
  772. for (i = 0; i < frg_cnt; i++) {
  773. /* ignore 0 length fragment */
  774. if (!skb_frag_size(frag))
  775. continue;
  776. dma_pointer = (u64)skb_frag_dma_map(&fifo->pdev->dev, frag,
  777. 0, skb_frag_size(frag),
  778. DMA_TO_DEVICE);
  779. if (unlikely(dma_mapping_error(&fifo->pdev->dev, dma_pointer)))
  780. goto _exit2;
  781. vxge_debug_tx(VXGE_TRACE,
  782. "%s: %s:%d frag = %d dma_pointer = 0x%llx",
  783. dev->name, __func__, __LINE__, i,
  784. (unsigned long long)dma_pointer);
  785. txdl_priv->dma_buffers[j] = dma_pointer;
  786. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  787. skb_frag_size(frag));
  788. frag += 1;
  789. }
  790. offload_type = vxge_offload_type(skb);
  791. if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
  792. int mss = vxge_tcp_mss(skb);
  793. if (mss) {
  794. vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
  795. dev->name, __func__, __LINE__, mss);
  796. vxge_hw_fifo_txdl_mss_set(dtr, mss);
  797. } else {
  798. vxge_assert(skb->len <=
  799. dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
  800. vxge_assert(0);
  801. goto _exit1;
  802. }
  803. }
  804. if (skb->ip_summed == CHECKSUM_PARTIAL)
  805. vxge_hw_fifo_txdl_cksum_set_bits(dtr,
  806. VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
  807. VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
  808. VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
  809. vxge_hw_fifo_txdl_post(fifo_hw, dtr);
  810. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  811. dev->name, __func__, __LINE__);
  812. return NETDEV_TX_OK;
  813. _exit2:
  814. vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
  815. _exit1:
  816. j = 0;
  817. frag = &skb_shinfo(skb)->frags[0];
  818. pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
  819. skb_headlen(skb), PCI_DMA_TODEVICE);
  820. for (; j < i; j++) {
  821. pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
  822. skb_frag_size(frag), PCI_DMA_TODEVICE);
  823. frag += 1;
  824. }
  825. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  826. _exit0:
  827. netif_tx_stop_queue(fifo->txq);
  828. dev_kfree_skb_any(skb);
  829. return NETDEV_TX_OK;
  830. }
  831. /*
  832. * vxge_rx_term
  833. *
  834. * Function will be called by hw function to abort all outstanding receive
  835. * descriptors.
  836. */
  837. static void
  838. vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
  839. {
  840. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  841. struct vxge_rx_priv *rx_priv =
  842. vxge_hw_ring_rxd_private_get(dtrh);
  843. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  844. ring->ndev->name, __func__, __LINE__);
  845. if (state != VXGE_HW_RXD_STATE_POSTED)
  846. return;
  847. pci_unmap_single(ring->pdev, rx_priv->data_dma,
  848. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  849. dev_kfree_skb(rx_priv->skb);
  850. rx_priv->skb_data = NULL;
  851. vxge_debug_entryexit(VXGE_TRACE,
  852. "%s: %s:%d Exiting...",
  853. ring->ndev->name, __func__, __LINE__);
  854. }
  855. /*
  856. * vxge_tx_term
  857. *
  858. * Function will be called to abort all outstanding tx descriptors
  859. */
  860. static void
  861. vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
  862. {
  863. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  864. skb_frag_t *frag;
  865. int i = 0, j, frg_cnt;
  866. struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
  867. struct sk_buff *skb = txd_priv->skb;
  868. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  869. if (state != VXGE_HW_TXDL_STATE_POSTED)
  870. return;
  871. /* check skb validity */
  872. vxge_assert(skb);
  873. frg_cnt = skb_shinfo(skb)->nr_frags;
  874. frag = &skb_shinfo(skb)->frags[0];
  875. /* for unfragmented skb */
  876. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  877. skb_headlen(skb), PCI_DMA_TODEVICE);
  878. for (j = 0; j < frg_cnt; j++) {
  879. pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
  880. skb_frag_size(frag), PCI_DMA_TODEVICE);
  881. frag += 1;
  882. }
  883. dev_kfree_skb(skb);
  884. vxge_debug_entryexit(VXGE_TRACE,
  885. "%s:%d Exiting...", __func__, __LINE__);
  886. }
  887. static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
  888. {
  889. struct list_head *entry, *next;
  890. u64 del_mac = 0;
  891. u8 *mac_address = (u8 *) (&del_mac);
  892. /* Copy the mac address to delete from the list */
  893. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  894. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  895. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
  896. list_del(entry);
  897. kfree((struct vxge_mac_addrs *)entry);
  898. vpath->mac_addr_cnt--;
  899. if (is_multicast_ether_addr(mac->macaddr))
  900. vpath->mcast_addr_cnt--;
  901. return TRUE;
  902. }
  903. }
  904. return FALSE;
  905. }
  906. /* delete a mac address from DA table */
  907. static enum vxge_hw_status
  908. vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
  909. {
  910. enum vxge_hw_status status = VXGE_HW_OK;
  911. struct vxge_vpath *vpath;
  912. vpath = &vdev->vpaths[mac->vpath_no];
  913. status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
  914. mac->macmask);
  915. if (status != VXGE_HW_OK) {
  916. vxge_debug_init(VXGE_ERR,
  917. "DA config delete entry failed for vpath:%d",
  918. vpath->device_id);
  919. } else
  920. vxge_mac_list_del(vpath, mac);
  921. return status;
  922. }
  923. /**
  924. * vxge_set_multicast
  925. * @dev: pointer to the device structure
  926. *
  927. * Entry point for multicast address enable/disable
  928. * This function is a driver entry point which gets called by the kernel
  929. * whenever multicast addresses must be enabled/disabled. This also gets
  930. * called to set/reset promiscuous mode. Depending on the deivce flag, we
  931. * determine, if multicast address must be enabled or if promiscuous mode
  932. * is to be disabled etc.
  933. */
  934. static void vxge_set_multicast(struct net_device *dev)
  935. {
  936. struct netdev_hw_addr *ha;
  937. struct vxgedev *vdev;
  938. int i, mcast_cnt = 0;
  939. struct vxge_vpath *vpath;
  940. enum vxge_hw_status status = VXGE_HW_OK;
  941. struct macInfo mac_info;
  942. int vpath_idx = 0;
  943. struct vxge_mac_addrs *mac_entry;
  944. struct list_head *list_head;
  945. struct list_head *entry, *next;
  946. u8 *mac_address = NULL;
  947. vxge_debug_entryexit(VXGE_TRACE,
  948. "%s:%d", __func__, __LINE__);
  949. vdev = netdev_priv(dev);
  950. if (unlikely(!is_vxge_card_up(vdev)))
  951. return;
  952. if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
  953. for (i = 0; i < vdev->no_of_vpath; i++) {
  954. vpath = &vdev->vpaths[i];
  955. vxge_assert(vpath->is_open);
  956. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  957. if (status != VXGE_HW_OK)
  958. vxge_debug_init(VXGE_ERR, "failed to enable "
  959. "multicast, status %d", status);
  960. vdev->all_multi_flg = 1;
  961. }
  962. } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
  963. for (i = 0; i < vdev->no_of_vpath; i++) {
  964. vpath = &vdev->vpaths[i];
  965. vxge_assert(vpath->is_open);
  966. status = vxge_hw_vpath_mcast_disable(vpath->handle);
  967. if (status != VXGE_HW_OK)
  968. vxge_debug_init(VXGE_ERR, "failed to disable "
  969. "multicast, status %d", status);
  970. vdev->all_multi_flg = 0;
  971. }
  972. }
  973. if (!vdev->config.addr_learn_en) {
  974. for (i = 0; i < vdev->no_of_vpath; i++) {
  975. vpath = &vdev->vpaths[i];
  976. vxge_assert(vpath->is_open);
  977. if (dev->flags & IFF_PROMISC)
  978. status = vxge_hw_vpath_promisc_enable(
  979. vpath->handle);
  980. else
  981. status = vxge_hw_vpath_promisc_disable(
  982. vpath->handle);
  983. if (status != VXGE_HW_OK)
  984. vxge_debug_init(VXGE_ERR, "failed to %s promisc"
  985. ", status %d", dev->flags&IFF_PROMISC ?
  986. "enable" : "disable", status);
  987. }
  988. }
  989. memset(&mac_info, 0, sizeof(struct macInfo));
  990. /* Update individual M_CAST address list */
  991. if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
  992. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  993. list_head = &vdev->vpaths[0].mac_addr_list;
  994. if ((netdev_mc_count(dev) +
  995. (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
  996. vdev->vpaths[0].max_mac_addr_cnt)
  997. goto _set_all_mcast;
  998. /* Delete previous MC's */
  999. for (i = 0; i < mcast_cnt; i++) {
  1000. list_for_each_safe(entry, next, list_head) {
  1001. mac_entry = (struct vxge_mac_addrs *)entry;
  1002. /* Copy the mac address to delete */
  1003. mac_address = (u8 *)&mac_entry->macaddr;
  1004. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1005. if (is_multicast_ether_addr(mac_info.macaddr)) {
  1006. for (vpath_idx = 0; vpath_idx <
  1007. vdev->no_of_vpath;
  1008. vpath_idx++) {
  1009. mac_info.vpath_no = vpath_idx;
  1010. status = vxge_del_mac_addr(
  1011. vdev,
  1012. &mac_info);
  1013. }
  1014. }
  1015. }
  1016. }
  1017. /* Add new ones */
  1018. netdev_for_each_mc_addr(ha, dev) {
  1019. memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
  1020. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  1021. vpath_idx++) {
  1022. mac_info.vpath_no = vpath_idx;
  1023. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1024. status = vxge_add_mac_addr(vdev, &mac_info);
  1025. if (status != VXGE_HW_OK) {
  1026. vxge_debug_init(VXGE_ERR,
  1027. "%s:%d Setting individual"
  1028. "multicast address failed",
  1029. __func__, __LINE__);
  1030. goto _set_all_mcast;
  1031. }
  1032. }
  1033. }
  1034. return;
  1035. _set_all_mcast:
  1036. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  1037. /* Delete previous MC's */
  1038. for (i = 0; i < mcast_cnt; i++) {
  1039. list_for_each_safe(entry, next, list_head) {
  1040. mac_entry = (struct vxge_mac_addrs *)entry;
  1041. /* Copy the mac address to delete */
  1042. mac_address = (u8 *)&mac_entry->macaddr;
  1043. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1044. if (is_multicast_ether_addr(mac_info.macaddr))
  1045. break;
  1046. }
  1047. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  1048. vpath_idx++) {
  1049. mac_info.vpath_no = vpath_idx;
  1050. status = vxge_del_mac_addr(vdev, &mac_info);
  1051. }
  1052. }
  1053. /* Enable all multicast */
  1054. for (i = 0; i < vdev->no_of_vpath; i++) {
  1055. vpath = &vdev->vpaths[i];
  1056. vxge_assert(vpath->is_open);
  1057. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  1058. if (status != VXGE_HW_OK) {
  1059. vxge_debug_init(VXGE_ERR,
  1060. "%s:%d Enabling all multicasts failed",
  1061. __func__, __LINE__);
  1062. }
  1063. vdev->all_multi_flg = 1;
  1064. }
  1065. dev->flags |= IFF_ALLMULTI;
  1066. }
  1067. vxge_debug_entryexit(VXGE_TRACE,
  1068. "%s:%d Exiting...", __func__, __LINE__);
  1069. }
  1070. /**
  1071. * vxge_set_mac_addr
  1072. * @dev: pointer to the device structure
  1073. *
  1074. * Update entry "0" (default MAC addr)
  1075. */
  1076. static int vxge_set_mac_addr(struct net_device *dev, void *p)
  1077. {
  1078. struct sockaddr *addr = p;
  1079. struct vxgedev *vdev;
  1080. enum vxge_hw_status status = VXGE_HW_OK;
  1081. struct macInfo mac_info_new, mac_info_old;
  1082. int vpath_idx = 0;
  1083. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1084. vdev = netdev_priv(dev);
  1085. if (!is_valid_ether_addr(addr->sa_data))
  1086. return -EINVAL;
  1087. memset(&mac_info_new, 0, sizeof(struct macInfo));
  1088. memset(&mac_info_old, 0, sizeof(struct macInfo));
  1089. vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
  1090. __func__, __LINE__);
  1091. /* Get the old address */
  1092. memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
  1093. /* Copy the new address */
  1094. memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
  1095. /* First delete the old mac address from all the vpaths
  1096. as we can't specify the index while adding new mac address */
  1097. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1098. struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
  1099. if (!vpath->is_open) {
  1100. /* This can happen when this interface is added/removed
  1101. to the bonding interface. Delete this station address
  1102. from the linked list */
  1103. vxge_mac_list_del(vpath, &mac_info_old);
  1104. /* Add this new address to the linked list
  1105. for later restoring */
  1106. vxge_mac_list_add(vpath, &mac_info_new);
  1107. continue;
  1108. }
  1109. /* Delete the station address */
  1110. mac_info_old.vpath_no = vpath_idx;
  1111. status = vxge_del_mac_addr(vdev, &mac_info_old);
  1112. }
  1113. if (unlikely(!is_vxge_card_up(vdev))) {
  1114. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1115. return VXGE_HW_OK;
  1116. }
  1117. /* Set this mac address to all the vpaths */
  1118. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1119. mac_info_new.vpath_no = vpath_idx;
  1120. mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1121. status = vxge_add_mac_addr(vdev, &mac_info_new);
  1122. if (status != VXGE_HW_OK)
  1123. return -EINVAL;
  1124. }
  1125. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1126. return status;
  1127. }
  1128. /*
  1129. * vxge_vpath_intr_enable
  1130. * @vdev: pointer to vdev
  1131. * @vp_id: vpath for which to enable the interrupts
  1132. *
  1133. * Enables the interrupts for the vpath
  1134. */
  1135. static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
  1136. {
  1137. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1138. int msix_id = 0;
  1139. int tim_msix_id[4] = {0, 1, 0, 0};
  1140. int alarm_msix_id = VXGE_ALARM_MSIX_ID;
  1141. vxge_hw_vpath_intr_enable(vpath->handle);
  1142. if (vdev->config.intr_type == INTA)
  1143. vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
  1144. else {
  1145. vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
  1146. alarm_msix_id);
  1147. msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1148. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
  1149. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
  1150. /* enable the alarm vector */
  1151. msix_id = (vpath->handle->vpath->hldev->first_vp_id *
  1152. VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
  1153. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
  1154. }
  1155. }
  1156. /*
  1157. * vxge_vpath_intr_disable
  1158. * @vdev: pointer to vdev
  1159. * @vp_id: vpath for which to disable the interrupts
  1160. *
  1161. * Disables the interrupts for the vpath
  1162. */
  1163. static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
  1164. {
  1165. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1166. struct __vxge_hw_device *hldev;
  1167. int msix_id;
  1168. hldev = pci_get_drvdata(vdev->pdev);
  1169. vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
  1170. vxge_hw_vpath_intr_disable(vpath->handle);
  1171. if (vdev->config.intr_type == INTA)
  1172. vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
  1173. else {
  1174. msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1175. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1176. vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
  1177. /* disable the alarm vector */
  1178. msix_id = (vpath->handle->vpath->hldev->first_vp_id *
  1179. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  1180. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1181. }
  1182. }
  1183. /* list all mac addresses from DA table */
  1184. static enum vxge_hw_status
  1185. vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath, struct macInfo *mac)
  1186. {
  1187. enum vxge_hw_status status = VXGE_HW_OK;
  1188. unsigned char macmask[ETH_ALEN];
  1189. unsigned char macaddr[ETH_ALEN];
  1190. status = vxge_hw_vpath_mac_addr_get(vpath->handle,
  1191. macaddr, macmask);
  1192. if (status != VXGE_HW_OK) {
  1193. vxge_debug_init(VXGE_ERR,
  1194. "DA config list entry failed for vpath:%d",
  1195. vpath->device_id);
  1196. return status;
  1197. }
  1198. while (!ether_addr_equal(mac->macaddr, macaddr)) {
  1199. status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
  1200. macaddr, macmask);
  1201. if (status != VXGE_HW_OK)
  1202. break;
  1203. }
  1204. return status;
  1205. }
  1206. /* Store all mac addresses from the list to the DA table */
  1207. static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
  1208. {
  1209. enum vxge_hw_status status = VXGE_HW_OK;
  1210. struct macInfo mac_info;
  1211. u8 *mac_address = NULL;
  1212. struct list_head *entry, *next;
  1213. memset(&mac_info, 0, sizeof(struct macInfo));
  1214. if (vpath->is_open) {
  1215. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  1216. mac_address =
  1217. (u8 *)&
  1218. ((struct vxge_mac_addrs *)entry)->macaddr;
  1219. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1220. ((struct vxge_mac_addrs *)entry)->state =
  1221. VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1222. /* does this mac address already exist in da table? */
  1223. status = vxge_search_mac_addr_in_da_table(vpath,
  1224. &mac_info);
  1225. if (status != VXGE_HW_OK) {
  1226. /* Add this mac address to the DA table */
  1227. status = vxge_hw_vpath_mac_addr_add(
  1228. vpath->handle, mac_info.macaddr,
  1229. mac_info.macmask,
  1230. VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
  1231. if (status != VXGE_HW_OK) {
  1232. vxge_debug_init(VXGE_ERR,
  1233. "DA add entry failed for vpath:%d",
  1234. vpath->device_id);
  1235. ((struct vxge_mac_addrs *)entry)->state
  1236. = VXGE_LL_MAC_ADDR_IN_LIST;
  1237. }
  1238. }
  1239. }
  1240. }
  1241. return status;
  1242. }
  1243. /* Store all vlan ids from the list to the vid table */
  1244. static enum vxge_hw_status
  1245. vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
  1246. {
  1247. enum vxge_hw_status status = VXGE_HW_OK;
  1248. struct vxgedev *vdev = vpath->vdev;
  1249. u16 vid;
  1250. if (!vpath->is_open)
  1251. return status;
  1252. for_each_set_bit(vid, vdev->active_vlans, VLAN_N_VID)
  1253. status = vxge_hw_vpath_vid_add(vpath->handle, vid);
  1254. return status;
  1255. }
  1256. /*
  1257. * vxge_reset_vpath
  1258. * @vdev: pointer to vdev
  1259. * @vp_id: vpath to reset
  1260. *
  1261. * Resets the vpath
  1262. */
  1263. static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
  1264. {
  1265. enum vxge_hw_status status = VXGE_HW_OK;
  1266. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1267. int ret = 0;
  1268. /* check if device is down already */
  1269. if (unlikely(!is_vxge_card_up(vdev)))
  1270. return 0;
  1271. /* is device reset already scheduled */
  1272. if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1273. return 0;
  1274. if (vpath->handle) {
  1275. if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
  1276. if (is_vxge_card_up(vdev) &&
  1277. vxge_hw_vpath_recover_from_reset(vpath->handle)
  1278. != VXGE_HW_OK) {
  1279. vxge_debug_init(VXGE_ERR,
  1280. "vxge_hw_vpath_recover_from_reset"
  1281. "failed for vpath:%d", vp_id);
  1282. return status;
  1283. }
  1284. } else {
  1285. vxge_debug_init(VXGE_ERR,
  1286. "vxge_hw_vpath_reset failed for"
  1287. "vpath:%d", vp_id);
  1288. return status;
  1289. }
  1290. } else
  1291. return VXGE_HW_FAIL;
  1292. vxge_restore_vpath_mac_addr(vpath);
  1293. vxge_restore_vpath_vid_table(vpath);
  1294. /* Enable all broadcast */
  1295. vxge_hw_vpath_bcast_enable(vpath->handle);
  1296. /* Enable all multicast */
  1297. if (vdev->all_multi_flg) {
  1298. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  1299. if (status != VXGE_HW_OK)
  1300. vxge_debug_init(VXGE_ERR,
  1301. "%s:%d Enabling multicast failed",
  1302. __func__, __LINE__);
  1303. }
  1304. /* Enable the interrupts */
  1305. vxge_vpath_intr_enable(vdev, vp_id);
  1306. smp_wmb();
  1307. /* Enable the flow of traffic through the vpath */
  1308. vxge_hw_vpath_enable(vpath->handle);
  1309. smp_wmb();
  1310. vxge_hw_vpath_rx_doorbell_init(vpath->handle);
  1311. vpath->ring.last_status = VXGE_HW_OK;
  1312. /* Vpath reset done */
  1313. clear_bit(vp_id, &vdev->vp_reset);
  1314. /* Start the vpath queue */
  1315. if (netif_tx_queue_stopped(vpath->fifo.txq))
  1316. netif_tx_wake_queue(vpath->fifo.txq);
  1317. return ret;
  1318. }
  1319. /* Configure CI */
  1320. static void vxge_config_ci_for_tti_rti(struct vxgedev *vdev)
  1321. {
  1322. int i = 0;
  1323. /* Enable CI for RTI */
  1324. if (vdev->config.intr_type == MSI_X) {
  1325. for (i = 0; i < vdev->no_of_vpath; i++) {
  1326. struct __vxge_hw_ring *hw_ring;
  1327. hw_ring = vdev->vpaths[i].ring.handle;
  1328. vxge_hw_vpath_dynamic_rti_ci_set(hw_ring);
  1329. }
  1330. }
  1331. /* Enable CI for TTI */
  1332. for (i = 0; i < vdev->no_of_vpath; i++) {
  1333. struct __vxge_hw_fifo *hw_fifo = vdev->vpaths[i].fifo.handle;
  1334. vxge_hw_vpath_tti_ci_set(hw_fifo);
  1335. /*
  1336. * For Inta (with or without napi), Set CI ON for only one
  1337. * vpath. (Have only one free running timer).
  1338. */
  1339. if ((vdev->config.intr_type == INTA) && (i == 0))
  1340. break;
  1341. }
  1342. return;
  1343. }
  1344. static int do_vxge_reset(struct vxgedev *vdev, int event)
  1345. {
  1346. enum vxge_hw_status status;
  1347. int ret = 0, vp_id, i;
  1348. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1349. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
  1350. /* check if device is down already */
  1351. if (unlikely(!is_vxge_card_up(vdev)))
  1352. return 0;
  1353. /* is reset already scheduled */
  1354. if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1355. return 0;
  1356. }
  1357. if (event == VXGE_LL_FULL_RESET) {
  1358. netif_carrier_off(vdev->ndev);
  1359. /* wait for all the vpath reset to complete */
  1360. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1361. while (test_bit(vp_id, &vdev->vp_reset))
  1362. msleep(50);
  1363. }
  1364. netif_carrier_on(vdev->ndev);
  1365. /* if execution mode is set to debug, don't reset the adapter */
  1366. if (unlikely(vdev->exec_mode)) {
  1367. vxge_debug_init(VXGE_ERR,
  1368. "%s: execution mode is debug, returning..",
  1369. vdev->ndev->name);
  1370. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1371. netif_tx_stop_all_queues(vdev->ndev);
  1372. return 0;
  1373. }
  1374. }
  1375. if (event == VXGE_LL_FULL_RESET) {
  1376. vxge_hw_device_wait_receive_idle(vdev->devh);
  1377. vxge_hw_device_intr_disable(vdev->devh);
  1378. switch (vdev->cric_err_event) {
  1379. case VXGE_HW_EVENT_UNKNOWN:
  1380. netif_tx_stop_all_queues(vdev->ndev);
  1381. vxge_debug_init(VXGE_ERR,
  1382. "fatal: %s: Disabling device due to"
  1383. "unknown error",
  1384. vdev->ndev->name);
  1385. ret = -EPERM;
  1386. goto out;
  1387. case VXGE_HW_EVENT_RESET_START:
  1388. break;
  1389. case VXGE_HW_EVENT_RESET_COMPLETE:
  1390. case VXGE_HW_EVENT_LINK_DOWN:
  1391. case VXGE_HW_EVENT_LINK_UP:
  1392. case VXGE_HW_EVENT_ALARM_CLEARED:
  1393. case VXGE_HW_EVENT_ECCERR:
  1394. case VXGE_HW_EVENT_MRPCIM_ECCERR:
  1395. ret = -EPERM;
  1396. goto out;
  1397. case VXGE_HW_EVENT_FIFO_ERR:
  1398. case VXGE_HW_EVENT_VPATH_ERR:
  1399. break;
  1400. case VXGE_HW_EVENT_CRITICAL_ERR:
  1401. netif_tx_stop_all_queues(vdev->ndev);
  1402. vxge_debug_init(VXGE_ERR,
  1403. "fatal: %s: Disabling device due to"
  1404. "serious error",
  1405. vdev->ndev->name);
  1406. /* SOP or device reset required */
  1407. /* This event is not currently used */
  1408. ret = -EPERM;
  1409. goto out;
  1410. case VXGE_HW_EVENT_SERR:
  1411. netif_tx_stop_all_queues(vdev->ndev);
  1412. vxge_debug_init(VXGE_ERR,
  1413. "fatal: %s: Disabling device due to"
  1414. "serious error",
  1415. vdev->ndev->name);
  1416. ret = -EPERM;
  1417. goto out;
  1418. case VXGE_HW_EVENT_SRPCIM_SERR:
  1419. case VXGE_HW_EVENT_MRPCIM_SERR:
  1420. ret = -EPERM;
  1421. goto out;
  1422. case VXGE_HW_EVENT_SLOT_FREEZE:
  1423. netif_tx_stop_all_queues(vdev->ndev);
  1424. vxge_debug_init(VXGE_ERR,
  1425. "fatal: %s: Disabling device due to"
  1426. "slot freeze",
  1427. vdev->ndev->name);
  1428. ret = -EPERM;
  1429. goto out;
  1430. default:
  1431. break;
  1432. }
  1433. }
  1434. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
  1435. netif_tx_stop_all_queues(vdev->ndev);
  1436. if (event == VXGE_LL_FULL_RESET) {
  1437. status = vxge_reset_all_vpaths(vdev);
  1438. if (status != VXGE_HW_OK) {
  1439. vxge_debug_init(VXGE_ERR,
  1440. "fatal: %s: can not reset vpaths",
  1441. vdev->ndev->name);
  1442. ret = -EPERM;
  1443. goto out;
  1444. }
  1445. }
  1446. if (event == VXGE_LL_COMPL_RESET) {
  1447. for (i = 0; i < vdev->no_of_vpath; i++)
  1448. if (vdev->vpaths[i].handle) {
  1449. if (vxge_hw_vpath_recover_from_reset(
  1450. vdev->vpaths[i].handle)
  1451. != VXGE_HW_OK) {
  1452. vxge_debug_init(VXGE_ERR,
  1453. "vxge_hw_vpath_recover_"
  1454. "from_reset failed for vpath: "
  1455. "%d", i);
  1456. ret = -EPERM;
  1457. goto out;
  1458. }
  1459. } else {
  1460. vxge_debug_init(VXGE_ERR,
  1461. "vxge_hw_vpath_reset failed for "
  1462. "vpath:%d", i);
  1463. ret = -EPERM;
  1464. goto out;
  1465. }
  1466. }
  1467. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
  1468. /* Reprogram the DA table with populated mac addresses */
  1469. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1470. vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
  1471. vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
  1472. }
  1473. /* enable vpath interrupts */
  1474. for (i = 0; i < vdev->no_of_vpath; i++)
  1475. vxge_vpath_intr_enable(vdev, i);
  1476. vxge_hw_device_intr_enable(vdev->devh);
  1477. smp_wmb();
  1478. /* Indicate card up */
  1479. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1480. /* Get the traffic to flow through the vpaths */
  1481. for (i = 0; i < vdev->no_of_vpath; i++) {
  1482. vxge_hw_vpath_enable(vdev->vpaths[i].handle);
  1483. smp_wmb();
  1484. vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
  1485. }
  1486. netif_tx_wake_all_queues(vdev->ndev);
  1487. }
  1488. /* configure CI */
  1489. vxge_config_ci_for_tti_rti(vdev);
  1490. out:
  1491. vxge_debug_entryexit(VXGE_TRACE,
  1492. "%s:%d Exiting...", __func__, __LINE__);
  1493. /* Indicate reset done */
  1494. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
  1495. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  1496. return ret;
  1497. }
  1498. /*
  1499. * vxge_reset
  1500. * @vdev: pointer to ll device
  1501. *
  1502. * driver may reset the chip on events of serr, eccerr, etc
  1503. */
  1504. static void vxge_reset(struct work_struct *work)
  1505. {
  1506. struct vxgedev *vdev = container_of(work, struct vxgedev, reset_task);
  1507. if (!netif_running(vdev->ndev))
  1508. return;
  1509. do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
  1510. }
  1511. /**
  1512. * vxge_poll - Receive handler when Receive Polling is used.
  1513. * @dev: pointer to the device structure.
  1514. * @budget: Number of packets budgeted to be processed in this iteration.
  1515. *
  1516. * This function comes into picture only if Receive side is being handled
  1517. * through polling (called NAPI in linux). It mostly does what the normal
  1518. * Rx interrupt handler does in terms of descriptor and packet processing
  1519. * but not in an interrupt context. Also it will process a specified number
  1520. * of packets at most in one iteration. This value is passed down by the
  1521. * kernel as the function argument 'budget'.
  1522. */
  1523. static int vxge_poll_msix(struct napi_struct *napi, int budget)
  1524. {
  1525. struct vxge_ring *ring = container_of(napi, struct vxge_ring, napi);
  1526. int pkts_processed;
  1527. int budget_org = budget;
  1528. ring->budget = budget;
  1529. ring->pkts_processed = 0;
  1530. vxge_hw_vpath_poll_rx(ring->handle);
  1531. pkts_processed = ring->pkts_processed;
  1532. if (pkts_processed < budget_org) {
  1533. napi_complete_done(napi, pkts_processed);
  1534. /* Re enable the Rx interrupts for the vpath */
  1535. vxge_hw_channel_msix_unmask(
  1536. (struct __vxge_hw_channel *)ring->handle,
  1537. ring->rx_vector_no);
  1538. mmiowb();
  1539. }
  1540. /* We are copying and returning the local variable, in case if after
  1541. * clearing the msix interrupt above, if the interrupt fires right
  1542. * away which can preempt this NAPI thread */
  1543. return pkts_processed;
  1544. }
  1545. static int vxge_poll_inta(struct napi_struct *napi, int budget)
  1546. {
  1547. struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
  1548. int pkts_processed = 0;
  1549. int i;
  1550. int budget_org = budget;
  1551. struct vxge_ring *ring;
  1552. struct __vxge_hw_device *hldev = pci_get_drvdata(vdev->pdev);
  1553. for (i = 0; i < vdev->no_of_vpath; i++) {
  1554. ring = &vdev->vpaths[i].ring;
  1555. ring->budget = budget;
  1556. ring->pkts_processed = 0;
  1557. vxge_hw_vpath_poll_rx(ring->handle);
  1558. pkts_processed += ring->pkts_processed;
  1559. budget -= ring->pkts_processed;
  1560. if (budget <= 0)
  1561. break;
  1562. }
  1563. VXGE_COMPLETE_ALL_TX(vdev);
  1564. if (pkts_processed < budget_org) {
  1565. napi_complete_done(napi, pkts_processed);
  1566. /* Re enable the Rx interrupts for the ring */
  1567. vxge_hw_device_unmask_all(hldev);
  1568. vxge_hw_device_flush_io(hldev);
  1569. }
  1570. return pkts_processed;
  1571. }
  1572. #ifdef CONFIG_NET_POLL_CONTROLLER
  1573. /**
  1574. * vxge_netpoll - netpoll event handler entry point
  1575. * @dev : pointer to the device structure.
  1576. * Description:
  1577. * This function will be called by upper layer to check for events on the
  1578. * interface in situations where interrupts are disabled. It is used for
  1579. * specific in-kernel networking tasks, such as remote consoles and kernel
  1580. * debugging over the network (example netdump in RedHat).
  1581. */
  1582. static void vxge_netpoll(struct net_device *dev)
  1583. {
  1584. struct vxgedev *vdev = netdev_priv(dev);
  1585. struct pci_dev *pdev = vdev->pdev;
  1586. struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
  1587. const int irq = pdev->irq;
  1588. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1589. if (pci_channel_offline(pdev))
  1590. return;
  1591. disable_irq(irq);
  1592. vxge_hw_device_clear_tx_rx(hldev);
  1593. vxge_hw_device_clear_tx_rx(hldev);
  1594. VXGE_COMPLETE_ALL_RX(vdev);
  1595. VXGE_COMPLETE_ALL_TX(vdev);
  1596. enable_irq(irq);
  1597. vxge_debug_entryexit(VXGE_TRACE,
  1598. "%s:%d Exiting...", __func__, __LINE__);
  1599. }
  1600. #endif
  1601. /* RTH configuration */
  1602. static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
  1603. {
  1604. enum vxge_hw_status status = VXGE_HW_OK;
  1605. struct vxge_hw_rth_hash_types hash_types;
  1606. u8 itable[256] = {0}; /* indirection table */
  1607. u8 mtable[256] = {0}; /* CPU to vpath mapping */
  1608. int index;
  1609. /*
  1610. * Filling
  1611. * - itable with bucket numbers
  1612. * - mtable with bucket-to-vpath mapping
  1613. */
  1614. for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
  1615. itable[index] = index;
  1616. mtable[index] = index % vdev->no_of_vpath;
  1617. }
  1618. /* set indirection table, bucket-to-vpath mapping */
  1619. status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
  1620. vdev->no_of_vpath,
  1621. mtable, itable,
  1622. vdev->config.rth_bkt_sz);
  1623. if (status != VXGE_HW_OK) {
  1624. vxge_debug_init(VXGE_ERR,
  1625. "RTH indirection table configuration failed "
  1626. "for vpath:%d", vdev->vpaths[0].device_id);
  1627. return status;
  1628. }
  1629. /* Fill RTH hash types */
  1630. hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
  1631. hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
  1632. hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
  1633. hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
  1634. hash_types.hash_type_tcpipv6ex_en =
  1635. vdev->config.rth_hash_type_tcpipv6ex;
  1636. hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
  1637. /*
  1638. * Because the itable_set() method uses the active_table field
  1639. * for the target virtual path the RTH config should be updated
  1640. * for all VPATHs. The h/w only uses the lowest numbered VPATH
  1641. * when steering frames.
  1642. */
  1643. for (index = 0; index < vdev->no_of_vpath; index++) {
  1644. status = vxge_hw_vpath_rts_rth_set(
  1645. vdev->vpaths[index].handle,
  1646. vdev->config.rth_algorithm,
  1647. &hash_types,
  1648. vdev->config.rth_bkt_sz);
  1649. if (status != VXGE_HW_OK) {
  1650. vxge_debug_init(VXGE_ERR,
  1651. "RTH configuration failed for vpath:%d",
  1652. vdev->vpaths[index].device_id);
  1653. return status;
  1654. }
  1655. }
  1656. return status;
  1657. }
  1658. /* reset vpaths */
  1659. static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
  1660. {
  1661. enum vxge_hw_status status = VXGE_HW_OK;
  1662. struct vxge_vpath *vpath;
  1663. int i;
  1664. for (i = 0; i < vdev->no_of_vpath; i++) {
  1665. vpath = &vdev->vpaths[i];
  1666. if (vpath->handle) {
  1667. if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
  1668. if (is_vxge_card_up(vdev) &&
  1669. vxge_hw_vpath_recover_from_reset(
  1670. vpath->handle) != VXGE_HW_OK) {
  1671. vxge_debug_init(VXGE_ERR,
  1672. "vxge_hw_vpath_recover_"
  1673. "from_reset failed for vpath: "
  1674. "%d", i);
  1675. return status;
  1676. }
  1677. } else {
  1678. vxge_debug_init(VXGE_ERR,
  1679. "vxge_hw_vpath_reset failed for "
  1680. "vpath:%d", i);
  1681. return status;
  1682. }
  1683. }
  1684. }
  1685. return status;
  1686. }
  1687. /* close vpaths */
  1688. static void vxge_close_vpaths(struct vxgedev *vdev, int index)
  1689. {
  1690. struct vxge_vpath *vpath;
  1691. int i;
  1692. for (i = index; i < vdev->no_of_vpath; i++) {
  1693. vpath = &vdev->vpaths[i];
  1694. if (vpath->handle && vpath->is_open) {
  1695. vxge_hw_vpath_close(vpath->handle);
  1696. vdev->stats.vpaths_open--;
  1697. }
  1698. vpath->is_open = 0;
  1699. vpath->handle = NULL;
  1700. }
  1701. }
  1702. /* open vpaths */
  1703. static int vxge_open_vpaths(struct vxgedev *vdev)
  1704. {
  1705. struct vxge_hw_vpath_attr attr;
  1706. enum vxge_hw_status status;
  1707. struct vxge_vpath *vpath;
  1708. u32 vp_id = 0;
  1709. int i;
  1710. for (i = 0; i < vdev->no_of_vpath; i++) {
  1711. vpath = &vdev->vpaths[i];
  1712. vxge_assert(vpath->is_configured);
  1713. if (!vdev->titan1) {
  1714. struct vxge_hw_vp_config *vcfg;
  1715. vcfg = &vdev->devh->config.vp_config[vpath->device_id];
  1716. vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
  1717. vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
  1718. vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
  1719. vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
  1720. vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
  1721. vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
  1722. vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
  1723. vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
  1724. vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
  1725. }
  1726. attr.vp_id = vpath->device_id;
  1727. attr.fifo_attr.callback = vxge_xmit_compl;
  1728. attr.fifo_attr.txdl_term = vxge_tx_term;
  1729. attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
  1730. attr.fifo_attr.userdata = &vpath->fifo;
  1731. attr.ring_attr.callback = vxge_rx_1b_compl;
  1732. attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
  1733. attr.ring_attr.rxd_term = vxge_rx_term;
  1734. attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
  1735. attr.ring_attr.userdata = &vpath->ring;
  1736. vpath->ring.ndev = vdev->ndev;
  1737. vpath->ring.pdev = vdev->pdev;
  1738. status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
  1739. if (status == VXGE_HW_OK) {
  1740. vpath->fifo.handle =
  1741. (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
  1742. vpath->ring.handle =
  1743. (struct __vxge_hw_ring *)attr.ring_attr.userdata;
  1744. vpath->fifo.tx_steering_type =
  1745. vdev->config.tx_steering_type;
  1746. vpath->fifo.ndev = vdev->ndev;
  1747. vpath->fifo.pdev = vdev->pdev;
  1748. u64_stats_init(&vpath->fifo.stats.syncp);
  1749. u64_stats_init(&vpath->ring.stats.syncp);
  1750. if (vdev->config.tx_steering_type)
  1751. vpath->fifo.txq =
  1752. netdev_get_tx_queue(vdev->ndev, i);
  1753. else
  1754. vpath->fifo.txq =
  1755. netdev_get_tx_queue(vdev->ndev, 0);
  1756. vpath->fifo.indicate_max_pkts =
  1757. vdev->config.fifo_indicate_max_pkts;
  1758. vpath->fifo.tx_vector_no = 0;
  1759. vpath->ring.rx_vector_no = 0;
  1760. vpath->ring.rx_hwts = vdev->rx_hwts;
  1761. vpath->is_open = 1;
  1762. vdev->vp_handles[i] = vpath->handle;
  1763. vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
  1764. vdev->stats.vpaths_open++;
  1765. } else {
  1766. vdev->stats.vpath_open_fail++;
  1767. vxge_debug_init(VXGE_ERR, "%s: vpath: %d failed to "
  1768. "open with status: %d",
  1769. vdev->ndev->name, vpath->device_id,
  1770. status);
  1771. vxge_close_vpaths(vdev, 0);
  1772. return -EPERM;
  1773. }
  1774. vp_id = vpath->handle->vpath->vp_id;
  1775. vdev->vpaths_deployed |= vxge_mBIT(vp_id);
  1776. }
  1777. return VXGE_HW_OK;
  1778. }
  1779. /**
  1780. * adaptive_coalesce_tx_interrupts - Changes the interrupt coalescing
  1781. * if the interrupts are not within a range
  1782. * @fifo: pointer to transmit fifo structure
  1783. * Description: The function changes boundary timer and restriction timer
  1784. * value depends on the traffic
  1785. * Return Value: None
  1786. */
  1787. static void adaptive_coalesce_tx_interrupts(struct vxge_fifo *fifo)
  1788. {
  1789. fifo->interrupt_count++;
  1790. if (time_before(fifo->jiffies + HZ / 100, jiffies)) {
  1791. struct __vxge_hw_fifo *hw_fifo = fifo->handle;
  1792. fifo->jiffies = jiffies;
  1793. if (fifo->interrupt_count > VXGE_T1A_MAX_TX_INTERRUPT_COUNT &&
  1794. hw_fifo->rtimer != VXGE_TTI_RTIMER_ADAPT_VAL) {
  1795. hw_fifo->rtimer = VXGE_TTI_RTIMER_ADAPT_VAL;
  1796. vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
  1797. } else if (hw_fifo->rtimer != 0) {
  1798. hw_fifo->rtimer = 0;
  1799. vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
  1800. }
  1801. fifo->interrupt_count = 0;
  1802. }
  1803. }
  1804. /**
  1805. * adaptive_coalesce_rx_interrupts - Changes the interrupt coalescing
  1806. * if the interrupts are not within a range
  1807. * @ring: pointer to receive ring structure
  1808. * Description: The function increases of decreases the packet counts within
  1809. * the ranges of traffic utilization, if the interrupts due to this ring are
  1810. * not within a fixed range.
  1811. * Return Value: Nothing
  1812. */
  1813. static void adaptive_coalesce_rx_interrupts(struct vxge_ring *ring)
  1814. {
  1815. ring->interrupt_count++;
  1816. if (time_before(ring->jiffies + HZ / 100, jiffies)) {
  1817. struct __vxge_hw_ring *hw_ring = ring->handle;
  1818. ring->jiffies = jiffies;
  1819. if (ring->interrupt_count > VXGE_T1A_MAX_INTERRUPT_COUNT &&
  1820. hw_ring->rtimer != VXGE_RTI_RTIMER_ADAPT_VAL) {
  1821. hw_ring->rtimer = VXGE_RTI_RTIMER_ADAPT_VAL;
  1822. vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
  1823. } else if (hw_ring->rtimer != 0) {
  1824. hw_ring->rtimer = 0;
  1825. vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
  1826. }
  1827. ring->interrupt_count = 0;
  1828. }
  1829. }
  1830. /*
  1831. * vxge_isr_napi
  1832. * @irq: the irq of the device.
  1833. * @dev_id: a void pointer to the hldev structure of the Titan device
  1834. * @ptregs: pointer to the registers pushed on the stack.
  1835. *
  1836. * This function is the ISR handler of the device when napi is enabled. It
  1837. * identifies the reason for the interrupt and calls the relevant service
  1838. * routines.
  1839. */
  1840. static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
  1841. {
  1842. struct __vxge_hw_device *hldev;
  1843. u64 reason;
  1844. enum vxge_hw_status status;
  1845. struct vxgedev *vdev = (struct vxgedev *)dev_id;
  1846. vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1847. hldev = pci_get_drvdata(vdev->pdev);
  1848. if (pci_channel_offline(vdev->pdev))
  1849. return IRQ_NONE;
  1850. if (unlikely(!is_vxge_card_up(vdev)))
  1851. return IRQ_HANDLED;
  1852. status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode, &reason);
  1853. if (status == VXGE_HW_OK) {
  1854. vxge_hw_device_mask_all(hldev);
  1855. if (reason &
  1856. VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
  1857. vdev->vpaths_deployed >>
  1858. (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
  1859. vxge_hw_device_clear_tx_rx(hldev);
  1860. napi_schedule(&vdev->napi);
  1861. vxge_debug_intr(VXGE_TRACE,
  1862. "%s:%d Exiting...", __func__, __LINE__);
  1863. return IRQ_HANDLED;
  1864. } else
  1865. vxge_hw_device_unmask_all(hldev);
  1866. } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
  1867. (status == VXGE_HW_ERR_CRITICAL) ||
  1868. (status == VXGE_HW_ERR_FIFO))) {
  1869. vxge_hw_device_mask_all(hldev);
  1870. vxge_hw_device_flush_io(hldev);
  1871. return IRQ_HANDLED;
  1872. } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
  1873. return IRQ_HANDLED;
  1874. vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
  1875. return IRQ_NONE;
  1876. }
  1877. static irqreturn_t vxge_tx_msix_handle(int irq, void *dev_id)
  1878. {
  1879. struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
  1880. adaptive_coalesce_tx_interrupts(fifo);
  1881. vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)fifo->handle,
  1882. fifo->tx_vector_no);
  1883. vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)fifo->handle,
  1884. fifo->tx_vector_no);
  1885. VXGE_COMPLETE_VPATH_TX(fifo);
  1886. vxge_hw_channel_msix_unmask((struct __vxge_hw_channel *)fifo->handle,
  1887. fifo->tx_vector_no);
  1888. mmiowb();
  1889. return IRQ_HANDLED;
  1890. }
  1891. static irqreturn_t vxge_rx_msix_napi_handle(int irq, void *dev_id)
  1892. {
  1893. struct vxge_ring *ring = (struct vxge_ring *)dev_id;
  1894. adaptive_coalesce_rx_interrupts(ring);
  1895. vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
  1896. ring->rx_vector_no);
  1897. vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)ring->handle,
  1898. ring->rx_vector_no);
  1899. napi_schedule(&ring->napi);
  1900. return IRQ_HANDLED;
  1901. }
  1902. static irqreturn_t
  1903. vxge_alarm_msix_handle(int irq, void *dev_id)
  1904. {
  1905. int i;
  1906. enum vxge_hw_status status;
  1907. struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
  1908. struct vxgedev *vdev = vpath->vdev;
  1909. int msix_id = (vpath->handle->vpath->vp_id *
  1910. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  1911. for (i = 0; i < vdev->no_of_vpath; i++) {
  1912. /* Reduce the chance of losing alarm interrupts by masking
  1913. * the vector. A pending bit will be set if an alarm is
  1914. * generated and on unmask the interrupt will be fired.
  1915. */
  1916. vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
  1917. vxge_hw_vpath_msix_clear(vdev->vpaths[i].handle, msix_id);
  1918. mmiowb();
  1919. status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
  1920. vdev->exec_mode);
  1921. if (status == VXGE_HW_OK) {
  1922. vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
  1923. msix_id);
  1924. mmiowb();
  1925. continue;
  1926. }
  1927. vxge_debug_intr(VXGE_ERR,
  1928. "%s: vxge_hw_vpath_alarm_process failed %x ",
  1929. VXGE_DRIVER_NAME, status);
  1930. }
  1931. return IRQ_HANDLED;
  1932. }
  1933. static int vxge_alloc_msix(struct vxgedev *vdev)
  1934. {
  1935. int j, i, ret = 0;
  1936. int msix_intr_vect = 0, temp;
  1937. vdev->intr_cnt = 0;
  1938. start:
  1939. /* Tx/Rx MSIX Vectors count */
  1940. vdev->intr_cnt = vdev->no_of_vpath * 2;
  1941. /* Alarm MSIX Vectors count */
  1942. vdev->intr_cnt++;
  1943. vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
  1944. GFP_KERNEL);
  1945. if (!vdev->entries) {
  1946. vxge_debug_init(VXGE_ERR,
  1947. "%s: memory allocation failed",
  1948. VXGE_DRIVER_NAME);
  1949. ret = -ENOMEM;
  1950. goto alloc_entries_failed;
  1951. }
  1952. vdev->vxge_entries = kcalloc(vdev->intr_cnt,
  1953. sizeof(struct vxge_msix_entry),
  1954. GFP_KERNEL);
  1955. if (!vdev->vxge_entries) {
  1956. vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
  1957. VXGE_DRIVER_NAME);
  1958. ret = -ENOMEM;
  1959. goto alloc_vxge_entries_failed;
  1960. }
  1961. for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
  1962. msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
  1963. /* Initialize the fifo vector */
  1964. vdev->entries[j].entry = msix_intr_vect;
  1965. vdev->vxge_entries[j].entry = msix_intr_vect;
  1966. vdev->vxge_entries[j].in_use = 0;
  1967. j++;
  1968. /* Initialize the ring vector */
  1969. vdev->entries[j].entry = msix_intr_vect + 1;
  1970. vdev->vxge_entries[j].entry = msix_intr_vect + 1;
  1971. vdev->vxge_entries[j].in_use = 0;
  1972. j++;
  1973. }
  1974. /* Initialize the alarm vector */
  1975. vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
  1976. vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
  1977. vdev->vxge_entries[j].in_use = 0;
  1978. ret = pci_enable_msix_range(vdev->pdev,
  1979. vdev->entries, 3, vdev->intr_cnt);
  1980. if (ret < 0) {
  1981. ret = -ENODEV;
  1982. goto enable_msix_failed;
  1983. } else if (ret < vdev->intr_cnt) {
  1984. pci_disable_msix(vdev->pdev);
  1985. vxge_debug_init(VXGE_ERR,
  1986. "%s: MSI-X enable failed for %d vectors, ret: %d",
  1987. VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
  1988. if (max_config_vpath != VXGE_USE_DEFAULT) {
  1989. ret = -ENODEV;
  1990. goto enable_msix_failed;
  1991. }
  1992. kfree(vdev->entries);
  1993. kfree(vdev->vxge_entries);
  1994. vdev->entries = NULL;
  1995. vdev->vxge_entries = NULL;
  1996. /* Try with less no of vector by reducing no of vpaths count */
  1997. temp = (ret - 1)/2;
  1998. vxge_close_vpaths(vdev, temp);
  1999. vdev->no_of_vpath = temp;
  2000. goto start;
  2001. }
  2002. return 0;
  2003. enable_msix_failed:
  2004. kfree(vdev->vxge_entries);
  2005. alloc_vxge_entries_failed:
  2006. kfree(vdev->entries);
  2007. alloc_entries_failed:
  2008. return ret;
  2009. }
  2010. static int vxge_enable_msix(struct vxgedev *vdev)
  2011. {
  2012. int i, ret = 0;
  2013. /* 0 - Tx, 1 - Rx */
  2014. int tim_msix_id[4] = {0, 1, 0, 0};
  2015. vdev->intr_cnt = 0;
  2016. /* allocate msix vectors */
  2017. ret = vxge_alloc_msix(vdev);
  2018. if (!ret) {
  2019. for (i = 0; i < vdev->no_of_vpath; i++) {
  2020. struct vxge_vpath *vpath = &vdev->vpaths[i];
  2021. /* If fifo or ring are not enabled, the MSIX vector for
  2022. * it should be set to 0.
  2023. */
  2024. vpath->ring.rx_vector_no = (vpath->device_id *
  2025. VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
  2026. vpath->fifo.tx_vector_no = (vpath->device_id *
  2027. VXGE_HW_VPATH_MSIX_ACTIVE);
  2028. vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
  2029. VXGE_ALARM_MSIX_ID);
  2030. }
  2031. }
  2032. return ret;
  2033. }
  2034. static void vxge_rem_msix_isr(struct vxgedev *vdev)
  2035. {
  2036. int intr_cnt;
  2037. for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
  2038. intr_cnt++) {
  2039. if (vdev->vxge_entries[intr_cnt].in_use) {
  2040. synchronize_irq(vdev->entries[intr_cnt].vector);
  2041. free_irq(vdev->entries[intr_cnt].vector,
  2042. vdev->vxge_entries[intr_cnt].arg);
  2043. vdev->vxge_entries[intr_cnt].in_use = 0;
  2044. }
  2045. }
  2046. kfree(vdev->entries);
  2047. kfree(vdev->vxge_entries);
  2048. vdev->entries = NULL;
  2049. vdev->vxge_entries = NULL;
  2050. if (vdev->config.intr_type == MSI_X)
  2051. pci_disable_msix(vdev->pdev);
  2052. }
  2053. static void vxge_rem_isr(struct vxgedev *vdev)
  2054. {
  2055. if (IS_ENABLED(CONFIG_PCI_MSI) &&
  2056. vdev->config.intr_type == MSI_X) {
  2057. vxge_rem_msix_isr(vdev);
  2058. } else if (vdev->config.intr_type == INTA) {
  2059. synchronize_irq(vdev->pdev->irq);
  2060. free_irq(vdev->pdev->irq, vdev);
  2061. }
  2062. }
  2063. static int vxge_add_isr(struct vxgedev *vdev)
  2064. {
  2065. int ret = 0;
  2066. int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
  2067. int pci_fun = PCI_FUNC(vdev->pdev->devfn);
  2068. if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X)
  2069. ret = vxge_enable_msix(vdev);
  2070. if (ret) {
  2071. vxge_debug_init(VXGE_ERR,
  2072. "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
  2073. vxge_debug_init(VXGE_ERR,
  2074. "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
  2075. vdev->config.intr_type = INTA;
  2076. }
  2077. if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X) {
  2078. for (intr_idx = 0;
  2079. intr_idx < (vdev->no_of_vpath *
  2080. VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
  2081. msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
  2082. irq_req = 0;
  2083. switch (msix_idx) {
  2084. case 0:
  2085. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2086. "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
  2087. vdev->ndev->name,
  2088. vdev->entries[intr_cnt].entry,
  2089. pci_fun, vp_idx);
  2090. ret = request_irq(
  2091. vdev->entries[intr_cnt].vector,
  2092. vxge_tx_msix_handle, 0,
  2093. vdev->desc[intr_cnt],
  2094. &vdev->vpaths[vp_idx].fifo);
  2095. vdev->vxge_entries[intr_cnt].arg =
  2096. &vdev->vpaths[vp_idx].fifo;
  2097. irq_req = 1;
  2098. break;
  2099. case 1:
  2100. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2101. "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
  2102. vdev->ndev->name,
  2103. vdev->entries[intr_cnt].entry,
  2104. pci_fun, vp_idx);
  2105. ret = request_irq(
  2106. vdev->entries[intr_cnt].vector,
  2107. vxge_rx_msix_napi_handle, 0,
  2108. vdev->desc[intr_cnt],
  2109. &vdev->vpaths[vp_idx].ring);
  2110. vdev->vxge_entries[intr_cnt].arg =
  2111. &vdev->vpaths[vp_idx].ring;
  2112. irq_req = 1;
  2113. break;
  2114. }
  2115. if (ret) {
  2116. vxge_debug_init(VXGE_ERR,
  2117. "%s: MSIX - %d Registration failed",
  2118. vdev->ndev->name, intr_cnt);
  2119. vxge_rem_msix_isr(vdev);
  2120. vdev->config.intr_type = INTA;
  2121. vxge_debug_init(VXGE_ERR,
  2122. "%s: Defaulting to INTA",
  2123. vdev->ndev->name);
  2124. goto INTA_MODE;
  2125. }
  2126. if (irq_req) {
  2127. /* We requested for this msix interrupt */
  2128. vdev->vxge_entries[intr_cnt].in_use = 1;
  2129. msix_idx += vdev->vpaths[vp_idx].device_id *
  2130. VXGE_HW_VPATH_MSIX_ACTIVE;
  2131. vxge_hw_vpath_msix_unmask(
  2132. vdev->vpaths[vp_idx].handle,
  2133. msix_idx);
  2134. intr_cnt++;
  2135. }
  2136. /* Point to next vpath handler */
  2137. if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
  2138. (vp_idx < (vdev->no_of_vpath - 1)))
  2139. vp_idx++;
  2140. }
  2141. intr_cnt = vdev->no_of_vpath * 2;
  2142. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2143. "%s:vxge:MSI-X %d - Alarm - fn:%d",
  2144. vdev->ndev->name,
  2145. vdev->entries[intr_cnt].entry,
  2146. pci_fun);
  2147. /* For Alarm interrupts */
  2148. ret = request_irq(vdev->entries[intr_cnt].vector,
  2149. vxge_alarm_msix_handle, 0,
  2150. vdev->desc[intr_cnt],
  2151. &vdev->vpaths[0]);
  2152. if (ret) {
  2153. vxge_debug_init(VXGE_ERR,
  2154. "%s: MSIX - %d Registration failed",
  2155. vdev->ndev->name, intr_cnt);
  2156. vxge_rem_msix_isr(vdev);
  2157. vdev->config.intr_type = INTA;
  2158. vxge_debug_init(VXGE_ERR,
  2159. "%s: Defaulting to INTA",
  2160. vdev->ndev->name);
  2161. goto INTA_MODE;
  2162. }
  2163. msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
  2164. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  2165. vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
  2166. msix_idx);
  2167. vdev->vxge_entries[intr_cnt].in_use = 1;
  2168. vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
  2169. }
  2170. INTA_MODE:
  2171. if (vdev->config.intr_type == INTA) {
  2172. snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
  2173. "%s:vxge:INTA", vdev->ndev->name);
  2174. vxge_hw_device_set_intr_type(vdev->devh,
  2175. VXGE_HW_INTR_MODE_IRQLINE);
  2176. vxge_hw_vpath_tti_ci_set(vdev->vpaths[0].fifo.handle);
  2177. ret = request_irq((int) vdev->pdev->irq,
  2178. vxge_isr_napi,
  2179. IRQF_SHARED, vdev->desc[0], vdev);
  2180. if (ret) {
  2181. vxge_debug_init(VXGE_ERR,
  2182. "%s %s-%d: ISR registration failed",
  2183. VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
  2184. return -ENODEV;
  2185. }
  2186. vxge_debug_init(VXGE_TRACE,
  2187. "new %s-%d line allocated",
  2188. "IRQ", vdev->pdev->irq);
  2189. }
  2190. return VXGE_HW_OK;
  2191. }
  2192. static void vxge_poll_vp_reset(struct timer_list *t)
  2193. {
  2194. struct vxgedev *vdev = from_timer(vdev, t, vp_reset_timer);
  2195. int i, j = 0;
  2196. for (i = 0; i < vdev->no_of_vpath; i++) {
  2197. if (test_bit(i, &vdev->vp_reset)) {
  2198. vxge_reset_vpath(vdev, i);
  2199. j++;
  2200. }
  2201. }
  2202. if (j && (vdev->config.intr_type != MSI_X)) {
  2203. vxge_hw_device_unmask_all(vdev->devh);
  2204. vxge_hw_device_flush_io(vdev->devh);
  2205. }
  2206. mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
  2207. }
  2208. static void vxge_poll_vp_lockup(struct timer_list *t)
  2209. {
  2210. struct vxgedev *vdev = from_timer(vdev, t, vp_lockup_timer);
  2211. enum vxge_hw_status status = VXGE_HW_OK;
  2212. struct vxge_vpath *vpath;
  2213. struct vxge_ring *ring;
  2214. int i;
  2215. unsigned long rx_frms;
  2216. for (i = 0; i < vdev->no_of_vpath; i++) {
  2217. ring = &vdev->vpaths[i].ring;
  2218. /* Truncated to machine word size number of frames */
  2219. rx_frms = READ_ONCE(ring->stats.rx_frms);
  2220. /* Did this vpath received any packets */
  2221. if (ring->stats.prev_rx_frms == rx_frms) {
  2222. status = vxge_hw_vpath_check_leak(ring->handle);
  2223. /* Did it received any packets last time */
  2224. if ((VXGE_HW_FAIL == status) &&
  2225. (VXGE_HW_FAIL == ring->last_status)) {
  2226. /* schedule vpath reset */
  2227. if (!test_and_set_bit(i, &vdev->vp_reset)) {
  2228. vpath = &vdev->vpaths[i];
  2229. /* disable interrupts for this vpath */
  2230. vxge_vpath_intr_disable(vdev, i);
  2231. /* stop the queue for this vpath */
  2232. netif_tx_stop_queue(vpath->fifo.txq);
  2233. continue;
  2234. }
  2235. }
  2236. }
  2237. ring->stats.prev_rx_frms = rx_frms;
  2238. ring->last_status = status;
  2239. }
  2240. /* Check every 1 milli second */
  2241. mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
  2242. }
  2243. static netdev_features_t vxge_fix_features(struct net_device *dev,
  2244. netdev_features_t features)
  2245. {
  2246. netdev_features_t changed = dev->features ^ features;
  2247. /* Enabling RTH requires some of the logic in vxge_device_register and a
  2248. * vpath reset. Due to these restrictions, only allow modification
  2249. * while the interface is down.
  2250. */
  2251. if ((changed & NETIF_F_RXHASH) && netif_running(dev))
  2252. features ^= NETIF_F_RXHASH;
  2253. return features;
  2254. }
  2255. static int vxge_set_features(struct net_device *dev, netdev_features_t features)
  2256. {
  2257. struct vxgedev *vdev = netdev_priv(dev);
  2258. netdev_features_t changed = dev->features ^ features;
  2259. if (!(changed & NETIF_F_RXHASH))
  2260. return 0;
  2261. /* !netif_running() ensured by vxge_fix_features() */
  2262. vdev->devh->config.rth_en = !!(features & NETIF_F_RXHASH);
  2263. if (vxge_reset_all_vpaths(vdev) != VXGE_HW_OK) {
  2264. dev->features = features ^ NETIF_F_RXHASH;
  2265. vdev->devh->config.rth_en = !!(dev->features & NETIF_F_RXHASH);
  2266. return -EIO;
  2267. }
  2268. return 0;
  2269. }
  2270. /**
  2271. * vxge_open
  2272. * @dev: pointer to the device structure.
  2273. *
  2274. * This function is the open entry point of the driver. It mainly calls a
  2275. * function to allocate Rx buffers and inserts them into the buffer
  2276. * descriptors and then enables the Rx part of the NIC.
  2277. * Return value: '0' on success and an appropriate (-)ve integer as
  2278. * defined in errno.h file on failure.
  2279. */
  2280. static int vxge_open(struct net_device *dev)
  2281. {
  2282. enum vxge_hw_status status;
  2283. struct vxgedev *vdev;
  2284. struct __vxge_hw_device *hldev;
  2285. struct vxge_vpath *vpath;
  2286. int ret = 0;
  2287. int i;
  2288. u64 val64;
  2289. vxge_debug_entryexit(VXGE_TRACE,
  2290. "%s: %s:%d", dev->name, __func__, __LINE__);
  2291. vdev = netdev_priv(dev);
  2292. hldev = pci_get_drvdata(vdev->pdev);
  2293. /* make sure you have link off by default every time Nic is
  2294. * initialized */
  2295. netif_carrier_off(dev);
  2296. /* Open VPATHs */
  2297. status = vxge_open_vpaths(vdev);
  2298. if (status != VXGE_HW_OK) {
  2299. vxge_debug_init(VXGE_ERR,
  2300. "%s: fatal: Vpath open failed", vdev->ndev->name);
  2301. ret = -EPERM;
  2302. goto out0;
  2303. }
  2304. vdev->mtu = dev->mtu;
  2305. status = vxge_add_isr(vdev);
  2306. if (status != VXGE_HW_OK) {
  2307. vxge_debug_init(VXGE_ERR,
  2308. "%s: fatal: ISR add failed", dev->name);
  2309. ret = -EPERM;
  2310. goto out1;
  2311. }
  2312. if (vdev->config.intr_type != MSI_X) {
  2313. netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
  2314. vdev->config.napi_weight);
  2315. napi_enable(&vdev->napi);
  2316. for (i = 0; i < vdev->no_of_vpath; i++) {
  2317. vpath = &vdev->vpaths[i];
  2318. vpath->ring.napi_p = &vdev->napi;
  2319. }
  2320. } else {
  2321. for (i = 0; i < vdev->no_of_vpath; i++) {
  2322. vpath = &vdev->vpaths[i];
  2323. netif_napi_add(dev, &vpath->ring.napi,
  2324. vxge_poll_msix, vdev->config.napi_weight);
  2325. napi_enable(&vpath->ring.napi);
  2326. vpath->ring.napi_p = &vpath->ring.napi;
  2327. }
  2328. }
  2329. /* configure RTH */
  2330. if (vdev->config.rth_steering) {
  2331. status = vxge_rth_configure(vdev);
  2332. if (status != VXGE_HW_OK) {
  2333. vxge_debug_init(VXGE_ERR,
  2334. "%s: fatal: RTH configuration failed",
  2335. dev->name);
  2336. ret = -EPERM;
  2337. goto out2;
  2338. }
  2339. }
  2340. printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
  2341. hldev->config.rth_en ? "enabled" : "disabled");
  2342. for (i = 0; i < vdev->no_of_vpath; i++) {
  2343. vpath = &vdev->vpaths[i];
  2344. /* set initial mtu before enabling the device */
  2345. status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
  2346. if (status != VXGE_HW_OK) {
  2347. vxge_debug_init(VXGE_ERR,
  2348. "%s: fatal: can not set new MTU", dev->name);
  2349. ret = -EPERM;
  2350. goto out2;
  2351. }
  2352. }
  2353. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
  2354. vxge_debug_init(vdev->level_trace,
  2355. "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
  2356. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
  2357. /* Restore the DA, VID table and also multicast and promiscuous mode
  2358. * states
  2359. */
  2360. if (vdev->all_multi_flg) {
  2361. for (i = 0; i < vdev->no_of_vpath; i++) {
  2362. vpath = &vdev->vpaths[i];
  2363. vxge_restore_vpath_mac_addr(vpath);
  2364. vxge_restore_vpath_vid_table(vpath);
  2365. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  2366. if (status != VXGE_HW_OK)
  2367. vxge_debug_init(VXGE_ERR,
  2368. "%s:%d Enabling multicast failed",
  2369. __func__, __LINE__);
  2370. }
  2371. }
  2372. /* Enable vpath to sniff all unicast/multicast traffic that not
  2373. * addressed to them. We allow promiscuous mode for PF only
  2374. */
  2375. val64 = 0;
  2376. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  2377. val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
  2378. vxge_hw_mgmt_reg_write(vdev->devh,
  2379. vxge_hw_mgmt_reg_type_mrpcim,
  2380. 0,
  2381. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2382. rxmac_authorize_all_addr),
  2383. val64);
  2384. vxge_hw_mgmt_reg_write(vdev->devh,
  2385. vxge_hw_mgmt_reg_type_mrpcim,
  2386. 0,
  2387. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2388. rxmac_authorize_all_vid),
  2389. val64);
  2390. vxge_set_multicast(dev);
  2391. /* Enabling Bcast and mcast for all vpath */
  2392. for (i = 0; i < vdev->no_of_vpath; i++) {
  2393. vpath = &vdev->vpaths[i];
  2394. status = vxge_hw_vpath_bcast_enable(vpath->handle);
  2395. if (status != VXGE_HW_OK)
  2396. vxge_debug_init(VXGE_ERR,
  2397. "%s : Can not enable bcast for vpath "
  2398. "id %d", dev->name, i);
  2399. if (vdev->config.addr_learn_en) {
  2400. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  2401. if (status != VXGE_HW_OK)
  2402. vxge_debug_init(VXGE_ERR,
  2403. "%s : Can not enable mcast for vpath "
  2404. "id %d", dev->name, i);
  2405. }
  2406. }
  2407. vxge_hw_device_setpause_data(vdev->devh, 0,
  2408. vdev->config.tx_pause_enable,
  2409. vdev->config.rx_pause_enable);
  2410. if (vdev->vp_reset_timer.function == NULL)
  2411. vxge_os_timer(&vdev->vp_reset_timer, vxge_poll_vp_reset,
  2412. HZ / 2);
  2413. /* There is no need to check for RxD leak and RxD lookup on Titan1A */
  2414. if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
  2415. vxge_os_timer(&vdev->vp_lockup_timer, vxge_poll_vp_lockup,
  2416. HZ / 2);
  2417. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2418. smp_wmb();
  2419. if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
  2420. netif_carrier_on(vdev->ndev);
  2421. netdev_notice(vdev->ndev, "Link Up\n");
  2422. vdev->stats.link_up++;
  2423. }
  2424. vxge_hw_device_intr_enable(vdev->devh);
  2425. smp_wmb();
  2426. for (i = 0; i < vdev->no_of_vpath; i++) {
  2427. vpath = &vdev->vpaths[i];
  2428. vxge_hw_vpath_enable(vpath->handle);
  2429. smp_wmb();
  2430. vxge_hw_vpath_rx_doorbell_init(vpath->handle);
  2431. }
  2432. netif_tx_start_all_queues(vdev->ndev);
  2433. /* configure CI */
  2434. vxge_config_ci_for_tti_rti(vdev);
  2435. goto out0;
  2436. out2:
  2437. vxge_rem_isr(vdev);
  2438. /* Disable napi */
  2439. if (vdev->config.intr_type != MSI_X)
  2440. napi_disable(&vdev->napi);
  2441. else {
  2442. for (i = 0; i < vdev->no_of_vpath; i++)
  2443. napi_disable(&vdev->vpaths[i].ring.napi);
  2444. }
  2445. out1:
  2446. vxge_close_vpaths(vdev, 0);
  2447. out0:
  2448. vxge_debug_entryexit(VXGE_TRACE,
  2449. "%s: %s:%d Exiting...",
  2450. dev->name, __func__, __LINE__);
  2451. return ret;
  2452. }
  2453. /* Loop through the mac address list and delete all the entries */
  2454. static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
  2455. {
  2456. struct list_head *entry, *next;
  2457. if (list_empty(&vpath->mac_addr_list))
  2458. return;
  2459. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  2460. list_del(entry);
  2461. kfree((struct vxge_mac_addrs *)entry);
  2462. }
  2463. }
  2464. static void vxge_napi_del_all(struct vxgedev *vdev)
  2465. {
  2466. int i;
  2467. if (vdev->config.intr_type != MSI_X)
  2468. netif_napi_del(&vdev->napi);
  2469. else {
  2470. for (i = 0; i < vdev->no_of_vpath; i++)
  2471. netif_napi_del(&vdev->vpaths[i].ring.napi);
  2472. }
  2473. }
  2474. static int do_vxge_close(struct net_device *dev, int do_io)
  2475. {
  2476. enum vxge_hw_status status;
  2477. struct vxgedev *vdev;
  2478. struct __vxge_hw_device *hldev;
  2479. int i;
  2480. u64 val64, vpath_vector;
  2481. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  2482. dev->name, __func__, __LINE__);
  2483. vdev = netdev_priv(dev);
  2484. hldev = pci_get_drvdata(vdev->pdev);
  2485. if (unlikely(!is_vxge_card_up(vdev)))
  2486. return 0;
  2487. /* If vxge_handle_crit_err task is executing,
  2488. * wait till it completes. */
  2489. while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  2490. msleep(50);
  2491. if (do_io) {
  2492. /* Put the vpath back in normal mode */
  2493. vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
  2494. status = vxge_hw_mgmt_reg_read(vdev->devh,
  2495. vxge_hw_mgmt_reg_type_mrpcim,
  2496. 0,
  2497. (ulong)offsetof(
  2498. struct vxge_hw_mrpcim_reg,
  2499. rts_mgr_cbasin_cfg),
  2500. &val64);
  2501. if (status == VXGE_HW_OK) {
  2502. val64 &= ~vpath_vector;
  2503. status = vxge_hw_mgmt_reg_write(vdev->devh,
  2504. vxge_hw_mgmt_reg_type_mrpcim,
  2505. 0,
  2506. (ulong)offsetof(
  2507. struct vxge_hw_mrpcim_reg,
  2508. rts_mgr_cbasin_cfg),
  2509. val64);
  2510. }
  2511. /* Remove the function 0 from promiscuous mode */
  2512. vxge_hw_mgmt_reg_write(vdev->devh,
  2513. vxge_hw_mgmt_reg_type_mrpcim,
  2514. 0,
  2515. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2516. rxmac_authorize_all_addr),
  2517. 0);
  2518. vxge_hw_mgmt_reg_write(vdev->devh,
  2519. vxge_hw_mgmt_reg_type_mrpcim,
  2520. 0,
  2521. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2522. rxmac_authorize_all_vid),
  2523. 0);
  2524. smp_wmb();
  2525. }
  2526. if (vdev->titan1)
  2527. del_timer_sync(&vdev->vp_lockup_timer);
  2528. del_timer_sync(&vdev->vp_reset_timer);
  2529. if (do_io)
  2530. vxge_hw_device_wait_receive_idle(hldev);
  2531. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2532. /* Disable napi */
  2533. if (vdev->config.intr_type != MSI_X)
  2534. napi_disable(&vdev->napi);
  2535. else {
  2536. for (i = 0; i < vdev->no_of_vpath; i++)
  2537. napi_disable(&vdev->vpaths[i].ring.napi);
  2538. }
  2539. netif_carrier_off(vdev->ndev);
  2540. netdev_notice(vdev->ndev, "Link Down\n");
  2541. netif_tx_stop_all_queues(vdev->ndev);
  2542. /* Note that at this point xmit() is stopped by upper layer */
  2543. if (do_io)
  2544. vxge_hw_device_intr_disable(vdev->devh);
  2545. vxge_rem_isr(vdev);
  2546. vxge_napi_del_all(vdev);
  2547. if (do_io)
  2548. vxge_reset_all_vpaths(vdev);
  2549. vxge_close_vpaths(vdev, 0);
  2550. vxge_debug_entryexit(VXGE_TRACE,
  2551. "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
  2552. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  2553. return 0;
  2554. }
  2555. /**
  2556. * vxge_close
  2557. * @dev: device pointer.
  2558. *
  2559. * This is the stop entry point of the driver. It needs to undo exactly
  2560. * whatever was done by the open entry point, thus it's usually referred to
  2561. * as the close function.Among other things this function mainly stops the
  2562. * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
  2563. * Return value: '0' on success and an appropriate (-)ve integer as
  2564. * defined in errno.h file on failure.
  2565. */
  2566. static int vxge_close(struct net_device *dev)
  2567. {
  2568. do_vxge_close(dev, 1);
  2569. return 0;
  2570. }
  2571. /**
  2572. * vxge_change_mtu
  2573. * @dev: net device pointer.
  2574. * @new_mtu :the new MTU size for the device.
  2575. *
  2576. * A driver entry point to change MTU size for the device. Before changing
  2577. * the MTU the device must be stopped.
  2578. */
  2579. static int vxge_change_mtu(struct net_device *dev, int new_mtu)
  2580. {
  2581. struct vxgedev *vdev = netdev_priv(dev);
  2582. vxge_debug_entryexit(vdev->level_trace,
  2583. "%s:%d", __func__, __LINE__);
  2584. /* check if device is down already */
  2585. if (unlikely(!is_vxge_card_up(vdev))) {
  2586. /* just store new value, will use later on open() */
  2587. dev->mtu = new_mtu;
  2588. vxge_debug_init(vdev->level_err,
  2589. "%s", "device is down on MTU change");
  2590. return 0;
  2591. }
  2592. vxge_debug_init(vdev->level_trace,
  2593. "trying to apply new MTU %d", new_mtu);
  2594. if (vxge_close(dev))
  2595. return -EIO;
  2596. dev->mtu = new_mtu;
  2597. vdev->mtu = new_mtu;
  2598. if (vxge_open(dev))
  2599. return -EIO;
  2600. vxge_debug_init(vdev->level_trace,
  2601. "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
  2602. vxge_debug_entryexit(vdev->level_trace,
  2603. "%s:%d Exiting...", __func__, __LINE__);
  2604. return 0;
  2605. }
  2606. /**
  2607. * vxge_get_stats64
  2608. * @dev: pointer to the device structure
  2609. * @stats: pointer to struct rtnl_link_stats64
  2610. *
  2611. */
  2612. static void
  2613. vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
  2614. {
  2615. struct vxgedev *vdev = netdev_priv(dev);
  2616. int k;
  2617. /* net_stats already zeroed by caller */
  2618. for (k = 0; k < vdev->no_of_vpath; k++) {
  2619. struct vxge_ring_stats *rxstats = &vdev->vpaths[k].ring.stats;
  2620. struct vxge_fifo_stats *txstats = &vdev->vpaths[k].fifo.stats;
  2621. unsigned int start;
  2622. u64 packets, bytes, multicast;
  2623. do {
  2624. start = u64_stats_fetch_begin_irq(&rxstats->syncp);
  2625. packets = rxstats->rx_frms;
  2626. multicast = rxstats->rx_mcast;
  2627. bytes = rxstats->rx_bytes;
  2628. } while (u64_stats_fetch_retry_irq(&rxstats->syncp, start));
  2629. net_stats->rx_packets += packets;
  2630. net_stats->rx_bytes += bytes;
  2631. net_stats->multicast += multicast;
  2632. net_stats->rx_errors += rxstats->rx_errors;
  2633. net_stats->rx_dropped += rxstats->rx_dropped;
  2634. do {
  2635. start = u64_stats_fetch_begin_irq(&txstats->syncp);
  2636. packets = txstats->tx_frms;
  2637. bytes = txstats->tx_bytes;
  2638. } while (u64_stats_fetch_retry_irq(&txstats->syncp, start));
  2639. net_stats->tx_packets += packets;
  2640. net_stats->tx_bytes += bytes;
  2641. net_stats->tx_errors += txstats->tx_errors;
  2642. }
  2643. }
  2644. static enum vxge_hw_status vxge_timestamp_config(struct __vxge_hw_device *devh)
  2645. {
  2646. enum vxge_hw_status status;
  2647. u64 val64;
  2648. /* Timestamp is passed to the driver via the FCS, therefore we
  2649. * must disable the FCS stripping by the adapter. Since this is
  2650. * required for the driver to load (due to a hardware bug),
  2651. * there is no need to do anything special here.
  2652. */
  2653. val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
  2654. VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
  2655. VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
  2656. status = vxge_hw_mgmt_reg_write(devh,
  2657. vxge_hw_mgmt_reg_type_mrpcim,
  2658. 0,
  2659. offsetof(struct vxge_hw_mrpcim_reg,
  2660. xmac_timestamp),
  2661. val64);
  2662. vxge_hw_device_flush_io(devh);
  2663. devh->config.hwts_en = VXGE_HW_HWTS_ENABLE;
  2664. return status;
  2665. }
  2666. static int vxge_hwtstamp_set(struct vxgedev *vdev, void __user *data)
  2667. {
  2668. struct hwtstamp_config config;
  2669. int i;
  2670. if (copy_from_user(&config, data, sizeof(config)))
  2671. return -EFAULT;
  2672. /* reserved for future extensions */
  2673. if (config.flags)
  2674. return -EINVAL;
  2675. /* Transmit HW Timestamp not supported */
  2676. switch (config.tx_type) {
  2677. case HWTSTAMP_TX_OFF:
  2678. break;
  2679. case HWTSTAMP_TX_ON:
  2680. default:
  2681. return -ERANGE;
  2682. }
  2683. switch (config.rx_filter) {
  2684. case HWTSTAMP_FILTER_NONE:
  2685. vdev->rx_hwts = 0;
  2686. config.rx_filter = HWTSTAMP_FILTER_NONE;
  2687. break;
  2688. case HWTSTAMP_FILTER_ALL:
  2689. case HWTSTAMP_FILTER_SOME:
  2690. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  2691. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  2692. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  2693. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  2694. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  2695. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  2696. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  2697. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  2698. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  2699. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  2700. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  2701. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  2702. case HWTSTAMP_FILTER_NTP_ALL:
  2703. if (vdev->devh->config.hwts_en != VXGE_HW_HWTS_ENABLE)
  2704. return -EFAULT;
  2705. vdev->rx_hwts = 1;
  2706. config.rx_filter = HWTSTAMP_FILTER_ALL;
  2707. break;
  2708. default:
  2709. return -ERANGE;
  2710. }
  2711. for (i = 0; i < vdev->no_of_vpath; i++)
  2712. vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
  2713. if (copy_to_user(data, &config, sizeof(config)))
  2714. return -EFAULT;
  2715. return 0;
  2716. }
  2717. static int vxge_hwtstamp_get(struct vxgedev *vdev, void __user *data)
  2718. {
  2719. struct hwtstamp_config config;
  2720. config.flags = 0;
  2721. config.tx_type = HWTSTAMP_TX_OFF;
  2722. config.rx_filter = (vdev->rx_hwts ?
  2723. HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE);
  2724. if (copy_to_user(data, &config, sizeof(config)))
  2725. return -EFAULT;
  2726. return 0;
  2727. }
  2728. /**
  2729. * vxge_ioctl
  2730. * @dev: Device pointer.
  2731. * @ifr: An IOCTL specific structure, that can contain a pointer to
  2732. * a proprietary structure used to pass information to the driver.
  2733. * @cmd: This is used to distinguish between the different commands that
  2734. * can be passed to the IOCTL functions.
  2735. *
  2736. * Entry point for the Ioctl.
  2737. */
  2738. static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  2739. {
  2740. struct vxgedev *vdev = netdev_priv(dev);
  2741. switch (cmd) {
  2742. case SIOCSHWTSTAMP:
  2743. return vxge_hwtstamp_set(vdev, rq->ifr_data);
  2744. case SIOCGHWTSTAMP:
  2745. return vxge_hwtstamp_get(vdev, rq->ifr_data);
  2746. default:
  2747. return -EOPNOTSUPP;
  2748. }
  2749. }
  2750. /**
  2751. * vxge_tx_watchdog
  2752. * @dev: pointer to net device structure
  2753. *
  2754. * Watchdog for transmit side.
  2755. * This function is triggered if the Tx Queue is stopped
  2756. * for a pre-defined amount of time when the Interface is still up.
  2757. */
  2758. static void vxge_tx_watchdog(struct net_device *dev)
  2759. {
  2760. struct vxgedev *vdev;
  2761. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2762. vdev = netdev_priv(dev);
  2763. vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
  2764. schedule_work(&vdev->reset_task);
  2765. vxge_debug_entryexit(VXGE_TRACE,
  2766. "%s:%d Exiting...", __func__, __LINE__);
  2767. }
  2768. /**
  2769. * vxge_vlan_rx_add_vid
  2770. * @dev: net device pointer.
  2771. * @proto: vlan protocol
  2772. * @vid: vid
  2773. *
  2774. * Add the vlan id to the devices vlan id table
  2775. */
  2776. static int
  2777. vxge_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
  2778. {
  2779. struct vxgedev *vdev = netdev_priv(dev);
  2780. struct vxge_vpath *vpath;
  2781. int vp_id;
  2782. /* Add these vlan to the vid table */
  2783. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2784. vpath = &vdev->vpaths[vp_id];
  2785. if (!vpath->is_open)
  2786. continue;
  2787. vxge_hw_vpath_vid_add(vpath->handle, vid);
  2788. }
  2789. set_bit(vid, vdev->active_vlans);
  2790. return 0;
  2791. }
  2792. /**
  2793. * vxge_vlan_rx_kill_vid
  2794. * @dev: net device pointer.
  2795. * @proto: vlan protocol
  2796. * @vid: vid
  2797. *
  2798. * Remove the vlan id from the device's vlan id table
  2799. */
  2800. static int
  2801. vxge_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
  2802. {
  2803. struct vxgedev *vdev = netdev_priv(dev);
  2804. struct vxge_vpath *vpath;
  2805. int vp_id;
  2806. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2807. /* Delete this vlan from the vid table */
  2808. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2809. vpath = &vdev->vpaths[vp_id];
  2810. if (!vpath->is_open)
  2811. continue;
  2812. vxge_hw_vpath_vid_delete(vpath->handle, vid);
  2813. }
  2814. vxge_debug_entryexit(VXGE_TRACE,
  2815. "%s:%d Exiting...", __func__, __LINE__);
  2816. clear_bit(vid, vdev->active_vlans);
  2817. return 0;
  2818. }
  2819. static const struct net_device_ops vxge_netdev_ops = {
  2820. .ndo_open = vxge_open,
  2821. .ndo_stop = vxge_close,
  2822. .ndo_get_stats64 = vxge_get_stats64,
  2823. .ndo_start_xmit = vxge_xmit,
  2824. .ndo_validate_addr = eth_validate_addr,
  2825. .ndo_set_rx_mode = vxge_set_multicast,
  2826. .ndo_do_ioctl = vxge_ioctl,
  2827. .ndo_set_mac_address = vxge_set_mac_addr,
  2828. .ndo_change_mtu = vxge_change_mtu,
  2829. .ndo_fix_features = vxge_fix_features,
  2830. .ndo_set_features = vxge_set_features,
  2831. .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
  2832. .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
  2833. .ndo_tx_timeout = vxge_tx_watchdog,
  2834. #ifdef CONFIG_NET_POLL_CONTROLLER
  2835. .ndo_poll_controller = vxge_netpoll,
  2836. #endif
  2837. };
  2838. static int vxge_device_register(struct __vxge_hw_device *hldev,
  2839. struct vxge_config *config, int high_dma,
  2840. int no_of_vpath, struct vxgedev **vdev_out)
  2841. {
  2842. struct net_device *ndev;
  2843. enum vxge_hw_status status = VXGE_HW_OK;
  2844. struct vxgedev *vdev;
  2845. int ret = 0, no_of_queue = 1;
  2846. u64 stat;
  2847. *vdev_out = NULL;
  2848. if (config->tx_steering_type)
  2849. no_of_queue = no_of_vpath;
  2850. ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
  2851. no_of_queue);
  2852. if (ndev == NULL) {
  2853. vxge_debug_init(
  2854. vxge_hw_device_trace_level_get(hldev),
  2855. "%s : device allocation failed", __func__);
  2856. ret = -ENODEV;
  2857. goto _out0;
  2858. }
  2859. vxge_debug_entryexit(
  2860. vxge_hw_device_trace_level_get(hldev),
  2861. "%s: %s:%d Entering...",
  2862. ndev->name, __func__, __LINE__);
  2863. vdev = netdev_priv(ndev);
  2864. memset(vdev, 0, sizeof(struct vxgedev));
  2865. vdev->ndev = ndev;
  2866. vdev->devh = hldev;
  2867. vdev->pdev = hldev->pdev;
  2868. memcpy(&vdev->config, config, sizeof(struct vxge_config));
  2869. vdev->rx_hwts = 0;
  2870. vdev->titan1 = (vdev->pdev->revision == VXGE_HW_TITAN1_PCI_REVISION);
  2871. SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
  2872. ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_SG |
  2873. NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2874. NETIF_F_TSO | NETIF_F_TSO6 |
  2875. NETIF_F_HW_VLAN_CTAG_TX;
  2876. if (vdev->config.rth_steering != NO_STEERING)
  2877. ndev->hw_features |= NETIF_F_RXHASH;
  2878. ndev->features |= ndev->hw_features |
  2879. NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_FILTER;
  2880. ndev->netdev_ops = &vxge_netdev_ops;
  2881. ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
  2882. INIT_WORK(&vdev->reset_task, vxge_reset);
  2883. vxge_initialize_ethtool_ops(ndev);
  2884. /* Allocate memory for vpath */
  2885. vdev->vpaths = kcalloc(no_of_vpath, sizeof(struct vxge_vpath),
  2886. GFP_KERNEL);
  2887. if (!vdev->vpaths) {
  2888. vxge_debug_init(VXGE_ERR,
  2889. "%s: vpath memory allocation failed",
  2890. vdev->ndev->name);
  2891. ret = -ENOMEM;
  2892. goto _out1;
  2893. }
  2894. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2895. "%s : checksumming enabled", __func__);
  2896. if (high_dma) {
  2897. ndev->features |= NETIF_F_HIGHDMA;
  2898. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2899. "%s : using High DMA", __func__);
  2900. }
  2901. /* MTU range: 68 - 9600 */
  2902. ndev->min_mtu = VXGE_HW_MIN_MTU;
  2903. ndev->max_mtu = VXGE_HW_MAX_MTU;
  2904. ret = register_netdev(ndev);
  2905. if (ret) {
  2906. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2907. "%s: %s : device registration failed!",
  2908. ndev->name, __func__);
  2909. goto _out2;
  2910. }
  2911. /* Set the factory defined MAC address initially */
  2912. ndev->addr_len = ETH_ALEN;
  2913. /* Make Link state as off at this point, when the Link change
  2914. * interrupt comes the state will be automatically changed to
  2915. * the right state.
  2916. */
  2917. netif_carrier_off(ndev);
  2918. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2919. "%s: Ethernet device registered",
  2920. ndev->name);
  2921. hldev->ndev = ndev;
  2922. *vdev_out = vdev;
  2923. /* Resetting the Device stats */
  2924. status = vxge_hw_mrpcim_stats_access(
  2925. hldev,
  2926. VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
  2927. 0,
  2928. 0,
  2929. &stat);
  2930. if (status == VXGE_HW_ERR_PRIVILEGED_OPERATION)
  2931. vxge_debug_init(
  2932. vxge_hw_device_trace_level_get(hldev),
  2933. "%s: device stats clear returns"
  2934. "VXGE_HW_ERR_PRIVILEGED_OPERATION", ndev->name);
  2935. vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
  2936. "%s: %s:%d Exiting...",
  2937. ndev->name, __func__, __LINE__);
  2938. return ret;
  2939. _out2:
  2940. kfree(vdev->vpaths);
  2941. _out1:
  2942. free_netdev(ndev);
  2943. _out0:
  2944. return ret;
  2945. }
  2946. /*
  2947. * vxge_device_unregister
  2948. *
  2949. * This function will unregister and free network device
  2950. */
  2951. static void vxge_device_unregister(struct __vxge_hw_device *hldev)
  2952. {
  2953. struct vxgedev *vdev;
  2954. struct net_device *dev;
  2955. char buf[IFNAMSIZ];
  2956. dev = hldev->ndev;
  2957. vdev = netdev_priv(dev);
  2958. vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
  2959. __func__, __LINE__);
  2960. strlcpy(buf, dev->name, IFNAMSIZ);
  2961. flush_work(&vdev->reset_task);
  2962. /* in 2.6 will call stop() if device is up */
  2963. unregister_netdev(dev);
  2964. kfree(vdev->vpaths);
  2965. /* we are safe to free it now */
  2966. free_netdev(dev);
  2967. vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
  2968. buf);
  2969. vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
  2970. __func__, __LINE__);
  2971. }
  2972. /*
  2973. * vxge_callback_crit_err
  2974. *
  2975. * This function is called by the alarm handler in interrupt context.
  2976. * Driver must analyze it based on the event type.
  2977. */
  2978. static void
  2979. vxge_callback_crit_err(struct __vxge_hw_device *hldev,
  2980. enum vxge_hw_event type, u64 vp_id)
  2981. {
  2982. struct net_device *dev = hldev->ndev;
  2983. struct vxgedev *vdev = netdev_priv(dev);
  2984. struct vxge_vpath *vpath = NULL;
  2985. int vpath_idx;
  2986. vxge_debug_entryexit(vdev->level_trace,
  2987. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  2988. /* Note: This event type should be used for device wide
  2989. * indications only - Serious errors, Slot freeze and critical errors
  2990. */
  2991. vdev->cric_err_event = type;
  2992. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  2993. vpath = &vdev->vpaths[vpath_idx];
  2994. if (vpath->device_id == vp_id)
  2995. break;
  2996. }
  2997. if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
  2998. if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
  2999. vxge_debug_init(VXGE_ERR,
  3000. "%s: Slot is frozen", vdev->ndev->name);
  3001. } else if (type == VXGE_HW_EVENT_SERR) {
  3002. vxge_debug_init(VXGE_ERR,
  3003. "%s: Encountered Serious Error",
  3004. vdev->ndev->name);
  3005. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
  3006. vxge_debug_init(VXGE_ERR,
  3007. "%s: Encountered Critical Error",
  3008. vdev->ndev->name);
  3009. }
  3010. if ((type == VXGE_HW_EVENT_SERR) ||
  3011. (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
  3012. if (unlikely(vdev->exec_mode))
  3013. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  3014. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
  3015. vxge_hw_device_mask_all(hldev);
  3016. if (unlikely(vdev->exec_mode))
  3017. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  3018. } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
  3019. (type == VXGE_HW_EVENT_VPATH_ERR)) {
  3020. if (unlikely(vdev->exec_mode))
  3021. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  3022. else {
  3023. /* check if this vpath is already set for reset */
  3024. if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
  3025. /* disable interrupts for this vpath */
  3026. vxge_vpath_intr_disable(vdev, vpath_idx);
  3027. /* stop the queue for this vpath */
  3028. netif_tx_stop_queue(vpath->fifo.txq);
  3029. }
  3030. }
  3031. }
  3032. vxge_debug_entryexit(vdev->level_trace,
  3033. "%s: %s:%d Exiting...",
  3034. vdev->ndev->name, __func__, __LINE__);
  3035. }
  3036. static void verify_bandwidth(void)
  3037. {
  3038. int i, band_width, total = 0, equal_priority = 0;
  3039. /* 1. If user enters 0 for some fifo, give equal priority to all */
  3040. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3041. if (bw_percentage[i] == 0) {
  3042. equal_priority = 1;
  3043. break;
  3044. }
  3045. }
  3046. if (!equal_priority) {
  3047. /* 2. If sum exceeds 100, give equal priority to all */
  3048. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3049. if (bw_percentage[i] == 0xFF)
  3050. break;
  3051. total += bw_percentage[i];
  3052. if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
  3053. equal_priority = 1;
  3054. break;
  3055. }
  3056. }
  3057. }
  3058. if (!equal_priority) {
  3059. /* Is all the bandwidth consumed? */
  3060. if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
  3061. if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
  3062. /* Split rest of bw equally among next VPs*/
  3063. band_width =
  3064. (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
  3065. (VXGE_HW_MAX_VIRTUAL_PATHS - i);
  3066. if (band_width < 2) /* min of 2% */
  3067. equal_priority = 1;
  3068. else {
  3069. for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
  3070. i++)
  3071. bw_percentage[i] =
  3072. band_width;
  3073. }
  3074. }
  3075. } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
  3076. equal_priority = 1;
  3077. }
  3078. if (equal_priority) {
  3079. vxge_debug_init(VXGE_ERR,
  3080. "%s: Assigning equal bandwidth to all the vpaths",
  3081. VXGE_DRIVER_NAME);
  3082. bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
  3083. VXGE_HW_MAX_VIRTUAL_PATHS;
  3084. for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3085. bw_percentage[i] = bw_percentage[0];
  3086. }
  3087. }
  3088. /*
  3089. * Vpath configuration
  3090. */
  3091. static int vxge_config_vpaths(struct vxge_hw_device_config *device_config,
  3092. u64 vpath_mask, struct vxge_config *config_param)
  3093. {
  3094. int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
  3095. u32 txdl_size, txdl_per_memblock;
  3096. temp = driver_config->vpath_per_dev;
  3097. if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
  3098. (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
  3099. /* No more CPU. Return vpath number as zero.*/
  3100. if (driver_config->g_no_cpus == -1)
  3101. return 0;
  3102. if (!driver_config->g_no_cpus)
  3103. driver_config->g_no_cpus =
  3104. netif_get_num_default_rss_queues();
  3105. driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
  3106. if (!driver_config->vpath_per_dev)
  3107. driver_config->vpath_per_dev = 1;
  3108. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3109. if (!vxge_bVALn(vpath_mask, i, 1))
  3110. continue;
  3111. else
  3112. default_no_vpath++;
  3113. if (default_no_vpath < driver_config->vpath_per_dev)
  3114. driver_config->vpath_per_dev = default_no_vpath;
  3115. driver_config->g_no_cpus = driver_config->g_no_cpus -
  3116. (driver_config->vpath_per_dev * 2);
  3117. if (driver_config->g_no_cpus <= 0)
  3118. driver_config->g_no_cpus = -1;
  3119. }
  3120. if (driver_config->vpath_per_dev == 1) {
  3121. vxge_debug_ll_config(VXGE_TRACE,
  3122. "%s: Disable tx and rx steering, "
  3123. "as single vpath is configured", VXGE_DRIVER_NAME);
  3124. config_param->rth_steering = NO_STEERING;
  3125. config_param->tx_steering_type = NO_STEERING;
  3126. device_config->rth_en = 0;
  3127. }
  3128. /* configure bandwidth */
  3129. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3130. device_config->vp_config[i].min_bandwidth = bw_percentage[i];
  3131. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3132. device_config->vp_config[i].vp_id = i;
  3133. device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
  3134. if (no_of_vpaths < driver_config->vpath_per_dev) {
  3135. if (!vxge_bVALn(vpath_mask, i, 1)) {
  3136. vxge_debug_ll_config(VXGE_TRACE,
  3137. "%s: vpath: %d is not available",
  3138. VXGE_DRIVER_NAME, i);
  3139. continue;
  3140. } else {
  3141. vxge_debug_ll_config(VXGE_TRACE,
  3142. "%s: vpath: %d available",
  3143. VXGE_DRIVER_NAME, i);
  3144. no_of_vpaths++;
  3145. }
  3146. } else {
  3147. vxge_debug_ll_config(VXGE_TRACE,
  3148. "%s: vpath: %d is not configured, "
  3149. "max_config_vpath exceeded",
  3150. VXGE_DRIVER_NAME, i);
  3151. break;
  3152. }
  3153. /* Configure Tx fifo's */
  3154. device_config->vp_config[i].fifo.enable =
  3155. VXGE_HW_FIFO_ENABLE;
  3156. device_config->vp_config[i].fifo.max_frags =
  3157. MAX_SKB_FRAGS + 1;
  3158. device_config->vp_config[i].fifo.memblock_size =
  3159. VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
  3160. txdl_size = device_config->vp_config[i].fifo.max_frags *
  3161. sizeof(struct vxge_hw_fifo_txd);
  3162. txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
  3163. device_config->vp_config[i].fifo.fifo_blocks =
  3164. ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
  3165. device_config->vp_config[i].fifo.intr =
  3166. VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
  3167. /* Configure tti properties */
  3168. device_config->vp_config[i].tti.intr_enable =
  3169. VXGE_HW_TIM_INTR_ENABLE;
  3170. device_config->vp_config[i].tti.btimer_val =
  3171. (VXGE_TTI_BTIMER_VAL * 1000) / 272;
  3172. device_config->vp_config[i].tti.timer_ac_en =
  3173. VXGE_HW_TIM_TIMER_AC_ENABLE;
  3174. /* For msi-x with napi (each vector has a handler of its own) -
  3175. * Set CI to OFF for all vpaths
  3176. */
  3177. device_config->vp_config[i].tti.timer_ci_en =
  3178. VXGE_HW_TIM_TIMER_CI_DISABLE;
  3179. device_config->vp_config[i].tti.timer_ri_en =
  3180. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3181. device_config->vp_config[i].tti.util_sel =
  3182. VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
  3183. device_config->vp_config[i].tti.ltimer_val =
  3184. (VXGE_TTI_LTIMER_VAL * 1000) / 272;
  3185. device_config->vp_config[i].tti.rtimer_val =
  3186. (VXGE_TTI_RTIMER_VAL * 1000) / 272;
  3187. device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
  3188. device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
  3189. device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
  3190. device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
  3191. device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
  3192. device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
  3193. device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
  3194. /* Configure Rx rings */
  3195. device_config->vp_config[i].ring.enable =
  3196. VXGE_HW_RING_ENABLE;
  3197. device_config->vp_config[i].ring.ring_blocks =
  3198. VXGE_HW_DEF_RING_BLOCKS;
  3199. device_config->vp_config[i].ring.buffer_mode =
  3200. VXGE_HW_RING_RXD_BUFFER_MODE_1;
  3201. device_config->vp_config[i].ring.rxds_limit =
  3202. VXGE_HW_DEF_RING_RXDS_LIMIT;
  3203. device_config->vp_config[i].ring.scatter_mode =
  3204. VXGE_HW_RING_SCATTER_MODE_A;
  3205. /* Configure rti properties */
  3206. device_config->vp_config[i].rti.intr_enable =
  3207. VXGE_HW_TIM_INTR_ENABLE;
  3208. device_config->vp_config[i].rti.btimer_val =
  3209. (VXGE_RTI_BTIMER_VAL * 1000)/272;
  3210. device_config->vp_config[i].rti.timer_ac_en =
  3211. VXGE_HW_TIM_TIMER_AC_ENABLE;
  3212. device_config->vp_config[i].rti.timer_ci_en =
  3213. VXGE_HW_TIM_TIMER_CI_DISABLE;
  3214. device_config->vp_config[i].rti.timer_ri_en =
  3215. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3216. device_config->vp_config[i].rti.util_sel =
  3217. VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
  3218. device_config->vp_config[i].rti.urange_a =
  3219. RTI_RX_URANGE_A;
  3220. device_config->vp_config[i].rti.urange_b =
  3221. RTI_RX_URANGE_B;
  3222. device_config->vp_config[i].rti.urange_c =
  3223. RTI_RX_URANGE_C;
  3224. device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
  3225. device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
  3226. device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
  3227. device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
  3228. device_config->vp_config[i].rti.rtimer_val =
  3229. (VXGE_RTI_RTIMER_VAL * 1000) / 272;
  3230. device_config->vp_config[i].rti.ltimer_val =
  3231. (VXGE_RTI_LTIMER_VAL * 1000) / 272;
  3232. device_config->vp_config[i].rpa_strip_vlan_tag =
  3233. vlan_tag_strip;
  3234. }
  3235. driver_config->vpath_per_dev = temp;
  3236. return no_of_vpaths;
  3237. }
  3238. /* initialize device configuratrions */
  3239. static void vxge_device_config_init(struct vxge_hw_device_config *device_config,
  3240. int *intr_type)
  3241. {
  3242. /* Used for CQRQ/SRQ. */
  3243. device_config->dma_blockpool_initial =
  3244. VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
  3245. device_config->dma_blockpool_max =
  3246. VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
  3247. if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
  3248. max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
  3249. if (!IS_ENABLED(CONFIG_PCI_MSI)) {
  3250. vxge_debug_init(VXGE_ERR,
  3251. "%s: This Kernel does not support "
  3252. "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
  3253. *intr_type = INTA;
  3254. }
  3255. /* Configure whether MSI-X or IRQL. */
  3256. switch (*intr_type) {
  3257. case INTA:
  3258. device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
  3259. break;
  3260. case MSI_X:
  3261. device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX_ONE_SHOT;
  3262. break;
  3263. }
  3264. /* Timer period between device poll */
  3265. device_config->device_poll_millis = VXGE_TIMER_DELAY;
  3266. /* Configure mac based steering. */
  3267. device_config->rts_mac_en = addr_learn_en;
  3268. /* Configure Vpaths */
  3269. device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
  3270. vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
  3271. __func__);
  3272. vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
  3273. device_config->intr_mode);
  3274. vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
  3275. device_config->device_poll_millis);
  3276. vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
  3277. device_config->rth_en);
  3278. vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
  3279. device_config->rth_it_type);
  3280. }
  3281. static void vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
  3282. {
  3283. int i;
  3284. vxge_debug_init(VXGE_TRACE,
  3285. "%s: %d Vpath(s) opened",
  3286. vdev->ndev->name, vdev->no_of_vpath);
  3287. switch (vdev->config.intr_type) {
  3288. case INTA:
  3289. vxge_debug_init(VXGE_TRACE,
  3290. "%s: Interrupt type INTA", vdev->ndev->name);
  3291. break;
  3292. case MSI_X:
  3293. vxge_debug_init(VXGE_TRACE,
  3294. "%s: Interrupt type MSI-X", vdev->ndev->name);
  3295. break;
  3296. }
  3297. if (vdev->config.rth_steering) {
  3298. vxge_debug_init(VXGE_TRACE,
  3299. "%s: RTH steering enabled for TCP_IPV4",
  3300. vdev->ndev->name);
  3301. } else {
  3302. vxge_debug_init(VXGE_TRACE,
  3303. "%s: RTH steering disabled", vdev->ndev->name);
  3304. }
  3305. switch (vdev->config.tx_steering_type) {
  3306. case NO_STEERING:
  3307. vxge_debug_init(VXGE_TRACE,
  3308. "%s: Tx steering disabled", vdev->ndev->name);
  3309. break;
  3310. case TX_PRIORITY_STEERING:
  3311. vxge_debug_init(VXGE_TRACE,
  3312. "%s: Unsupported tx steering option",
  3313. vdev->ndev->name);
  3314. vxge_debug_init(VXGE_TRACE,
  3315. "%s: Tx steering disabled", vdev->ndev->name);
  3316. vdev->config.tx_steering_type = 0;
  3317. break;
  3318. case TX_VLAN_STEERING:
  3319. vxge_debug_init(VXGE_TRACE,
  3320. "%s: Unsupported tx steering option",
  3321. vdev->ndev->name);
  3322. vxge_debug_init(VXGE_TRACE,
  3323. "%s: Tx steering disabled", vdev->ndev->name);
  3324. vdev->config.tx_steering_type = 0;
  3325. break;
  3326. case TX_MULTIQ_STEERING:
  3327. vxge_debug_init(VXGE_TRACE,
  3328. "%s: Tx multiqueue steering enabled",
  3329. vdev->ndev->name);
  3330. break;
  3331. case TX_PORT_STEERING:
  3332. vxge_debug_init(VXGE_TRACE,
  3333. "%s: Tx port steering enabled",
  3334. vdev->ndev->name);
  3335. break;
  3336. default:
  3337. vxge_debug_init(VXGE_ERR,
  3338. "%s: Unsupported tx steering type",
  3339. vdev->ndev->name);
  3340. vxge_debug_init(VXGE_TRACE,
  3341. "%s: Tx steering disabled", vdev->ndev->name);
  3342. vdev->config.tx_steering_type = 0;
  3343. }
  3344. if (vdev->config.addr_learn_en)
  3345. vxge_debug_init(VXGE_TRACE,
  3346. "%s: MAC Address learning enabled", vdev->ndev->name);
  3347. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3348. if (!vxge_bVALn(vpath_mask, i, 1))
  3349. continue;
  3350. vxge_debug_ll_config(VXGE_TRACE,
  3351. "%s: MTU size - %d", vdev->ndev->name,
  3352. ((vdev->devh))->
  3353. config.vp_config[i].mtu);
  3354. vxge_debug_init(VXGE_TRACE,
  3355. "%s: VLAN tag stripping %s", vdev->ndev->name,
  3356. ((vdev->devh))->
  3357. config.vp_config[i].rpa_strip_vlan_tag
  3358. ? "Enabled" : "Disabled");
  3359. vxge_debug_ll_config(VXGE_TRACE,
  3360. "%s: Max frags : %d", vdev->ndev->name,
  3361. ((vdev->devh))->
  3362. config.vp_config[i].fifo.max_frags);
  3363. break;
  3364. }
  3365. }
  3366. #ifdef CONFIG_PM
  3367. /**
  3368. * vxge_pm_suspend - vxge power management suspend entry point
  3369. *
  3370. */
  3371. static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
  3372. {
  3373. return -ENOSYS;
  3374. }
  3375. /**
  3376. * vxge_pm_resume - vxge power management resume entry point
  3377. *
  3378. */
  3379. static int vxge_pm_resume(struct pci_dev *pdev)
  3380. {
  3381. return -ENOSYS;
  3382. }
  3383. #endif
  3384. /**
  3385. * vxge_io_error_detected - called when PCI error is detected
  3386. * @pdev: Pointer to PCI device
  3387. * @state: The current pci connection state
  3388. *
  3389. * This function is called after a PCI bus error affecting
  3390. * this device has been detected.
  3391. */
  3392. static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
  3393. pci_channel_state_t state)
  3394. {
  3395. struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
  3396. struct net_device *netdev = hldev->ndev;
  3397. netif_device_detach(netdev);
  3398. if (state == pci_channel_io_perm_failure)
  3399. return PCI_ERS_RESULT_DISCONNECT;
  3400. if (netif_running(netdev)) {
  3401. /* Bring down the card, while avoiding PCI I/O */
  3402. do_vxge_close(netdev, 0);
  3403. }
  3404. pci_disable_device(pdev);
  3405. return PCI_ERS_RESULT_NEED_RESET;
  3406. }
  3407. /**
  3408. * vxge_io_slot_reset - called after the pci bus has been reset.
  3409. * @pdev: Pointer to PCI device
  3410. *
  3411. * Restart the card from scratch, as if from a cold-boot.
  3412. * At this point, the card has exprienced a hard reset,
  3413. * followed by fixups by BIOS, and has its config space
  3414. * set up identically to what it was at cold boot.
  3415. */
  3416. static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
  3417. {
  3418. struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
  3419. struct net_device *netdev = hldev->ndev;
  3420. struct vxgedev *vdev = netdev_priv(netdev);
  3421. if (pci_enable_device(pdev)) {
  3422. netdev_err(netdev, "Cannot re-enable device after reset\n");
  3423. return PCI_ERS_RESULT_DISCONNECT;
  3424. }
  3425. pci_set_master(pdev);
  3426. do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
  3427. return PCI_ERS_RESULT_RECOVERED;
  3428. }
  3429. /**
  3430. * vxge_io_resume - called when traffic can start flowing again.
  3431. * @pdev: Pointer to PCI device
  3432. *
  3433. * This callback is called when the error recovery driver tells
  3434. * us that its OK to resume normal operation.
  3435. */
  3436. static void vxge_io_resume(struct pci_dev *pdev)
  3437. {
  3438. struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
  3439. struct net_device *netdev = hldev->ndev;
  3440. if (netif_running(netdev)) {
  3441. if (vxge_open(netdev)) {
  3442. netdev_err(netdev,
  3443. "Can't bring device back up after reset\n");
  3444. return;
  3445. }
  3446. }
  3447. netif_device_attach(netdev);
  3448. }
  3449. static inline u32 vxge_get_num_vfs(u64 function_mode)
  3450. {
  3451. u32 num_functions = 0;
  3452. switch (function_mode) {
  3453. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
  3454. case VXGE_HW_FUNCTION_MODE_SRIOV_8:
  3455. num_functions = 8;
  3456. break;
  3457. case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
  3458. num_functions = 1;
  3459. break;
  3460. case VXGE_HW_FUNCTION_MODE_SRIOV:
  3461. case VXGE_HW_FUNCTION_MODE_MRIOV:
  3462. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
  3463. num_functions = 17;
  3464. break;
  3465. case VXGE_HW_FUNCTION_MODE_SRIOV_4:
  3466. num_functions = 4;
  3467. break;
  3468. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
  3469. num_functions = 2;
  3470. break;
  3471. case VXGE_HW_FUNCTION_MODE_MRIOV_8:
  3472. num_functions = 8; /* TODO */
  3473. break;
  3474. }
  3475. return num_functions;
  3476. }
  3477. int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
  3478. {
  3479. struct __vxge_hw_device *hldev = vdev->devh;
  3480. u32 maj, min, bld, cmaj, cmin, cbld;
  3481. enum vxge_hw_status status;
  3482. const struct firmware *fw;
  3483. int ret;
  3484. ret = request_firmware(&fw, fw_name, &vdev->pdev->dev);
  3485. if (ret) {
  3486. vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
  3487. VXGE_DRIVER_NAME, fw_name);
  3488. goto out;
  3489. }
  3490. /* Load the new firmware onto the adapter */
  3491. status = vxge_update_fw_image(hldev, fw->data, fw->size);
  3492. if (status != VXGE_HW_OK) {
  3493. vxge_debug_init(VXGE_ERR,
  3494. "%s: FW image download to adapter failed '%s'.",
  3495. VXGE_DRIVER_NAME, fw_name);
  3496. ret = -EIO;
  3497. goto out;
  3498. }
  3499. /* Read the version of the new firmware */
  3500. status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
  3501. if (status != VXGE_HW_OK) {
  3502. vxge_debug_init(VXGE_ERR,
  3503. "%s: Upgrade read version failed '%s'.",
  3504. VXGE_DRIVER_NAME, fw_name);
  3505. ret = -EIO;
  3506. goto out;
  3507. }
  3508. cmaj = vdev->config.device_hw_info.fw_version.major;
  3509. cmin = vdev->config.device_hw_info.fw_version.minor;
  3510. cbld = vdev->config.device_hw_info.fw_version.build;
  3511. /* It's possible the version in /lib/firmware is not the latest version.
  3512. * If so, we could get into a loop of trying to upgrade to the latest
  3513. * and flashing the older version.
  3514. */
  3515. if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
  3516. !override) {
  3517. ret = -EINVAL;
  3518. goto out;
  3519. }
  3520. printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
  3521. maj, min, bld);
  3522. /* Flash the adapter with the new firmware */
  3523. status = vxge_hw_flash_fw(hldev);
  3524. if (status != VXGE_HW_OK) {
  3525. vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
  3526. VXGE_DRIVER_NAME, fw_name);
  3527. ret = -EIO;
  3528. goto out;
  3529. }
  3530. printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
  3531. "hard reset before using, thus requiring a system reboot or a "
  3532. "hotplug event.\n");
  3533. out:
  3534. release_firmware(fw);
  3535. return ret;
  3536. }
  3537. static int vxge_probe_fw_update(struct vxgedev *vdev)
  3538. {
  3539. u32 maj, min, bld;
  3540. int ret, gpxe = 0;
  3541. char *fw_name;
  3542. maj = vdev->config.device_hw_info.fw_version.major;
  3543. min = vdev->config.device_hw_info.fw_version.minor;
  3544. bld = vdev->config.device_hw_info.fw_version.build;
  3545. if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
  3546. return 0;
  3547. /* Ignore the build number when determining if the current firmware is
  3548. * "too new" to load the driver
  3549. */
  3550. if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
  3551. vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
  3552. "version, unable to load driver\n",
  3553. VXGE_DRIVER_NAME);
  3554. return -EINVAL;
  3555. }
  3556. /* Firmware 1.4.4 and older cannot be upgraded, and is too ancient to
  3557. * work with this driver.
  3558. */
  3559. if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
  3560. vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
  3561. "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
  3562. return -EINVAL;
  3563. }
  3564. /* If file not specified, determine gPXE or not */
  3565. if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
  3566. int i;
  3567. for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
  3568. if (vdev->devh->eprom_versions[i]) {
  3569. gpxe = 1;
  3570. break;
  3571. }
  3572. }
  3573. if (gpxe)
  3574. fw_name = "vxge/X3fw-pxe.ncf";
  3575. else
  3576. fw_name = "vxge/X3fw.ncf";
  3577. ret = vxge_fw_upgrade(vdev, fw_name, 0);
  3578. /* -EINVAL and -ENOENT are not fatal errors for flashing firmware on
  3579. * probe, so ignore them
  3580. */
  3581. if (ret != -EINVAL && ret != -ENOENT)
  3582. return -EIO;
  3583. else
  3584. ret = 0;
  3585. if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
  3586. VXGE_FW_VER(maj, min, 0)) {
  3587. vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
  3588. " be used with this driver.",
  3589. VXGE_DRIVER_NAME, maj, min, bld);
  3590. return -EINVAL;
  3591. }
  3592. return ret;
  3593. }
  3594. static int is_sriov_initialized(struct pci_dev *pdev)
  3595. {
  3596. int pos;
  3597. u16 ctrl;
  3598. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
  3599. if (pos) {
  3600. pci_read_config_word(pdev, pos + PCI_SRIOV_CTRL, &ctrl);
  3601. if (ctrl & PCI_SRIOV_CTRL_VFE)
  3602. return 1;
  3603. }
  3604. return 0;
  3605. }
  3606. static const struct vxge_hw_uld_cbs vxge_callbacks = {
  3607. .link_up = vxge_callback_link_up,
  3608. .link_down = vxge_callback_link_down,
  3609. .crit_err = vxge_callback_crit_err,
  3610. };
  3611. /**
  3612. * vxge_probe
  3613. * @pdev : structure containing the PCI related information of the device.
  3614. * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
  3615. * Description:
  3616. * This function is called when a new PCI device gets detected and initializes
  3617. * it.
  3618. * Return value:
  3619. * returns 0 on success and negative on failure.
  3620. *
  3621. */
  3622. static int
  3623. vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
  3624. {
  3625. struct __vxge_hw_device *hldev;
  3626. enum vxge_hw_status status;
  3627. int ret;
  3628. int high_dma = 0;
  3629. u64 vpath_mask = 0;
  3630. struct vxgedev *vdev;
  3631. struct vxge_config *ll_config = NULL;
  3632. struct vxge_hw_device_config *device_config = NULL;
  3633. struct vxge_hw_device_attr attr;
  3634. int i, j, no_of_vpath = 0, max_vpath_supported = 0;
  3635. u8 *macaddr;
  3636. struct vxge_mac_addrs *entry;
  3637. static int bus = -1, device = -1;
  3638. u32 host_type;
  3639. u8 new_device = 0;
  3640. enum vxge_hw_status is_privileged;
  3641. u32 function_mode;
  3642. u32 num_vfs = 0;
  3643. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  3644. attr.pdev = pdev;
  3645. /* In SRIOV-17 mode, functions of the same adapter
  3646. * can be deployed on different buses
  3647. */
  3648. if (((bus != pdev->bus->number) || (device != PCI_SLOT(pdev->devfn))) &&
  3649. !pdev->is_virtfn)
  3650. new_device = 1;
  3651. bus = pdev->bus->number;
  3652. device = PCI_SLOT(pdev->devfn);
  3653. if (new_device) {
  3654. if (driver_config->config_dev_cnt &&
  3655. (driver_config->config_dev_cnt !=
  3656. driver_config->total_dev_cnt))
  3657. vxge_debug_init(VXGE_ERR,
  3658. "%s: Configured %d of %d devices",
  3659. VXGE_DRIVER_NAME,
  3660. driver_config->config_dev_cnt,
  3661. driver_config->total_dev_cnt);
  3662. driver_config->config_dev_cnt = 0;
  3663. driver_config->total_dev_cnt = 0;
  3664. }
  3665. /* Now making the CPU based no of vpath calculation
  3666. * applicable for individual functions as well.
  3667. */
  3668. driver_config->g_no_cpus = 0;
  3669. driver_config->vpath_per_dev = max_config_vpath;
  3670. driver_config->total_dev_cnt++;
  3671. if (++driver_config->config_dev_cnt > max_config_dev) {
  3672. ret = 0;
  3673. goto _exit0;
  3674. }
  3675. device_config = kzalloc(sizeof(struct vxge_hw_device_config),
  3676. GFP_KERNEL);
  3677. if (!device_config) {
  3678. ret = -ENOMEM;
  3679. vxge_debug_init(VXGE_ERR,
  3680. "device_config : malloc failed %s %d",
  3681. __FILE__, __LINE__);
  3682. goto _exit0;
  3683. }
  3684. ll_config = kzalloc(sizeof(struct vxge_config), GFP_KERNEL);
  3685. if (!ll_config) {
  3686. ret = -ENOMEM;
  3687. vxge_debug_init(VXGE_ERR,
  3688. "device_config : malloc failed %s %d",
  3689. __FILE__, __LINE__);
  3690. goto _exit0;
  3691. }
  3692. ll_config->tx_steering_type = TX_MULTIQ_STEERING;
  3693. ll_config->intr_type = MSI_X;
  3694. ll_config->napi_weight = NEW_NAPI_WEIGHT;
  3695. ll_config->rth_steering = RTH_STEERING;
  3696. /* get the default configuration parameters */
  3697. vxge_hw_device_config_default_get(device_config);
  3698. /* initialize configuration parameters */
  3699. vxge_device_config_init(device_config, &ll_config->intr_type);
  3700. ret = pci_enable_device(pdev);
  3701. if (ret) {
  3702. vxge_debug_init(VXGE_ERR,
  3703. "%s : can not enable PCI device", __func__);
  3704. goto _exit0;
  3705. }
  3706. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
  3707. vxge_debug_ll_config(VXGE_TRACE,
  3708. "%s : using 64bit DMA", __func__);
  3709. high_dma = 1;
  3710. if (pci_set_consistent_dma_mask(pdev,
  3711. DMA_BIT_MASK(64))) {
  3712. vxge_debug_init(VXGE_ERR,
  3713. "%s : unable to obtain 64bit DMA for "
  3714. "consistent allocations", __func__);
  3715. ret = -ENOMEM;
  3716. goto _exit1;
  3717. }
  3718. } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
  3719. vxge_debug_ll_config(VXGE_TRACE,
  3720. "%s : using 32bit DMA", __func__);
  3721. } else {
  3722. ret = -ENOMEM;
  3723. goto _exit1;
  3724. }
  3725. ret = pci_request_region(pdev, 0, VXGE_DRIVER_NAME);
  3726. if (ret) {
  3727. vxge_debug_init(VXGE_ERR,
  3728. "%s : request regions failed", __func__);
  3729. goto _exit1;
  3730. }
  3731. pci_set_master(pdev);
  3732. attr.bar0 = pci_ioremap_bar(pdev, 0);
  3733. if (!attr.bar0) {
  3734. vxge_debug_init(VXGE_ERR,
  3735. "%s : cannot remap io memory bar0", __func__);
  3736. ret = -ENODEV;
  3737. goto _exit2;
  3738. }
  3739. vxge_debug_ll_config(VXGE_TRACE,
  3740. "pci ioremap bar0: %p:0x%llx",
  3741. attr.bar0,
  3742. (unsigned long long)pci_resource_start(pdev, 0));
  3743. status = vxge_hw_device_hw_info_get(attr.bar0,
  3744. &ll_config->device_hw_info);
  3745. if (status != VXGE_HW_OK) {
  3746. vxge_debug_init(VXGE_ERR,
  3747. "%s: Reading of hardware info failed."
  3748. "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
  3749. ret = -EINVAL;
  3750. goto _exit3;
  3751. }
  3752. vpath_mask = ll_config->device_hw_info.vpath_mask;
  3753. if (vpath_mask == 0) {
  3754. vxge_debug_ll_config(VXGE_TRACE,
  3755. "%s: No vpaths available in device", VXGE_DRIVER_NAME);
  3756. ret = -EINVAL;
  3757. goto _exit3;
  3758. }
  3759. vxge_debug_ll_config(VXGE_TRACE,
  3760. "%s:%d Vpath mask = %llx", __func__, __LINE__,
  3761. (unsigned long long)vpath_mask);
  3762. function_mode = ll_config->device_hw_info.function_mode;
  3763. host_type = ll_config->device_hw_info.host_type;
  3764. is_privileged = __vxge_hw_device_is_privilaged(host_type,
  3765. ll_config->device_hw_info.func_id);
  3766. /* Check how many vpaths are available */
  3767. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3768. if (!((vpath_mask) & vxge_mBIT(i)))
  3769. continue;
  3770. max_vpath_supported++;
  3771. }
  3772. if (new_device)
  3773. num_vfs = vxge_get_num_vfs(function_mode) - 1;
  3774. /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
  3775. if (is_sriov(function_mode) && !is_sriov_initialized(pdev) &&
  3776. (ll_config->intr_type != INTA)) {
  3777. ret = pci_enable_sriov(pdev, num_vfs);
  3778. if (ret)
  3779. vxge_debug_ll_config(VXGE_ERR,
  3780. "Failed in enabling SRIOV mode: %d\n", ret);
  3781. /* No need to fail out, as an error here is non-fatal */
  3782. }
  3783. /*
  3784. * Configure vpaths and get driver configured number of vpaths
  3785. * which is less than or equal to the maximum vpaths per function.
  3786. */
  3787. no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
  3788. if (!no_of_vpath) {
  3789. vxge_debug_ll_config(VXGE_ERR,
  3790. "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
  3791. ret = 0;
  3792. goto _exit3;
  3793. }
  3794. /* Setting driver callbacks */
  3795. attr.uld_callbacks = &vxge_callbacks;
  3796. status = vxge_hw_device_initialize(&hldev, &attr, device_config);
  3797. if (status != VXGE_HW_OK) {
  3798. vxge_debug_init(VXGE_ERR,
  3799. "Failed to initialize device (%d)", status);
  3800. ret = -EINVAL;
  3801. goto _exit3;
  3802. }
  3803. if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
  3804. ll_config->device_hw_info.fw_version.minor,
  3805. ll_config->device_hw_info.fw_version.build) >=
  3806. VXGE_EPROM_FW_VER) {
  3807. struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
  3808. status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
  3809. if (status != VXGE_HW_OK) {
  3810. vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
  3811. VXGE_DRIVER_NAME);
  3812. /* This is a non-fatal error, continue */
  3813. }
  3814. for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
  3815. hldev->eprom_versions[i] = img[i].version;
  3816. if (!img[i].is_valid)
  3817. break;
  3818. vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
  3819. "%d.%d.%d.%d", VXGE_DRIVER_NAME, i,
  3820. VXGE_EPROM_IMG_MAJOR(img[i].version),
  3821. VXGE_EPROM_IMG_MINOR(img[i].version),
  3822. VXGE_EPROM_IMG_FIX(img[i].version),
  3823. VXGE_EPROM_IMG_BUILD(img[i].version));
  3824. }
  3825. }
  3826. /* if FCS stripping is not disabled in MAC fail driver load */
  3827. status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
  3828. if (status != VXGE_HW_OK) {
  3829. vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
  3830. " failing driver load", VXGE_DRIVER_NAME);
  3831. ret = -EINVAL;
  3832. goto _exit4;
  3833. }
  3834. /* Always enable HWTS. This will always cause the FCS to be invalid,
  3835. * due to the fact that HWTS is using the FCS as the location of the
  3836. * timestamp. The HW FCS checking will still correctly determine if
  3837. * there is a valid checksum, and the FCS is being removed by the driver
  3838. * anyway. So no fucntionality is being lost. Since it is always
  3839. * enabled, we now simply use the ioctl call to set whether or not the
  3840. * driver should be paying attention to the HWTS.
  3841. */
  3842. if (is_privileged == VXGE_HW_OK) {
  3843. status = vxge_timestamp_config(hldev);
  3844. if (status != VXGE_HW_OK) {
  3845. vxge_debug_init(VXGE_ERR, "%s: HWTS enable failed",
  3846. VXGE_DRIVER_NAME);
  3847. ret = -EFAULT;
  3848. goto _exit4;
  3849. }
  3850. }
  3851. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3852. /* set private device info */
  3853. pci_set_drvdata(pdev, hldev);
  3854. ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
  3855. ll_config->addr_learn_en = addr_learn_en;
  3856. ll_config->rth_algorithm = RTH_ALG_JENKINS;
  3857. ll_config->rth_hash_type_tcpipv4 = 1;
  3858. ll_config->rth_hash_type_ipv4 = 0;
  3859. ll_config->rth_hash_type_tcpipv6 = 0;
  3860. ll_config->rth_hash_type_ipv6 = 0;
  3861. ll_config->rth_hash_type_tcpipv6ex = 0;
  3862. ll_config->rth_hash_type_ipv6ex = 0;
  3863. ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
  3864. ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3865. ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3866. ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
  3867. &vdev);
  3868. if (ret) {
  3869. ret = -EINVAL;
  3870. goto _exit4;
  3871. }
  3872. ret = vxge_probe_fw_update(vdev);
  3873. if (ret)
  3874. goto _exit5;
  3875. vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
  3876. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3877. vxge_hw_device_trace_level_get(hldev));
  3878. /* set private HW device info */
  3879. vdev->mtu = VXGE_HW_DEFAULT_MTU;
  3880. vdev->bar0 = attr.bar0;
  3881. vdev->max_vpath_supported = max_vpath_supported;
  3882. vdev->no_of_vpath = no_of_vpath;
  3883. /* Virtual Path count */
  3884. for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3885. if (!vxge_bVALn(vpath_mask, i, 1))
  3886. continue;
  3887. if (j >= vdev->no_of_vpath)
  3888. break;
  3889. vdev->vpaths[j].is_configured = 1;
  3890. vdev->vpaths[j].device_id = i;
  3891. vdev->vpaths[j].ring.driver_id = j;
  3892. vdev->vpaths[j].vdev = vdev;
  3893. vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
  3894. memcpy((u8 *)vdev->vpaths[j].macaddr,
  3895. ll_config->device_hw_info.mac_addrs[i],
  3896. ETH_ALEN);
  3897. /* Initialize the mac address list header */
  3898. INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
  3899. vdev->vpaths[j].mac_addr_cnt = 0;
  3900. vdev->vpaths[j].mcast_addr_cnt = 0;
  3901. j++;
  3902. }
  3903. vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
  3904. vdev->max_config_port = max_config_port;
  3905. vdev->vlan_tag_strip = vlan_tag_strip;
  3906. /* map the hashing selector table to the configured vpaths */
  3907. for (i = 0; i < vdev->no_of_vpath; i++)
  3908. vdev->vpath_selector[i] = vpath_selector[i];
  3909. macaddr = (u8 *)vdev->vpaths[0].macaddr;
  3910. ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3911. ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
  3912. ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3913. vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
  3914. vdev->ndev->name, ll_config->device_hw_info.serial_number);
  3915. vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
  3916. vdev->ndev->name, ll_config->device_hw_info.part_number);
  3917. vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
  3918. vdev->ndev->name, ll_config->device_hw_info.product_desc);
  3919. vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
  3920. vdev->ndev->name, macaddr);
  3921. vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
  3922. vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
  3923. vxge_debug_init(VXGE_TRACE,
  3924. "%s: Firmware version : %s Date : %s", vdev->ndev->name,
  3925. ll_config->device_hw_info.fw_version.version,
  3926. ll_config->device_hw_info.fw_date.date);
  3927. if (new_device) {
  3928. switch (ll_config->device_hw_info.function_mode) {
  3929. case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
  3930. vxge_debug_init(VXGE_TRACE,
  3931. "%s: Single Function Mode Enabled", vdev->ndev->name);
  3932. break;
  3933. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
  3934. vxge_debug_init(VXGE_TRACE,
  3935. "%s: Multi Function Mode Enabled", vdev->ndev->name);
  3936. break;
  3937. case VXGE_HW_FUNCTION_MODE_SRIOV:
  3938. vxge_debug_init(VXGE_TRACE,
  3939. "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
  3940. break;
  3941. case VXGE_HW_FUNCTION_MODE_MRIOV:
  3942. vxge_debug_init(VXGE_TRACE,
  3943. "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
  3944. break;
  3945. }
  3946. }
  3947. vxge_print_parm(vdev, vpath_mask);
  3948. /* Store the fw version for ethttool option */
  3949. strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
  3950. memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
  3951. /* Copy the station mac address to the list */
  3952. for (i = 0; i < vdev->no_of_vpath; i++) {
  3953. entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_KERNEL);
  3954. if (NULL == entry) {
  3955. vxge_debug_init(VXGE_ERR,
  3956. "%s: mac_addr_list : memory allocation failed",
  3957. vdev->ndev->name);
  3958. ret = -EPERM;
  3959. goto _exit6;
  3960. }
  3961. macaddr = (u8 *)&entry->macaddr;
  3962. memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
  3963. list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
  3964. vdev->vpaths[i].mac_addr_cnt = 1;
  3965. }
  3966. kfree(device_config);
  3967. /*
  3968. * INTA is shared in multi-function mode. This is unlike the INTA
  3969. * implementation in MR mode, where each VH has its own INTA message.
  3970. * - INTA is masked (disabled) as long as at least one function sets
  3971. * its TITAN_MASK_ALL_INT.ALARM bit.
  3972. * - INTA is unmasked (enabled) when all enabled functions have cleared
  3973. * their own TITAN_MASK_ALL_INT.ALARM bit.
  3974. * The TITAN_MASK_ALL_INT ALARM & TRAFFIC bits are cleared on power up.
  3975. * Though this driver leaves the top level interrupts unmasked while
  3976. * leaving the required module interrupt bits masked on exit, there
  3977. * could be a rougue driver around that does not follow this procedure
  3978. * resulting in a failure to generate interrupts. The following code is
  3979. * present to prevent such a failure.
  3980. */
  3981. if (ll_config->device_hw_info.function_mode ==
  3982. VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
  3983. if (vdev->config.intr_type == INTA)
  3984. vxge_hw_device_unmask_all(hldev);
  3985. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  3986. vdev->ndev->name, __func__, __LINE__);
  3987. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3988. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3989. vxge_hw_device_trace_level_get(hldev));
  3990. kfree(ll_config);
  3991. return 0;
  3992. _exit6:
  3993. for (i = 0; i < vdev->no_of_vpath; i++)
  3994. vxge_free_mac_add_list(&vdev->vpaths[i]);
  3995. _exit5:
  3996. vxge_device_unregister(hldev);
  3997. _exit4:
  3998. vxge_hw_device_terminate(hldev);
  3999. pci_disable_sriov(pdev);
  4000. _exit3:
  4001. iounmap(attr.bar0);
  4002. _exit2:
  4003. pci_release_region(pdev, 0);
  4004. _exit1:
  4005. pci_disable_device(pdev);
  4006. _exit0:
  4007. kfree(ll_config);
  4008. kfree(device_config);
  4009. driver_config->config_dev_cnt--;
  4010. driver_config->total_dev_cnt--;
  4011. return ret;
  4012. }
  4013. /**
  4014. * vxge_rem_nic - Free the PCI device
  4015. * @pdev: structure containing the PCI related information of the device.
  4016. * Description: This function is called by the Pci subsystem to release a
  4017. * PCI device and free up all resource held up by the device.
  4018. */
  4019. static void vxge_remove(struct pci_dev *pdev)
  4020. {
  4021. struct __vxge_hw_device *hldev;
  4022. struct vxgedev *vdev;
  4023. int i;
  4024. hldev = pci_get_drvdata(pdev);
  4025. if (hldev == NULL)
  4026. return;
  4027. vdev = netdev_priv(hldev->ndev);
  4028. vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
  4029. vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
  4030. __func__);
  4031. for (i = 0; i < vdev->no_of_vpath; i++)
  4032. vxge_free_mac_add_list(&vdev->vpaths[i]);
  4033. vxge_device_unregister(hldev);
  4034. /* Do not call pci_disable_sriov here, as it will break child devices */
  4035. vxge_hw_device_terminate(hldev);
  4036. iounmap(vdev->bar0);
  4037. pci_release_region(pdev, 0);
  4038. pci_disable_device(pdev);
  4039. driver_config->config_dev_cnt--;
  4040. driver_config->total_dev_cnt--;
  4041. vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
  4042. __func__, __LINE__);
  4043. vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
  4044. __LINE__);
  4045. }
  4046. static const struct pci_error_handlers vxge_err_handler = {
  4047. .error_detected = vxge_io_error_detected,
  4048. .slot_reset = vxge_io_slot_reset,
  4049. .resume = vxge_io_resume,
  4050. };
  4051. static struct pci_driver vxge_driver = {
  4052. .name = VXGE_DRIVER_NAME,
  4053. .id_table = vxge_id_table,
  4054. .probe = vxge_probe,
  4055. .remove = vxge_remove,
  4056. #ifdef CONFIG_PM
  4057. .suspend = vxge_pm_suspend,
  4058. .resume = vxge_pm_resume,
  4059. #endif
  4060. .err_handler = &vxge_err_handler,
  4061. };
  4062. static int __init
  4063. vxge_starter(void)
  4064. {
  4065. int ret = 0;
  4066. pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
  4067. pr_info("Driver version: %s\n", DRV_VERSION);
  4068. verify_bandwidth();
  4069. driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
  4070. if (!driver_config)
  4071. return -ENOMEM;
  4072. ret = pci_register_driver(&vxge_driver);
  4073. if (ret) {
  4074. kfree(driver_config);
  4075. goto err;
  4076. }
  4077. if (driver_config->config_dev_cnt &&
  4078. (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
  4079. vxge_debug_init(VXGE_ERR,
  4080. "%s: Configured %d of %d devices",
  4081. VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
  4082. driver_config->total_dev_cnt);
  4083. err:
  4084. return ret;
  4085. }
  4086. static void __exit
  4087. vxge_closer(void)
  4088. {
  4089. pci_unregister_driver(&vxge_driver);
  4090. kfree(driver_config);
  4091. }
  4092. module_init(vxge_starter);
  4093. module_exit(vxge_closer);