lan743x_main.c 75 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /* Copyright (C) 2018 Microchip Technology Inc. */
  3. #include <linux/module.h>
  4. #include <linux/pci.h>
  5. #include <linux/netdevice.h>
  6. #include <linux/etherdevice.h>
  7. #include <linux/crc32.h>
  8. #include <linux/microchipphy.h>
  9. #include <linux/net_tstamp.h>
  10. #include <linux/phy.h>
  11. #include <linux/rtnetlink.h>
  12. #include <linux/iopoll.h>
  13. #include "lan743x_main.h"
  14. static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
  15. {
  16. pci_release_selected_regions(adapter->pdev,
  17. pci_select_bars(adapter->pdev,
  18. IORESOURCE_MEM));
  19. pci_disable_device(adapter->pdev);
  20. }
  21. static int lan743x_pci_init(struct lan743x_adapter *adapter,
  22. struct pci_dev *pdev)
  23. {
  24. unsigned long bars = 0;
  25. int ret;
  26. adapter->pdev = pdev;
  27. ret = pci_enable_device_mem(pdev);
  28. if (ret)
  29. goto return_error;
  30. netif_info(adapter, probe, adapter->netdev,
  31. "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n",
  32. pdev->vendor, pdev->device);
  33. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  34. if (!test_bit(0, &bars))
  35. goto disable_device;
  36. ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME);
  37. if (ret)
  38. goto disable_device;
  39. pci_set_master(pdev);
  40. return 0;
  41. disable_device:
  42. pci_disable_device(adapter->pdev);
  43. return_error:
  44. return ret;
  45. }
  46. static u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
  47. {
  48. return ioread32(&adapter->csr.csr_address[offset]);
  49. }
  50. static void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
  51. u32 data)
  52. {
  53. iowrite32(data, &adapter->csr.csr_address[offset]);
  54. }
  55. #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset)
  56. static int lan743x_csr_light_reset(struct lan743x_adapter *adapter)
  57. {
  58. u32 data;
  59. data = lan743x_csr_read(adapter, HW_CFG);
  60. data |= HW_CFG_LRST_;
  61. lan743x_csr_write(adapter, HW_CFG, data);
  62. return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data,
  63. !(data & HW_CFG_LRST_), 100000, 10000000);
  64. }
  65. static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter,
  66. int offset, u32 bit_mask,
  67. int target_value, int usleep_min,
  68. int usleep_max, int count)
  69. {
  70. u32 data;
  71. return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data,
  72. target_value == ((data & bit_mask) ? 1 : 0),
  73. usleep_max, usleep_min * count);
  74. }
  75. static int lan743x_csr_init(struct lan743x_adapter *adapter)
  76. {
  77. struct lan743x_csr *csr = &adapter->csr;
  78. resource_size_t bar_start, bar_length;
  79. int result;
  80. bar_start = pci_resource_start(adapter->pdev, 0);
  81. bar_length = pci_resource_len(adapter->pdev, 0);
  82. csr->csr_address = devm_ioremap(&adapter->pdev->dev,
  83. bar_start, bar_length);
  84. if (!csr->csr_address) {
  85. result = -ENOMEM;
  86. goto clean_up;
  87. }
  88. csr->id_rev = lan743x_csr_read(adapter, ID_REV);
  89. csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
  90. netif_info(adapter, probe, adapter->netdev,
  91. "ID_REV = 0x%08X, FPGA_REV = %d.%d\n",
  92. csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev),
  93. FPGA_REV_GET_MINOR_(csr->fpga_rev));
  94. if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) {
  95. result = -ENODEV;
  96. goto clean_up;
  97. }
  98. csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
  99. switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) {
  100. case ID_REV_CHIP_REV_A0_:
  101. csr->flags |= LAN743X_CSR_FLAG_IS_A0;
  102. csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
  103. break;
  104. case ID_REV_CHIP_REV_B0_:
  105. csr->flags |= LAN743X_CSR_FLAG_IS_B0;
  106. break;
  107. }
  108. result = lan743x_csr_light_reset(adapter);
  109. if (result)
  110. goto clean_up;
  111. return 0;
  112. clean_up:
  113. return result;
  114. }
  115. static void lan743x_intr_software_isr(void *context)
  116. {
  117. struct lan743x_adapter *adapter = context;
  118. struct lan743x_intr *intr = &adapter->intr;
  119. u32 int_sts;
  120. int_sts = lan743x_csr_read(adapter, INT_STS);
  121. if (int_sts & INT_BIT_SW_GP_) {
  122. lan743x_csr_write(adapter, INT_STS, INT_BIT_SW_GP_);
  123. intr->software_isr_flag = 1;
  124. }
  125. }
  126. static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags)
  127. {
  128. struct lan743x_tx *tx = context;
  129. struct lan743x_adapter *adapter = tx->adapter;
  130. bool enable_flag = true;
  131. u32 int_en = 0;
  132. int_en = lan743x_csr_read(adapter, INT_EN_SET);
  133. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
  134. lan743x_csr_write(adapter, INT_EN_CLR,
  135. INT_BIT_DMA_TX_(tx->channel_number));
  136. }
  137. if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) {
  138. u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
  139. u32 dmac_int_sts;
  140. u32 dmac_int_en;
  141. if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
  142. dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
  143. else
  144. dmac_int_sts = ioc_bit;
  145. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
  146. dmac_int_en = lan743x_csr_read(adapter,
  147. DMAC_INT_EN_SET);
  148. else
  149. dmac_int_en = ioc_bit;
  150. dmac_int_en &= ioc_bit;
  151. dmac_int_sts &= dmac_int_en;
  152. if (dmac_int_sts & ioc_bit) {
  153. napi_schedule(&tx->napi);
  154. enable_flag = false;/* poll func will enable later */
  155. }
  156. }
  157. if (enable_flag)
  158. /* enable isr */
  159. lan743x_csr_write(adapter, INT_EN_SET,
  160. INT_BIT_DMA_TX_(tx->channel_number));
  161. }
  162. static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags)
  163. {
  164. struct lan743x_rx *rx = context;
  165. struct lan743x_adapter *adapter = rx->adapter;
  166. bool enable_flag = true;
  167. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
  168. lan743x_csr_write(adapter, INT_EN_CLR,
  169. INT_BIT_DMA_RX_(rx->channel_number));
  170. }
  171. if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) {
  172. u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number);
  173. u32 dmac_int_sts;
  174. u32 dmac_int_en;
  175. if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
  176. dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
  177. else
  178. dmac_int_sts = rx_frame_bit;
  179. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
  180. dmac_int_en = lan743x_csr_read(adapter,
  181. DMAC_INT_EN_SET);
  182. else
  183. dmac_int_en = rx_frame_bit;
  184. dmac_int_en &= rx_frame_bit;
  185. dmac_int_sts &= dmac_int_en;
  186. if (dmac_int_sts & rx_frame_bit) {
  187. napi_schedule(&rx->napi);
  188. enable_flag = false;/* poll funct will enable later */
  189. }
  190. }
  191. if (enable_flag) {
  192. /* enable isr */
  193. lan743x_csr_write(adapter, INT_EN_SET,
  194. INT_BIT_DMA_RX_(rx->channel_number));
  195. }
  196. }
  197. static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags)
  198. {
  199. struct lan743x_adapter *adapter = context;
  200. unsigned int channel;
  201. if (int_sts & INT_BIT_ALL_RX_) {
  202. for (channel = 0; channel < LAN743X_USED_RX_CHANNELS;
  203. channel++) {
  204. u32 int_bit = INT_BIT_DMA_RX_(channel);
  205. if (int_sts & int_bit) {
  206. lan743x_rx_isr(&adapter->rx[channel],
  207. int_bit, flags);
  208. int_sts &= ~int_bit;
  209. }
  210. }
  211. }
  212. if (int_sts & INT_BIT_ALL_TX_) {
  213. for (channel = 0; channel < LAN743X_USED_TX_CHANNELS;
  214. channel++) {
  215. u32 int_bit = INT_BIT_DMA_TX_(channel);
  216. if (int_sts & int_bit) {
  217. lan743x_tx_isr(&adapter->tx[channel],
  218. int_bit, flags);
  219. int_sts &= ~int_bit;
  220. }
  221. }
  222. }
  223. if (int_sts & INT_BIT_ALL_OTHER_) {
  224. if (int_sts & INT_BIT_SW_GP_) {
  225. lan743x_intr_software_isr(adapter);
  226. int_sts &= ~INT_BIT_SW_GP_;
  227. }
  228. }
  229. if (int_sts)
  230. lan743x_csr_write(adapter, INT_EN_CLR, int_sts);
  231. }
  232. static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr)
  233. {
  234. struct lan743x_vector *vector = ptr;
  235. struct lan743x_adapter *adapter = vector->adapter;
  236. irqreturn_t result = IRQ_NONE;
  237. u32 int_enables;
  238. u32 int_sts;
  239. if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) {
  240. int_sts = lan743x_csr_read(adapter, INT_STS);
  241. } else if (vector->flags &
  242. (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C |
  243. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) {
  244. int_sts = lan743x_csr_read(adapter, INT_STS_R2C);
  245. } else {
  246. /* use mask as implied status */
  247. int_sts = vector->int_mask | INT_BIT_MAS_;
  248. }
  249. if (!(int_sts & INT_BIT_MAS_))
  250. goto irq_done;
  251. if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR)
  252. /* disable vector interrupt */
  253. lan743x_csr_write(adapter,
  254. INT_VEC_EN_CLR,
  255. INT_VEC_EN_(vector->vector_index));
  256. if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR)
  257. /* disable master interrupt */
  258. lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
  259. if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) {
  260. int_enables = lan743x_csr_read(adapter, INT_EN_SET);
  261. } else {
  262. /* use vector mask as implied enable mask */
  263. int_enables = vector->int_mask;
  264. }
  265. int_sts &= int_enables;
  266. int_sts &= vector->int_mask;
  267. if (int_sts) {
  268. if (vector->handler) {
  269. vector->handler(vector->context,
  270. int_sts, vector->flags);
  271. } else {
  272. /* disable interrupts on this vector */
  273. lan743x_csr_write(adapter, INT_EN_CLR,
  274. vector->int_mask);
  275. }
  276. result = IRQ_HANDLED;
  277. }
  278. if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET)
  279. /* enable master interrupt */
  280. lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
  281. if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET)
  282. /* enable vector interrupt */
  283. lan743x_csr_write(adapter,
  284. INT_VEC_EN_SET,
  285. INT_VEC_EN_(vector->vector_index));
  286. irq_done:
  287. return result;
  288. }
  289. static int lan743x_intr_test_isr(struct lan743x_adapter *adapter)
  290. {
  291. struct lan743x_intr *intr = &adapter->intr;
  292. int result = -ENODEV;
  293. int timeout = 10;
  294. intr->software_isr_flag = 0;
  295. /* enable interrupt */
  296. lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_);
  297. /* activate interrupt here */
  298. lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_);
  299. while ((timeout > 0) && (!(intr->software_isr_flag))) {
  300. usleep_range(1000, 20000);
  301. timeout--;
  302. }
  303. if (intr->software_isr_flag)
  304. result = 0;
  305. /* disable interrupts */
  306. lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
  307. return result;
  308. }
  309. static int lan743x_intr_register_isr(struct lan743x_adapter *adapter,
  310. int vector_index, u32 flags,
  311. u32 int_mask,
  312. lan743x_vector_handler handler,
  313. void *context)
  314. {
  315. struct lan743x_vector *vector = &adapter->intr.vector_list
  316. [vector_index];
  317. int ret;
  318. vector->adapter = adapter;
  319. vector->flags = flags;
  320. vector->vector_index = vector_index;
  321. vector->int_mask = int_mask;
  322. vector->handler = handler;
  323. vector->context = context;
  324. ret = request_irq(vector->irq,
  325. lan743x_intr_entry_isr,
  326. (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ?
  327. IRQF_SHARED : 0, DRIVER_NAME, vector);
  328. if (ret) {
  329. vector->handler = NULL;
  330. vector->context = NULL;
  331. vector->int_mask = 0;
  332. vector->flags = 0;
  333. }
  334. return ret;
  335. }
  336. static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter,
  337. int vector_index)
  338. {
  339. struct lan743x_vector *vector = &adapter->intr.vector_list
  340. [vector_index];
  341. free_irq(vector->irq, vector);
  342. vector->handler = NULL;
  343. vector->context = NULL;
  344. vector->int_mask = 0;
  345. vector->flags = 0;
  346. }
  347. static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter,
  348. u32 int_mask)
  349. {
  350. int index;
  351. for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
  352. if (adapter->intr.vector_list[index].int_mask & int_mask)
  353. return adapter->intr.vector_list[index].flags;
  354. }
  355. return 0;
  356. }
  357. static void lan743x_intr_close(struct lan743x_adapter *adapter)
  358. {
  359. struct lan743x_intr *intr = &adapter->intr;
  360. int index = 0;
  361. lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
  362. lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF);
  363. for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
  364. if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {
  365. lan743x_intr_unregister_isr(adapter, index);
  366. intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);
  367. }
  368. }
  369. if (intr->flags & INTR_FLAG_MSI_ENABLED) {
  370. pci_disable_msi(adapter->pdev);
  371. intr->flags &= ~INTR_FLAG_MSI_ENABLED;
  372. }
  373. if (intr->flags & INTR_FLAG_MSIX_ENABLED) {
  374. pci_disable_msix(adapter->pdev);
  375. intr->flags &= ~INTR_FLAG_MSIX_ENABLED;
  376. }
  377. }
  378. static int lan743x_intr_open(struct lan743x_adapter *adapter)
  379. {
  380. struct msix_entry msix_entries[LAN743X_MAX_VECTOR_COUNT];
  381. struct lan743x_intr *intr = &adapter->intr;
  382. u32 int_vec_en_auto_clr = 0;
  383. u32 int_vec_map0 = 0;
  384. u32 int_vec_map1 = 0;
  385. int ret = -ENODEV;
  386. int index = 0;
  387. u32 flags = 0;
  388. intr->number_of_vectors = 0;
  389. /* Try to set up MSIX interrupts */
  390. memset(&msix_entries[0], 0,
  391. sizeof(struct msix_entry) * LAN743X_MAX_VECTOR_COUNT);
  392. for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++)
  393. msix_entries[index].entry = index;
  394. ret = pci_enable_msix_range(adapter->pdev,
  395. msix_entries, 1,
  396. 1 + LAN743X_USED_TX_CHANNELS +
  397. LAN743X_USED_RX_CHANNELS);
  398. if (ret > 0) {
  399. intr->flags |= INTR_FLAG_MSIX_ENABLED;
  400. intr->number_of_vectors = ret;
  401. intr->using_vectors = true;
  402. for (index = 0; index < intr->number_of_vectors; index++)
  403. intr->vector_list[index].irq = msix_entries
  404. [index].vector;
  405. netif_info(adapter, ifup, adapter->netdev,
  406. "using MSIX interrupts, number of vectors = %d\n",
  407. intr->number_of_vectors);
  408. }
  409. /* If MSIX failed try to setup using MSI interrupts */
  410. if (!intr->number_of_vectors) {
  411. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  412. if (!pci_enable_msi(adapter->pdev)) {
  413. intr->flags |= INTR_FLAG_MSI_ENABLED;
  414. intr->number_of_vectors = 1;
  415. intr->using_vectors = true;
  416. intr->vector_list[0].irq =
  417. adapter->pdev->irq;
  418. netif_info(adapter, ifup, adapter->netdev,
  419. "using MSI interrupts, number of vectors = %d\n",
  420. intr->number_of_vectors);
  421. }
  422. }
  423. }
  424. /* If MSIX, and MSI failed, setup using legacy interrupt */
  425. if (!intr->number_of_vectors) {
  426. intr->number_of_vectors = 1;
  427. intr->using_vectors = false;
  428. intr->vector_list[0].irq = intr->irq;
  429. netif_info(adapter, ifup, adapter->netdev,
  430. "using legacy interrupts\n");
  431. }
  432. /* At this point we must have at least one irq */
  433. lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF);
  434. /* map all interrupts to vector 0 */
  435. lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000);
  436. lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000);
  437. lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000);
  438. flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
  439. LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
  440. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
  441. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
  442. if (intr->using_vectors) {
  443. flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
  444. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
  445. } else {
  446. flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR |
  447. LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET |
  448. LAN743X_VECTOR_FLAG_IRQ_SHARED;
  449. }
  450. if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
  451. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ;
  452. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C;
  453. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
  454. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK;
  455. flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C;
  456. flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C;
  457. }
  458. ret = lan743x_intr_register_isr(adapter, 0, flags,
  459. INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ |
  460. INT_BIT_ALL_OTHER_,
  461. lan743x_intr_shared_isr, adapter);
  462. if (ret)
  463. goto clean_up;
  464. intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);
  465. if (intr->using_vectors)
  466. lan743x_csr_write(adapter, INT_VEC_EN_SET,
  467. INT_VEC_EN_(0));
  468. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  469. lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD);
  470. lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD);
  471. lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD);
  472. lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD);
  473. lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD);
  474. lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD);
  475. lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD);
  476. lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD);
  477. lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432);
  478. lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001);
  479. lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF);
  480. }
  481. /* enable interrupts */
  482. lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
  483. ret = lan743x_intr_test_isr(adapter);
  484. if (ret)
  485. goto clean_up;
  486. if (intr->number_of_vectors > 1) {
  487. int number_of_tx_vectors = intr->number_of_vectors - 1;
  488. if (number_of_tx_vectors > LAN743X_USED_TX_CHANNELS)
  489. number_of_tx_vectors = LAN743X_USED_TX_CHANNELS;
  490. flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
  491. LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
  492. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
  493. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
  494. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
  495. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
  496. if (adapter->csr.flags &
  497. LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
  498. flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
  499. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
  500. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
  501. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
  502. LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
  503. }
  504. for (index = 0; index < number_of_tx_vectors; index++) {
  505. u32 int_bit = INT_BIT_DMA_TX_(index);
  506. int vector = index + 1;
  507. /* map TX interrupt to vector */
  508. int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector);
  509. lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1);
  510. if (flags &
  511. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
  512. int_vec_en_auto_clr |= INT_VEC_EN_(vector);
  513. lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
  514. int_vec_en_auto_clr);
  515. }
  516. /* Remove TX interrupt from shared mask */
  517. intr->vector_list[0].int_mask &= ~int_bit;
  518. ret = lan743x_intr_register_isr(adapter, vector, flags,
  519. int_bit, lan743x_tx_isr,
  520. &adapter->tx[index]);
  521. if (ret)
  522. goto clean_up;
  523. intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
  524. if (!(flags &
  525. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET))
  526. lan743x_csr_write(adapter, INT_VEC_EN_SET,
  527. INT_VEC_EN_(vector));
  528. }
  529. }
  530. if ((intr->number_of_vectors - LAN743X_USED_TX_CHANNELS) > 1) {
  531. int number_of_rx_vectors = intr->number_of_vectors -
  532. LAN743X_USED_TX_CHANNELS - 1;
  533. if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS)
  534. number_of_rx_vectors = LAN743X_USED_RX_CHANNELS;
  535. flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
  536. LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
  537. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
  538. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
  539. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
  540. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
  541. if (adapter->csr.flags &
  542. LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
  543. flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
  544. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
  545. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
  546. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
  547. LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
  548. }
  549. for (index = 0; index < number_of_rx_vectors; index++) {
  550. int vector = index + 1 + LAN743X_USED_TX_CHANNELS;
  551. u32 int_bit = INT_BIT_DMA_RX_(index);
  552. /* map RX interrupt to vector */
  553. int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector);
  554. lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0);
  555. if (flags &
  556. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
  557. int_vec_en_auto_clr |= INT_VEC_EN_(vector);
  558. lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
  559. int_vec_en_auto_clr);
  560. }
  561. /* Remove RX interrupt from shared mask */
  562. intr->vector_list[0].int_mask &= ~int_bit;
  563. ret = lan743x_intr_register_isr(adapter, vector, flags,
  564. int_bit, lan743x_rx_isr,
  565. &adapter->rx[index]);
  566. if (ret)
  567. goto clean_up;
  568. intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
  569. lan743x_csr_write(adapter, INT_VEC_EN_SET,
  570. INT_VEC_EN_(vector));
  571. }
  572. }
  573. return 0;
  574. clean_up:
  575. lan743x_intr_close(adapter);
  576. return ret;
  577. }
  578. static int lan743x_dp_write(struct lan743x_adapter *adapter,
  579. u32 select, u32 addr, u32 length, u32 *buf)
  580. {
  581. int ret = -EIO;
  582. u32 dp_sel;
  583. int i;
  584. mutex_lock(&adapter->dp_lock);
  585. if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
  586. 1, 40, 100, 100))
  587. goto unlock;
  588. dp_sel = lan743x_csr_read(adapter, DP_SEL);
  589. dp_sel &= ~DP_SEL_MASK_;
  590. dp_sel |= select;
  591. lan743x_csr_write(adapter, DP_SEL, dp_sel);
  592. for (i = 0; i < length; i++) {
  593. lan743x_csr_write(adapter, DP_ADDR, addr + i);
  594. lan743x_csr_write(adapter, DP_DATA_0, buf[i]);
  595. lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_);
  596. if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
  597. 1, 40, 100, 100))
  598. goto unlock;
  599. }
  600. ret = 0;
  601. unlock:
  602. mutex_unlock(&adapter->dp_lock);
  603. return ret;
  604. }
  605. static u32 lan743x_mac_mii_access(u16 id, u16 index, int read)
  606. {
  607. u32 ret;
  608. ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
  609. MAC_MII_ACC_PHY_ADDR_MASK_;
  610. ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) &
  611. MAC_MII_ACC_MIIRINDA_MASK_;
  612. if (read)
  613. ret |= MAC_MII_ACC_MII_READ_;
  614. else
  615. ret |= MAC_MII_ACC_MII_WRITE_;
  616. ret |= MAC_MII_ACC_MII_BUSY_;
  617. return ret;
  618. }
  619. static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter)
  620. {
  621. u32 data;
  622. return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data,
  623. !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000);
  624. }
  625. static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index)
  626. {
  627. struct lan743x_adapter *adapter = bus->priv;
  628. u32 val, mii_access;
  629. int ret;
  630. /* comfirm MII not busy */
  631. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  632. if (ret < 0)
  633. return ret;
  634. /* set the address, index & direction (read from PHY) */
  635. mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ);
  636. lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
  637. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  638. if (ret < 0)
  639. return ret;
  640. val = lan743x_csr_read(adapter, MAC_MII_DATA);
  641. return (int)(val & 0xFFFF);
  642. }
  643. static int lan743x_mdiobus_write(struct mii_bus *bus,
  644. int phy_id, int index, u16 regval)
  645. {
  646. struct lan743x_adapter *adapter = bus->priv;
  647. u32 val, mii_access;
  648. int ret;
  649. /* confirm MII not busy */
  650. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  651. if (ret < 0)
  652. return ret;
  653. val = (u32)regval;
  654. lan743x_csr_write(adapter, MAC_MII_DATA, val);
  655. /* set the address, index & direction (write to PHY) */
  656. mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE);
  657. lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
  658. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  659. return ret;
  660. }
  661. static void lan743x_mac_set_address(struct lan743x_adapter *adapter,
  662. u8 *addr)
  663. {
  664. u32 addr_lo, addr_hi;
  665. addr_lo = addr[0] |
  666. addr[1] << 8 |
  667. addr[2] << 16 |
  668. addr[3] << 24;
  669. addr_hi = addr[4] |
  670. addr[5] << 8;
  671. lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo);
  672. lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi);
  673. ether_addr_copy(adapter->mac_address, addr);
  674. netif_info(adapter, drv, adapter->netdev,
  675. "MAC address set to %pM\n", addr);
  676. }
  677. static int lan743x_mac_init(struct lan743x_adapter *adapter)
  678. {
  679. bool mac_address_valid = true;
  680. struct net_device *netdev;
  681. u32 mac_addr_hi = 0;
  682. u32 mac_addr_lo = 0;
  683. u32 data;
  684. int ret;
  685. netdev = adapter->netdev;
  686. lan743x_csr_write(adapter, MAC_CR, MAC_CR_RST_);
  687. ret = lan743x_csr_wait_for_bit(adapter, MAC_CR, MAC_CR_RST_,
  688. 0, 1000, 20000, 100);
  689. if (ret)
  690. return ret;
  691. /* setup auto duplex, and speed detection */
  692. data = lan743x_csr_read(adapter, MAC_CR);
  693. data |= MAC_CR_ADD_ | MAC_CR_ASD_;
  694. data |= MAC_CR_CNTR_RST_;
  695. lan743x_csr_write(adapter, MAC_CR, data);
  696. mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH);
  697. mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL);
  698. adapter->mac_address[0] = mac_addr_lo & 0xFF;
  699. adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF;
  700. adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF;
  701. adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF;
  702. adapter->mac_address[4] = mac_addr_hi & 0xFF;
  703. adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF;
  704. if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) &&
  705. mac_addr_lo == 0xFFFFFFFF) {
  706. mac_address_valid = false;
  707. } else if (!is_valid_ether_addr(adapter->mac_address)) {
  708. mac_address_valid = false;
  709. }
  710. if (!mac_address_valid)
  711. random_ether_addr(adapter->mac_address);
  712. lan743x_mac_set_address(adapter, adapter->mac_address);
  713. ether_addr_copy(netdev->dev_addr, adapter->mac_address);
  714. return 0;
  715. }
  716. static int lan743x_mac_open(struct lan743x_adapter *adapter)
  717. {
  718. int ret = 0;
  719. u32 temp;
  720. temp = lan743x_csr_read(adapter, MAC_RX);
  721. lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_);
  722. temp = lan743x_csr_read(adapter, MAC_TX);
  723. lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_);
  724. return ret;
  725. }
  726. static void lan743x_mac_close(struct lan743x_adapter *adapter)
  727. {
  728. u32 temp;
  729. temp = lan743x_csr_read(adapter, MAC_TX);
  730. temp &= ~MAC_TX_TXEN_;
  731. lan743x_csr_write(adapter, MAC_TX, temp);
  732. lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_,
  733. 1, 1000, 20000, 100);
  734. temp = lan743x_csr_read(adapter, MAC_RX);
  735. temp &= ~MAC_RX_RXEN_;
  736. lan743x_csr_write(adapter, MAC_RX, temp);
  737. lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
  738. 1, 1000, 20000, 100);
  739. }
  740. static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,
  741. bool tx_enable, bool rx_enable)
  742. {
  743. u32 flow_setting = 0;
  744. /* set maximum pause time because when fifo space frees
  745. * up a zero value pause frame will be sent to release the pause
  746. */
  747. flow_setting = MAC_FLOW_CR_FCPT_MASK_;
  748. if (tx_enable)
  749. flow_setting |= MAC_FLOW_CR_TX_FCEN_;
  750. if (rx_enable)
  751. flow_setting |= MAC_FLOW_CR_RX_FCEN_;
  752. lan743x_csr_write(adapter, MAC_FLOW, flow_setting);
  753. }
  754. static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)
  755. {
  756. int enabled = 0;
  757. u32 mac_rx = 0;
  758. mac_rx = lan743x_csr_read(adapter, MAC_RX);
  759. if (mac_rx & MAC_RX_RXEN_) {
  760. enabled = 1;
  761. if (mac_rx & MAC_RX_RXD_) {
  762. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  763. mac_rx &= ~MAC_RX_RXD_;
  764. }
  765. mac_rx &= ~MAC_RX_RXEN_;
  766. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  767. lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
  768. 1, 1000, 20000, 100);
  769. lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_);
  770. }
  771. mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_);
  772. mac_rx |= (((new_mtu + ETH_HLEN + 4) << MAC_RX_MAX_SIZE_SHIFT_) &
  773. MAC_RX_MAX_SIZE_MASK_);
  774. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  775. if (enabled) {
  776. mac_rx |= MAC_RX_RXEN_;
  777. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  778. }
  779. return 0;
  780. }
  781. /* PHY */
  782. static int lan743x_phy_reset(struct lan743x_adapter *adapter)
  783. {
  784. u32 data;
  785. /* Only called with in probe, and before mdiobus_register */
  786. data = lan743x_csr_read(adapter, PMT_CTL);
  787. data |= PMT_CTL_ETH_PHY_RST_;
  788. lan743x_csr_write(adapter, PMT_CTL, data);
  789. return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data,
  790. (!(data & PMT_CTL_ETH_PHY_RST_) &&
  791. (data & PMT_CTL_READY_)),
  792. 50000, 1000000);
  793. }
  794. static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter,
  795. u8 duplex, u16 local_adv,
  796. u16 remote_adv)
  797. {
  798. struct lan743x_phy *phy = &adapter->phy;
  799. u8 cap;
  800. if (phy->fc_autoneg)
  801. cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv);
  802. else
  803. cap = phy->fc_request_control;
  804. lan743x_mac_flow_ctrl_set_enables(adapter,
  805. cap & FLOW_CTRL_TX,
  806. cap & FLOW_CTRL_RX);
  807. }
  808. static int lan743x_phy_init(struct lan743x_adapter *adapter)
  809. {
  810. return lan743x_phy_reset(adapter);
  811. }
  812. static void lan743x_phy_link_status_change(struct net_device *netdev)
  813. {
  814. struct lan743x_adapter *adapter = netdev_priv(netdev);
  815. struct phy_device *phydev = netdev->phydev;
  816. phy_print_status(phydev);
  817. if (phydev->state == PHY_RUNNING) {
  818. struct ethtool_link_ksettings ksettings;
  819. int remote_advertisement = 0;
  820. int local_advertisement = 0;
  821. memset(&ksettings, 0, sizeof(ksettings));
  822. phy_ethtool_get_link_ksettings(netdev, &ksettings);
  823. local_advertisement = phy_read(phydev, MII_ADVERTISE);
  824. if (local_advertisement < 0)
  825. return;
  826. remote_advertisement = phy_read(phydev, MII_LPA);
  827. if (remote_advertisement < 0)
  828. return;
  829. lan743x_phy_update_flowcontrol(adapter,
  830. ksettings.base.duplex,
  831. local_advertisement,
  832. remote_advertisement);
  833. }
  834. }
  835. static void lan743x_phy_close(struct lan743x_adapter *adapter)
  836. {
  837. struct net_device *netdev = adapter->netdev;
  838. phy_stop(netdev->phydev);
  839. phy_disconnect(netdev->phydev);
  840. netdev->phydev = NULL;
  841. }
  842. static int lan743x_phy_open(struct lan743x_adapter *adapter)
  843. {
  844. struct lan743x_phy *phy = &adapter->phy;
  845. struct phy_device *phydev;
  846. struct net_device *netdev;
  847. int ret = -EIO;
  848. u32 mii_adv;
  849. netdev = adapter->netdev;
  850. phydev = phy_find_first(adapter->mdiobus);
  851. if (!phydev)
  852. goto return_error;
  853. ret = phy_connect_direct(netdev, phydev,
  854. lan743x_phy_link_status_change,
  855. PHY_INTERFACE_MODE_GMII);
  856. if (ret)
  857. goto return_error;
  858. /* MAC doesn't support 1000T Half */
  859. phydev->supported &= ~SUPPORTED_1000baseT_Half;
  860. /* support both flow controls */
  861. phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
  862. phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
  863. mii_adv = (u32)mii_advertise_flowctrl(phy->fc_request_control);
  864. phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
  865. phy->fc_autoneg = phydev->autoneg;
  866. phy_start(phydev);
  867. phy_start_aneg(phydev);
  868. return 0;
  869. return_error:
  870. return ret;
  871. }
  872. static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter)
  873. {
  874. u8 *mac_addr;
  875. u32 mac_addr_hi = 0;
  876. u32 mac_addr_lo = 0;
  877. /* Add mac address to perfect Filter */
  878. mac_addr = adapter->mac_address;
  879. mac_addr_lo = ((((u32)(mac_addr[0])) << 0) |
  880. (((u32)(mac_addr[1])) << 8) |
  881. (((u32)(mac_addr[2])) << 16) |
  882. (((u32)(mac_addr[3])) << 24));
  883. mac_addr_hi = ((((u32)(mac_addr[4])) << 0) |
  884. (((u32)(mac_addr[5])) << 8));
  885. lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo);
  886. lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0),
  887. mac_addr_hi | RFE_ADDR_FILT_HI_VALID_);
  888. }
  889. static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter)
  890. {
  891. struct net_device *netdev = adapter->netdev;
  892. u32 hash_table[DP_SEL_VHF_HASH_LEN];
  893. u32 rfctl;
  894. u32 data;
  895. rfctl = lan743x_csr_read(adapter, RFE_CTL);
  896. rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ |
  897. RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
  898. rfctl |= RFE_CTL_AB_;
  899. if (netdev->flags & IFF_PROMISC) {
  900. rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_;
  901. } else {
  902. if (netdev->flags & IFF_ALLMULTI)
  903. rfctl |= RFE_CTL_AM_;
  904. }
  905. memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32));
  906. if (netdev_mc_count(netdev)) {
  907. struct netdev_hw_addr *ha;
  908. int i;
  909. rfctl |= RFE_CTL_DA_PERFECT_;
  910. i = 1;
  911. netdev_for_each_mc_addr(ha, netdev) {
  912. /* set first 32 into Perfect Filter */
  913. if (i < 33) {
  914. lan743x_csr_write(adapter,
  915. RFE_ADDR_FILT_HI(i), 0);
  916. data = ha->addr[3];
  917. data = ha->addr[2] | (data << 8);
  918. data = ha->addr[1] | (data << 8);
  919. data = ha->addr[0] | (data << 8);
  920. lan743x_csr_write(adapter,
  921. RFE_ADDR_FILT_LO(i), data);
  922. data = ha->addr[5];
  923. data = ha->addr[4] | (data << 8);
  924. data |= RFE_ADDR_FILT_HI_VALID_;
  925. lan743x_csr_write(adapter,
  926. RFE_ADDR_FILT_HI(i), data);
  927. } else {
  928. u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >>
  929. 23) & 0x1FF;
  930. hash_table[bitnum / 32] |= (1 << (bitnum % 32));
  931. rfctl |= RFE_CTL_MCAST_HASH_;
  932. }
  933. i++;
  934. }
  935. }
  936. lan743x_dp_write(adapter, DP_SEL_RFE_RAM,
  937. DP_SEL_VHF_VLAN_LEN,
  938. DP_SEL_VHF_HASH_LEN, hash_table);
  939. lan743x_csr_write(adapter, RFE_CTL, rfctl);
  940. }
  941. static int lan743x_dmac_init(struct lan743x_adapter *adapter)
  942. {
  943. u32 data = 0;
  944. lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_);
  945. lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_,
  946. 0, 1000, 20000, 100);
  947. switch (DEFAULT_DMA_DESCRIPTOR_SPACING) {
  948. case DMA_DESCRIPTOR_SPACING_16:
  949. data = DMAC_CFG_MAX_DSPACE_16_;
  950. break;
  951. case DMA_DESCRIPTOR_SPACING_32:
  952. data = DMAC_CFG_MAX_DSPACE_32_;
  953. break;
  954. case DMA_DESCRIPTOR_SPACING_64:
  955. data = DMAC_CFG_MAX_DSPACE_64_;
  956. break;
  957. case DMA_DESCRIPTOR_SPACING_128:
  958. data = DMAC_CFG_MAX_DSPACE_128_;
  959. break;
  960. default:
  961. return -EPERM;
  962. }
  963. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
  964. data |= DMAC_CFG_COAL_EN_;
  965. data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_;
  966. data |= DMAC_CFG_MAX_READ_REQ_SET_(6);
  967. lan743x_csr_write(adapter, DMAC_CFG, data);
  968. data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1);
  969. data |= DMAC_COAL_CFG_TIMER_TX_START_;
  970. data |= DMAC_COAL_CFG_FLUSH_INTS_;
  971. data |= DMAC_COAL_CFG_INT_EXIT_COAL_;
  972. data |= DMAC_COAL_CFG_CSR_EXIT_COAL_;
  973. data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A);
  974. data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C);
  975. lan743x_csr_write(adapter, DMAC_COAL_CFG, data);
  976. data = DMAC_OBFF_TX_THRES_SET_(0x08);
  977. data |= DMAC_OBFF_RX_THRES_SET_(0x0A);
  978. lan743x_csr_write(adapter, DMAC_OBFF_CFG, data);
  979. return 0;
  980. }
  981. static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter,
  982. int tx_channel)
  983. {
  984. u32 dmac_cmd = 0;
  985. dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
  986. return DMAC_CHANNEL_STATE_SET((dmac_cmd &
  987. DMAC_CMD_START_T_(tx_channel)),
  988. (dmac_cmd &
  989. DMAC_CMD_STOP_T_(tx_channel)));
  990. }
  991. static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter,
  992. int tx_channel)
  993. {
  994. int timeout = 100;
  995. int result = 0;
  996. while (timeout &&
  997. ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) ==
  998. DMAC_CHANNEL_STATE_STOP_PENDING)) {
  999. usleep_range(1000, 20000);
  1000. timeout--;
  1001. }
  1002. if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
  1003. result = -ENODEV;
  1004. return result;
  1005. }
  1006. static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter,
  1007. int rx_channel)
  1008. {
  1009. u32 dmac_cmd = 0;
  1010. dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
  1011. return DMAC_CHANNEL_STATE_SET((dmac_cmd &
  1012. DMAC_CMD_START_R_(rx_channel)),
  1013. (dmac_cmd &
  1014. DMAC_CMD_STOP_R_(rx_channel)));
  1015. }
  1016. static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter,
  1017. int rx_channel)
  1018. {
  1019. int timeout = 100;
  1020. int result = 0;
  1021. while (timeout &&
  1022. ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) ==
  1023. DMAC_CHANNEL_STATE_STOP_PENDING)) {
  1024. usleep_range(1000, 20000);
  1025. timeout--;
  1026. }
  1027. if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
  1028. result = -ENODEV;
  1029. return result;
  1030. }
  1031. static void lan743x_tx_release_desc(struct lan743x_tx *tx,
  1032. int descriptor_index, bool cleanup)
  1033. {
  1034. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1035. struct lan743x_tx_descriptor *descriptor = NULL;
  1036. u32 descriptor_type = 0;
  1037. descriptor = &tx->ring_cpu_ptr[descriptor_index];
  1038. buffer_info = &tx->buffer_info[descriptor_index];
  1039. if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE))
  1040. goto done;
  1041. descriptor_type = (descriptor->data0) &
  1042. TX_DESC_DATA0_DTYPE_MASK_;
  1043. if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_)
  1044. goto clean_up_data_descriptor;
  1045. else
  1046. goto clear_active;
  1047. clean_up_data_descriptor:
  1048. if (buffer_info->dma_ptr) {
  1049. if (buffer_info->flags &
  1050. TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) {
  1051. dma_unmap_page(&tx->adapter->pdev->dev,
  1052. buffer_info->dma_ptr,
  1053. buffer_info->buffer_length,
  1054. DMA_TO_DEVICE);
  1055. } else {
  1056. dma_unmap_single(&tx->adapter->pdev->dev,
  1057. buffer_info->dma_ptr,
  1058. buffer_info->buffer_length,
  1059. DMA_TO_DEVICE);
  1060. }
  1061. buffer_info->dma_ptr = 0;
  1062. buffer_info->buffer_length = 0;
  1063. }
  1064. if (buffer_info->skb) {
  1065. dev_kfree_skb(buffer_info->skb);
  1066. buffer_info->skb = NULL;
  1067. }
  1068. clear_active:
  1069. buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE;
  1070. done:
  1071. memset(buffer_info, 0, sizeof(*buffer_info));
  1072. memset(descriptor, 0, sizeof(*descriptor));
  1073. }
  1074. static int lan743x_tx_next_index(struct lan743x_tx *tx, int index)
  1075. {
  1076. return ((++index) % tx->ring_size);
  1077. }
  1078. static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx)
  1079. {
  1080. while ((*tx->head_cpu_ptr) != (tx->last_head)) {
  1081. lan743x_tx_release_desc(tx, tx->last_head, false);
  1082. tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
  1083. }
  1084. }
  1085. static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx)
  1086. {
  1087. u32 original_head = 0;
  1088. original_head = tx->last_head;
  1089. do {
  1090. lan743x_tx_release_desc(tx, tx->last_head, true);
  1091. tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
  1092. } while (tx->last_head != original_head);
  1093. memset(tx->ring_cpu_ptr, 0,
  1094. sizeof(*tx->ring_cpu_ptr) * (tx->ring_size));
  1095. memset(tx->buffer_info, 0,
  1096. sizeof(*tx->buffer_info) * (tx->ring_size));
  1097. }
  1098. static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx,
  1099. struct sk_buff *skb)
  1100. {
  1101. int result = 1; /* 1 for the main skb buffer */
  1102. int nr_frags = 0;
  1103. if (skb_is_gso(skb))
  1104. result++; /* requires an extension descriptor */
  1105. nr_frags = skb_shinfo(skb)->nr_frags;
  1106. result += nr_frags; /* 1 for each fragment buffer */
  1107. return result;
  1108. }
  1109. static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx)
  1110. {
  1111. int last_head = tx->last_head;
  1112. int last_tail = tx->last_tail;
  1113. if (last_tail >= last_head)
  1114. return tx->ring_size - last_tail + last_head - 1;
  1115. else
  1116. return last_head - last_tail - 1;
  1117. }
  1118. static int lan743x_tx_frame_start(struct lan743x_tx *tx,
  1119. unsigned char *first_buffer,
  1120. unsigned int first_buffer_length,
  1121. unsigned int frame_length,
  1122. bool check_sum)
  1123. {
  1124. /* called only from within lan743x_tx_xmit_frame.
  1125. * assuming tx->ring_lock has already been acquired.
  1126. */
  1127. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1128. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1129. struct lan743x_adapter *adapter = tx->adapter;
  1130. struct device *dev = &adapter->pdev->dev;
  1131. dma_addr_t dma_ptr;
  1132. tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS;
  1133. tx->frame_first = tx->last_tail;
  1134. tx->frame_tail = tx->frame_first;
  1135. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1136. buffer_info = &tx->buffer_info[tx->frame_tail];
  1137. dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length,
  1138. DMA_TO_DEVICE);
  1139. if (dma_mapping_error(dev, dma_ptr))
  1140. return -ENOMEM;
  1141. tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr);
  1142. tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr);
  1143. tx_descriptor->data3 = (frame_length << 16) &
  1144. TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_;
  1145. buffer_info->skb = NULL;
  1146. buffer_info->dma_ptr = dma_ptr;
  1147. buffer_info->buffer_length = first_buffer_length;
  1148. buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
  1149. tx->frame_data0 = (first_buffer_length &
  1150. TX_DESC_DATA0_BUF_LENGTH_MASK_) |
  1151. TX_DESC_DATA0_DTYPE_DATA_ |
  1152. TX_DESC_DATA0_FS_ |
  1153. TX_DESC_DATA0_FCS_;
  1154. if (check_sum)
  1155. tx->frame_data0 |= TX_DESC_DATA0_ICE_ |
  1156. TX_DESC_DATA0_IPE_ |
  1157. TX_DESC_DATA0_TPE_;
  1158. /* data0 will be programmed in one of other frame assembler functions */
  1159. return 0;
  1160. }
  1161. static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx,
  1162. unsigned int frame_length)
  1163. {
  1164. /* called only from within lan743x_tx_xmit_frame.
  1165. * assuming tx->ring_lock has already been acquired.
  1166. */
  1167. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1168. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1169. /* wrap up previous descriptor */
  1170. tx->frame_data0 |= TX_DESC_DATA0_EXT_;
  1171. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1172. tx_descriptor->data0 = tx->frame_data0;
  1173. /* move to next descriptor */
  1174. tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
  1175. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1176. buffer_info = &tx->buffer_info[tx->frame_tail];
  1177. /* add extension descriptor */
  1178. tx_descriptor->data1 = 0;
  1179. tx_descriptor->data2 = 0;
  1180. tx_descriptor->data3 = 0;
  1181. buffer_info->skb = NULL;
  1182. buffer_info->dma_ptr = 0;
  1183. buffer_info->buffer_length = 0;
  1184. buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
  1185. tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) |
  1186. TX_DESC_DATA0_DTYPE_EXT_ |
  1187. TX_DESC_DATA0_EXT_LSO_;
  1188. /* data0 will be programmed in one of other frame assembler functions */
  1189. }
  1190. static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx,
  1191. const struct skb_frag_struct *fragment,
  1192. unsigned int frame_length)
  1193. {
  1194. /* called only from within lan743x_tx_xmit_frame
  1195. * assuming tx->ring_lock has already been acquired
  1196. */
  1197. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1198. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1199. struct lan743x_adapter *adapter = tx->adapter;
  1200. struct device *dev = &adapter->pdev->dev;
  1201. unsigned int fragment_length = 0;
  1202. dma_addr_t dma_ptr;
  1203. fragment_length = skb_frag_size(fragment);
  1204. if (!fragment_length)
  1205. return 0;
  1206. /* wrap up previous descriptor */
  1207. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1208. tx_descriptor->data0 = tx->frame_data0;
  1209. /* move to next descriptor */
  1210. tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
  1211. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1212. buffer_info = &tx->buffer_info[tx->frame_tail];
  1213. dma_ptr = skb_frag_dma_map(dev, fragment,
  1214. 0, fragment_length,
  1215. DMA_TO_DEVICE);
  1216. if (dma_mapping_error(dev, dma_ptr)) {
  1217. int desc_index;
  1218. /* cleanup all previously setup descriptors */
  1219. desc_index = tx->frame_first;
  1220. while (desc_index != tx->frame_tail) {
  1221. lan743x_tx_release_desc(tx, desc_index, true);
  1222. desc_index = lan743x_tx_next_index(tx, desc_index);
  1223. }
  1224. dma_wmb();
  1225. tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
  1226. tx->frame_first = 0;
  1227. tx->frame_data0 = 0;
  1228. tx->frame_tail = 0;
  1229. return -ENOMEM;
  1230. }
  1231. tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr);
  1232. tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr);
  1233. tx_descriptor->data3 = (frame_length << 16) &
  1234. TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_;
  1235. buffer_info->skb = NULL;
  1236. buffer_info->dma_ptr = dma_ptr;
  1237. buffer_info->buffer_length = fragment_length;
  1238. buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
  1239. buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT;
  1240. tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) |
  1241. TX_DESC_DATA0_DTYPE_DATA_ |
  1242. TX_DESC_DATA0_FCS_;
  1243. /* data0 will be programmed in one of other frame assembler functions */
  1244. return 0;
  1245. }
  1246. static void lan743x_tx_frame_end(struct lan743x_tx *tx,
  1247. struct sk_buff *skb,
  1248. bool ignore_sync)
  1249. {
  1250. /* called only from within lan743x_tx_xmit_frame
  1251. * assuming tx->ring_lock has already been acquired
  1252. */
  1253. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1254. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1255. struct lan743x_adapter *adapter = tx->adapter;
  1256. u32 tx_tail_flags = 0;
  1257. /* wrap up previous descriptor */
  1258. tx->frame_data0 |= TX_DESC_DATA0_LS_;
  1259. tx->frame_data0 |= TX_DESC_DATA0_IOC_;
  1260. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1261. buffer_info = &tx->buffer_info[tx->frame_tail];
  1262. buffer_info->skb = skb;
  1263. if (ignore_sync)
  1264. buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC;
  1265. tx_descriptor->data0 = tx->frame_data0;
  1266. tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
  1267. tx->last_tail = tx->frame_tail;
  1268. dma_wmb();
  1269. if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
  1270. tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_;
  1271. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)
  1272. tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ |
  1273. TX_TAIL_SET_TOP_INT_EN_;
  1274. lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
  1275. tx_tail_flags | tx->frame_tail);
  1276. tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
  1277. }
  1278. static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx,
  1279. struct sk_buff *skb)
  1280. {
  1281. int required_number_of_descriptors = 0;
  1282. unsigned int start_frame_length = 0;
  1283. unsigned int frame_length = 0;
  1284. unsigned int head_length = 0;
  1285. unsigned long irq_flags = 0;
  1286. bool ignore_sync = false;
  1287. int nr_frags = 0;
  1288. bool gso = false;
  1289. int j;
  1290. required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb);
  1291. spin_lock_irqsave(&tx->ring_lock, irq_flags);
  1292. if (required_number_of_descriptors >
  1293. lan743x_tx_get_avail_desc(tx)) {
  1294. if (required_number_of_descriptors > (tx->ring_size - 1)) {
  1295. dev_kfree_skb(skb);
  1296. } else {
  1297. /* save to overflow buffer */
  1298. tx->overflow_skb = skb;
  1299. netif_stop_queue(tx->adapter->netdev);
  1300. }
  1301. goto unlock;
  1302. }
  1303. /* space available, transmit skb */
  1304. head_length = skb_headlen(skb);
  1305. frame_length = skb_pagelen(skb);
  1306. nr_frags = skb_shinfo(skb)->nr_frags;
  1307. start_frame_length = frame_length;
  1308. gso = skb_is_gso(skb);
  1309. if (gso) {
  1310. start_frame_length = max(skb_shinfo(skb)->gso_size,
  1311. (unsigned short)8);
  1312. }
  1313. if (lan743x_tx_frame_start(tx,
  1314. skb->data, head_length,
  1315. start_frame_length,
  1316. skb->ip_summed == CHECKSUM_PARTIAL)) {
  1317. dev_kfree_skb(skb);
  1318. goto unlock;
  1319. }
  1320. if (gso)
  1321. lan743x_tx_frame_add_lso(tx, frame_length);
  1322. if (nr_frags <= 0)
  1323. goto finish;
  1324. for (j = 0; j < nr_frags; j++) {
  1325. const struct skb_frag_struct *frag;
  1326. frag = &(skb_shinfo(skb)->frags[j]);
  1327. if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) {
  1328. /* upon error no need to call
  1329. * lan743x_tx_frame_end
  1330. * frame assembler clean up was performed inside
  1331. * lan743x_tx_frame_add_fragment
  1332. */
  1333. dev_kfree_skb(skb);
  1334. goto unlock;
  1335. }
  1336. }
  1337. finish:
  1338. lan743x_tx_frame_end(tx, skb, ignore_sync);
  1339. unlock:
  1340. spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
  1341. return NETDEV_TX_OK;
  1342. }
  1343. static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight)
  1344. {
  1345. struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi);
  1346. struct lan743x_adapter *adapter = tx->adapter;
  1347. bool start_transmitter = false;
  1348. unsigned long irq_flags = 0;
  1349. u32 ioc_bit = 0;
  1350. u32 int_sts = 0;
  1351. ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
  1352. int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
  1353. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C)
  1354. lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit);
  1355. spin_lock_irqsave(&tx->ring_lock, irq_flags);
  1356. /* clean up tx ring */
  1357. lan743x_tx_release_completed_descriptors(tx);
  1358. if (netif_queue_stopped(adapter->netdev)) {
  1359. if (tx->overflow_skb) {
  1360. if (lan743x_tx_get_desc_cnt(tx, tx->overflow_skb) <=
  1361. lan743x_tx_get_avail_desc(tx))
  1362. start_transmitter = true;
  1363. } else {
  1364. netif_wake_queue(adapter->netdev);
  1365. }
  1366. }
  1367. spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
  1368. if (start_transmitter) {
  1369. /* space is now available, transmit overflow skb */
  1370. lan743x_tx_xmit_frame(tx, tx->overflow_skb);
  1371. tx->overflow_skb = NULL;
  1372. netif_wake_queue(adapter->netdev);
  1373. }
  1374. if (!napi_complete_done(napi, weight))
  1375. goto done;
  1376. /* enable isr */
  1377. lan743x_csr_write(adapter, INT_EN_SET,
  1378. INT_BIT_DMA_TX_(tx->channel_number));
  1379. lan743x_csr_read(adapter, INT_STS);
  1380. done:
  1381. return weight;
  1382. }
  1383. static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx)
  1384. {
  1385. if (tx->head_cpu_ptr) {
  1386. pci_free_consistent(tx->adapter->pdev,
  1387. sizeof(*tx->head_cpu_ptr),
  1388. (void *)(tx->head_cpu_ptr),
  1389. tx->head_dma_ptr);
  1390. tx->head_cpu_ptr = NULL;
  1391. tx->head_dma_ptr = 0;
  1392. }
  1393. kfree(tx->buffer_info);
  1394. tx->buffer_info = NULL;
  1395. if (tx->ring_cpu_ptr) {
  1396. pci_free_consistent(tx->adapter->pdev,
  1397. tx->ring_allocation_size,
  1398. tx->ring_cpu_ptr,
  1399. tx->ring_dma_ptr);
  1400. tx->ring_allocation_size = 0;
  1401. tx->ring_cpu_ptr = NULL;
  1402. tx->ring_dma_ptr = 0;
  1403. }
  1404. tx->ring_size = 0;
  1405. }
  1406. static int lan743x_tx_ring_init(struct lan743x_tx *tx)
  1407. {
  1408. size_t ring_allocation_size = 0;
  1409. void *cpu_ptr = NULL;
  1410. dma_addr_t dma_ptr;
  1411. int ret = -ENOMEM;
  1412. tx->ring_size = LAN743X_TX_RING_SIZE;
  1413. if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) {
  1414. ret = -EINVAL;
  1415. goto cleanup;
  1416. }
  1417. ring_allocation_size = ALIGN(tx->ring_size *
  1418. sizeof(struct lan743x_tx_descriptor),
  1419. PAGE_SIZE);
  1420. dma_ptr = 0;
  1421. cpu_ptr = pci_zalloc_consistent(tx->adapter->pdev,
  1422. ring_allocation_size, &dma_ptr);
  1423. if (!cpu_ptr) {
  1424. ret = -ENOMEM;
  1425. goto cleanup;
  1426. }
  1427. tx->ring_allocation_size = ring_allocation_size;
  1428. tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr;
  1429. tx->ring_dma_ptr = dma_ptr;
  1430. cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL);
  1431. if (!cpu_ptr) {
  1432. ret = -ENOMEM;
  1433. goto cleanup;
  1434. }
  1435. tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr;
  1436. dma_ptr = 0;
  1437. cpu_ptr = pci_zalloc_consistent(tx->adapter->pdev,
  1438. sizeof(*tx->head_cpu_ptr), &dma_ptr);
  1439. if (!cpu_ptr) {
  1440. ret = -ENOMEM;
  1441. goto cleanup;
  1442. }
  1443. tx->head_cpu_ptr = cpu_ptr;
  1444. tx->head_dma_ptr = dma_ptr;
  1445. if (tx->head_dma_ptr & 0x3) {
  1446. ret = -ENOMEM;
  1447. goto cleanup;
  1448. }
  1449. return 0;
  1450. cleanup:
  1451. lan743x_tx_ring_cleanup(tx);
  1452. return ret;
  1453. }
  1454. static void lan743x_tx_close(struct lan743x_tx *tx)
  1455. {
  1456. struct lan743x_adapter *adapter = tx->adapter;
  1457. lan743x_csr_write(adapter,
  1458. DMAC_CMD,
  1459. DMAC_CMD_STOP_T_(tx->channel_number));
  1460. lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number);
  1461. lan743x_csr_write(adapter,
  1462. DMAC_INT_EN_CLR,
  1463. DMAC_INT_BIT_TX_IOC_(tx->channel_number));
  1464. lan743x_csr_write(adapter, INT_EN_CLR,
  1465. INT_BIT_DMA_TX_(tx->channel_number));
  1466. napi_disable(&tx->napi);
  1467. netif_napi_del(&tx->napi);
  1468. lan743x_csr_write(adapter, FCT_TX_CTL,
  1469. FCT_TX_CTL_DIS_(tx->channel_number));
  1470. lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
  1471. FCT_TX_CTL_EN_(tx->channel_number),
  1472. 0, 1000, 20000, 100);
  1473. lan743x_tx_release_all_descriptors(tx);
  1474. if (tx->overflow_skb) {
  1475. dev_kfree_skb(tx->overflow_skb);
  1476. tx->overflow_skb = NULL;
  1477. }
  1478. lan743x_tx_ring_cleanup(tx);
  1479. }
  1480. static int lan743x_tx_open(struct lan743x_tx *tx)
  1481. {
  1482. struct lan743x_adapter *adapter = NULL;
  1483. u32 data = 0;
  1484. int ret;
  1485. adapter = tx->adapter;
  1486. ret = lan743x_tx_ring_init(tx);
  1487. if (ret)
  1488. return ret;
  1489. /* initialize fifo */
  1490. lan743x_csr_write(adapter, FCT_TX_CTL,
  1491. FCT_TX_CTL_RESET_(tx->channel_number));
  1492. lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
  1493. FCT_TX_CTL_RESET_(tx->channel_number),
  1494. 0, 1000, 20000, 100);
  1495. /* enable fifo */
  1496. lan743x_csr_write(adapter, FCT_TX_CTL,
  1497. FCT_TX_CTL_EN_(tx->channel_number));
  1498. /* reset tx channel */
  1499. lan743x_csr_write(adapter, DMAC_CMD,
  1500. DMAC_CMD_TX_SWR_(tx->channel_number));
  1501. lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
  1502. DMAC_CMD_TX_SWR_(tx->channel_number),
  1503. 0, 1000, 20000, 100);
  1504. /* Write TX_BASE_ADDR */
  1505. lan743x_csr_write(adapter,
  1506. TX_BASE_ADDRH(tx->channel_number),
  1507. DMA_ADDR_HIGH32(tx->ring_dma_ptr));
  1508. lan743x_csr_write(adapter,
  1509. TX_BASE_ADDRL(tx->channel_number),
  1510. DMA_ADDR_LOW32(tx->ring_dma_ptr));
  1511. /* Write TX_CFG_B */
  1512. data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number));
  1513. data &= ~TX_CFG_B_TX_RING_LEN_MASK_;
  1514. data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_);
  1515. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
  1516. data |= TX_CFG_B_TDMABL_512_;
  1517. lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data);
  1518. /* Write TX_CFG_A */
  1519. data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_;
  1520. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  1521. data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_;
  1522. data |= TX_CFG_A_TX_PF_THRES_SET_(0x10);
  1523. data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04);
  1524. data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07);
  1525. }
  1526. lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data);
  1527. /* Write TX_HEAD_WRITEBACK_ADDR */
  1528. lan743x_csr_write(adapter,
  1529. TX_HEAD_WRITEBACK_ADDRH(tx->channel_number),
  1530. DMA_ADDR_HIGH32(tx->head_dma_ptr));
  1531. lan743x_csr_write(adapter,
  1532. TX_HEAD_WRITEBACK_ADDRL(tx->channel_number),
  1533. DMA_ADDR_LOW32(tx->head_dma_ptr));
  1534. /* set last head */
  1535. tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number));
  1536. /* write TX_TAIL */
  1537. tx->last_tail = 0;
  1538. lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
  1539. (u32)(tx->last_tail));
  1540. tx->vector_flags = lan743x_intr_get_vector_flags(adapter,
  1541. INT_BIT_DMA_TX_
  1542. (tx->channel_number));
  1543. netif_napi_add(adapter->netdev,
  1544. &tx->napi, lan743x_tx_napi_poll,
  1545. tx->ring_size - 1);
  1546. napi_enable(&tx->napi);
  1547. data = 0;
  1548. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
  1549. data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_;
  1550. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
  1551. data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_;
  1552. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
  1553. data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_;
  1554. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
  1555. data |= TX_CFG_C_TX_INT_EN_R2C_;
  1556. lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data);
  1557. if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET))
  1558. lan743x_csr_write(adapter, INT_EN_SET,
  1559. INT_BIT_DMA_TX_(tx->channel_number));
  1560. lan743x_csr_write(adapter, DMAC_INT_EN_SET,
  1561. DMAC_INT_BIT_TX_IOC_(tx->channel_number));
  1562. /* start dmac channel */
  1563. lan743x_csr_write(adapter, DMAC_CMD,
  1564. DMAC_CMD_START_T_(tx->channel_number));
  1565. return 0;
  1566. }
  1567. static int lan743x_rx_next_index(struct lan743x_rx *rx, int index)
  1568. {
  1569. return ((++index) % rx->ring_size);
  1570. }
  1571. static int lan743x_rx_allocate_ring_element(struct lan743x_rx *rx, int index)
  1572. {
  1573. struct lan743x_rx_buffer_info *buffer_info;
  1574. struct lan743x_rx_descriptor *descriptor;
  1575. int length = 0;
  1576. length = (LAN743X_MAX_FRAME_SIZE + ETH_HLEN + 4 + RX_HEAD_PADDING);
  1577. descriptor = &rx->ring_cpu_ptr[index];
  1578. buffer_info = &rx->buffer_info[index];
  1579. buffer_info->skb = __netdev_alloc_skb(rx->adapter->netdev,
  1580. length,
  1581. GFP_ATOMIC | GFP_DMA);
  1582. if (!(buffer_info->skb))
  1583. return -ENOMEM;
  1584. buffer_info->dma_ptr = dma_map_single(&rx->adapter->pdev->dev,
  1585. buffer_info->skb->data,
  1586. length,
  1587. DMA_FROM_DEVICE);
  1588. if (dma_mapping_error(&rx->adapter->pdev->dev,
  1589. buffer_info->dma_ptr)) {
  1590. buffer_info->dma_ptr = 0;
  1591. return -ENOMEM;
  1592. }
  1593. buffer_info->buffer_length = length;
  1594. descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr);
  1595. descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr);
  1596. descriptor->data3 = 0;
  1597. descriptor->data0 = (RX_DESC_DATA0_OWN_ |
  1598. (length & RX_DESC_DATA0_BUF_LENGTH_MASK_));
  1599. skb_reserve(buffer_info->skb, RX_HEAD_PADDING);
  1600. return 0;
  1601. }
  1602. static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index)
  1603. {
  1604. struct lan743x_rx_buffer_info *buffer_info;
  1605. struct lan743x_rx_descriptor *descriptor;
  1606. descriptor = &rx->ring_cpu_ptr[index];
  1607. buffer_info = &rx->buffer_info[index];
  1608. descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr);
  1609. descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr);
  1610. descriptor->data3 = 0;
  1611. descriptor->data0 = (RX_DESC_DATA0_OWN_ |
  1612. ((buffer_info->buffer_length) &
  1613. RX_DESC_DATA0_BUF_LENGTH_MASK_));
  1614. }
  1615. static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index)
  1616. {
  1617. struct lan743x_rx_buffer_info *buffer_info;
  1618. struct lan743x_rx_descriptor *descriptor;
  1619. descriptor = &rx->ring_cpu_ptr[index];
  1620. buffer_info = &rx->buffer_info[index];
  1621. memset(descriptor, 0, sizeof(*descriptor));
  1622. if (buffer_info->dma_ptr) {
  1623. dma_unmap_single(&rx->adapter->pdev->dev,
  1624. buffer_info->dma_ptr,
  1625. buffer_info->buffer_length,
  1626. DMA_FROM_DEVICE);
  1627. buffer_info->dma_ptr = 0;
  1628. }
  1629. if (buffer_info->skb) {
  1630. dev_kfree_skb(buffer_info->skb);
  1631. buffer_info->skb = NULL;
  1632. }
  1633. memset(buffer_info, 0, sizeof(*buffer_info));
  1634. }
  1635. static int lan743x_rx_process_packet(struct lan743x_rx *rx)
  1636. {
  1637. struct skb_shared_hwtstamps *hwtstamps = NULL;
  1638. int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
  1639. struct lan743x_rx_buffer_info *buffer_info;
  1640. struct lan743x_rx_descriptor *descriptor;
  1641. int current_head_index = -1;
  1642. int extension_index = -1;
  1643. int first_index = -1;
  1644. int last_index = -1;
  1645. current_head_index = *rx->head_cpu_ptr;
  1646. if (current_head_index < 0 || current_head_index >= rx->ring_size)
  1647. goto done;
  1648. if (rx->last_head < 0 || rx->last_head >= rx->ring_size)
  1649. goto done;
  1650. if (rx->last_head != current_head_index) {
  1651. descriptor = &rx->ring_cpu_ptr[rx->last_head];
  1652. if (descriptor->data0 & RX_DESC_DATA0_OWN_)
  1653. goto done;
  1654. if (!(descriptor->data0 & RX_DESC_DATA0_FS_))
  1655. goto done;
  1656. first_index = rx->last_head;
  1657. if (descriptor->data0 & RX_DESC_DATA0_LS_) {
  1658. last_index = rx->last_head;
  1659. } else {
  1660. int index;
  1661. index = lan743x_rx_next_index(rx, first_index);
  1662. while (index != current_head_index) {
  1663. descriptor = &rx->ring_cpu_ptr[index];
  1664. if (descriptor->data0 & RX_DESC_DATA0_OWN_)
  1665. goto done;
  1666. if (descriptor->data0 & RX_DESC_DATA0_LS_) {
  1667. last_index = index;
  1668. break;
  1669. }
  1670. index = lan743x_rx_next_index(rx, index);
  1671. }
  1672. }
  1673. if (last_index >= 0) {
  1674. descriptor = &rx->ring_cpu_ptr[last_index];
  1675. if (descriptor->data0 & RX_DESC_DATA0_EXT_) {
  1676. /* extension is expected to follow */
  1677. int index = lan743x_rx_next_index(rx,
  1678. last_index);
  1679. if (index != current_head_index) {
  1680. descriptor = &rx->ring_cpu_ptr[index];
  1681. if (descriptor->data0 &
  1682. RX_DESC_DATA0_OWN_) {
  1683. goto done;
  1684. }
  1685. if (descriptor->data0 &
  1686. RX_DESC_DATA0_EXT_) {
  1687. extension_index = index;
  1688. } else {
  1689. goto done;
  1690. }
  1691. } else {
  1692. /* extension is not yet available */
  1693. /* prevent processing of this packet */
  1694. first_index = -1;
  1695. last_index = -1;
  1696. }
  1697. }
  1698. }
  1699. }
  1700. if (first_index >= 0 && last_index >= 0) {
  1701. int real_last_index = last_index;
  1702. struct sk_buff *skb = NULL;
  1703. u32 ts_sec = 0;
  1704. u32 ts_nsec = 0;
  1705. /* packet is available */
  1706. if (first_index == last_index) {
  1707. /* single buffer packet */
  1708. int packet_length;
  1709. buffer_info = &rx->buffer_info[first_index];
  1710. skb = buffer_info->skb;
  1711. descriptor = &rx->ring_cpu_ptr[first_index];
  1712. /* unmap from dma */
  1713. if (buffer_info->dma_ptr) {
  1714. dma_unmap_single(&rx->adapter->pdev->dev,
  1715. buffer_info->dma_ptr,
  1716. buffer_info->buffer_length,
  1717. DMA_FROM_DEVICE);
  1718. buffer_info->dma_ptr = 0;
  1719. buffer_info->buffer_length = 0;
  1720. }
  1721. buffer_info->skb = NULL;
  1722. packet_length = RX_DESC_DATA0_FRAME_LENGTH_GET_
  1723. (descriptor->data0);
  1724. skb_put(skb, packet_length - 4);
  1725. skb->protocol = eth_type_trans(skb,
  1726. rx->adapter->netdev);
  1727. lan743x_rx_allocate_ring_element(rx, first_index);
  1728. } else {
  1729. int index = first_index;
  1730. /* multi buffer packet not supported */
  1731. /* this should not happen since
  1732. * buffers are allocated to be at least jumbo size
  1733. */
  1734. /* clean up buffers */
  1735. if (first_index <= last_index) {
  1736. while ((index >= first_index) &&
  1737. (index <= last_index)) {
  1738. lan743x_rx_release_ring_element(rx,
  1739. index);
  1740. lan743x_rx_allocate_ring_element(rx,
  1741. index);
  1742. index = lan743x_rx_next_index(rx,
  1743. index);
  1744. }
  1745. } else {
  1746. while ((index >= first_index) ||
  1747. (index <= last_index)) {
  1748. lan743x_rx_release_ring_element(rx,
  1749. index);
  1750. lan743x_rx_allocate_ring_element(rx,
  1751. index);
  1752. index = lan743x_rx_next_index(rx,
  1753. index);
  1754. }
  1755. }
  1756. }
  1757. if (extension_index >= 0) {
  1758. descriptor = &rx->ring_cpu_ptr[extension_index];
  1759. buffer_info = &rx->buffer_info[extension_index];
  1760. ts_sec = descriptor->data1;
  1761. ts_nsec = (descriptor->data2 &
  1762. RX_DESC_DATA2_TS_NS_MASK_);
  1763. lan743x_rx_reuse_ring_element(rx, extension_index);
  1764. real_last_index = extension_index;
  1765. }
  1766. if (!skb) {
  1767. result = RX_PROCESS_RESULT_PACKET_DROPPED;
  1768. goto move_forward;
  1769. }
  1770. if (extension_index < 0)
  1771. goto pass_packet_to_os;
  1772. hwtstamps = skb_hwtstamps(skb);
  1773. if (hwtstamps)
  1774. hwtstamps->hwtstamp = ktime_set(ts_sec, ts_nsec);
  1775. pass_packet_to_os:
  1776. /* pass packet to OS */
  1777. napi_gro_receive(&rx->napi, skb);
  1778. result = RX_PROCESS_RESULT_PACKET_RECEIVED;
  1779. move_forward:
  1780. /* push tail and head forward */
  1781. rx->last_tail = real_last_index;
  1782. rx->last_head = lan743x_rx_next_index(rx, real_last_index);
  1783. }
  1784. done:
  1785. return result;
  1786. }
  1787. static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight)
  1788. {
  1789. struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi);
  1790. struct lan743x_adapter *adapter = rx->adapter;
  1791. u32 rx_tail_flags = 0;
  1792. int count;
  1793. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) {
  1794. /* clear int status bit before reading packet */
  1795. lan743x_csr_write(adapter, DMAC_INT_STS,
  1796. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  1797. }
  1798. count = 0;
  1799. while (count < weight) {
  1800. int rx_process_result = -1;
  1801. rx_process_result = lan743x_rx_process_packet(rx);
  1802. if (rx_process_result == RX_PROCESS_RESULT_PACKET_RECEIVED) {
  1803. count++;
  1804. } else if (rx_process_result ==
  1805. RX_PROCESS_RESULT_NOTHING_TO_DO) {
  1806. break;
  1807. } else if (rx_process_result ==
  1808. RX_PROCESS_RESULT_PACKET_DROPPED) {
  1809. continue;
  1810. }
  1811. }
  1812. rx->frame_count += count;
  1813. if (count == weight)
  1814. goto done;
  1815. if (!napi_complete_done(napi, count))
  1816. goto done;
  1817. if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
  1818. rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_;
  1819. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) {
  1820. rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_;
  1821. } else {
  1822. lan743x_csr_write(adapter, INT_EN_SET,
  1823. INT_BIT_DMA_RX_(rx->channel_number));
  1824. }
  1825. /* update RX_TAIL */
  1826. lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
  1827. rx_tail_flags | rx->last_tail);
  1828. done:
  1829. return count;
  1830. }
  1831. static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx)
  1832. {
  1833. if (rx->buffer_info && rx->ring_cpu_ptr) {
  1834. int index;
  1835. for (index = 0; index < rx->ring_size; index++)
  1836. lan743x_rx_release_ring_element(rx, index);
  1837. }
  1838. if (rx->head_cpu_ptr) {
  1839. pci_free_consistent(rx->adapter->pdev,
  1840. sizeof(*rx->head_cpu_ptr),
  1841. rx->head_cpu_ptr,
  1842. rx->head_dma_ptr);
  1843. rx->head_cpu_ptr = NULL;
  1844. rx->head_dma_ptr = 0;
  1845. }
  1846. kfree(rx->buffer_info);
  1847. rx->buffer_info = NULL;
  1848. if (rx->ring_cpu_ptr) {
  1849. pci_free_consistent(rx->adapter->pdev,
  1850. rx->ring_allocation_size,
  1851. rx->ring_cpu_ptr,
  1852. rx->ring_dma_ptr);
  1853. rx->ring_allocation_size = 0;
  1854. rx->ring_cpu_ptr = NULL;
  1855. rx->ring_dma_ptr = 0;
  1856. }
  1857. rx->ring_size = 0;
  1858. rx->last_head = 0;
  1859. }
  1860. static int lan743x_rx_ring_init(struct lan743x_rx *rx)
  1861. {
  1862. size_t ring_allocation_size = 0;
  1863. dma_addr_t dma_ptr = 0;
  1864. void *cpu_ptr = NULL;
  1865. int ret = -ENOMEM;
  1866. int index = 0;
  1867. rx->ring_size = LAN743X_RX_RING_SIZE;
  1868. if (rx->ring_size <= 1) {
  1869. ret = -EINVAL;
  1870. goto cleanup;
  1871. }
  1872. if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) {
  1873. ret = -EINVAL;
  1874. goto cleanup;
  1875. }
  1876. ring_allocation_size = ALIGN(rx->ring_size *
  1877. sizeof(struct lan743x_rx_descriptor),
  1878. PAGE_SIZE);
  1879. dma_ptr = 0;
  1880. cpu_ptr = pci_zalloc_consistent(rx->adapter->pdev,
  1881. ring_allocation_size, &dma_ptr);
  1882. if (!cpu_ptr) {
  1883. ret = -ENOMEM;
  1884. goto cleanup;
  1885. }
  1886. rx->ring_allocation_size = ring_allocation_size;
  1887. rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr;
  1888. rx->ring_dma_ptr = dma_ptr;
  1889. cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info),
  1890. GFP_KERNEL);
  1891. if (!cpu_ptr) {
  1892. ret = -ENOMEM;
  1893. goto cleanup;
  1894. }
  1895. rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr;
  1896. dma_ptr = 0;
  1897. cpu_ptr = pci_zalloc_consistent(rx->adapter->pdev,
  1898. sizeof(*rx->head_cpu_ptr), &dma_ptr);
  1899. if (!cpu_ptr) {
  1900. ret = -ENOMEM;
  1901. goto cleanup;
  1902. }
  1903. rx->head_cpu_ptr = cpu_ptr;
  1904. rx->head_dma_ptr = dma_ptr;
  1905. if (rx->head_dma_ptr & 0x3) {
  1906. ret = -ENOMEM;
  1907. goto cleanup;
  1908. }
  1909. rx->last_head = 0;
  1910. for (index = 0; index < rx->ring_size; index++) {
  1911. ret = lan743x_rx_allocate_ring_element(rx, index);
  1912. if (ret)
  1913. goto cleanup;
  1914. }
  1915. return 0;
  1916. cleanup:
  1917. lan743x_rx_ring_cleanup(rx);
  1918. return ret;
  1919. }
  1920. static void lan743x_rx_close(struct lan743x_rx *rx)
  1921. {
  1922. struct lan743x_adapter *adapter = rx->adapter;
  1923. lan743x_csr_write(adapter, FCT_RX_CTL,
  1924. FCT_RX_CTL_DIS_(rx->channel_number));
  1925. lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
  1926. FCT_RX_CTL_EN_(rx->channel_number),
  1927. 0, 1000, 20000, 100);
  1928. lan743x_csr_write(adapter, DMAC_CMD,
  1929. DMAC_CMD_STOP_R_(rx->channel_number));
  1930. lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number);
  1931. lan743x_csr_write(adapter, DMAC_INT_EN_CLR,
  1932. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  1933. lan743x_csr_write(adapter, INT_EN_CLR,
  1934. INT_BIT_DMA_RX_(rx->channel_number));
  1935. napi_disable(&rx->napi);
  1936. netif_napi_del(&rx->napi);
  1937. lan743x_rx_ring_cleanup(rx);
  1938. }
  1939. static int lan743x_rx_open(struct lan743x_rx *rx)
  1940. {
  1941. struct lan743x_adapter *adapter = rx->adapter;
  1942. u32 data = 0;
  1943. int ret;
  1944. rx->frame_count = 0;
  1945. ret = lan743x_rx_ring_init(rx);
  1946. if (ret)
  1947. goto return_error;
  1948. netif_napi_add(adapter->netdev,
  1949. &rx->napi, lan743x_rx_napi_poll,
  1950. rx->ring_size - 1);
  1951. lan743x_csr_write(adapter, DMAC_CMD,
  1952. DMAC_CMD_RX_SWR_(rx->channel_number));
  1953. lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
  1954. DMAC_CMD_RX_SWR_(rx->channel_number),
  1955. 0, 1000, 20000, 100);
  1956. /* set ring base address */
  1957. lan743x_csr_write(adapter,
  1958. RX_BASE_ADDRH(rx->channel_number),
  1959. DMA_ADDR_HIGH32(rx->ring_dma_ptr));
  1960. lan743x_csr_write(adapter,
  1961. RX_BASE_ADDRL(rx->channel_number),
  1962. DMA_ADDR_LOW32(rx->ring_dma_ptr));
  1963. /* set rx write back address */
  1964. lan743x_csr_write(adapter,
  1965. RX_HEAD_WRITEBACK_ADDRH(rx->channel_number),
  1966. DMA_ADDR_HIGH32(rx->head_dma_ptr));
  1967. lan743x_csr_write(adapter,
  1968. RX_HEAD_WRITEBACK_ADDRL(rx->channel_number),
  1969. DMA_ADDR_LOW32(rx->head_dma_ptr));
  1970. data = RX_CFG_A_RX_HP_WB_EN_;
  1971. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  1972. data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ |
  1973. RX_CFG_A_RX_WB_THRES_SET_(0x7) |
  1974. RX_CFG_A_RX_PF_THRES_SET_(16) |
  1975. RX_CFG_A_RX_PF_PRI_THRES_SET_(4));
  1976. }
  1977. /* set RX_CFG_A */
  1978. lan743x_csr_write(adapter,
  1979. RX_CFG_A(rx->channel_number), data);
  1980. /* set RX_CFG_B */
  1981. data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number));
  1982. data &= ~RX_CFG_B_RX_PAD_MASK_;
  1983. if (!RX_HEAD_PADDING)
  1984. data |= RX_CFG_B_RX_PAD_0_;
  1985. else
  1986. data |= RX_CFG_B_RX_PAD_2_;
  1987. data &= ~RX_CFG_B_RX_RING_LEN_MASK_;
  1988. data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_);
  1989. data |= RX_CFG_B_TS_ALL_RX_;
  1990. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
  1991. data |= RX_CFG_B_RDMABL_512_;
  1992. lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data);
  1993. rx->vector_flags = lan743x_intr_get_vector_flags(adapter,
  1994. INT_BIT_DMA_RX_
  1995. (rx->channel_number));
  1996. /* set RX_CFG_C */
  1997. data = 0;
  1998. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
  1999. data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_;
  2000. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
  2001. data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_;
  2002. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
  2003. data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_;
  2004. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
  2005. data |= RX_CFG_C_RX_INT_EN_R2C_;
  2006. lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data);
  2007. rx->last_tail = ((u32)(rx->ring_size - 1));
  2008. lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
  2009. rx->last_tail);
  2010. rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number));
  2011. if (rx->last_head) {
  2012. ret = -EIO;
  2013. goto napi_delete;
  2014. }
  2015. napi_enable(&rx->napi);
  2016. lan743x_csr_write(adapter, INT_EN_SET,
  2017. INT_BIT_DMA_RX_(rx->channel_number));
  2018. lan743x_csr_write(adapter, DMAC_INT_STS,
  2019. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  2020. lan743x_csr_write(adapter, DMAC_INT_EN_SET,
  2021. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  2022. lan743x_csr_write(adapter, DMAC_CMD,
  2023. DMAC_CMD_START_R_(rx->channel_number));
  2024. /* initialize fifo */
  2025. lan743x_csr_write(adapter, FCT_RX_CTL,
  2026. FCT_RX_CTL_RESET_(rx->channel_number));
  2027. lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
  2028. FCT_RX_CTL_RESET_(rx->channel_number),
  2029. 0, 1000, 20000, 100);
  2030. lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number),
  2031. FCT_FLOW_CTL_REQ_EN_ |
  2032. FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) |
  2033. FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA));
  2034. /* enable fifo */
  2035. lan743x_csr_write(adapter, FCT_RX_CTL,
  2036. FCT_RX_CTL_EN_(rx->channel_number));
  2037. return 0;
  2038. napi_delete:
  2039. netif_napi_del(&rx->napi);
  2040. lan743x_rx_ring_cleanup(rx);
  2041. return_error:
  2042. return ret;
  2043. }
  2044. static int lan743x_netdev_close(struct net_device *netdev)
  2045. {
  2046. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2047. int index;
  2048. lan743x_tx_close(&adapter->tx[0]);
  2049. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++)
  2050. lan743x_rx_close(&adapter->rx[index]);
  2051. lan743x_phy_close(adapter);
  2052. lan743x_mac_close(adapter);
  2053. lan743x_intr_close(adapter);
  2054. return 0;
  2055. }
  2056. static int lan743x_netdev_open(struct net_device *netdev)
  2057. {
  2058. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2059. int index;
  2060. int ret;
  2061. ret = lan743x_intr_open(adapter);
  2062. if (ret)
  2063. goto return_error;
  2064. ret = lan743x_mac_open(adapter);
  2065. if (ret)
  2066. goto close_intr;
  2067. ret = lan743x_phy_open(adapter);
  2068. if (ret)
  2069. goto close_mac;
  2070. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
  2071. ret = lan743x_rx_open(&adapter->rx[index]);
  2072. if (ret)
  2073. goto close_rx;
  2074. }
  2075. ret = lan743x_tx_open(&adapter->tx[0]);
  2076. if (ret)
  2077. goto close_rx;
  2078. return 0;
  2079. close_rx:
  2080. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
  2081. if (adapter->rx[index].ring_cpu_ptr)
  2082. lan743x_rx_close(&adapter->rx[index]);
  2083. }
  2084. lan743x_phy_close(adapter);
  2085. close_mac:
  2086. lan743x_mac_close(adapter);
  2087. close_intr:
  2088. lan743x_intr_close(adapter);
  2089. return_error:
  2090. netif_warn(adapter, ifup, adapter->netdev,
  2091. "Error opening LAN743x\n");
  2092. return ret;
  2093. }
  2094. static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb,
  2095. struct net_device *netdev)
  2096. {
  2097. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2098. return lan743x_tx_xmit_frame(&adapter->tx[0], skb);
  2099. }
  2100. static int lan743x_netdev_ioctl(struct net_device *netdev,
  2101. struct ifreq *ifr, int cmd)
  2102. {
  2103. if (!netif_running(netdev))
  2104. return -EINVAL;
  2105. return phy_mii_ioctl(netdev->phydev, ifr, cmd);
  2106. }
  2107. static void lan743x_netdev_set_multicast(struct net_device *netdev)
  2108. {
  2109. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2110. lan743x_rfe_set_multicast(adapter);
  2111. }
  2112. static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu)
  2113. {
  2114. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2115. int ret = 0;
  2116. ret = lan743x_mac_set_mtu(adapter, new_mtu);
  2117. if (!ret)
  2118. netdev->mtu = new_mtu;
  2119. return ret;
  2120. }
  2121. static void lan743x_netdev_get_stats64(struct net_device *netdev,
  2122. struct rtnl_link_stats64 *stats)
  2123. {
  2124. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2125. stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES);
  2126. stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES);
  2127. stats->rx_bytes = lan743x_csr_read(adapter,
  2128. STAT_RX_UNICAST_BYTE_COUNT) +
  2129. lan743x_csr_read(adapter,
  2130. STAT_RX_BROADCAST_BYTE_COUNT) +
  2131. lan743x_csr_read(adapter,
  2132. STAT_RX_MULTICAST_BYTE_COUNT);
  2133. stats->tx_bytes = lan743x_csr_read(adapter,
  2134. STAT_TX_UNICAST_BYTE_COUNT) +
  2135. lan743x_csr_read(adapter,
  2136. STAT_TX_BROADCAST_BYTE_COUNT) +
  2137. lan743x_csr_read(adapter,
  2138. STAT_TX_MULTICAST_BYTE_COUNT);
  2139. stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) +
  2140. lan743x_csr_read(adapter,
  2141. STAT_RX_ALIGNMENT_ERRORS) +
  2142. lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) +
  2143. lan743x_csr_read(adapter,
  2144. STAT_RX_UNDERSIZE_FRAME_ERRORS) +
  2145. lan743x_csr_read(adapter,
  2146. STAT_RX_OVERSIZE_FRAME_ERRORS);
  2147. stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) +
  2148. lan743x_csr_read(adapter,
  2149. STAT_TX_EXCESS_DEFERRAL_ERRORS) +
  2150. lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS);
  2151. stats->rx_dropped = lan743x_csr_read(adapter,
  2152. STAT_RX_DROPPED_FRAMES);
  2153. stats->tx_dropped = lan743x_csr_read(adapter,
  2154. STAT_TX_EXCESSIVE_COLLISION);
  2155. stats->multicast = lan743x_csr_read(adapter,
  2156. STAT_RX_MULTICAST_FRAMES) +
  2157. lan743x_csr_read(adapter,
  2158. STAT_TX_MULTICAST_FRAMES);
  2159. stats->collisions = lan743x_csr_read(adapter,
  2160. STAT_TX_SINGLE_COLLISIONS) +
  2161. lan743x_csr_read(adapter,
  2162. STAT_TX_MULTIPLE_COLLISIONS) +
  2163. lan743x_csr_read(adapter,
  2164. STAT_TX_LATE_COLLISIONS);
  2165. }
  2166. static int lan743x_netdev_set_mac_address(struct net_device *netdev,
  2167. void *addr)
  2168. {
  2169. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2170. struct sockaddr *sock_addr = addr;
  2171. int ret;
  2172. ret = eth_prepare_mac_addr_change(netdev, sock_addr);
  2173. if (ret)
  2174. return ret;
  2175. ether_addr_copy(netdev->dev_addr, sock_addr->sa_data);
  2176. lan743x_mac_set_address(adapter, sock_addr->sa_data);
  2177. lan743x_rfe_update_mac_address(adapter);
  2178. return 0;
  2179. }
  2180. static const struct net_device_ops lan743x_netdev_ops = {
  2181. .ndo_open = lan743x_netdev_open,
  2182. .ndo_stop = lan743x_netdev_close,
  2183. .ndo_start_xmit = lan743x_netdev_xmit_frame,
  2184. .ndo_do_ioctl = lan743x_netdev_ioctl,
  2185. .ndo_set_rx_mode = lan743x_netdev_set_multicast,
  2186. .ndo_change_mtu = lan743x_netdev_change_mtu,
  2187. .ndo_get_stats64 = lan743x_netdev_get_stats64,
  2188. .ndo_set_mac_address = lan743x_netdev_set_mac_address,
  2189. };
  2190. static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter)
  2191. {
  2192. lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
  2193. }
  2194. static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter)
  2195. {
  2196. mdiobus_unregister(adapter->mdiobus);
  2197. }
  2198. static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
  2199. {
  2200. unregister_netdev(adapter->netdev);
  2201. lan743x_mdiobus_cleanup(adapter);
  2202. lan743x_hardware_cleanup(adapter);
  2203. lan743x_pci_cleanup(adapter);
  2204. }
  2205. static int lan743x_hardware_init(struct lan743x_adapter *adapter,
  2206. struct pci_dev *pdev)
  2207. {
  2208. struct lan743x_tx *tx;
  2209. int index;
  2210. int ret;
  2211. adapter->intr.irq = adapter->pdev->irq;
  2212. lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
  2213. mutex_init(&adapter->dp_lock);
  2214. ret = lan743x_mac_init(adapter);
  2215. if (ret)
  2216. return ret;
  2217. ret = lan743x_phy_init(adapter);
  2218. if (ret)
  2219. return ret;
  2220. lan743x_rfe_update_mac_address(adapter);
  2221. ret = lan743x_dmac_init(adapter);
  2222. if (ret)
  2223. return ret;
  2224. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
  2225. adapter->rx[index].adapter = adapter;
  2226. adapter->rx[index].channel_number = index;
  2227. }
  2228. tx = &adapter->tx[0];
  2229. tx->adapter = adapter;
  2230. tx->channel_number = 0;
  2231. spin_lock_init(&tx->ring_lock);
  2232. return 0;
  2233. }
  2234. static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)
  2235. {
  2236. int ret;
  2237. adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev);
  2238. if (!(adapter->mdiobus)) {
  2239. ret = -ENOMEM;
  2240. goto return_error;
  2241. }
  2242. adapter->mdiobus->priv = (void *)adapter;
  2243. adapter->mdiobus->read = lan743x_mdiobus_read;
  2244. adapter->mdiobus->write = lan743x_mdiobus_write;
  2245. adapter->mdiobus->name = "lan743x-mdiobus";
  2246. snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE,
  2247. "pci-%s", pci_name(adapter->pdev));
  2248. /* set to internal PHY id */
  2249. adapter->mdiobus->phy_mask = ~(u32)BIT(1);
  2250. /* register mdiobus */
  2251. ret = mdiobus_register(adapter->mdiobus);
  2252. if (ret < 0)
  2253. goto return_error;
  2254. return 0;
  2255. return_error:
  2256. return ret;
  2257. }
  2258. /* lan743x_pcidev_probe - Device Initialization Routine
  2259. * @pdev: PCI device information struct
  2260. * @id: entry in lan743x_pci_tbl
  2261. *
  2262. * Returns 0 on success, negative on failure
  2263. *
  2264. * initializes an adapter identified by a pci_dev structure.
  2265. * The OS initialization, configuring of the adapter private structure,
  2266. * and a hardware reset occur.
  2267. **/
  2268. static int lan743x_pcidev_probe(struct pci_dev *pdev,
  2269. const struct pci_device_id *id)
  2270. {
  2271. struct lan743x_adapter *adapter = NULL;
  2272. struct net_device *netdev = NULL;
  2273. int ret = -ENODEV;
  2274. netdev = devm_alloc_etherdev(&pdev->dev,
  2275. sizeof(struct lan743x_adapter));
  2276. if (!netdev)
  2277. goto return_error;
  2278. SET_NETDEV_DEV(netdev, &pdev->dev);
  2279. pci_set_drvdata(pdev, netdev);
  2280. adapter = netdev_priv(netdev);
  2281. adapter->netdev = netdev;
  2282. adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  2283. NETIF_MSG_LINK | NETIF_MSG_IFUP |
  2284. NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED;
  2285. netdev->max_mtu = LAN743X_MAX_FRAME_SIZE;
  2286. ret = lan743x_pci_init(adapter, pdev);
  2287. if (ret)
  2288. goto return_error;
  2289. ret = lan743x_csr_init(adapter);
  2290. if (ret)
  2291. goto cleanup_pci;
  2292. ret = lan743x_hardware_init(adapter, pdev);
  2293. if (ret)
  2294. goto cleanup_pci;
  2295. ret = lan743x_mdiobus_init(adapter);
  2296. if (ret)
  2297. goto cleanup_hardware;
  2298. adapter->netdev->netdev_ops = &lan743x_netdev_ops;
  2299. adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
  2300. adapter->netdev->hw_features = adapter->netdev->features;
  2301. /* carrier off reporting is important to ethtool even BEFORE open */
  2302. netif_carrier_off(netdev);
  2303. ret = register_netdev(adapter->netdev);
  2304. if (ret < 0)
  2305. goto cleanup_mdiobus;
  2306. return 0;
  2307. cleanup_mdiobus:
  2308. lan743x_mdiobus_cleanup(adapter);
  2309. cleanup_hardware:
  2310. lan743x_hardware_cleanup(adapter);
  2311. cleanup_pci:
  2312. lan743x_pci_cleanup(adapter);
  2313. return_error:
  2314. pr_warn("Initialization failed\n");
  2315. return ret;
  2316. }
  2317. /**
  2318. * lan743x_pcidev_remove - Device Removal Routine
  2319. * @pdev: PCI device information struct
  2320. *
  2321. * this is called by the PCI subsystem to alert the driver
  2322. * that it should release a PCI device. This could be caused by a
  2323. * Hot-Plug event, or because the driver is going to be removed from
  2324. * memory.
  2325. **/
  2326. static void lan743x_pcidev_remove(struct pci_dev *pdev)
  2327. {
  2328. struct net_device *netdev = pci_get_drvdata(pdev);
  2329. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2330. lan743x_full_cleanup(adapter);
  2331. }
  2332. static void lan743x_pcidev_shutdown(struct pci_dev *pdev)
  2333. {
  2334. struct net_device *netdev = pci_get_drvdata(pdev);
  2335. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2336. rtnl_lock();
  2337. netif_device_detach(netdev);
  2338. /* close netdev when netdev is at running state.
  2339. * For instance, it is true when system goes to sleep by pm-suspend
  2340. * However, it is false when system goes to sleep by suspend GUI menu
  2341. */
  2342. if (netif_running(netdev))
  2343. lan743x_netdev_close(netdev);
  2344. rtnl_unlock();
  2345. /* clean up lan743x portion */
  2346. lan743x_hardware_cleanup(adapter);
  2347. }
  2348. static const struct pci_device_id lan743x_pcidev_tbl[] = {
  2349. { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
  2350. { 0, }
  2351. };
  2352. static struct pci_driver lan743x_pcidev_driver = {
  2353. .name = DRIVER_NAME,
  2354. .id_table = lan743x_pcidev_tbl,
  2355. .probe = lan743x_pcidev_probe,
  2356. .remove = lan743x_pcidev_remove,
  2357. .shutdown = lan743x_pcidev_shutdown,
  2358. };
  2359. module_pci_driver(lan743x_pcidev_driver);
  2360. MODULE_AUTHOR(DRIVER_AUTHOR);
  2361. MODULE_DESCRIPTION(DRIVER_DESC);
  2362. MODULE_LICENSE("GPL");