ixgb_main.c 61 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright(c) 1999 - 2008 Intel Corporation. */
  3. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  4. #include <linux/prefetch.h>
  5. #include "ixgb.h"
  6. char ixgb_driver_name[] = "ixgb";
  7. static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  8. #define DRIVERNAPI "-NAPI"
  9. #define DRV_VERSION "1.0.135-k2" DRIVERNAPI
  10. const char ixgb_driver_version[] = DRV_VERSION;
  11. static const char ixgb_copyright[] = "Copyright (c) 1999-2008 Intel Corporation.";
  12. #define IXGB_CB_LENGTH 256
  13. static unsigned int copybreak __read_mostly = IXGB_CB_LENGTH;
  14. module_param(copybreak, uint, 0644);
  15. MODULE_PARM_DESC(copybreak,
  16. "Maximum size of packet that is copied to a new buffer on receive");
  17. /* ixgb_pci_tbl - PCI Device ID Table
  18. *
  19. * Wildcard entries (PCI_ANY_ID) should come last
  20. * Last entry must be all 0s
  21. *
  22. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  23. * Class, Class Mask, private data (not used) }
  24. */
  25. static const struct pci_device_id ixgb_pci_tbl[] = {
  26. {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX,
  27. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  28. {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX_CX4,
  29. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  30. {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX_SR,
  31. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  32. {PCI_VENDOR_ID_INTEL, IXGB_DEVICE_ID_82597EX_LR,
  33. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  34. /* required last entry */
  35. {0,}
  36. };
  37. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  38. /* Local Function Prototypes */
  39. static int ixgb_init_module(void);
  40. static void ixgb_exit_module(void);
  41. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  42. static void ixgb_remove(struct pci_dev *pdev);
  43. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  44. static int ixgb_open(struct net_device *netdev);
  45. static int ixgb_close(struct net_device *netdev);
  46. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  47. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  48. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  49. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  50. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  51. static void ixgb_set_multi(struct net_device *netdev);
  52. static void ixgb_watchdog(struct timer_list *t);
  53. static netdev_tx_t ixgb_xmit_frame(struct sk_buff *skb,
  54. struct net_device *netdev);
  55. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  56. static int ixgb_set_mac(struct net_device *netdev, void *p);
  57. static irqreturn_t ixgb_intr(int irq, void *data);
  58. static bool ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  59. static int ixgb_clean(struct napi_struct *, int);
  60. static bool ixgb_clean_rx_irq(struct ixgb_adapter *, int *, int);
  61. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *, int);
  62. static void ixgb_tx_timeout(struct net_device *dev);
  63. static void ixgb_tx_timeout_task(struct work_struct *work);
  64. static void ixgb_vlan_strip_enable(struct ixgb_adapter *adapter);
  65. static void ixgb_vlan_strip_disable(struct ixgb_adapter *adapter);
  66. static int ixgb_vlan_rx_add_vid(struct net_device *netdev,
  67. __be16 proto, u16 vid);
  68. static int ixgb_vlan_rx_kill_vid(struct net_device *netdev,
  69. __be16 proto, u16 vid);
  70. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  71. #ifdef CONFIG_NET_POLL_CONTROLLER
  72. /* for netdump / net console */
  73. static void ixgb_netpoll(struct net_device *dev);
  74. #endif
  75. static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
  76. enum pci_channel_state state);
  77. static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
  78. static void ixgb_io_resume (struct pci_dev *pdev);
  79. static const struct pci_error_handlers ixgb_err_handler = {
  80. .error_detected = ixgb_io_error_detected,
  81. .slot_reset = ixgb_io_slot_reset,
  82. .resume = ixgb_io_resume,
  83. };
  84. static struct pci_driver ixgb_driver = {
  85. .name = ixgb_driver_name,
  86. .id_table = ixgb_pci_tbl,
  87. .probe = ixgb_probe,
  88. .remove = ixgb_remove,
  89. .err_handler = &ixgb_err_handler
  90. };
  91. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  92. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  93. MODULE_LICENSE("GPL");
  94. MODULE_VERSION(DRV_VERSION);
  95. #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  96. static int debug = -1;
  97. module_param(debug, int, 0);
  98. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  99. /**
  100. * ixgb_init_module - Driver Registration Routine
  101. *
  102. * ixgb_init_module is the first routine called when the driver is
  103. * loaded. All it does is register with the PCI subsystem.
  104. **/
  105. static int __init
  106. ixgb_init_module(void)
  107. {
  108. pr_info("%s - version %s\n", ixgb_driver_string, ixgb_driver_version);
  109. pr_info("%s\n", ixgb_copyright);
  110. return pci_register_driver(&ixgb_driver);
  111. }
  112. module_init(ixgb_init_module);
  113. /**
  114. * ixgb_exit_module - Driver Exit Cleanup Routine
  115. *
  116. * ixgb_exit_module is called just before the driver is removed
  117. * from memory.
  118. **/
  119. static void __exit
  120. ixgb_exit_module(void)
  121. {
  122. pci_unregister_driver(&ixgb_driver);
  123. }
  124. module_exit(ixgb_exit_module);
  125. /**
  126. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  127. * @adapter: board private structure
  128. **/
  129. static void
  130. ixgb_irq_disable(struct ixgb_adapter *adapter)
  131. {
  132. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  133. IXGB_WRITE_FLUSH(&adapter->hw);
  134. synchronize_irq(adapter->pdev->irq);
  135. }
  136. /**
  137. * ixgb_irq_enable - Enable default interrupt generation settings
  138. * @adapter: board private structure
  139. **/
  140. static void
  141. ixgb_irq_enable(struct ixgb_adapter *adapter)
  142. {
  143. u32 val = IXGB_INT_RXT0 | IXGB_INT_RXDMT0 |
  144. IXGB_INT_TXDW | IXGB_INT_LSC;
  145. if (adapter->hw.subsystem_vendor_id == PCI_VENDOR_ID_SUN)
  146. val |= IXGB_INT_GPI0;
  147. IXGB_WRITE_REG(&adapter->hw, IMS, val);
  148. IXGB_WRITE_FLUSH(&adapter->hw);
  149. }
  150. int
  151. ixgb_up(struct ixgb_adapter *adapter)
  152. {
  153. struct net_device *netdev = adapter->netdev;
  154. int err, irq_flags = IRQF_SHARED;
  155. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  156. struct ixgb_hw *hw = &adapter->hw;
  157. /* hardware has been reset, we need to reload some things */
  158. ixgb_rar_set(hw, netdev->dev_addr, 0);
  159. ixgb_set_multi(netdev);
  160. ixgb_restore_vlan(adapter);
  161. ixgb_configure_tx(adapter);
  162. ixgb_setup_rctl(adapter);
  163. ixgb_configure_rx(adapter);
  164. ixgb_alloc_rx_buffers(adapter, IXGB_DESC_UNUSED(&adapter->rx_ring));
  165. /* disable interrupts and get the hardware into a known state */
  166. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  167. /* only enable MSI if bus is in PCI-X mode */
  168. if (IXGB_READ_REG(&adapter->hw, STATUS) & IXGB_STATUS_PCIX_MODE) {
  169. err = pci_enable_msi(adapter->pdev);
  170. if (!err) {
  171. adapter->have_msi = true;
  172. irq_flags = 0;
  173. }
  174. /* proceed to try to request regular interrupt */
  175. }
  176. err = request_irq(adapter->pdev->irq, ixgb_intr, irq_flags,
  177. netdev->name, netdev);
  178. if (err) {
  179. if (adapter->have_msi)
  180. pci_disable_msi(adapter->pdev);
  181. netif_err(adapter, probe, adapter->netdev,
  182. "Unable to allocate interrupt Error: %d\n", err);
  183. return err;
  184. }
  185. if ((hw->max_frame_size != max_frame) ||
  186. (hw->max_frame_size !=
  187. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  188. hw->max_frame_size = max_frame;
  189. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  190. if (hw->max_frame_size >
  191. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  192. u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
  193. if (!(ctrl0 & IXGB_CTRL0_JFE)) {
  194. ctrl0 |= IXGB_CTRL0_JFE;
  195. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  196. }
  197. }
  198. }
  199. clear_bit(__IXGB_DOWN, &adapter->flags);
  200. napi_enable(&adapter->napi);
  201. ixgb_irq_enable(adapter);
  202. netif_wake_queue(netdev);
  203. mod_timer(&adapter->watchdog_timer, jiffies);
  204. return 0;
  205. }
  206. void
  207. ixgb_down(struct ixgb_adapter *adapter, bool kill_watchdog)
  208. {
  209. struct net_device *netdev = adapter->netdev;
  210. /* prevent the interrupt handler from restarting watchdog */
  211. set_bit(__IXGB_DOWN, &adapter->flags);
  212. netif_carrier_off(netdev);
  213. napi_disable(&adapter->napi);
  214. /* waiting for NAPI to complete can re-enable interrupts */
  215. ixgb_irq_disable(adapter);
  216. free_irq(adapter->pdev->irq, netdev);
  217. if (adapter->have_msi)
  218. pci_disable_msi(adapter->pdev);
  219. if (kill_watchdog)
  220. del_timer_sync(&adapter->watchdog_timer);
  221. adapter->link_speed = 0;
  222. adapter->link_duplex = 0;
  223. netif_stop_queue(netdev);
  224. ixgb_reset(adapter);
  225. ixgb_clean_tx_ring(adapter);
  226. ixgb_clean_rx_ring(adapter);
  227. }
  228. void
  229. ixgb_reset(struct ixgb_adapter *adapter)
  230. {
  231. struct ixgb_hw *hw = &adapter->hw;
  232. ixgb_adapter_stop(hw);
  233. if (!ixgb_init_hw(hw))
  234. netif_err(adapter, probe, adapter->netdev, "ixgb_init_hw failed\n");
  235. /* restore frame size information */
  236. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  237. if (hw->max_frame_size >
  238. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  239. u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
  240. if (!(ctrl0 & IXGB_CTRL0_JFE)) {
  241. ctrl0 |= IXGB_CTRL0_JFE;
  242. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  243. }
  244. }
  245. }
  246. static netdev_features_t
  247. ixgb_fix_features(struct net_device *netdev, netdev_features_t features)
  248. {
  249. /*
  250. * Tx VLAN insertion does not work per HW design when Rx stripping is
  251. * disabled.
  252. */
  253. if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
  254. features &= ~NETIF_F_HW_VLAN_CTAG_TX;
  255. return features;
  256. }
  257. static int
  258. ixgb_set_features(struct net_device *netdev, netdev_features_t features)
  259. {
  260. struct ixgb_adapter *adapter = netdev_priv(netdev);
  261. netdev_features_t changed = features ^ netdev->features;
  262. if (!(changed & (NETIF_F_RXCSUM|NETIF_F_HW_VLAN_CTAG_RX)))
  263. return 0;
  264. adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
  265. if (netif_running(netdev)) {
  266. ixgb_down(adapter, true);
  267. ixgb_up(adapter);
  268. ixgb_set_speed_duplex(netdev);
  269. } else
  270. ixgb_reset(adapter);
  271. return 0;
  272. }
  273. static const struct net_device_ops ixgb_netdev_ops = {
  274. .ndo_open = ixgb_open,
  275. .ndo_stop = ixgb_close,
  276. .ndo_start_xmit = ixgb_xmit_frame,
  277. .ndo_set_rx_mode = ixgb_set_multi,
  278. .ndo_validate_addr = eth_validate_addr,
  279. .ndo_set_mac_address = ixgb_set_mac,
  280. .ndo_change_mtu = ixgb_change_mtu,
  281. .ndo_tx_timeout = ixgb_tx_timeout,
  282. .ndo_vlan_rx_add_vid = ixgb_vlan_rx_add_vid,
  283. .ndo_vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid,
  284. #ifdef CONFIG_NET_POLL_CONTROLLER
  285. .ndo_poll_controller = ixgb_netpoll,
  286. #endif
  287. .ndo_fix_features = ixgb_fix_features,
  288. .ndo_set_features = ixgb_set_features,
  289. };
  290. /**
  291. * ixgb_probe - Device Initialization Routine
  292. * @pdev: PCI device information struct
  293. * @ent: entry in ixgb_pci_tbl
  294. *
  295. * Returns 0 on success, negative on failure
  296. *
  297. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  298. * The OS initialization, configuring of the adapter private structure,
  299. * and a hardware reset occur.
  300. **/
  301. static int
  302. ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  303. {
  304. struct net_device *netdev = NULL;
  305. struct ixgb_adapter *adapter;
  306. static int cards_found = 0;
  307. int pci_using_dac;
  308. int i;
  309. int err;
  310. err = pci_enable_device(pdev);
  311. if (err)
  312. return err;
  313. pci_using_dac = 0;
  314. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
  315. if (!err) {
  316. pci_using_dac = 1;
  317. } else {
  318. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  319. if (err) {
  320. pr_err("No usable DMA configuration, aborting\n");
  321. goto err_dma_mask;
  322. }
  323. }
  324. err = pci_request_regions(pdev, ixgb_driver_name);
  325. if (err)
  326. goto err_request_regions;
  327. pci_set_master(pdev);
  328. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  329. if (!netdev) {
  330. err = -ENOMEM;
  331. goto err_alloc_etherdev;
  332. }
  333. SET_NETDEV_DEV(netdev, &pdev->dev);
  334. pci_set_drvdata(pdev, netdev);
  335. adapter = netdev_priv(netdev);
  336. adapter->netdev = netdev;
  337. adapter->pdev = pdev;
  338. adapter->hw.back = adapter;
  339. adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  340. adapter->hw.hw_addr = pci_ioremap_bar(pdev, BAR_0);
  341. if (!adapter->hw.hw_addr) {
  342. err = -EIO;
  343. goto err_ioremap;
  344. }
  345. for (i = BAR_1; i <= BAR_5; i++) {
  346. if (pci_resource_len(pdev, i) == 0)
  347. continue;
  348. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  349. adapter->hw.io_base = pci_resource_start(pdev, i);
  350. break;
  351. }
  352. }
  353. netdev->netdev_ops = &ixgb_netdev_ops;
  354. ixgb_set_ethtool_ops(netdev);
  355. netdev->watchdog_timeo = 5 * HZ;
  356. netif_napi_add(netdev, &adapter->napi, ixgb_clean, 64);
  357. strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
  358. adapter->bd_number = cards_found;
  359. adapter->link_speed = 0;
  360. adapter->link_duplex = 0;
  361. /* setup the private structure */
  362. err = ixgb_sw_init(adapter);
  363. if (err)
  364. goto err_sw_init;
  365. netdev->hw_features = NETIF_F_SG |
  366. NETIF_F_TSO |
  367. NETIF_F_HW_CSUM |
  368. NETIF_F_HW_VLAN_CTAG_TX |
  369. NETIF_F_HW_VLAN_CTAG_RX;
  370. netdev->features = netdev->hw_features |
  371. NETIF_F_HW_VLAN_CTAG_FILTER;
  372. netdev->hw_features |= NETIF_F_RXCSUM;
  373. if (pci_using_dac) {
  374. netdev->features |= NETIF_F_HIGHDMA;
  375. netdev->vlan_features |= NETIF_F_HIGHDMA;
  376. }
  377. /* MTU range: 68 - 16114 */
  378. netdev->min_mtu = ETH_MIN_MTU;
  379. netdev->max_mtu = IXGB_MAX_JUMBO_FRAME_SIZE - ETH_HLEN;
  380. /* make sure the EEPROM is good */
  381. if (!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  382. netif_err(adapter, probe, adapter->netdev,
  383. "The EEPROM Checksum Is Not Valid\n");
  384. err = -EIO;
  385. goto err_eeprom;
  386. }
  387. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  388. if (!is_valid_ether_addr(netdev->dev_addr)) {
  389. netif_err(adapter, probe, adapter->netdev, "Invalid MAC Address\n");
  390. err = -EIO;
  391. goto err_eeprom;
  392. }
  393. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  394. timer_setup(&adapter->watchdog_timer, ixgb_watchdog, 0);
  395. INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
  396. strcpy(netdev->name, "eth%d");
  397. err = register_netdev(netdev);
  398. if (err)
  399. goto err_register;
  400. /* carrier off reporting is important to ethtool even BEFORE open */
  401. netif_carrier_off(netdev);
  402. netif_info(adapter, probe, adapter->netdev,
  403. "Intel(R) PRO/10GbE Network Connection\n");
  404. ixgb_check_options(adapter);
  405. /* reset the hardware with the new settings */
  406. ixgb_reset(adapter);
  407. cards_found++;
  408. return 0;
  409. err_register:
  410. err_sw_init:
  411. err_eeprom:
  412. iounmap(adapter->hw.hw_addr);
  413. err_ioremap:
  414. free_netdev(netdev);
  415. err_alloc_etherdev:
  416. pci_release_regions(pdev);
  417. err_request_regions:
  418. err_dma_mask:
  419. pci_disable_device(pdev);
  420. return err;
  421. }
  422. /**
  423. * ixgb_remove - Device Removal Routine
  424. * @pdev: PCI device information struct
  425. *
  426. * ixgb_remove is called by the PCI subsystem to alert the driver
  427. * that it should release a PCI device. The could be caused by a
  428. * Hot-Plug event, or because the driver is going to be removed from
  429. * memory.
  430. **/
  431. static void
  432. ixgb_remove(struct pci_dev *pdev)
  433. {
  434. struct net_device *netdev = pci_get_drvdata(pdev);
  435. struct ixgb_adapter *adapter = netdev_priv(netdev);
  436. cancel_work_sync(&adapter->tx_timeout_task);
  437. unregister_netdev(netdev);
  438. iounmap(adapter->hw.hw_addr);
  439. pci_release_regions(pdev);
  440. free_netdev(netdev);
  441. pci_disable_device(pdev);
  442. }
  443. /**
  444. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  445. * @adapter: board private structure to initialize
  446. *
  447. * ixgb_sw_init initializes the Adapter private data structure.
  448. * Fields are initialized based on PCI device information and
  449. * OS network device settings (MTU size).
  450. **/
  451. static int
  452. ixgb_sw_init(struct ixgb_adapter *adapter)
  453. {
  454. struct ixgb_hw *hw = &adapter->hw;
  455. struct net_device *netdev = adapter->netdev;
  456. struct pci_dev *pdev = adapter->pdev;
  457. /* PCI config space info */
  458. hw->vendor_id = pdev->vendor;
  459. hw->device_id = pdev->device;
  460. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  461. hw->subsystem_id = pdev->subsystem_device;
  462. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  463. adapter->rx_buffer_len = hw->max_frame_size + 8; /* + 8 for errata */
  464. if ((hw->device_id == IXGB_DEVICE_ID_82597EX) ||
  465. (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4) ||
  466. (hw->device_id == IXGB_DEVICE_ID_82597EX_LR) ||
  467. (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  468. hw->mac_type = ixgb_82597;
  469. else {
  470. /* should never have loaded on this device */
  471. netif_err(adapter, probe, adapter->netdev, "unsupported device id\n");
  472. }
  473. /* enable flow control to be programmed */
  474. hw->fc.send_xon = 1;
  475. set_bit(__IXGB_DOWN, &adapter->flags);
  476. return 0;
  477. }
  478. /**
  479. * ixgb_open - Called when a network interface is made active
  480. * @netdev: network interface device structure
  481. *
  482. * Returns 0 on success, negative value on failure
  483. *
  484. * The open entry point is called when a network interface is made
  485. * active by the system (IFF_UP). At this point all resources needed
  486. * for transmit and receive operations are allocated, the interrupt
  487. * handler is registered with the OS, the watchdog timer is started,
  488. * and the stack is notified that the interface is ready.
  489. **/
  490. static int
  491. ixgb_open(struct net_device *netdev)
  492. {
  493. struct ixgb_adapter *adapter = netdev_priv(netdev);
  494. int err;
  495. /* allocate transmit descriptors */
  496. err = ixgb_setup_tx_resources(adapter);
  497. if (err)
  498. goto err_setup_tx;
  499. netif_carrier_off(netdev);
  500. /* allocate receive descriptors */
  501. err = ixgb_setup_rx_resources(adapter);
  502. if (err)
  503. goto err_setup_rx;
  504. err = ixgb_up(adapter);
  505. if (err)
  506. goto err_up;
  507. netif_start_queue(netdev);
  508. return 0;
  509. err_up:
  510. ixgb_free_rx_resources(adapter);
  511. err_setup_rx:
  512. ixgb_free_tx_resources(adapter);
  513. err_setup_tx:
  514. ixgb_reset(adapter);
  515. return err;
  516. }
  517. /**
  518. * ixgb_close - Disables a network interface
  519. * @netdev: network interface device structure
  520. *
  521. * Returns 0, this is not allowed to fail
  522. *
  523. * The close entry point is called when an interface is de-activated
  524. * by the OS. The hardware is still under the drivers control, but
  525. * needs to be disabled. A global MAC reset is issued to stop the
  526. * hardware, and all transmit and receive resources are freed.
  527. **/
  528. static int
  529. ixgb_close(struct net_device *netdev)
  530. {
  531. struct ixgb_adapter *adapter = netdev_priv(netdev);
  532. ixgb_down(adapter, true);
  533. ixgb_free_tx_resources(adapter);
  534. ixgb_free_rx_resources(adapter);
  535. return 0;
  536. }
  537. /**
  538. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  539. * @adapter: board private structure
  540. *
  541. * Return 0 on success, negative on failure
  542. **/
  543. int
  544. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  545. {
  546. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  547. struct pci_dev *pdev = adapter->pdev;
  548. int size;
  549. size = sizeof(struct ixgb_buffer) * txdr->count;
  550. txdr->buffer_info = vzalloc(size);
  551. if (!txdr->buffer_info)
  552. return -ENOMEM;
  553. /* round up to nearest 4K */
  554. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  555. txdr->size = ALIGN(txdr->size, 4096);
  556. txdr->desc = dma_zalloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
  557. GFP_KERNEL);
  558. if (!txdr->desc) {
  559. vfree(txdr->buffer_info);
  560. return -ENOMEM;
  561. }
  562. txdr->next_to_use = 0;
  563. txdr->next_to_clean = 0;
  564. return 0;
  565. }
  566. /**
  567. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  568. * @adapter: board private structure
  569. *
  570. * Configure the Tx unit of the MAC after a reset.
  571. **/
  572. static void
  573. ixgb_configure_tx(struct ixgb_adapter *adapter)
  574. {
  575. u64 tdba = adapter->tx_ring.dma;
  576. u32 tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  577. u32 tctl;
  578. struct ixgb_hw *hw = &adapter->hw;
  579. /* Setup the Base and Length of the Tx Descriptor Ring
  580. * tx_ring.dma can be either a 32 or 64 bit value
  581. */
  582. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  583. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  584. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  585. /* Setup the HW Tx Head and Tail descriptor pointers */
  586. IXGB_WRITE_REG(hw, TDH, 0);
  587. IXGB_WRITE_REG(hw, TDT, 0);
  588. /* don't set up txdctl, it induces performance problems if configured
  589. * incorrectly */
  590. /* Set the Tx Interrupt Delay register */
  591. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  592. /* Program the Transmit Control Register */
  593. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  594. IXGB_WRITE_REG(hw, TCTL, tctl);
  595. /* Setup Transmit Descriptor Settings for this adapter */
  596. adapter->tx_cmd_type =
  597. IXGB_TX_DESC_TYPE |
  598. (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  599. }
  600. /**
  601. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  602. * @adapter: board private structure
  603. *
  604. * Returns 0 on success, negative on failure
  605. **/
  606. int
  607. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  608. {
  609. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  610. struct pci_dev *pdev = adapter->pdev;
  611. int size;
  612. size = sizeof(struct ixgb_buffer) * rxdr->count;
  613. rxdr->buffer_info = vzalloc(size);
  614. if (!rxdr->buffer_info)
  615. return -ENOMEM;
  616. /* Round up to nearest 4K */
  617. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  618. rxdr->size = ALIGN(rxdr->size, 4096);
  619. rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
  620. GFP_KERNEL);
  621. if (!rxdr->desc) {
  622. vfree(rxdr->buffer_info);
  623. return -ENOMEM;
  624. }
  625. memset(rxdr->desc, 0, rxdr->size);
  626. rxdr->next_to_clean = 0;
  627. rxdr->next_to_use = 0;
  628. return 0;
  629. }
  630. /**
  631. * ixgb_setup_rctl - configure the receive control register
  632. * @adapter: Board private structure
  633. **/
  634. static void
  635. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  636. {
  637. u32 rctl;
  638. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  639. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  640. rctl |=
  641. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  642. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  643. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  644. rctl |= IXGB_RCTL_SECRC;
  645. if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
  646. rctl |= IXGB_RCTL_BSIZE_2048;
  647. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
  648. rctl |= IXGB_RCTL_BSIZE_4096;
  649. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
  650. rctl |= IXGB_RCTL_BSIZE_8192;
  651. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
  652. rctl |= IXGB_RCTL_BSIZE_16384;
  653. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  654. }
  655. /**
  656. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  657. * @adapter: board private structure
  658. *
  659. * Configure the Rx unit of the MAC after a reset.
  660. **/
  661. static void
  662. ixgb_configure_rx(struct ixgb_adapter *adapter)
  663. {
  664. u64 rdba = adapter->rx_ring.dma;
  665. u32 rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  666. struct ixgb_hw *hw = &adapter->hw;
  667. u32 rctl;
  668. u32 rxcsum;
  669. /* make sure receives are disabled while setting up the descriptors */
  670. rctl = IXGB_READ_REG(hw, RCTL);
  671. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  672. /* set the Receive Delay Timer Register */
  673. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  674. /* Setup the Base and Length of the Rx Descriptor Ring */
  675. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  676. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  677. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  678. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  679. IXGB_WRITE_REG(hw, RDH, 0);
  680. IXGB_WRITE_REG(hw, RDT, 0);
  681. /* due to the hardware errata with RXDCTL, we are unable to use any of
  682. * the performance enhancing features of it without causing other
  683. * subtle bugs, some of the bugs could include receive length
  684. * corruption at high data rates (WTHRESH > 0) and/or receive
  685. * descriptor ring irregularites (particularly in hardware cache) */
  686. IXGB_WRITE_REG(hw, RXDCTL, 0);
  687. /* Enable Receive Checksum Offload for TCP and UDP */
  688. if (adapter->rx_csum) {
  689. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  690. rxcsum |= IXGB_RXCSUM_TUOFL;
  691. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  692. }
  693. /* Enable Receives */
  694. IXGB_WRITE_REG(hw, RCTL, rctl);
  695. }
  696. /**
  697. * ixgb_free_tx_resources - Free Tx Resources
  698. * @adapter: board private structure
  699. *
  700. * Free all transmit software resources
  701. **/
  702. void
  703. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  704. {
  705. struct pci_dev *pdev = adapter->pdev;
  706. ixgb_clean_tx_ring(adapter);
  707. vfree(adapter->tx_ring.buffer_info);
  708. adapter->tx_ring.buffer_info = NULL;
  709. dma_free_coherent(&pdev->dev, adapter->tx_ring.size,
  710. adapter->tx_ring.desc, adapter->tx_ring.dma);
  711. adapter->tx_ring.desc = NULL;
  712. }
  713. static void
  714. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  715. struct ixgb_buffer *buffer_info)
  716. {
  717. if (buffer_info->dma) {
  718. if (buffer_info->mapped_as_page)
  719. dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
  720. buffer_info->length, DMA_TO_DEVICE);
  721. else
  722. dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
  723. buffer_info->length, DMA_TO_DEVICE);
  724. buffer_info->dma = 0;
  725. }
  726. if (buffer_info->skb) {
  727. dev_kfree_skb_any(buffer_info->skb);
  728. buffer_info->skb = NULL;
  729. }
  730. buffer_info->time_stamp = 0;
  731. /* these fields must always be initialized in tx
  732. * buffer_info->length = 0;
  733. * buffer_info->next_to_watch = 0; */
  734. }
  735. /**
  736. * ixgb_clean_tx_ring - Free Tx Buffers
  737. * @adapter: board private structure
  738. **/
  739. static void
  740. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  741. {
  742. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  743. struct ixgb_buffer *buffer_info;
  744. unsigned long size;
  745. unsigned int i;
  746. /* Free all the Tx ring sk_buffs */
  747. for (i = 0; i < tx_ring->count; i++) {
  748. buffer_info = &tx_ring->buffer_info[i];
  749. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  750. }
  751. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  752. memset(tx_ring->buffer_info, 0, size);
  753. /* Zero out the descriptor ring */
  754. memset(tx_ring->desc, 0, tx_ring->size);
  755. tx_ring->next_to_use = 0;
  756. tx_ring->next_to_clean = 0;
  757. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  758. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  759. }
  760. /**
  761. * ixgb_free_rx_resources - Free Rx Resources
  762. * @adapter: board private structure
  763. *
  764. * Free all receive software resources
  765. **/
  766. void
  767. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  768. {
  769. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  770. struct pci_dev *pdev = adapter->pdev;
  771. ixgb_clean_rx_ring(adapter);
  772. vfree(rx_ring->buffer_info);
  773. rx_ring->buffer_info = NULL;
  774. dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
  775. rx_ring->dma);
  776. rx_ring->desc = NULL;
  777. }
  778. /**
  779. * ixgb_clean_rx_ring - Free Rx Buffers
  780. * @adapter: board private structure
  781. **/
  782. static void
  783. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  784. {
  785. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  786. struct ixgb_buffer *buffer_info;
  787. struct pci_dev *pdev = adapter->pdev;
  788. unsigned long size;
  789. unsigned int i;
  790. /* Free all the Rx ring sk_buffs */
  791. for (i = 0; i < rx_ring->count; i++) {
  792. buffer_info = &rx_ring->buffer_info[i];
  793. if (buffer_info->dma) {
  794. dma_unmap_single(&pdev->dev,
  795. buffer_info->dma,
  796. buffer_info->length,
  797. DMA_FROM_DEVICE);
  798. buffer_info->dma = 0;
  799. buffer_info->length = 0;
  800. }
  801. if (buffer_info->skb) {
  802. dev_kfree_skb(buffer_info->skb);
  803. buffer_info->skb = NULL;
  804. }
  805. }
  806. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  807. memset(rx_ring->buffer_info, 0, size);
  808. /* Zero out the descriptor ring */
  809. memset(rx_ring->desc, 0, rx_ring->size);
  810. rx_ring->next_to_clean = 0;
  811. rx_ring->next_to_use = 0;
  812. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  813. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  814. }
  815. /**
  816. * ixgb_set_mac - Change the Ethernet Address of the NIC
  817. * @netdev: network interface device structure
  818. * @p: pointer to an address structure
  819. *
  820. * Returns 0 on success, negative on failure
  821. **/
  822. static int
  823. ixgb_set_mac(struct net_device *netdev, void *p)
  824. {
  825. struct ixgb_adapter *adapter = netdev_priv(netdev);
  826. struct sockaddr *addr = p;
  827. if (!is_valid_ether_addr(addr->sa_data))
  828. return -EADDRNOTAVAIL;
  829. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  830. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  831. return 0;
  832. }
  833. /**
  834. * ixgb_set_multi - Multicast and Promiscuous mode set
  835. * @netdev: network interface device structure
  836. *
  837. * The set_multi entry point is called whenever the multicast address
  838. * list or the network interface flags are updated. This routine is
  839. * responsible for configuring the hardware for proper multicast,
  840. * promiscuous mode, and all-multi behavior.
  841. **/
  842. static void
  843. ixgb_set_multi(struct net_device *netdev)
  844. {
  845. struct ixgb_adapter *adapter = netdev_priv(netdev);
  846. struct ixgb_hw *hw = &adapter->hw;
  847. struct netdev_hw_addr *ha;
  848. u32 rctl;
  849. /* Check for Promiscuous and All Multicast modes */
  850. rctl = IXGB_READ_REG(hw, RCTL);
  851. if (netdev->flags & IFF_PROMISC) {
  852. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  853. /* disable VLAN filtering */
  854. rctl &= ~IXGB_RCTL_CFIEN;
  855. rctl &= ~IXGB_RCTL_VFE;
  856. } else {
  857. if (netdev->flags & IFF_ALLMULTI) {
  858. rctl |= IXGB_RCTL_MPE;
  859. rctl &= ~IXGB_RCTL_UPE;
  860. } else {
  861. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  862. }
  863. /* enable VLAN filtering */
  864. rctl |= IXGB_RCTL_VFE;
  865. rctl &= ~IXGB_RCTL_CFIEN;
  866. }
  867. if (netdev_mc_count(netdev) > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  868. rctl |= IXGB_RCTL_MPE;
  869. IXGB_WRITE_REG(hw, RCTL, rctl);
  870. } else {
  871. u8 *mta = kmalloc_array(ETH_ALEN,
  872. IXGB_MAX_NUM_MULTICAST_ADDRESSES,
  873. GFP_ATOMIC);
  874. u8 *addr;
  875. if (!mta)
  876. goto alloc_failed;
  877. IXGB_WRITE_REG(hw, RCTL, rctl);
  878. addr = mta;
  879. netdev_for_each_mc_addr(ha, netdev) {
  880. memcpy(addr, ha->addr, ETH_ALEN);
  881. addr += ETH_ALEN;
  882. }
  883. ixgb_mc_addr_list_update(hw, mta, netdev_mc_count(netdev), 0);
  884. kfree(mta);
  885. }
  886. alloc_failed:
  887. if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
  888. ixgb_vlan_strip_enable(adapter);
  889. else
  890. ixgb_vlan_strip_disable(adapter);
  891. }
  892. /**
  893. * ixgb_watchdog - Timer Call-back
  894. * @data: pointer to netdev cast into an unsigned long
  895. **/
  896. static void
  897. ixgb_watchdog(struct timer_list *t)
  898. {
  899. struct ixgb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
  900. struct net_device *netdev = adapter->netdev;
  901. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  902. ixgb_check_for_link(&adapter->hw);
  903. if (ixgb_check_for_bad_link(&adapter->hw)) {
  904. /* force the reset path */
  905. netif_stop_queue(netdev);
  906. }
  907. if (adapter->hw.link_up) {
  908. if (!netif_carrier_ok(netdev)) {
  909. netdev_info(netdev,
  910. "NIC Link is Up 10 Gbps Full Duplex, Flow Control: %s\n",
  911. (adapter->hw.fc.type == ixgb_fc_full) ?
  912. "RX/TX" :
  913. (adapter->hw.fc.type == ixgb_fc_rx_pause) ?
  914. "RX" :
  915. (adapter->hw.fc.type == ixgb_fc_tx_pause) ?
  916. "TX" : "None");
  917. adapter->link_speed = 10000;
  918. adapter->link_duplex = FULL_DUPLEX;
  919. netif_carrier_on(netdev);
  920. }
  921. } else {
  922. if (netif_carrier_ok(netdev)) {
  923. adapter->link_speed = 0;
  924. adapter->link_duplex = 0;
  925. netdev_info(netdev, "NIC Link is Down\n");
  926. netif_carrier_off(netdev);
  927. }
  928. }
  929. ixgb_update_stats(adapter);
  930. if (!netif_carrier_ok(netdev)) {
  931. if (IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  932. /* We've lost link, so the controller stops DMA,
  933. * but we've got queued Tx work that's never going
  934. * to get done, so reset controller to flush Tx.
  935. * (Do the reset outside of interrupt context). */
  936. schedule_work(&adapter->tx_timeout_task);
  937. /* return immediately since reset is imminent */
  938. return;
  939. }
  940. }
  941. /* Force detection of hung controller every watchdog period */
  942. adapter->detect_tx_hung = true;
  943. /* generate an interrupt to force clean up of any stragglers */
  944. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  945. /* Reset the timer */
  946. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  947. }
  948. #define IXGB_TX_FLAGS_CSUM 0x00000001
  949. #define IXGB_TX_FLAGS_VLAN 0x00000002
  950. #define IXGB_TX_FLAGS_TSO 0x00000004
  951. static int
  952. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  953. {
  954. struct ixgb_context_desc *context_desc;
  955. unsigned int i;
  956. u8 ipcss, ipcso, tucss, tucso, hdr_len;
  957. u16 ipcse, tucse, mss;
  958. if (likely(skb_is_gso(skb))) {
  959. struct ixgb_buffer *buffer_info;
  960. struct iphdr *iph;
  961. int err;
  962. err = skb_cow_head(skb, 0);
  963. if (err < 0)
  964. return err;
  965. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  966. mss = skb_shinfo(skb)->gso_size;
  967. iph = ip_hdr(skb);
  968. iph->tot_len = 0;
  969. iph->check = 0;
  970. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  971. iph->daddr, 0,
  972. IPPROTO_TCP, 0);
  973. ipcss = skb_network_offset(skb);
  974. ipcso = (void *)&(iph->check) - (void *)skb->data;
  975. ipcse = skb_transport_offset(skb) - 1;
  976. tucss = skb_transport_offset(skb);
  977. tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
  978. tucse = 0;
  979. i = adapter->tx_ring.next_to_use;
  980. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  981. buffer_info = &adapter->tx_ring.buffer_info[i];
  982. WARN_ON(buffer_info->dma != 0);
  983. context_desc->ipcss = ipcss;
  984. context_desc->ipcso = ipcso;
  985. context_desc->ipcse = cpu_to_le16(ipcse);
  986. context_desc->tucss = tucss;
  987. context_desc->tucso = tucso;
  988. context_desc->tucse = cpu_to_le16(tucse);
  989. context_desc->mss = cpu_to_le16(mss);
  990. context_desc->hdr_len = hdr_len;
  991. context_desc->status = 0;
  992. context_desc->cmd_type_len = cpu_to_le32(
  993. IXGB_CONTEXT_DESC_TYPE
  994. | IXGB_CONTEXT_DESC_CMD_TSE
  995. | IXGB_CONTEXT_DESC_CMD_IP
  996. | IXGB_CONTEXT_DESC_CMD_TCP
  997. | IXGB_CONTEXT_DESC_CMD_IDE
  998. | (skb->len - (hdr_len)));
  999. if (++i == adapter->tx_ring.count) i = 0;
  1000. adapter->tx_ring.next_to_use = i;
  1001. return 1;
  1002. }
  1003. return 0;
  1004. }
  1005. static bool
  1006. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  1007. {
  1008. struct ixgb_context_desc *context_desc;
  1009. unsigned int i;
  1010. u8 css, cso;
  1011. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1012. struct ixgb_buffer *buffer_info;
  1013. css = skb_checksum_start_offset(skb);
  1014. cso = css + skb->csum_offset;
  1015. i = adapter->tx_ring.next_to_use;
  1016. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  1017. buffer_info = &adapter->tx_ring.buffer_info[i];
  1018. WARN_ON(buffer_info->dma != 0);
  1019. context_desc->tucss = css;
  1020. context_desc->tucso = cso;
  1021. context_desc->tucse = 0;
  1022. /* zero out any previously existing data in one instruction */
  1023. *(u32 *)&(context_desc->ipcss) = 0;
  1024. context_desc->status = 0;
  1025. context_desc->hdr_len = 0;
  1026. context_desc->mss = 0;
  1027. context_desc->cmd_type_len =
  1028. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  1029. | IXGB_TX_DESC_CMD_IDE);
  1030. if (++i == adapter->tx_ring.count) i = 0;
  1031. adapter->tx_ring.next_to_use = i;
  1032. return true;
  1033. }
  1034. return false;
  1035. }
  1036. #define IXGB_MAX_TXD_PWR 14
  1037. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  1038. static int
  1039. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  1040. unsigned int first)
  1041. {
  1042. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1043. struct pci_dev *pdev = adapter->pdev;
  1044. struct ixgb_buffer *buffer_info;
  1045. int len = skb_headlen(skb);
  1046. unsigned int offset = 0, size, count = 0, i;
  1047. unsigned int mss = skb_shinfo(skb)->gso_size;
  1048. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1049. unsigned int f;
  1050. i = tx_ring->next_to_use;
  1051. while (len) {
  1052. buffer_info = &tx_ring->buffer_info[i];
  1053. size = min(len, IXGB_MAX_DATA_PER_TXD);
  1054. /* Workaround for premature desc write-backs
  1055. * in TSO mode. Append 4-byte sentinel desc */
  1056. if (unlikely(mss && !nr_frags && size == len && size > 8))
  1057. size -= 4;
  1058. buffer_info->length = size;
  1059. WARN_ON(buffer_info->dma != 0);
  1060. buffer_info->time_stamp = jiffies;
  1061. buffer_info->mapped_as_page = false;
  1062. buffer_info->dma = dma_map_single(&pdev->dev,
  1063. skb->data + offset,
  1064. size, DMA_TO_DEVICE);
  1065. if (dma_mapping_error(&pdev->dev, buffer_info->dma))
  1066. goto dma_error;
  1067. buffer_info->next_to_watch = 0;
  1068. len -= size;
  1069. offset += size;
  1070. count++;
  1071. if (len) {
  1072. i++;
  1073. if (i == tx_ring->count)
  1074. i = 0;
  1075. }
  1076. }
  1077. for (f = 0; f < nr_frags; f++) {
  1078. const struct skb_frag_struct *frag;
  1079. frag = &skb_shinfo(skb)->frags[f];
  1080. len = skb_frag_size(frag);
  1081. offset = 0;
  1082. while (len) {
  1083. i++;
  1084. if (i == tx_ring->count)
  1085. i = 0;
  1086. buffer_info = &tx_ring->buffer_info[i];
  1087. size = min(len, IXGB_MAX_DATA_PER_TXD);
  1088. /* Workaround for premature desc write-backs
  1089. * in TSO mode. Append 4-byte sentinel desc */
  1090. if (unlikely(mss && (f == (nr_frags - 1))
  1091. && size == len && size > 8))
  1092. size -= 4;
  1093. buffer_info->length = size;
  1094. buffer_info->time_stamp = jiffies;
  1095. buffer_info->mapped_as_page = true;
  1096. buffer_info->dma =
  1097. skb_frag_dma_map(&pdev->dev, frag, offset, size,
  1098. DMA_TO_DEVICE);
  1099. if (dma_mapping_error(&pdev->dev, buffer_info->dma))
  1100. goto dma_error;
  1101. buffer_info->next_to_watch = 0;
  1102. len -= size;
  1103. offset += size;
  1104. count++;
  1105. }
  1106. }
  1107. tx_ring->buffer_info[i].skb = skb;
  1108. tx_ring->buffer_info[first].next_to_watch = i;
  1109. return count;
  1110. dma_error:
  1111. dev_err(&pdev->dev, "TX DMA map failed\n");
  1112. buffer_info->dma = 0;
  1113. if (count)
  1114. count--;
  1115. while (count--) {
  1116. if (i==0)
  1117. i += tx_ring->count;
  1118. i--;
  1119. buffer_info = &tx_ring->buffer_info[i];
  1120. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1121. }
  1122. return 0;
  1123. }
  1124. static void
  1125. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1126. {
  1127. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1128. struct ixgb_tx_desc *tx_desc = NULL;
  1129. struct ixgb_buffer *buffer_info;
  1130. u32 cmd_type_len = adapter->tx_cmd_type;
  1131. u8 status = 0;
  1132. u8 popts = 0;
  1133. unsigned int i;
  1134. if (tx_flags & IXGB_TX_FLAGS_TSO) {
  1135. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1136. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1137. }
  1138. if (tx_flags & IXGB_TX_FLAGS_CSUM)
  1139. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1140. if (tx_flags & IXGB_TX_FLAGS_VLAN)
  1141. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1142. i = tx_ring->next_to_use;
  1143. while (count--) {
  1144. buffer_info = &tx_ring->buffer_info[i];
  1145. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1146. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1147. tx_desc->cmd_type_len =
  1148. cpu_to_le32(cmd_type_len | buffer_info->length);
  1149. tx_desc->status = status;
  1150. tx_desc->popts = popts;
  1151. tx_desc->vlan = cpu_to_le16(vlan_id);
  1152. if (++i == tx_ring->count) i = 0;
  1153. }
  1154. tx_desc->cmd_type_len |=
  1155. cpu_to_le32(IXGB_TX_DESC_CMD_EOP | IXGB_TX_DESC_CMD_RS);
  1156. /* Force memory writes to complete before letting h/w
  1157. * know there are new descriptors to fetch. (Only
  1158. * applicable for weak-ordered memory model archs,
  1159. * such as IA-64). */
  1160. wmb();
  1161. tx_ring->next_to_use = i;
  1162. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1163. }
  1164. static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
  1165. {
  1166. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1167. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1168. netif_stop_queue(netdev);
  1169. /* Herbert's original patch had:
  1170. * smp_mb__after_netif_stop_queue();
  1171. * but since that doesn't exist yet, just open code it. */
  1172. smp_mb();
  1173. /* We need to check again in a case another CPU has just
  1174. * made room available. */
  1175. if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
  1176. return -EBUSY;
  1177. /* A reprieve! */
  1178. netif_start_queue(netdev);
  1179. ++adapter->restart_queue;
  1180. return 0;
  1181. }
  1182. static int ixgb_maybe_stop_tx(struct net_device *netdev,
  1183. struct ixgb_desc_ring *tx_ring, int size)
  1184. {
  1185. if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
  1186. return 0;
  1187. return __ixgb_maybe_stop_tx(netdev, size);
  1188. }
  1189. /* Tx Descriptors needed, worst case */
  1190. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1191. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1192. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
  1193. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
  1194. + 1 /* one more needed for sentinel TSO workaround */
  1195. static netdev_tx_t
  1196. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1197. {
  1198. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1199. unsigned int first;
  1200. unsigned int tx_flags = 0;
  1201. int vlan_id = 0;
  1202. int count = 0;
  1203. int tso;
  1204. if (test_bit(__IXGB_DOWN, &adapter->flags)) {
  1205. dev_kfree_skb_any(skb);
  1206. return NETDEV_TX_OK;
  1207. }
  1208. if (skb->len <= 0) {
  1209. dev_kfree_skb_any(skb);
  1210. return NETDEV_TX_OK;
  1211. }
  1212. if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
  1213. DESC_NEEDED)))
  1214. return NETDEV_TX_BUSY;
  1215. if (skb_vlan_tag_present(skb)) {
  1216. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1217. vlan_id = skb_vlan_tag_get(skb);
  1218. }
  1219. first = adapter->tx_ring.next_to_use;
  1220. tso = ixgb_tso(adapter, skb);
  1221. if (tso < 0) {
  1222. dev_kfree_skb_any(skb);
  1223. return NETDEV_TX_OK;
  1224. }
  1225. if (likely(tso))
  1226. tx_flags |= IXGB_TX_FLAGS_TSO;
  1227. else if (ixgb_tx_csum(adapter, skb))
  1228. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1229. count = ixgb_tx_map(adapter, skb, first);
  1230. if (count) {
  1231. ixgb_tx_queue(adapter, count, vlan_id, tx_flags);
  1232. /* Make sure there is space in the ring for the next send. */
  1233. ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
  1234. } else {
  1235. dev_kfree_skb_any(skb);
  1236. adapter->tx_ring.buffer_info[first].time_stamp = 0;
  1237. adapter->tx_ring.next_to_use = first;
  1238. }
  1239. return NETDEV_TX_OK;
  1240. }
  1241. /**
  1242. * ixgb_tx_timeout - Respond to a Tx Hang
  1243. * @netdev: network interface device structure
  1244. **/
  1245. static void
  1246. ixgb_tx_timeout(struct net_device *netdev)
  1247. {
  1248. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1249. /* Do the reset outside of interrupt context */
  1250. schedule_work(&adapter->tx_timeout_task);
  1251. }
  1252. static void
  1253. ixgb_tx_timeout_task(struct work_struct *work)
  1254. {
  1255. struct ixgb_adapter *adapter =
  1256. container_of(work, struct ixgb_adapter, tx_timeout_task);
  1257. adapter->tx_timeout_count++;
  1258. ixgb_down(adapter, true);
  1259. ixgb_up(adapter);
  1260. }
  1261. /**
  1262. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1263. * @netdev: network interface device structure
  1264. * @new_mtu: new value for maximum frame size
  1265. *
  1266. * Returns 0 on success, negative on failure
  1267. **/
  1268. static int
  1269. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1270. {
  1271. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1272. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1273. if (netif_running(netdev))
  1274. ixgb_down(adapter, true);
  1275. adapter->rx_buffer_len = max_frame + 8; /* + 8 for errata */
  1276. netdev->mtu = new_mtu;
  1277. if (netif_running(netdev))
  1278. ixgb_up(adapter);
  1279. return 0;
  1280. }
  1281. /**
  1282. * ixgb_update_stats - Update the board statistics counters.
  1283. * @adapter: board private structure
  1284. **/
  1285. void
  1286. ixgb_update_stats(struct ixgb_adapter *adapter)
  1287. {
  1288. struct net_device *netdev = adapter->netdev;
  1289. struct pci_dev *pdev = adapter->pdev;
  1290. /* Prevent stats update while adapter is being reset */
  1291. if (pci_channel_offline(pdev))
  1292. return;
  1293. if ((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1294. (netdev_mc_count(netdev) > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1295. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1296. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1297. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1298. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1299. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1300. /* fix up multicast stats by removing broadcasts */
  1301. if (multi >= bcast)
  1302. multi -= bcast;
  1303. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1304. adapter->stats.mprch += (multi >> 32);
  1305. adapter->stats.bprcl += bcast_l;
  1306. adapter->stats.bprch += bcast_h;
  1307. } else {
  1308. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1309. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1310. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1311. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1312. }
  1313. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1314. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1315. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1316. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1317. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1318. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1319. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1320. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1321. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1322. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1323. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1324. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1325. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1326. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1327. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1328. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1329. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1330. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1331. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1332. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1333. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1334. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1335. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1336. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1337. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1338. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1339. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1340. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1341. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1342. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1343. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1344. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1345. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1346. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1347. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1348. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1349. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1350. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1351. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1352. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1353. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1354. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1355. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1356. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1357. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1358. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1359. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1360. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1361. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1362. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1363. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1364. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1365. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1366. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1367. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1368. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1369. /* Fill out the OS statistics structure */
  1370. netdev->stats.rx_packets = adapter->stats.gprcl;
  1371. netdev->stats.tx_packets = adapter->stats.gptcl;
  1372. netdev->stats.rx_bytes = adapter->stats.gorcl;
  1373. netdev->stats.tx_bytes = adapter->stats.gotcl;
  1374. netdev->stats.multicast = adapter->stats.mprcl;
  1375. netdev->stats.collisions = 0;
  1376. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1377. * with a length in the type/len field */
  1378. netdev->stats.rx_errors =
  1379. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1380. adapter->stats.ruc +
  1381. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1382. adapter->stats.icbc +
  1383. adapter->stats.ecbc + adapter->stats.mpc;
  1384. /* see above
  1385. * netdev->stats.rx_length_errors = adapter->stats.rlec;
  1386. */
  1387. netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
  1388. netdev->stats.rx_fifo_errors = adapter->stats.mpc;
  1389. netdev->stats.rx_missed_errors = adapter->stats.mpc;
  1390. netdev->stats.rx_over_errors = adapter->stats.mpc;
  1391. netdev->stats.tx_errors = 0;
  1392. netdev->stats.rx_frame_errors = 0;
  1393. netdev->stats.tx_aborted_errors = 0;
  1394. netdev->stats.tx_carrier_errors = 0;
  1395. netdev->stats.tx_fifo_errors = 0;
  1396. netdev->stats.tx_heartbeat_errors = 0;
  1397. netdev->stats.tx_window_errors = 0;
  1398. }
  1399. #define IXGB_MAX_INTR 10
  1400. /**
  1401. * ixgb_intr - Interrupt Handler
  1402. * @irq: interrupt number
  1403. * @data: pointer to a network interface device structure
  1404. **/
  1405. static irqreturn_t
  1406. ixgb_intr(int irq, void *data)
  1407. {
  1408. struct net_device *netdev = data;
  1409. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1410. struct ixgb_hw *hw = &adapter->hw;
  1411. u32 icr = IXGB_READ_REG(hw, ICR);
  1412. if (unlikely(!icr))
  1413. return IRQ_NONE; /* Not our interrupt */
  1414. if (unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC)))
  1415. if (!test_bit(__IXGB_DOWN, &adapter->flags))
  1416. mod_timer(&adapter->watchdog_timer, jiffies);
  1417. if (napi_schedule_prep(&adapter->napi)) {
  1418. /* Disable interrupts and register for poll. The flush
  1419. of the posted write is intentionally left out.
  1420. */
  1421. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1422. __napi_schedule(&adapter->napi);
  1423. }
  1424. return IRQ_HANDLED;
  1425. }
  1426. /**
  1427. * ixgb_clean - NAPI Rx polling callback
  1428. * @adapter: board private structure
  1429. **/
  1430. static int
  1431. ixgb_clean(struct napi_struct *napi, int budget)
  1432. {
  1433. struct ixgb_adapter *adapter = container_of(napi, struct ixgb_adapter, napi);
  1434. int work_done = 0;
  1435. ixgb_clean_tx_irq(adapter);
  1436. ixgb_clean_rx_irq(adapter, &work_done, budget);
  1437. /* If budget not fully consumed, exit the polling mode */
  1438. if (work_done < budget) {
  1439. napi_complete_done(napi, work_done);
  1440. if (!test_bit(__IXGB_DOWN, &adapter->flags))
  1441. ixgb_irq_enable(adapter);
  1442. }
  1443. return work_done;
  1444. }
  1445. /**
  1446. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1447. * @adapter: board private structure
  1448. **/
  1449. static bool
  1450. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1451. {
  1452. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1453. struct net_device *netdev = adapter->netdev;
  1454. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1455. struct ixgb_buffer *buffer_info;
  1456. unsigned int i, eop;
  1457. bool cleaned = false;
  1458. i = tx_ring->next_to_clean;
  1459. eop = tx_ring->buffer_info[i].next_to_watch;
  1460. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1461. while (eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1462. rmb(); /* read buffer_info after eop_desc */
  1463. for (cleaned = false; !cleaned; ) {
  1464. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1465. buffer_info = &tx_ring->buffer_info[i];
  1466. if (tx_desc->popts &
  1467. (IXGB_TX_DESC_POPTS_TXSM |
  1468. IXGB_TX_DESC_POPTS_IXSM))
  1469. adapter->hw_csum_tx_good++;
  1470. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1471. *(u32 *)&(tx_desc->status) = 0;
  1472. cleaned = (i == eop);
  1473. if (++i == tx_ring->count) i = 0;
  1474. }
  1475. eop = tx_ring->buffer_info[i].next_to_watch;
  1476. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1477. }
  1478. tx_ring->next_to_clean = i;
  1479. if (unlikely(cleaned && netif_carrier_ok(netdev) &&
  1480. IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED)) {
  1481. /* Make sure that anybody stopping the queue after this
  1482. * sees the new next_to_clean. */
  1483. smp_mb();
  1484. if (netif_queue_stopped(netdev) &&
  1485. !(test_bit(__IXGB_DOWN, &adapter->flags))) {
  1486. netif_wake_queue(netdev);
  1487. ++adapter->restart_queue;
  1488. }
  1489. }
  1490. if (adapter->detect_tx_hung) {
  1491. /* detect a transmit hang in hardware, this serializes the
  1492. * check with the clearing of time_stamp and movement of i */
  1493. adapter->detect_tx_hung = false;
  1494. if (tx_ring->buffer_info[eop].time_stamp &&
  1495. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
  1496. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1497. IXGB_STATUS_TXOFF)) {
  1498. /* detected Tx unit hang */
  1499. netif_err(adapter, drv, adapter->netdev,
  1500. "Detected Tx Unit Hang\n"
  1501. " TDH <%x>\n"
  1502. " TDT <%x>\n"
  1503. " next_to_use <%x>\n"
  1504. " next_to_clean <%x>\n"
  1505. "buffer_info[next_to_clean]\n"
  1506. " time_stamp <%lx>\n"
  1507. " next_to_watch <%x>\n"
  1508. " jiffies <%lx>\n"
  1509. " next_to_watch.status <%x>\n",
  1510. IXGB_READ_REG(&adapter->hw, TDH),
  1511. IXGB_READ_REG(&adapter->hw, TDT),
  1512. tx_ring->next_to_use,
  1513. tx_ring->next_to_clean,
  1514. tx_ring->buffer_info[eop].time_stamp,
  1515. eop,
  1516. jiffies,
  1517. eop_desc->status);
  1518. netif_stop_queue(netdev);
  1519. }
  1520. }
  1521. return cleaned;
  1522. }
  1523. /**
  1524. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1525. * @adapter: board private structure
  1526. * @rx_desc: receive descriptor
  1527. * @sk_buff: socket buffer with received data
  1528. **/
  1529. static void
  1530. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1531. struct ixgb_rx_desc *rx_desc,
  1532. struct sk_buff *skb)
  1533. {
  1534. /* Ignore Checksum bit is set OR
  1535. * TCP Checksum has not been calculated
  1536. */
  1537. if ((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1538. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1539. skb_checksum_none_assert(skb);
  1540. return;
  1541. }
  1542. /* At this point we know the hardware did the TCP checksum */
  1543. /* now look at the TCP checksum error bit */
  1544. if (rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1545. /* let the stack verify checksum errors */
  1546. skb_checksum_none_assert(skb);
  1547. adapter->hw_csum_rx_error++;
  1548. } else {
  1549. /* TCP checksum is good */
  1550. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1551. adapter->hw_csum_rx_good++;
  1552. }
  1553. }
  1554. /*
  1555. * this should improve performance for small packets with large amounts
  1556. * of reassembly being done in the stack
  1557. */
  1558. static void ixgb_check_copybreak(struct napi_struct *napi,
  1559. struct ixgb_buffer *buffer_info,
  1560. u32 length, struct sk_buff **skb)
  1561. {
  1562. struct sk_buff *new_skb;
  1563. if (length > copybreak)
  1564. return;
  1565. new_skb = napi_alloc_skb(napi, length);
  1566. if (!new_skb)
  1567. return;
  1568. skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN,
  1569. (*skb)->data - NET_IP_ALIGN,
  1570. length + NET_IP_ALIGN);
  1571. /* save the skb in buffer_info as good */
  1572. buffer_info->skb = *skb;
  1573. *skb = new_skb;
  1574. }
  1575. /**
  1576. * ixgb_clean_rx_irq - Send received data up the network stack,
  1577. * @adapter: board private structure
  1578. **/
  1579. static bool
  1580. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1581. {
  1582. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1583. struct net_device *netdev = adapter->netdev;
  1584. struct pci_dev *pdev = adapter->pdev;
  1585. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1586. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1587. u32 length;
  1588. unsigned int i, j;
  1589. int cleaned_count = 0;
  1590. bool cleaned = false;
  1591. i = rx_ring->next_to_clean;
  1592. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1593. buffer_info = &rx_ring->buffer_info[i];
  1594. while (rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1595. struct sk_buff *skb;
  1596. u8 status;
  1597. if (*work_done >= work_to_do)
  1598. break;
  1599. (*work_done)++;
  1600. rmb(); /* read descriptor and rx_buffer_info after status DD */
  1601. status = rx_desc->status;
  1602. skb = buffer_info->skb;
  1603. buffer_info->skb = NULL;
  1604. prefetch(skb->data - NET_IP_ALIGN);
  1605. if (++i == rx_ring->count)
  1606. i = 0;
  1607. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1608. prefetch(next_rxd);
  1609. j = i + 1;
  1610. if (j == rx_ring->count)
  1611. j = 0;
  1612. next2_buffer = &rx_ring->buffer_info[j];
  1613. prefetch(next2_buffer);
  1614. next_buffer = &rx_ring->buffer_info[i];
  1615. cleaned = true;
  1616. cleaned_count++;
  1617. dma_unmap_single(&pdev->dev,
  1618. buffer_info->dma,
  1619. buffer_info->length,
  1620. DMA_FROM_DEVICE);
  1621. buffer_info->dma = 0;
  1622. length = le16_to_cpu(rx_desc->length);
  1623. rx_desc->length = 0;
  1624. if (unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
  1625. /* All receives must fit into a single buffer */
  1626. pr_debug("Receive packet consumed multiple buffers length<%x>\n",
  1627. length);
  1628. dev_kfree_skb_irq(skb);
  1629. goto rxdesc_done;
  1630. }
  1631. if (unlikely(rx_desc->errors &
  1632. (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE |
  1633. IXGB_RX_DESC_ERRORS_P | IXGB_RX_DESC_ERRORS_RXE))) {
  1634. dev_kfree_skb_irq(skb);
  1635. goto rxdesc_done;
  1636. }
  1637. ixgb_check_copybreak(&adapter->napi, buffer_info, length, &skb);
  1638. /* Good Receive */
  1639. skb_put(skb, length);
  1640. /* Receive Checksum Offload */
  1641. ixgb_rx_checksum(adapter, rx_desc, skb);
  1642. skb->protocol = eth_type_trans(skb, netdev);
  1643. if (status & IXGB_RX_DESC_STATUS_VP)
  1644. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
  1645. le16_to_cpu(rx_desc->special));
  1646. netif_receive_skb(skb);
  1647. rxdesc_done:
  1648. /* clean up descriptor, might be written over by hw */
  1649. rx_desc->status = 0;
  1650. /* return some buffers to hardware, one at a time is too slow */
  1651. if (unlikely(cleaned_count >= IXGB_RX_BUFFER_WRITE)) {
  1652. ixgb_alloc_rx_buffers(adapter, cleaned_count);
  1653. cleaned_count = 0;
  1654. }
  1655. /* use prefetched values */
  1656. rx_desc = next_rxd;
  1657. buffer_info = next_buffer;
  1658. }
  1659. rx_ring->next_to_clean = i;
  1660. cleaned_count = IXGB_DESC_UNUSED(rx_ring);
  1661. if (cleaned_count)
  1662. ixgb_alloc_rx_buffers(adapter, cleaned_count);
  1663. return cleaned;
  1664. }
  1665. /**
  1666. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1667. * @adapter: address of board private structure
  1668. **/
  1669. static void
  1670. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter, int cleaned_count)
  1671. {
  1672. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1673. struct net_device *netdev = adapter->netdev;
  1674. struct pci_dev *pdev = adapter->pdev;
  1675. struct ixgb_rx_desc *rx_desc;
  1676. struct ixgb_buffer *buffer_info;
  1677. struct sk_buff *skb;
  1678. unsigned int i;
  1679. long cleancount;
  1680. i = rx_ring->next_to_use;
  1681. buffer_info = &rx_ring->buffer_info[i];
  1682. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1683. /* leave three descriptors unused */
  1684. while (--cleancount > 2 && cleaned_count--) {
  1685. /* recycle! its good for you */
  1686. skb = buffer_info->skb;
  1687. if (skb) {
  1688. skb_trim(skb, 0);
  1689. goto map_skb;
  1690. }
  1691. skb = netdev_alloc_skb_ip_align(netdev, adapter->rx_buffer_len);
  1692. if (unlikely(!skb)) {
  1693. /* Better luck next round */
  1694. adapter->alloc_rx_buff_failed++;
  1695. break;
  1696. }
  1697. buffer_info->skb = skb;
  1698. buffer_info->length = adapter->rx_buffer_len;
  1699. map_skb:
  1700. buffer_info->dma = dma_map_single(&pdev->dev,
  1701. skb->data,
  1702. adapter->rx_buffer_len,
  1703. DMA_FROM_DEVICE);
  1704. if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
  1705. adapter->alloc_rx_buff_failed++;
  1706. break;
  1707. }
  1708. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1709. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1710. /* guarantee DD bit not set now before h/w gets descriptor
  1711. * this is the rest of the workaround for h/w double
  1712. * writeback. */
  1713. rx_desc->status = 0;
  1714. if (++i == rx_ring->count)
  1715. i = 0;
  1716. buffer_info = &rx_ring->buffer_info[i];
  1717. }
  1718. if (likely(rx_ring->next_to_use != i)) {
  1719. rx_ring->next_to_use = i;
  1720. if (unlikely(i-- == 0))
  1721. i = (rx_ring->count - 1);
  1722. /* Force memory writes to complete before letting h/w
  1723. * know there are new descriptors to fetch. (Only
  1724. * applicable for weak-ordered memory model archs, such
  1725. * as IA-64). */
  1726. wmb();
  1727. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1728. }
  1729. }
  1730. static void
  1731. ixgb_vlan_strip_enable(struct ixgb_adapter *adapter)
  1732. {
  1733. u32 ctrl;
  1734. /* enable VLAN tag insert/strip */
  1735. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1736. ctrl |= IXGB_CTRL0_VME;
  1737. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1738. }
  1739. static void
  1740. ixgb_vlan_strip_disable(struct ixgb_adapter *adapter)
  1741. {
  1742. u32 ctrl;
  1743. /* disable VLAN tag insert/strip */
  1744. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1745. ctrl &= ~IXGB_CTRL0_VME;
  1746. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1747. }
  1748. static int
  1749. ixgb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
  1750. {
  1751. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1752. u32 vfta, index;
  1753. /* add VID to filter table */
  1754. index = (vid >> 5) & 0x7F;
  1755. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1756. vfta |= (1 << (vid & 0x1F));
  1757. ixgb_write_vfta(&adapter->hw, index, vfta);
  1758. set_bit(vid, adapter->active_vlans);
  1759. return 0;
  1760. }
  1761. static int
  1762. ixgb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
  1763. {
  1764. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1765. u32 vfta, index;
  1766. /* remove VID from filter table */
  1767. index = (vid >> 5) & 0x7F;
  1768. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1769. vfta &= ~(1 << (vid & 0x1F));
  1770. ixgb_write_vfta(&adapter->hw, index, vfta);
  1771. clear_bit(vid, adapter->active_vlans);
  1772. return 0;
  1773. }
  1774. static void
  1775. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1776. {
  1777. u16 vid;
  1778. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  1779. ixgb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
  1780. }
  1781. #ifdef CONFIG_NET_POLL_CONTROLLER
  1782. /*
  1783. * Polling 'interrupt' - used by things like netconsole to send skbs
  1784. * without having to re-enable interrupts. It's not called while
  1785. * the interrupt routine is executing.
  1786. */
  1787. static void ixgb_netpoll(struct net_device *dev)
  1788. {
  1789. struct ixgb_adapter *adapter = netdev_priv(dev);
  1790. disable_irq(adapter->pdev->irq);
  1791. ixgb_intr(adapter->pdev->irq, dev);
  1792. enable_irq(adapter->pdev->irq);
  1793. }
  1794. #endif
  1795. /**
  1796. * ixgb_io_error_detected - called when PCI error is detected
  1797. * @pdev: pointer to pci device with error
  1798. * @state: pci channel state after error
  1799. *
  1800. * This callback is called by the PCI subsystem whenever
  1801. * a PCI bus error is detected.
  1802. */
  1803. static pci_ers_result_t ixgb_io_error_detected(struct pci_dev *pdev,
  1804. enum pci_channel_state state)
  1805. {
  1806. struct net_device *netdev = pci_get_drvdata(pdev);
  1807. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1808. netif_device_detach(netdev);
  1809. if (state == pci_channel_io_perm_failure)
  1810. return PCI_ERS_RESULT_DISCONNECT;
  1811. if (netif_running(netdev))
  1812. ixgb_down(adapter, true);
  1813. pci_disable_device(pdev);
  1814. /* Request a slot reset. */
  1815. return PCI_ERS_RESULT_NEED_RESET;
  1816. }
  1817. /**
  1818. * ixgb_io_slot_reset - called after the pci bus has been reset.
  1819. * @pdev pointer to pci device with error
  1820. *
  1821. * This callback is called after the PCI bus has been reset.
  1822. * Basically, this tries to restart the card from scratch.
  1823. * This is a shortened version of the device probe/discovery code,
  1824. * it resembles the first-half of the ixgb_probe() routine.
  1825. */
  1826. static pci_ers_result_t ixgb_io_slot_reset(struct pci_dev *pdev)
  1827. {
  1828. struct net_device *netdev = pci_get_drvdata(pdev);
  1829. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1830. if (pci_enable_device(pdev)) {
  1831. netif_err(adapter, probe, adapter->netdev,
  1832. "Cannot re-enable PCI device after reset\n");
  1833. return PCI_ERS_RESULT_DISCONNECT;
  1834. }
  1835. /* Perform card reset only on one instance of the card */
  1836. if (0 != PCI_FUNC (pdev->devfn))
  1837. return PCI_ERS_RESULT_RECOVERED;
  1838. pci_set_master(pdev);
  1839. netif_carrier_off(netdev);
  1840. netif_stop_queue(netdev);
  1841. ixgb_reset(adapter);
  1842. /* Make sure the EEPROM is good */
  1843. if (!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  1844. netif_err(adapter, probe, adapter->netdev,
  1845. "After reset, the EEPROM checksum is not valid\n");
  1846. return PCI_ERS_RESULT_DISCONNECT;
  1847. }
  1848. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  1849. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  1850. if (!is_valid_ether_addr(netdev->perm_addr)) {
  1851. netif_err(adapter, probe, adapter->netdev,
  1852. "After reset, invalid MAC address\n");
  1853. return PCI_ERS_RESULT_DISCONNECT;
  1854. }
  1855. return PCI_ERS_RESULT_RECOVERED;
  1856. }
  1857. /**
  1858. * ixgb_io_resume - called when its OK to resume normal operations
  1859. * @pdev pointer to pci device with error
  1860. *
  1861. * The error recovery driver tells us that its OK to resume
  1862. * normal operation. Implementation resembles the second-half
  1863. * of the ixgb_probe() routine.
  1864. */
  1865. static void ixgb_io_resume(struct pci_dev *pdev)
  1866. {
  1867. struct net_device *netdev = pci_get_drvdata(pdev);
  1868. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1869. pci_set_master(pdev);
  1870. if (netif_running(netdev)) {
  1871. if (ixgb_up(adapter)) {
  1872. pr_err("can't bring device back up after reset\n");
  1873. return;
  1874. }
  1875. }
  1876. netif_device_attach(netdev);
  1877. mod_timer(&adapter->watchdog_timer, jiffies);
  1878. }
  1879. /* ixgb_main.c */