e1000_i210.h 2.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /* Copyright(c) 2007 - 2018 Intel Corporation. */
  3. #ifndef _E1000_I210_H_
  4. #define _E1000_I210_H_
  5. s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
  6. void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
  7. s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data);
  8. s32 igb_read_invm_version(struct e1000_hw *hw,
  9. struct e1000_fw_version *invm_ver);
  10. s32 igb_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data);
  11. s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data);
  12. s32 igb_init_nvm_params_i210(struct e1000_hw *hw);
  13. bool igb_get_flash_presence_i210(struct e1000_hw *hw);
  14. s32 igb_pll_workaround_i210(struct e1000_hw *hw);
  15. s32 igb_get_cfg_done_i210(struct e1000_hw *hw);
  16. #define E1000_STM_OPCODE 0xDB00
  17. #define E1000_EEPROM_FLASH_SIZE_WORD 0x11
  18. #define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \
  19. (u8)((invm_dword) & 0x7)
  20. #define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \
  21. (u8)(((invm_dword) & 0x0000FE00) >> 9)
  22. #define INVM_DWORD_TO_WORD_DATA(invm_dword) \
  23. (u16)(((invm_dword) & 0xFFFF0000) >> 16)
  24. enum E1000_INVM_STRUCTURE_TYPE {
  25. E1000_INVM_UNINITIALIZED_STRUCTURE = 0x00,
  26. E1000_INVM_WORD_AUTOLOAD_STRUCTURE = 0x01,
  27. E1000_INVM_CSR_AUTOLOAD_STRUCTURE = 0x02,
  28. E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE = 0x03,
  29. E1000_INVM_RSA_KEY_SHA256_STRUCTURE = 0x04,
  30. E1000_INVM_INVALIDATED_STRUCTURE = 0x0F,
  31. };
  32. #define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS 8
  33. #define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS 1
  34. #define E1000_INVM_ULT_BYTES_SIZE 8
  35. #define E1000_INVM_RECORD_SIZE_IN_BYTES 4
  36. #define E1000_INVM_VER_FIELD_ONE 0x1FF8
  37. #define E1000_INVM_VER_FIELD_TWO 0x7FE000
  38. #define E1000_INVM_IMGTYPE_FIELD 0x1F800000
  39. #define E1000_INVM_MAJOR_MASK 0x3F0
  40. #define E1000_INVM_MINOR_MASK 0xF
  41. #define E1000_INVM_MAJOR_SHIFT 4
  42. #define ID_LED_DEFAULT_I210 ((ID_LED_OFF1_ON2 << 8) | \
  43. (ID_LED_DEF1_DEF2 << 4) | \
  44. (ID_LED_OFF1_OFF2))
  45. #define ID_LED_DEFAULT_I210_SERDES ((ID_LED_DEF1_DEF2 << 8) | \
  46. (ID_LED_DEF1_DEF2 << 4) | \
  47. (ID_LED_OFF1_ON2))
  48. /* NVM offset defaults for i211 device */
  49. #define NVM_INIT_CTRL_2_DEFAULT_I211 0X7243
  50. #define NVM_INIT_CTRL_4_DEFAULT_I211 0x00C1
  51. #define NVM_LED_1_CFG_DEFAULT_I211 0x0184
  52. #define NVM_LED_0_2_CFG_DEFAULT_I211 0x200C
  53. /* PLL Defines */
  54. #define E1000_PCI_PMCSR 0x44
  55. #define E1000_PCI_PMCSR_D3 0x03
  56. #define E1000_MAX_PLL_TRIES 5
  57. #define E1000_PHY_PLL_UNCONF 0xFF
  58. #define E1000_PHY_PLL_FREQ_PAGE 0xFC
  59. #define E1000_PHY_PLL_FREQ_REG 0x000E
  60. #define E1000_INVM_DEFAULT_AL 0x202F
  61. #define E1000_INVM_AUTOLOAD 0x0A
  62. #define E1000_INVM_PLL_WO_VAL 0x0010
  63. #endif