i40e_lan_hmc.h 4.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /* Copyright(c) 2013 - 2018 Intel Corporation. */
  3. #ifndef _I40E_LAN_HMC_H_
  4. #define _I40E_LAN_HMC_H_
  5. /* forward-declare the HW struct for the compiler */
  6. struct i40e_hw;
  7. /* HMC element context information */
  8. /* Rx queue context data
  9. *
  10. * The sizes of the variables may be larger than needed due to crossing byte
  11. * boundaries. If we do not have the width of the variable set to the correct
  12. * size then we could end up shifting bits off the top of the variable when the
  13. * variable is at the top of a byte and crosses over into the next byte.
  14. */
  15. struct i40e_hmc_obj_rxq {
  16. u16 head;
  17. u16 cpuid; /* bigger than needed, see above for reason */
  18. u64 base;
  19. u16 qlen;
  20. #define I40E_RXQ_CTX_DBUFF_SHIFT 7
  21. u16 dbuff; /* bigger than needed, see above for reason */
  22. #define I40E_RXQ_CTX_HBUFF_SHIFT 6
  23. u16 hbuff; /* bigger than needed, see above for reason */
  24. u8 dtype;
  25. u8 dsize;
  26. u8 crcstrip;
  27. u8 fc_ena;
  28. u8 l2tsel;
  29. u8 hsplit_0;
  30. u8 hsplit_1;
  31. u8 showiv;
  32. u32 rxmax; /* bigger than needed, see above for reason */
  33. u8 tphrdesc_ena;
  34. u8 tphwdesc_ena;
  35. u8 tphdata_ena;
  36. u8 tphhead_ena;
  37. u16 lrxqthresh; /* bigger than needed, see above for reason */
  38. u8 prefena; /* NOTE: normally must be set to 1 at init */
  39. };
  40. /* Tx queue context data
  41. *
  42. * The sizes of the variables may be larger than needed due to crossing byte
  43. * boundaries. If we do not have the width of the variable set to the correct
  44. * size then we could end up shifting bits off the top of the variable when the
  45. * variable is at the top of a byte and crosses over into the next byte.
  46. */
  47. struct i40e_hmc_obj_txq {
  48. u16 head;
  49. u8 new_context;
  50. u64 base;
  51. u8 fc_ena;
  52. u8 timesync_ena;
  53. u8 fd_ena;
  54. u8 alt_vlan_ena;
  55. u16 thead_wb;
  56. u8 cpuid;
  57. u8 head_wb_ena;
  58. u16 qlen;
  59. u8 tphrdesc_ena;
  60. u8 tphrpacket_ena;
  61. u8 tphwdesc_ena;
  62. u64 head_wb_addr;
  63. u32 crc;
  64. u16 rdylist;
  65. u8 rdylist_act;
  66. };
  67. /* for hsplit_0 field of Rx HMC context */
  68. enum i40e_hmc_obj_rx_hsplit_0 {
  69. I40E_HMC_OBJ_RX_HSPLIT_0_NO_SPLIT = 0,
  70. I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2 = 1,
  71. I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP = 2,
  72. I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP = 4,
  73. I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP = 8,
  74. };
  75. /* fcoe_cntx and fcoe_filt are for debugging purpose only */
  76. struct i40e_hmc_obj_fcoe_cntx {
  77. u32 rsv[32];
  78. };
  79. struct i40e_hmc_obj_fcoe_filt {
  80. u32 rsv[8];
  81. };
  82. /* Context sizes for LAN objects */
  83. enum i40e_hmc_lan_object_size {
  84. I40E_HMC_LAN_OBJ_SZ_8 = 0x3,
  85. I40E_HMC_LAN_OBJ_SZ_16 = 0x4,
  86. I40E_HMC_LAN_OBJ_SZ_32 = 0x5,
  87. I40E_HMC_LAN_OBJ_SZ_64 = 0x6,
  88. I40E_HMC_LAN_OBJ_SZ_128 = 0x7,
  89. I40E_HMC_LAN_OBJ_SZ_256 = 0x8,
  90. I40E_HMC_LAN_OBJ_SZ_512 = 0x9,
  91. };
  92. #define I40E_HMC_L2OBJ_BASE_ALIGNMENT 512
  93. #define I40E_HMC_OBJ_SIZE_TXQ 128
  94. #define I40E_HMC_OBJ_SIZE_RXQ 32
  95. #define I40E_HMC_OBJ_SIZE_FCOE_CNTX 128
  96. #define I40E_HMC_OBJ_SIZE_FCOE_FILT 64
  97. enum i40e_hmc_lan_rsrc_type {
  98. I40E_HMC_LAN_FULL = 0,
  99. I40E_HMC_LAN_TX = 1,
  100. I40E_HMC_LAN_RX = 2,
  101. I40E_HMC_FCOE_CTX = 3,
  102. I40E_HMC_FCOE_FILT = 4,
  103. I40E_HMC_LAN_MAX = 5
  104. };
  105. enum i40e_hmc_model {
  106. I40E_HMC_MODEL_DIRECT_PREFERRED = 0,
  107. I40E_HMC_MODEL_DIRECT_ONLY = 1,
  108. I40E_HMC_MODEL_PAGED_ONLY = 2,
  109. I40E_HMC_MODEL_UNKNOWN,
  110. };
  111. struct i40e_hmc_lan_create_obj_info {
  112. struct i40e_hmc_info *hmc_info;
  113. u32 rsrc_type;
  114. u32 start_idx;
  115. u32 count;
  116. enum i40e_sd_entry_type entry_type;
  117. u64 direct_mode_sz;
  118. };
  119. struct i40e_hmc_lan_delete_obj_info {
  120. struct i40e_hmc_info *hmc_info;
  121. u32 rsrc_type;
  122. u32 start_idx;
  123. u32 count;
  124. };
  125. i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,
  126. u32 rxq_num, u32 fcoe_cntx_num,
  127. u32 fcoe_filt_num);
  128. i40e_status i40e_configure_lan_hmc(struct i40e_hw *hw,
  129. enum i40e_hmc_model model);
  130. i40e_status i40e_shutdown_lan_hmc(struct i40e_hw *hw);
  131. i40e_status i40e_clear_lan_tx_queue_context(struct i40e_hw *hw,
  132. u16 queue);
  133. i40e_status i40e_set_lan_tx_queue_context(struct i40e_hw *hw,
  134. u16 queue,
  135. struct i40e_hmc_obj_txq *s);
  136. i40e_status i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,
  137. u16 queue);
  138. i40e_status i40e_set_lan_rx_queue_context(struct i40e_hw *hw,
  139. u16 queue,
  140. struct i40e_hmc_obj_rxq *s);
  141. #endif /* _I40E_LAN_HMC_H_ */