hinic_rx.c 12 KB

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  1. /*
  2. * Huawei HiNIC PCI Express Linux driver
  3. * Copyright(c) 2017 Huawei Technologies Co., Ltd
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/errno.h>
  18. #include <linux/pci.h>
  19. #include <linux/device.h>
  20. #include <linux/netdevice.h>
  21. #include <linux/etherdevice.h>
  22. #include <linux/u64_stats_sync.h>
  23. #include <linux/slab.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/skbuff.h>
  26. #include <linux/dma-mapping.h>
  27. #include <linux/prefetch.h>
  28. #include <linux/cpumask.h>
  29. #include <asm/barrier.h>
  30. #include "hinic_common.h"
  31. #include "hinic_hw_if.h"
  32. #include "hinic_hw_wqe.h"
  33. #include "hinic_hw_wq.h"
  34. #include "hinic_hw_qp.h"
  35. #include "hinic_hw_dev.h"
  36. #include "hinic_rx.h"
  37. #include "hinic_dev.h"
  38. #define RX_IRQ_NO_PENDING 0
  39. #define RX_IRQ_NO_COALESC 0
  40. #define RX_IRQ_NO_LLI_TIMER 0
  41. #define RX_IRQ_NO_CREDIT 0
  42. #define RX_IRQ_NO_RESEND_TIMER 0
  43. /**
  44. * hinic_rxq_clean_stats - Clean the statistics of specific queue
  45. * @rxq: Logical Rx Queue
  46. **/
  47. void hinic_rxq_clean_stats(struct hinic_rxq *rxq)
  48. {
  49. struct hinic_rxq_stats *rxq_stats = &rxq->rxq_stats;
  50. u64_stats_update_begin(&rxq_stats->syncp);
  51. rxq_stats->pkts = 0;
  52. rxq_stats->bytes = 0;
  53. u64_stats_update_end(&rxq_stats->syncp);
  54. }
  55. /**
  56. * hinic_rxq_get_stats - get statistics of Rx Queue
  57. * @rxq: Logical Rx Queue
  58. * @stats: return updated stats here
  59. **/
  60. void hinic_rxq_get_stats(struct hinic_rxq *rxq, struct hinic_rxq_stats *stats)
  61. {
  62. struct hinic_rxq_stats *rxq_stats = &rxq->rxq_stats;
  63. unsigned int start;
  64. u64_stats_update_begin(&stats->syncp);
  65. do {
  66. start = u64_stats_fetch_begin(&rxq_stats->syncp);
  67. stats->pkts = rxq_stats->pkts;
  68. stats->bytes = rxq_stats->bytes;
  69. } while (u64_stats_fetch_retry(&rxq_stats->syncp, start));
  70. u64_stats_update_end(&stats->syncp);
  71. }
  72. /**
  73. * rxq_stats_init - Initialize the statistics of specific queue
  74. * @rxq: Logical Rx Queue
  75. **/
  76. static void rxq_stats_init(struct hinic_rxq *rxq)
  77. {
  78. struct hinic_rxq_stats *rxq_stats = &rxq->rxq_stats;
  79. u64_stats_init(&rxq_stats->syncp);
  80. hinic_rxq_clean_stats(rxq);
  81. }
  82. /**
  83. * rx_alloc_skb - allocate skb and map it to dma address
  84. * @rxq: rx queue
  85. * @dma_addr: returned dma address for the skb
  86. *
  87. * Return skb
  88. **/
  89. static struct sk_buff *rx_alloc_skb(struct hinic_rxq *rxq,
  90. dma_addr_t *dma_addr)
  91. {
  92. struct hinic_dev *nic_dev = netdev_priv(rxq->netdev);
  93. struct hinic_hwdev *hwdev = nic_dev->hwdev;
  94. struct hinic_hwif *hwif = hwdev->hwif;
  95. struct pci_dev *pdev = hwif->pdev;
  96. struct sk_buff *skb;
  97. dma_addr_t addr;
  98. int err;
  99. skb = netdev_alloc_skb_ip_align(rxq->netdev, rxq->rq->buf_sz);
  100. if (!skb) {
  101. netdev_err(rxq->netdev, "Failed to allocate Rx SKB\n");
  102. return NULL;
  103. }
  104. addr = dma_map_single(&pdev->dev, skb->data, rxq->rq->buf_sz,
  105. DMA_FROM_DEVICE);
  106. err = dma_mapping_error(&pdev->dev, addr);
  107. if (err) {
  108. dev_err(&pdev->dev, "Failed to map Rx DMA, err = %d\n", err);
  109. goto err_rx_map;
  110. }
  111. *dma_addr = addr;
  112. return skb;
  113. err_rx_map:
  114. dev_kfree_skb_any(skb);
  115. return NULL;
  116. }
  117. /**
  118. * rx_unmap_skb - unmap the dma address of the skb
  119. * @rxq: rx queue
  120. * @dma_addr: dma address of the skb
  121. **/
  122. static void rx_unmap_skb(struct hinic_rxq *rxq, dma_addr_t dma_addr)
  123. {
  124. struct hinic_dev *nic_dev = netdev_priv(rxq->netdev);
  125. struct hinic_hwdev *hwdev = nic_dev->hwdev;
  126. struct hinic_hwif *hwif = hwdev->hwif;
  127. struct pci_dev *pdev = hwif->pdev;
  128. dma_unmap_single(&pdev->dev, dma_addr, rxq->rq->buf_sz,
  129. DMA_FROM_DEVICE);
  130. }
  131. /**
  132. * rx_free_skb - unmap and free skb
  133. * @rxq: rx queue
  134. * @skb: skb to free
  135. * @dma_addr: dma address of the skb
  136. **/
  137. static void rx_free_skb(struct hinic_rxq *rxq, struct sk_buff *skb,
  138. dma_addr_t dma_addr)
  139. {
  140. rx_unmap_skb(rxq, dma_addr);
  141. dev_kfree_skb_any(skb);
  142. }
  143. /**
  144. * rx_alloc_pkts - allocate pkts in rx queue
  145. * @rxq: rx queue
  146. *
  147. * Return number of skbs allocated
  148. **/
  149. static int rx_alloc_pkts(struct hinic_rxq *rxq)
  150. {
  151. struct hinic_dev *nic_dev = netdev_priv(rxq->netdev);
  152. struct hinic_rq_wqe *rq_wqe;
  153. unsigned int free_wqebbs;
  154. struct hinic_sge sge;
  155. dma_addr_t dma_addr;
  156. struct sk_buff *skb;
  157. u16 prod_idx;
  158. int i;
  159. free_wqebbs = hinic_get_rq_free_wqebbs(rxq->rq);
  160. /* Limit the allocation chunks */
  161. if (free_wqebbs > nic_dev->rx_weight)
  162. free_wqebbs = nic_dev->rx_weight;
  163. for (i = 0; i < free_wqebbs; i++) {
  164. skb = rx_alloc_skb(rxq, &dma_addr);
  165. if (!skb) {
  166. netdev_err(rxq->netdev, "Failed to alloc Rx skb\n");
  167. goto skb_out;
  168. }
  169. hinic_set_sge(&sge, dma_addr, skb->len);
  170. rq_wqe = hinic_rq_get_wqe(rxq->rq, HINIC_RQ_WQE_SIZE,
  171. &prod_idx);
  172. if (!rq_wqe) {
  173. rx_free_skb(rxq, skb, dma_addr);
  174. goto skb_out;
  175. }
  176. hinic_rq_prepare_wqe(rxq->rq, prod_idx, rq_wqe, &sge);
  177. hinic_rq_write_wqe(rxq->rq, prod_idx, rq_wqe, skb);
  178. }
  179. skb_out:
  180. if (i) {
  181. wmb(); /* write all the wqes before update PI */
  182. hinic_rq_update(rxq->rq, prod_idx);
  183. }
  184. tasklet_schedule(&rxq->rx_task);
  185. return i;
  186. }
  187. /**
  188. * free_all_rx_skbs - free all skbs in rx queue
  189. * @rxq: rx queue
  190. **/
  191. static void free_all_rx_skbs(struct hinic_rxq *rxq)
  192. {
  193. struct hinic_rq *rq = rxq->rq;
  194. struct hinic_hw_wqe *hw_wqe;
  195. struct hinic_sge sge;
  196. u16 ci;
  197. while ((hw_wqe = hinic_read_wqe(rq->wq, HINIC_RQ_WQE_SIZE, &ci))) {
  198. if (IS_ERR(hw_wqe))
  199. break;
  200. hinic_rq_get_sge(rq, &hw_wqe->rq_wqe, ci, &sge);
  201. hinic_put_wqe(rq->wq, HINIC_RQ_WQE_SIZE);
  202. rx_free_skb(rxq, rq->saved_skb[ci], hinic_sge_to_dma(&sge));
  203. }
  204. }
  205. /**
  206. * rx_alloc_task - tasklet for queue allocation
  207. * @data: rx queue
  208. **/
  209. static void rx_alloc_task(unsigned long data)
  210. {
  211. struct hinic_rxq *rxq = (struct hinic_rxq *)data;
  212. (void)rx_alloc_pkts(rxq);
  213. }
  214. /**
  215. * rx_recv_jumbo_pkt - Rx handler for jumbo pkt
  216. * @rxq: rx queue
  217. * @head_skb: the first skb in the list
  218. * @left_pkt_len: left size of the pkt exclude head skb
  219. * @ci: consumer index
  220. *
  221. * Return number of wqes that used for the left of the pkt
  222. **/
  223. static int rx_recv_jumbo_pkt(struct hinic_rxq *rxq, struct sk_buff *head_skb,
  224. unsigned int left_pkt_len, u16 ci)
  225. {
  226. struct sk_buff *skb, *curr_skb = head_skb;
  227. struct hinic_rq_wqe *rq_wqe;
  228. unsigned int curr_len;
  229. struct hinic_sge sge;
  230. int num_wqes = 0;
  231. while (left_pkt_len > 0) {
  232. rq_wqe = hinic_rq_read_next_wqe(rxq->rq, HINIC_RQ_WQE_SIZE,
  233. &skb, &ci);
  234. num_wqes++;
  235. hinic_rq_get_sge(rxq->rq, rq_wqe, ci, &sge);
  236. rx_unmap_skb(rxq, hinic_sge_to_dma(&sge));
  237. prefetch(skb->data);
  238. curr_len = (left_pkt_len > HINIC_RX_BUF_SZ) ? HINIC_RX_BUF_SZ :
  239. left_pkt_len;
  240. left_pkt_len -= curr_len;
  241. __skb_put(skb, curr_len);
  242. if (curr_skb == head_skb)
  243. skb_shinfo(head_skb)->frag_list = skb;
  244. else
  245. curr_skb->next = skb;
  246. head_skb->len += skb->len;
  247. head_skb->data_len += skb->len;
  248. head_skb->truesize += skb->truesize;
  249. curr_skb = skb;
  250. }
  251. return num_wqes;
  252. }
  253. /**
  254. * rxq_recv - Rx handler
  255. * @rxq: rx queue
  256. * @budget: maximum pkts to process
  257. *
  258. * Return number of pkts received
  259. **/
  260. static int rxq_recv(struct hinic_rxq *rxq, int budget)
  261. {
  262. struct hinic_qp *qp = container_of(rxq->rq, struct hinic_qp, rq);
  263. u64 pkt_len = 0, rx_bytes = 0;
  264. struct hinic_rq_wqe *rq_wqe;
  265. int num_wqes, pkts = 0;
  266. struct hinic_sge sge;
  267. struct sk_buff *skb;
  268. u16 ci;
  269. while (pkts < budget) {
  270. num_wqes = 0;
  271. rq_wqe = hinic_rq_read_wqe(rxq->rq, HINIC_RQ_WQE_SIZE, &skb,
  272. &ci);
  273. if (!rq_wqe)
  274. break;
  275. hinic_rq_get_sge(rxq->rq, rq_wqe, ci, &sge);
  276. rx_unmap_skb(rxq, hinic_sge_to_dma(&sge));
  277. prefetch(skb->data);
  278. pkt_len = sge.len;
  279. if (pkt_len <= HINIC_RX_BUF_SZ) {
  280. __skb_put(skb, pkt_len);
  281. } else {
  282. __skb_put(skb, HINIC_RX_BUF_SZ);
  283. num_wqes = rx_recv_jumbo_pkt(rxq, skb, pkt_len -
  284. HINIC_RX_BUF_SZ, ci);
  285. }
  286. hinic_rq_put_wqe(rxq->rq, ci,
  287. (num_wqes + 1) * HINIC_RQ_WQE_SIZE);
  288. skb_record_rx_queue(skb, qp->q_id);
  289. skb->protocol = eth_type_trans(skb, rxq->netdev);
  290. napi_gro_receive(&rxq->napi, skb);
  291. pkts++;
  292. rx_bytes += pkt_len;
  293. }
  294. if (pkts)
  295. tasklet_schedule(&rxq->rx_task); /* rx_alloc_pkts */
  296. u64_stats_update_begin(&rxq->rxq_stats.syncp);
  297. rxq->rxq_stats.pkts += pkts;
  298. rxq->rxq_stats.bytes += rx_bytes;
  299. u64_stats_update_end(&rxq->rxq_stats.syncp);
  300. return pkts;
  301. }
  302. static int rx_poll(struct napi_struct *napi, int budget)
  303. {
  304. struct hinic_rxq *rxq = container_of(napi, struct hinic_rxq, napi);
  305. struct hinic_rq *rq = rxq->rq;
  306. int pkts;
  307. pkts = rxq_recv(rxq, budget);
  308. if (pkts >= budget)
  309. return budget;
  310. napi_complete(napi);
  311. enable_irq(rq->irq);
  312. return pkts;
  313. }
  314. static void rx_add_napi(struct hinic_rxq *rxq)
  315. {
  316. struct hinic_dev *nic_dev = netdev_priv(rxq->netdev);
  317. netif_napi_add(rxq->netdev, &rxq->napi, rx_poll, nic_dev->rx_weight);
  318. napi_enable(&rxq->napi);
  319. }
  320. static void rx_del_napi(struct hinic_rxq *rxq)
  321. {
  322. napi_disable(&rxq->napi);
  323. netif_napi_del(&rxq->napi);
  324. }
  325. static irqreturn_t rx_irq(int irq, void *data)
  326. {
  327. struct hinic_rxq *rxq = (struct hinic_rxq *)data;
  328. struct hinic_rq *rq = rxq->rq;
  329. struct hinic_dev *nic_dev;
  330. /* Disable the interrupt until napi will be completed */
  331. disable_irq_nosync(rq->irq);
  332. nic_dev = netdev_priv(rxq->netdev);
  333. hinic_hwdev_msix_cnt_set(nic_dev->hwdev, rq->msix_entry);
  334. napi_schedule(&rxq->napi);
  335. return IRQ_HANDLED;
  336. }
  337. static int rx_request_irq(struct hinic_rxq *rxq)
  338. {
  339. struct hinic_dev *nic_dev = netdev_priv(rxq->netdev);
  340. struct hinic_hwdev *hwdev = nic_dev->hwdev;
  341. struct hinic_rq *rq = rxq->rq;
  342. struct hinic_qp *qp;
  343. struct cpumask mask;
  344. int err;
  345. rx_add_napi(rxq);
  346. hinic_hwdev_msix_set(hwdev, rq->msix_entry,
  347. RX_IRQ_NO_PENDING, RX_IRQ_NO_COALESC,
  348. RX_IRQ_NO_LLI_TIMER, RX_IRQ_NO_CREDIT,
  349. RX_IRQ_NO_RESEND_TIMER);
  350. err = request_irq(rq->irq, rx_irq, 0, rxq->irq_name, rxq);
  351. if (err) {
  352. rx_del_napi(rxq);
  353. return err;
  354. }
  355. qp = container_of(rq, struct hinic_qp, rq);
  356. cpumask_set_cpu(qp->q_id % num_online_cpus(), &mask);
  357. return irq_set_affinity_hint(rq->irq, &mask);
  358. }
  359. static void rx_free_irq(struct hinic_rxq *rxq)
  360. {
  361. struct hinic_rq *rq = rxq->rq;
  362. free_irq(rq->irq, rxq);
  363. rx_del_napi(rxq);
  364. }
  365. /**
  366. * hinic_init_rxq - Initialize the Rx Queue
  367. * @rxq: Logical Rx Queue
  368. * @rq: Hardware Rx Queue to connect the Logical queue with
  369. * @netdev: network device to connect the Logical queue with
  370. *
  371. * Return 0 - Success, negative - Failure
  372. **/
  373. int hinic_init_rxq(struct hinic_rxq *rxq, struct hinic_rq *rq,
  374. struct net_device *netdev)
  375. {
  376. struct hinic_qp *qp = container_of(rq, struct hinic_qp, rq);
  377. int err, pkts, irqname_len;
  378. rxq->netdev = netdev;
  379. rxq->rq = rq;
  380. rxq_stats_init(rxq);
  381. irqname_len = snprintf(NULL, 0, "hinic_rxq%d", qp->q_id) + 1;
  382. rxq->irq_name = devm_kzalloc(&netdev->dev, irqname_len, GFP_KERNEL);
  383. if (!rxq->irq_name)
  384. return -ENOMEM;
  385. sprintf(rxq->irq_name, "hinic_rxq%d", qp->q_id);
  386. tasklet_init(&rxq->rx_task, rx_alloc_task, (unsigned long)rxq);
  387. pkts = rx_alloc_pkts(rxq);
  388. if (!pkts) {
  389. err = -ENOMEM;
  390. goto err_rx_pkts;
  391. }
  392. err = rx_request_irq(rxq);
  393. if (err) {
  394. netdev_err(netdev, "Failed to request Rx irq\n");
  395. goto err_req_rx_irq;
  396. }
  397. return 0;
  398. err_req_rx_irq:
  399. err_rx_pkts:
  400. tasklet_kill(&rxq->rx_task);
  401. free_all_rx_skbs(rxq);
  402. devm_kfree(&netdev->dev, rxq->irq_name);
  403. return err;
  404. }
  405. /**
  406. * hinic_clean_rxq - Clean the Rx Queue
  407. * @rxq: Logical Rx Queue
  408. **/
  409. void hinic_clean_rxq(struct hinic_rxq *rxq)
  410. {
  411. struct net_device *netdev = rxq->netdev;
  412. rx_free_irq(rxq);
  413. tasklet_kill(&rxq->rx_task);
  414. free_all_rx_skbs(rxq);
  415. devm_kfree(&netdev->dev, rxq->irq_name);
  416. }