ftmac100.c 31 KB

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  1. /*
  2. * Faraday FTMAC100 10/100 Ethernet
  3. *
  4. * (C) Copyright 2009-2011 Faraday Technology
  5. * Po-Yu Chuang <ratbert@faraday-tech.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22. #include <linux/dma-mapping.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/io.h>
  28. #include <linux/mii.h>
  29. #include <linux/module.h>
  30. #include <linux/netdevice.h>
  31. #include <linux/platform_device.h>
  32. #include "ftmac100.h"
  33. #define DRV_NAME "ftmac100"
  34. #define DRV_VERSION "0.2"
  35. #define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
  36. #define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
  37. #define MAX_PKT_SIZE 1518
  38. #define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
  39. #if MAX_PKT_SIZE > 0x7ff
  40. #error invalid MAX_PKT_SIZE
  41. #endif
  42. #if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
  43. #error invalid RX_BUF_SIZE
  44. #endif
  45. /******************************************************************************
  46. * private data
  47. *****************************************************************************/
  48. struct ftmac100_descs {
  49. struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
  50. struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
  51. };
  52. struct ftmac100 {
  53. struct resource *res;
  54. void __iomem *base;
  55. int irq;
  56. struct ftmac100_descs *descs;
  57. dma_addr_t descs_dma_addr;
  58. unsigned int rx_pointer;
  59. unsigned int tx_clean_pointer;
  60. unsigned int tx_pointer;
  61. unsigned int tx_pending;
  62. spinlock_t tx_lock;
  63. struct net_device *netdev;
  64. struct device *dev;
  65. struct napi_struct napi;
  66. struct mii_if_info mii;
  67. };
  68. static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
  69. struct ftmac100_rxdes *rxdes, gfp_t gfp);
  70. /******************************************************************************
  71. * internal functions (hardware register access)
  72. *****************************************************************************/
  73. #define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
  74. FTMAC100_INT_NORXBUF | \
  75. FTMAC100_INT_XPKT_OK | \
  76. FTMAC100_INT_XPKT_LOST | \
  77. FTMAC100_INT_RPKT_LOST | \
  78. FTMAC100_INT_AHB_ERR | \
  79. FTMAC100_INT_PHYSTS_CHG)
  80. #define INT_MASK_ALL_DISABLED 0
  81. static void ftmac100_enable_all_int(struct ftmac100 *priv)
  82. {
  83. iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
  84. }
  85. static void ftmac100_disable_all_int(struct ftmac100 *priv)
  86. {
  87. iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
  88. }
  89. static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
  90. {
  91. iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
  92. }
  93. static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
  94. {
  95. iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
  96. }
  97. static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
  98. {
  99. iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
  100. }
  101. static int ftmac100_reset(struct ftmac100 *priv)
  102. {
  103. struct net_device *netdev = priv->netdev;
  104. int i;
  105. /* NOTE: reset clears all registers */
  106. iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
  107. for (i = 0; i < 5; i++) {
  108. unsigned int maccr;
  109. maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
  110. if (!(maccr & FTMAC100_MACCR_SW_RST)) {
  111. /*
  112. * FTMAC100_MACCR_SW_RST cleared does not indicate
  113. * that hardware reset completed (what the f*ck).
  114. * We still need to wait for a while.
  115. */
  116. udelay(500);
  117. return 0;
  118. }
  119. udelay(1000);
  120. }
  121. netdev_err(netdev, "software reset failed\n");
  122. return -EIO;
  123. }
  124. static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
  125. {
  126. unsigned int maddr = mac[0] << 8 | mac[1];
  127. unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
  128. iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
  129. iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
  130. }
  131. #define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
  132. FTMAC100_MACCR_RCV_EN | \
  133. FTMAC100_MACCR_XDMA_EN | \
  134. FTMAC100_MACCR_RDMA_EN | \
  135. FTMAC100_MACCR_CRC_APD | \
  136. FTMAC100_MACCR_FULLDUP | \
  137. FTMAC100_MACCR_RX_RUNT | \
  138. FTMAC100_MACCR_RX_BROADPKT)
  139. static int ftmac100_start_hw(struct ftmac100 *priv)
  140. {
  141. struct net_device *netdev = priv->netdev;
  142. if (ftmac100_reset(priv))
  143. return -EIO;
  144. /* setup ring buffer base registers */
  145. ftmac100_set_rx_ring_base(priv,
  146. priv->descs_dma_addr +
  147. offsetof(struct ftmac100_descs, rxdes));
  148. ftmac100_set_tx_ring_base(priv,
  149. priv->descs_dma_addr +
  150. offsetof(struct ftmac100_descs, txdes));
  151. iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
  152. ftmac100_set_mac(priv, netdev->dev_addr);
  153. iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
  154. return 0;
  155. }
  156. static void ftmac100_stop_hw(struct ftmac100 *priv)
  157. {
  158. iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
  159. }
  160. /******************************************************************************
  161. * internal functions (receive descriptor)
  162. *****************************************************************************/
  163. static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
  164. {
  165. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
  166. }
  167. static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
  168. {
  169. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
  170. }
  171. static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
  172. {
  173. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
  174. }
  175. static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
  176. {
  177. /* clear status bits */
  178. rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
  179. }
  180. static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
  181. {
  182. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
  183. }
  184. static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
  185. {
  186. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
  187. }
  188. static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes)
  189. {
  190. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL);
  191. }
  192. static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
  193. {
  194. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
  195. }
  196. static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
  197. {
  198. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
  199. }
  200. static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
  201. {
  202. return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
  203. }
  204. static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
  205. {
  206. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
  207. }
  208. static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
  209. unsigned int size)
  210. {
  211. rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
  212. rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
  213. }
  214. static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
  215. {
  216. rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
  217. }
  218. static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
  219. dma_addr_t addr)
  220. {
  221. rxdes->rxdes2 = cpu_to_le32(addr);
  222. }
  223. static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
  224. {
  225. return le32_to_cpu(rxdes->rxdes2);
  226. }
  227. /*
  228. * rxdes3 is not used by hardware. We use it to keep track of page.
  229. * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
  230. */
  231. static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
  232. {
  233. rxdes->rxdes3 = (unsigned int)page;
  234. }
  235. static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
  236. {
  237. return (struct page *)rxdes->rxdes3;
  238. }
  239. /******************************************************************************
  240. * internal functions (receive)
  241. *****************************************************************************/
  242. static int ftmac100_next_rx_pointer(int pointer)
  243. {
  244. return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
  245. }
  246. static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
  247. {
  248. priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
  249. }
  250. static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
  251. {
  252. return &priv->descs->rxdes[priv->rx_pointer];
  253. }
  254. static struct ftmac100_rxdes *
  255. ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
  256. {
  257. struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
  258. while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
  259. if (ftmac100_rxdes_first_segment(rxdes))
  260. return rxdes;
  261. ftmac100_rxdes_set_dma_own(rxdes);
  262. ftmac100_rx_pointer_advance(priv);
  263. rxdes = ftmac100_current_rxdes(priv);
  264. }
  265. return NULL;
  266. }
  267. static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
  268. struct ftmac100_rxdes *rxdes)
  269. {
  270. struct net_device *netdev = priv->netdev;
  271. bool error = false;
  272. if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
  273. if (net_ratelimit())
  274. netdev_info(netdev, "rx err\n");
  275. netdev->stats.rx_errors++;
  276. error = true;
  277. }
  278. if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
  279. if (net_ratelimit())
  280. netdev_info(netdev, "rx crc err\n");
  281. netdev->stats.rx_crc_errors++;
  282. error = true;
  283. }
  284. if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) {
  285. if (net_ratelimit())
  286. netdev_info(netdev, "rx frame too long\n");
  287. netdev->stats.rx_length_errors++;
  288. error = true;
  289. } else if (unlikely(ftmac100_rxdes_runt(rxdes))) {
  290. if (net_ratelimit())
  291. netdev_info(netdev, "rx runt\n");
  292. netdev->stats.rx_length_errors++;
  293. error = true;
  294. } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
  295. if (net_ratelimit())
  296. netdev_info(netdev, "rx odd nibble\n");
  297. netdev->stats.rx_length_errors++;
  298. error = true;
  299. }
  300. return error;
  301. }
  302. static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
  303. {
  304. struct net_device *netdev = priv->netdev;
  305. struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
  306. bool done = false;
  307. if (net_ratelimit())
  308. netdev_dbg(netdev, "drop packet %p\n", rxdes);
  309. do {
  310. if (ftmac100_rxdes_last_segment(rxdes))
  311. done = true;
  312. ftmac100_rxdes_set_dma_own(rxdes);
  313. ftmac100_rx_pointer_advance(priv);
  314. rxdes = ftmac100_current_rxdes(priv);
  315. } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
  316. netdev->stats.rx_dropped++;
  317. }
  318. static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
  319. {
  320. struct net_device *netdev = priv->netdev;
  321. struct ftmac100_rxdes *rxdes;
  322. struct sk_buff *skb;
  323. struct page *page;
  324. dma_addr_t map;
  325. int length;
  326. bool ret;
  327. rxdes = ftmac100_rx_locate_first_segment(priv);
  328. if (!rxdes)
  329. return false;
  330. if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
  331. ftmac100_rx_drop_packet(priv);
  332. return true;
  333. }
  334. /*
  335. * It is impossible to get multi-segment packets
  336. * because we always provide big enough receive buffers.
  337. */
  338. ret = ftmac100_rxdes_last_segment(rxdes);
  339. BUG_ON(!ret);
  340. /* start processing */
  341. skb = netdev_alloc_skb_ip_align(netdev, 128);
  342. if (unlikely(!skb)) {
  343. if (net_ratelimit())
  344. netdev_err(netdev, "rx skb alloc failed\n");
  345. ftmac100_rx_drop_packet(priv);
  346. return true;
  347. }
  348. if (unlikely(ftmac100_rxdes_multicast(rxdes)))
  349. netdev->stats.multicast++;
  350. map = ftmac100_rxdes_get_dma_addr(rxdes);
  351. dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
  352. length = ftmac100_rxdes_frame_length(rxdes);
  353. page = ftmac100_rxdes_get_page(rxdes);
  354. skb_fill_page_desc(skb, 0, page, 0, length);
  355. skb->len += length;
  356. skb->data_len += length;
  357. if (length > 128) {
  358. skb->truesize += PAGE_SIZE;
  359. /* We pull the minimum amount into linear part */
  360. __pskb_pull_tail(skb, ETH_HLEN);
  361. } else {
  362. /* Small frames are copied into linear part to free one page */
  363. __pskb_pull_tail(skb, length);
  364. }
  365. ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
  366. ftmac100_rx_pointer_advance(priv);
  367. skb->protocol = eth_type_trans(skb, netdev);
  368. netdev->stats.rx_packets++;
  369. netdev->stats.rx_bytes += skb->len;
  370. /* push packet to protocol stack */
  371. netif_receive_skb(skb);
  372. (*processed)++;
  373. return true;
  374. }
  375. /******************************************************************************
  376. * internal functions (transmit descriptor)
  377. *****************************************************************************/
  378. static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
  379. {
  380. /* clear all except end of ring bit */
  381. txdes->txdes0 = 0;
  382. txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
  383. txdes->txdes2 = 0;
  384. txdes->txdes3 = 0;
  385. }
  386. static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
  387. {
  388. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
  389. }
  390. static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
  391. {
  392. /*
  393. * Make sure dma own bit will not be set before any other
  394. * descriptor fields.
  395. */
  396. wmb();
  397. txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
  398. }
  399. static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
  400. {
  401. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
  402. }
  403. static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
  404. {
  405. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
  406. }
  407. static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
  408. {
  409. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
  410. }
  411. static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
  412. {
  413. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
  414. }
  415. static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
  416. {
  417. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
  418. }
  419. static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
  420. {
  421. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
  422. }
  423. static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
  424. unsigned int len)
  425. {
  426. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
  427. }
  428. static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
  429. dma_addr_t addr)
  430. {
  431. txdes->txdes2 = cpu_to_le32(addr);
  432. }
  433. static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
  434. {
  435. return le32_to_cpu(txdes->txdes2);
  436. }
  437. /*
  438. * txdes3 is not used by hardware. We use it to keep track of socket buffer.
  439. * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
  440. */
  441. static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
  442. {
  443. txdes->txdes3 = (unsigned int)skb;
  444. }
  445. static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
  446. {
  447. return (struct sk_buff *)txdes->txdes3;
  448. }
  449. /******************************************************************************
  450. * internal functions (transmit)
  451. *****************************************************************************/
  452. static int ftmac100_next_tx_pointer(int pointer)
  453. {
  454. return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
  455. }
  456. static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
  457. {
  458. priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
  459. }
  460. static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
  461. {
  462. priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
  463. }
  464. static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
  465. {
  466. return &priv->descs->txdes[priv->tx_pointer];
  467. }
  468. static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
  469. {
  470. return &priv->descs->txdes[priv->tx_clean_pointer];
  471. }
  472. static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
  473. {
  474. struct net_device *netdev = priv->netdev;
  475. struct ftmac100_txdes *txdes;
  476. struct sk_buff *skb;
  477. dma_addr_t map;
  478. if (priv->tx_pending == 0)
  479. return false;
  480. txdes = ftmac100_current_clean_txdes(priv);
  481. if (ftmac100_txdes_owned_by_dma(txdes))
  482. return false;
  483. skb = ftmac100_txdes_get_skb(txdes);
  484. map = ftmac100_txdes_get_dma_addr(txdes);
  485. if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
  486. ftmac100_txdes_late_collision(txdes))) {
  487. /*
  488. * packet transmitted to ethernet lost due to late collision
  489. * or excessive collision
  490. */
  491. netdev->stats.tx_aborted_errors++;
  492. } else {
  493. netdev->stats.tx_packets++;
  494. netdev->stats.tx_bytes += skb->len;
  495. }
  496. dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
  497. dev_kfree_skb(skb);
  498. ftmac100_txdes_reset(txdes);
  499. ftmac100_tx_clean_pointer_advance(priv);
  500. spin_lock(&priv->tx_lock);
  501. priv->tx_pending--;
  502. spin_unlock(&priv->tx_lock);
  503. netif_wake_queue(netdev);
  504. return true;
  505. }
  506. static void ftmac100_tx_complete(struct ftmac100 *priv)
  507. {
  508. while (ftmac100_tx_complete_packet(priv))
  509. ;
  510. }
  511. static int ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
  512. dma_addr_t map)
  513. {
  514. struct net_device *netdev = priv->netdev;
  515. struct ftmac100_txdes *txdes;
  516. unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
  517. txdes = ftmac100_current_txdes(priv);
  518. ftmac100_tx_pointer_advance(priv);
  519. /* setup TX descriptor */
  520. ftmac100_txdes_set_skb(txdes, skb);
  521. ftmac100_txdes_set_dma_addr(txdes, map);
  522. ftmac100_txdes_set_first_segment(txdes);
  523. ftmac100_txdes_set_last_segment(txdes);
  524. ftmac100_txdes_set_txint(txdes);
  525. ftmac100_txdes_set_buffer_size(txdes, len);
  526. spin_lock(&priv->tx_lock);
  527. priv->tx_pending++;
  528. if (priv->tx_pending == TX_QUEUE_ENTRIES)
  529. netif_stop_queue(netdev);
  530. /* start transmit */
  531. ftmac100_txdes_set_dma_own(txdes);
  532. spin_unlock(&priv->tx_lock);
  533. ftmac100_txdma_start_polling(priv);
  534. return NETDEV_TX_OK;
  535. }
  536. /******************************************************************************
  537. * internal functions (buffer)
  538. *****************************************************************************/
  539. static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
  540. struct ftmac100_rxdes *rxdes, gfp_t gfp)
  541. {
  542. struct net_device *netdev = priv->netdev;
  543. struct page *page;
  544. dma_addr_t map;
  545. page = alloc_page(gfp);
  546. if (!page) {
  547. if (net_ratelimit())
  548. netdev_err(netdev, "failed to allocate rx page\n");
  549. return -ENOMEM;
  550. }
  551. map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
  552. if (unlikely(dma_mapping_error(priv->dev, map))) {
  553. if (net_ratelimit())
  554. netdev_err(netdev, "failed to map rx page\n");
  555. __free_page(page);
  556. return -ENOMEM;
  557. }
  558. ftmac100_rxdes_set_page(rxdes, page);
  559. ftmac100_rxdes_set_dma_addr(rxdes, map);
  560. ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
  561. ftmac100_rxdes_set_dma_own(rxdes);
  562. return 0;
  563. }
  564. static void ftmac100_free_buffers(struct ftmac100 *priv)
  565. {
  566. int i;
  567. for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
  568. struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
  569. struct page *page = ftmac100_rxdes_get_page(rxdes);
  570. dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
  571. if (!page)
  572. continue;
  573. dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
  574. __free_page(page);
  575. }
  576. for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
  577. struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
  578. struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
  579. dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
  580. if (!skb)
  581. continue;
  582. dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
  583. dev_kfree_skb(skb);
  584. }
  585. dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
  586. priv->descs, priv->descs_dma_addr);
  587. }
  588. static int ftmac100_alloc_buffers(struct ftmac100 *priv)
  589. {
  590. int i;
  591. priv->descs = dma_zalloc_coherent(priv->dev,
  592. sizeof(struct ftmac100_descs),
  593. &priv->descs_dma_addr,
  594. GFP_KERNEL);
  595. if (!priv->descs)
  596. return -ENOMEM;
  597. /* initialize RX ring */
  598. ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
  599. for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
  600. struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
  601. if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
  602. goto err;
  603. }
  604. /* initialize TX ring */
  605. ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
  606. return 0;
  607. err:
  608. ftmac100_free_buffers(priv);
  609. return -ENOMEM;
  610. }
  611. /******************************************************************************
  612. * struct mii_if_info functions
  613. *****************************************************************************/
  614. static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
  615. {
  616. struct ftmac100 *priv = netdev_priv(netdev);
  617. unsigned int phycr;
  618. int i;
  619. phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
  620. FTMAC100_PHYCR_REGAD(reg) |
  621. FTMAC100_PHYCR_MIIRD;
  622. iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
  623. for (i = 0; i < 10; i++) {
  624. phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
  625. if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
  626. return phycr & FTMAC100_PHYCR_MIIRDATA;
  627. udelay(100);
  628. }
  629. netdev_err(netdev, "mdio read timed out\n");
  630. return 0;
  631. }
  632. static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
  633. int data)
  634. {
  635. struct ftmac100 *priv = netdev_priv(netdev);
  636. unsigned int phycr;
  637. int i;
  638. phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
  639. FTMAC100_PHYCR_REGAD(reg) |
  640. FTMAC100_PHYCR_MIIWR;
  641. data = FTMAC100_PHYWDATA_MIIWDATA(data);
  642. iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
  643. iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
  644. for (i = 0; i < 10; i++) {
  645. phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
  646. if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
  647. return;
  648. udelay(100);
  649. }
  650. netdev_err(netdev, "mdio write timed out\n");
  651. }
  652. /******************************************************************************
  653. * struct ethtool_ops functions
  654. *****************************************************************************/
  655. static void ftmac100_get_drvinfo(struct net_device *netdev,
  656. struct ethtool_drvinfo *info)
  657. {
  658. strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
  659. strlcpy(info->version, DRV_VERSION, sizeof(info->version));
  660. strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
  661. }
  662. static int ftmac100_get_link_ksettings(struct net_device *netdev,
  663. struct ethtool_link_ksettings *cmd)
  664. {
  665. struct ftmac100 *priv = netdev_priv(netdev);
  666. mii_ethtool_get_link_ksettings(&priv->mii, cmd);
  667. return 0;
  668. }
  669. static int ftmac100_set_link_ksettings(struct net_device *netdev,
  670. const struct ethtool_link_ksettings *cmd)
  671. {
  672. struct ftmac100 *priv = netdev_priv(netdev);
  673. return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
  674. }
  675. static int ftmac100_nway_reset(struct net_device *netdev)
  676. {
  677. struct ftmac100 *priv = netdev_priv(netdev);
  678. return mii_nway_restart(&priv->mii);
  679. }
  680. static u32 ftmac100_get_link(struct net_device *netdev)
  681. {
  682. struct ftmac100 *priv = netdev_priv(netdev);
  683. return mii_link_ok(&priv->mii);
  684. }
  685. static const struct ethtool_ops ftmac100_ethtool_ops = {
  686. .get_drvinfo = ftmac100_get_drvinfo,
  687. .nway_reset = ftmac100_nway_reset,
  688. .get_link = ftmac100_get_link,
  689. .get_link_ksettings = ftmac100_get_link_ksettings,
  690. .set_link_ksettings = ftmac100_set_link_ksettings,
  691. };
  692. /******************************************************************************
  693. * interrupt handler
  694. *****************************************************************************/
  695. static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
  696. {
  697. struct net_device *netdev = dev_id;
  698. struct ftmac100 *priv = netdev_priv(netdev);
  699. if (likely(netif_running(netdev))) {
  700. /* Disable interrupts for polling */
  701. ftmac100_disable_all_int(priv);
  702. napi_schedule(&priv->napi);
  703. }
  704. return IRQ_HANDLED;
  705. }
  706. /******************************************************************************
  707. * struct napi_struct functions
  708. *****************************************************************************/
  709. static int ftmac100_poll(struct napi_struct *napi, int budget)
  710. {
  711. struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
  712. struct net_device *netdev = priv->netdev;
  713. unsigned int status;
  714. bool completed = true;
  715. int rx = 0;
  716. status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
  717. if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
  718. /*
  719. * FTMAC100_INT_RPKT_FINISH:
  720. * RX DMA has received packets into RX buffer successfully
  721. *
  722. * FTMAC100_INT_NORXBUF:
  723. * RX buffer unavailable
  724. */
  725. bool retry;
  726. do {
  727. retry = ftmac100_rx_packet(priv, &rx);
  728. } while (retry && rx < budget);
  729. if (retry && rx == budget)
  730. completed = false;
  731. }
  732. if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
  733. /*
  734. * FTMAC100_INT_XPKT_OK:
  735. * packet transmitted to ethernet successfully
  736. *
  737. * FTMAC100_INT_XPKT_LOST:
  738. * packet transmitted to ethernet lost due to late
  739. * collision or excessive collision
  740. */
  741. ftmac100_tx_complete(priv);
  742. }
  743. if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
  744. FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
  745. if (net_ratelimit())
  746. netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
  747. status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
  748. status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
  749. status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
  750. status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
  751. if (status & FTMAC100_INT_NORXBUF) {
  752. /* RX buffer unavailable */
  753. netdev->stats.rx_over_errors++;
  754. }
  755. if (status & FTMAC100_INT_RPKT_LOST) {
  756. /* received packet lost due to RX FIFO full */
  757. netdev->stats.rx_fifo_errors++;
  758. }
  759. if (status & FTMAC100_INT_PHYSTS_CHG) {
  760. /* PHY link status change */
  761. mii_check_link(&priv->mii);
  762. }
  763. }
  764. if (completed) {
  765. /* stop polling */
  766. napi_complete(napi);
  767. ftmac100_enable_all_int(priv);
  768. }
  769. return rx;
  770. }
  771. /******************************************************************************
  772. * struct net_device_ops functions
  773. *****************************************************************************/
  774. static int ftmac100_open(struct net_device *netdev)
  775. {
  776. struct ftmac100 *priv = netdev_priv(netdev);
  777. int err;
  778. err = ftmac100_alloc_buffers(priv);
  779. if (err) {
  780. netdev_err(netdev, "failed to allocate buffers\n");
  781. goto err_alloc;
  782. }
  783. err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
  784. if (err) {
  785. netdev_err(netdev, "failed to request irq %d\n", priv->irq);
  786. goto err_irq;
  787. }
  788. priv->rx_pointer = 0;
  789. priv->tx_clean_pointer = 0;
  790. priv->tx_pointer = 0;
  791. priv->tx_pending = 0;
  792. err = ftmac100_start_hw(priv);
  793. if (err)
  794. goto err_hw;
  795. napi_enable(&priv->napi);
  796. netif_start_queue(netdev);
  797. ftmac100_enable_all_int(priv);
  798. return 0;
  799. err_hw:
  800. free_irq(priv->irq, netdev);
  801. err_irq:
  802. ftmac100_free_buffers(priv);
  803. err_alloc:
  804. return err;
  805. }
  806. static int ftmac100_stop(struct net_device *netdev)
  807. {
  808. struct ftmac100 *priv = netdev_priv(netdev);
  809. ftmac100_disable_all_int(priv);
  810. netif_stop_queue(netdev);
  811. napi_disable(&priv->napi);
  812. ftmac100_stop_hw(priv);
  813. free_irq(priv->irq, netdev);
  814. ftmac100_free_buffers(priv);
  815. return 0;
  816. }
  817. static int ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
  818. {
  819. struct ftmac100 *priv = netdev_priv(netdev);
  820. dma_addr_t map;
  821. if (unlikely(skb->len > MAX_PKT_SIZE)) {
  822. if (net_ratelimit())
  823. netdev_dbg(netdev, "tx packet too big\n");
  824. netdev->stats.tx_dropped++;
  825. dev_kfree_skb(skb);
  826. return NETDEV_TX_OK;
  827. }
  828. map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
  829. if (unlikely(dma_mapping_error(priv->dev, map))) {
  830. /* drop packet */
  831. if (net_ratelimit())
  832. netdev_err(netdev, "map socket buffer failed\n");
  833. netdev->stats.tx_dropped++;
  834. dev_kfree_skb(skb);
  835. return NETDEV_TX_OK;
  836. }
  837. return ftmac100_xmit(priv, skb, map);
  838. }
  839. /* optional */
  840. static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  841. {
  842. struct ftmac100 *priv = netdev_priv(netdev);
  843. struct mii_ioctl_data *data = if_mii(ifr);
  844. return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
  845. }
  846. static const struct net_device_ops ftmac100_netdev_ops = {
  847. .ndo_open = ftmac100_open,
  848. .ndo_stop = ftmac100_stop,
  849. .ndo_start_xmit = ftmac100_hard_start_xmit,
  850. .ndo_set_mac_address = eth_mac_addr,
  851. .ndo_validate_addr = eth_validate_addr,
  852. .ndo_do_ioctl = ftmac100_do_ioctl,
  853. };
  854. /******************************************************************************
  855. * struct platform_driver functions
  856. *****************************************************************************/
  857. static int ftmac100_probe(struct platform_device *pdev)
  858. {
  859. struct resource *res;
  860. int irq;
  861. struct net_device *netdev;
  862. struct ftmac100 *priv;
  863. int err;
  864. if (!pdev)
  865. return -ENODEV;
  866. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  867. if (!res)
  868. return -ENXIO;
  869. irq = platform_get_irq(pdev, 0);
  870. if (irq < 0)
  871. return irq;
  872. /* setup net_device */
  873. netdev = alloc_etherdev(sizeof(*priv));
  874. if (!netdev) {
  875. err = -ENOMEM;
  876. goto err_alloc_etherdev;
  877. }
  878. SET_NETDEV_DEV(netdev, &pdev->dev);
  879. netdev->ethtool_ops = &ftmac100_ethtool_ops;
  880. netdev->netdev_ops = &ftmac100_netdev_ops;
  881. platform_set_drvdata(pdev, netdev);
  882. /* setup private data */
  883. priv = netdev_priv(netdev);
  884. priv->netdev = netdev;
  885. priv->dev = &pdev->dev;
  886. spin_lock_init(&priv->tx_lock);
  887. /* initialize NAPI */
  888. netif_napi_add(netdev, &priv->napi, ftmac100_poll, 64);
  889. /* map io memory */
  890. priv->res = request_mem_region(res->start, resource_size(res),
  891. dev_name(&pdev->dev));
  892. if (!priv->res) {
  893. dev_err(&pdev->dev, "Could not reserve memory region\n");
  894. err = -ENOMEM;
  895. goto err_req_mem;
  896. }
  897. priv->base = ioremap(res->start, resource_size(res));
  898. if (!priv->base) {
  899. dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
  900. err = -EIO;
  901. goto err_ioremap;
  902. }
  903. priv->irq = irq;
  904. /* initialize struct mii_if_info */
  905. priv->mii.phy_id = 0;
  906. priv->mii.phy_id_mask = 0x1f;
  907. priv->mii.reg_num_mask = 0x1f;
  908. priv->mii.dev = netdev;
  909. priv->mii.mdio_read = ftmac100_mdio_read;
  910. priv->mii.mdio_write = ftmac100_mdio_write;
  911. /* register network device */
  912. err = register_netdev(netdev);
  913. if (err) {
  914. dev_err(&pdev->dev, "Failed to register netdev\n");
  915. goto err_register_netdev;
  916. }
  917. netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
  918. if (!is_valid_ether_addr(netdev->dev_addr)) {
  919. eth_hw_addr_random(netdev);
  920. netdev_info(netdev, "generated random MAC address %pM\n",
  921. netdev->dev_addr);
  922. }
  923. return 0;
  924. err_register_netdev:
  925. iounmap(priv->base);
  926. err_ioremap:
  927. release_resource(priv->res);
  928. err_req_mem:
  929. netif_napi_del(&priv->napi);
  930. free_netdev(netdev);
  931. err_alloc_etherdev:
  932. return err;
  933. }
  934. static int ftmac100_remove(struct platform_device *pdev)
  935. {
  936. struct net_device *netdev;
  937. struct ftmac100 *priv;
  938. netdev = platform_get_drvdata(pdev);
  939. priv = netdev_priv(netdev);
  940. unregister_netdev(netdev);
  941. iounmap(priv->base);
  942. release_resource(priv->res);
  943. netif_napi_del(&priv->napi);
  944. free_netdev(netdev);
  945. return 0;
  946. }
  947. static const struct of_device_id ftmac100_of_ids[] = {
  948. { .compatible = "andestech,atmac100" },
  949. { }
  950. };
  951. static struct platform_driver ftmac100_driver = {
  952. .probe = ftmac100_probe,
  953. .remove = ftmac100_remove,
  954. .driver = {
  955. .name = DRV_NAME,
  956. .of_match_table = ftmac100_of_ids
  957. },
  958. };
  959. /******************************************************************************
  960. * initialization / finalization
  961. *****************************************************************************/
  962. static int __init ftmac100_init(void)
  963. {
  964. pr_info("Loading version " DRV_VERSION " ...\n");
  965. return platform_driver_register(&ftmac100_driver);
  966. }
  967. static void __exit ftmac100_exit(void)
  968. {
  969. platform_driver_unregister(&ftmac100_driver);
  970. }
  971. module_init(ftmac100_init);
  972. module_exit(ftmac100_exit);
  973. MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
  974. MODULE_DESCRIPTION("FTMAC100 driver");
  975. MODULE_LICENSE("GPL");
  976. MODULE_DEVICE_TABLE(of, ftmac100_of_ids);