bnxt_ethtool.c 75 KB

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  1. /* Broadcom NetXtreme-C/E network driver.
  2. *
  3. * Copyright (c) 2014-2016 Broadcom Corporation
  4. * Copyright (c) 2016-2017 Broadcom Limited
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation.
  9. */
  10. #include <linux/ctype.h>
  11. #include <linux/stringify.h>
  12. #include <linux/ethtool.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/pci.h>
  15. #include <linux/etherdevice.h>
  16. #include <linux/crc32.h>
  17. #include <linux/firmware.h>
  18. #include "bnxt_hsi.h"
  19. #include "bnxt.h"
  20. #include "bnxt_xdp.h"
  21. #include "bnxt_ethtool.h"
  22. #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
  23. #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
  24. #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
  25. #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  26. #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  27. static u32 bnxt_get_msglevel(struct net_device *dev)
  28. {
  29. struct bnxt *bp = netdev_priv(dev);
  30. return bp->msg_enable;
  31. }
  32. static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  33. {
  34. struct bnxt *bp = netdev_priv(dev);
  35. bp->msg_enable = value;
  36. }
  37. static int bnxt_get_coalesce(struct net_device *dev,
  38. struct ethtool_coalesce *coal)
  39. {
  40. struct bnxt *bp = netdev_priv(dev);
  41. struct bnxt_coal *hw_coal;
  42. u16 mult;
  43. memset(coal, 0, sizeof(*coal));
  44. coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
  45. hw_coal = &bp->rx_coal;
  46. mult = hw_coal->bufs_per_record;
  47. coal->rx_coalesce_usecs = hw_coal->coal_ticks;
  48. coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  49. coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  50. coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  51. hw_coal = &bp->tx_coal;
  52. mult = hw_coal->bufs_per_record;
  53. coal->tx_coalesce_usecs = hw_coal->coal_ticks;
  54. coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  55. coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  56. coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  57. coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  58. return 0;
  59. }
  60. static int bnxt_set_coalesce(struct net_device *dev,
  61. struct ethtool_coalesce *coal)
  62. {
  63. struct bnxt *bp = netdev_priv(dev);
  64. bool update_stats = false;
  65. struct bnxt_coal *hw_coal;
  66. int rc = 0;
  67. u16 mult;
  68. if (coal->use_adaptive_rx_coalesce) {
  69. bp->flags |= BNXT_FLAG_DIM;
  70. } else {
  71. if (bp->flags & BNXT_FLAG_DIM) {
  72. bp->flags &= ~(BNXT_FLAG_DIM);
  73. goto reset_coalesce;
  74. }
  75. }
  76. hw_coal = &bp->rx_coal;
  77. mult = hw_coal->bufs_per_record;
  78. hw_coal->coal_ticks = coal->rx_coalesce_usecs;
  79. hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
  80. hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
  81. hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
  82. hw_coal = &bp->tx_coal;
  83. mult = hw_coal->bufs_per_record;
  84. hw_coal->coal_ticks = coal->tx_coalesce_usecs;
  85. hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
  86. hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
  87. hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
  88. if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
  89. u32 stats_ticks = coal->stats_block_coalesce_usecs;
  90. /* Allow 0, which means disable. */
  91. if (stats_ticks)
  92. stats_ticks = clamp_t(u32, stats_ticks,
  93. BNXT_MIN_STATS_COAL_TICKS,
  94. BNXT_MAX_STATS_COAL_TICKS);
  95. stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
  96. bp->stats_coal_ticks = stats_ticks;
  97. update_stats = true;
  98. }
  99. reset_coalesce:
  100. if (netif_running(dev)) {
  101. if (update_stats) {
  102. rc = bnxt_close_nic(bp, true, false);
  103. if (!rc)
  104. rc = bnxt_open_nic(bp, true, false);
  105. } else {
  106. rc = bnxt_hwrm_set_coal(bp);
  107. }
  108. }
  109. return rc;
  110. }
  111. #define BNXT_NUM_STATS 21
  112. #define BNXT_RX_STATS_ENTRY(counter) \
  113. { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
  114. #define BNXT_TX_STATS_ENTRY(counter) \
  115. { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
  116. #define BNXT_RX_STATS_EXT_ENTRY(counter) \
  117. { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
  118. enum {
  119. RX_TOTAL_DISCARDS,
  120. TX_TOTAL_DISCARDS,
  121. };
  122. static struct {
  123. u64 counter;
  124. char string[ETH_GSTRING_LEN];
  125. } bnxt_sw_func_stats[] = {
  126. {0, "rx_total_discard_pkts"},
  127. {0, "tx_total_discard_pkts"},
  128. };
  129. static const struct {
  130. long offset;
  131. char string[ETH_GSTRING_LEN];
  132. } bnxt_port_stats_arr[] = {
  133. BNXT_RX_STATS_ENTRY(rx_64b_frames),
  134. BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
  135. BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
  136. BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
  137. BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
  138. BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
  139. BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
  140. BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
  141. BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
  142. BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
  143. BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
  144. BNXT_RX_STATS_ENTRY(rx_total_frames),
  145. BNXT_RX_STATS_ENTRY(rx_ucast_frames),
  146. BNXT_RX_STATS_ENTRY(rx_mcast_frames),
  147. BNXT_RX_STATS_ENTRY(rx_bcast_frames),
  148. BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
  149. BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
  150. BNXT_RX_STATS_ENTRY(rx_pause_frames),
  151. BNXT_RX_STATS_ENTRY(rx_pfc_frames),
  152. BNXT_RX_STATS_ENTRY(rx_align_err_frames),
  153. BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
  154. BNXT_RX_STATS_ENTRY(rx_jbr_frames),
  155. BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
  156. BNXT_RX_STATS_ENTRY(rx_tagged_frames),
  157. BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
  158. BNXT_RX_STATS_ENTRY(rx_good_frames),
  159. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
  160. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
  161. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
  162. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
  163. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
  164. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
  165. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
  166. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
  167. BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
  168. BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
  169. BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
  170. BNXT_RX_STATS_ENTRY(rx_bytes),
  171. BNXT_RX_STATS_ENTRY(rx_runt_bytes),
  172. BNXT_RX_STATS_ENTRY(rx_runt_frames),
  173. BNXT_RX_STATS_ENTRY(rx_stat_discard),
  174. BNXT_RX_STATS_ENTRY(rx_stat_err),
  175. BNXT_TX_STATS_ENTRY(tx_64b_frames),
  176. BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
  177. BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
  178. BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
  179. BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
  180. BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
  181. BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
  182. BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
  183. BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
  184. BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
  185. BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
  186. BNXT_TX_STATS_ENTRY(tx_good_frames),
  187. BNXT_TX_STATS_ENTRY(tx_total_frames),
  188. BNXT_TX_STATS_ENTRY(tx_ucast_frames),
  189. BNXT_TX_STATS_ENTRY(tx_mcast_frames),
  190. BNXT_TX_STATS_ENTRY(tx_bcast_frames),
  191. BNXT_TX_STATS_ENTRY(tx_pause_frames),
  192. BNXT_TX_STATS_ENTRY(tx_pfc_frames),
  193. BNXT_TX_STATS_ENTRY(tx_jabber_frames),
  194. BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
  195. BNXT_TX_STATS_ENTRY(tx_err),
  196. BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
  197. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
  198. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
  199. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
  200. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
  201. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
  202. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
  203. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
  204. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
  205. BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
  206. BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
  207. BNXT_TX_STATS_ENTRY(tx_total_collisions),
  208. BNXT_TX_STATS_ENTRY(tx_bytes),
  209. BNXT_TX_STATS_ENTRY(tx_xthol_frames),
  210. BNXT_TX_STATS_ENTRY(tx_stat_discard),
  211. BNXT_TX_STATS_ENTRY(tx_stat_error),
  212. };
  213. static const struct {
  214. long offset;
  215. char string[ETH_GSTRING_LEN];
  216. } bnxt_port_stats_ext_arr[] = {
  217. BNXT_RX_STATS_EXT_ENTRY(link_down_events),
  218. BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
  219. BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
  220. BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
  221. BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
  222. };
  223. #define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats)
  224. #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
  225. #define BNXT_NUM_PORT_STATS_EXT ARRAY_SIZE(bnxt_port_stats_ext_arr)
  226. static int bnxt_get_num_stats(struct bnxt *bp)
  227. {
  228. int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  229. num_stats += BNXT_NUM_SW_FUNC_STATS;
  230. if (bp->flags & BNXT_FLAG_PORT_STATS)
  231. num_stats += BNXT_NUM_PORT_STATS;
  232. if (bp->flags & BNXT_FLAG_PORT_STATS_EXT)
  233. num_stats += BNXT_NUM_PORT_STATS_EXT;
  234. return num_stats;
  235. }
  236. static int bnxt_get_sset_count(struct net_device *dev, int sset)
  237. {
  238. struct bnxt *bp = netdev_priv(dev);
  239. switch (sset) {
  240. case ETH_SS_STATS:
  241. return bnxt_get_num_stats(bp);
  242. case ETH_SS_TEST:
  243. if (!bp->num_tests)
  244. return -EOPNOTSUPP;
  245. return bp->num_tests;
  246. default:
  247. return -EOPNOTSUPP;
  248. }
  249. }
  250. static void bnxt_get_ethtool_stats(struct net_device *dev,
  251. struct ethtool_stats *stats, u64 *buf)
  252. {
  253. u32 i, j = 0;
  254. struct bnxt *bp = netdev_priv(dev);
  255. u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
  256. if (!bp->bnapi)
  257. return;
  258. for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++)
  259. bnxt_sw_func_stats[i].counter = 0;
  260. for (i = 0; i < bp->cp_nr_rings; i++) {
  261. struct bnxt_napi *bnapi = bp->bnapi[i];
  262. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  263. __le64 *hw_stats = (__le64 *)cpr->hw_stats;
  264. int k;
  265. for (k = 0; k < stat_fields; j++, k++)
  266. buf[j] = le64_to_cpu(hw_stats[k]);
  267. buf[j++] = cpr->rx_l4_csum_errors;
  268. bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter +=
  269. le64_to_cpu(cpr->hw_stats->rx_discard_pkts);
  270. bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter +=
  271. le64_to_cpu(cpr->hw_stats->tx_discard_pkts);
  272. }
  273. for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++)
  274. buf[j] = bnxt_sw_func_stats[i].counter;
  275. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  276. __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
  277. for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
  278. buf[j] = le64_to_cpu(*(port_stats +
  279. bnxt_port_stats_arr[i].offset));
  280. }
  281. }
  282. if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
  283. __le64 *port_stats_ext = (__le64 *)bp->hw_rx_port_stats_ext;
  284. for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++, j++) {
  285. buf[j] = le64_to_cpu(*(port_stats_ext +
  286. bnxt_port_stats_ext_arr[i].offset));
  287. }
  288. }
  289. }
  290. static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  291. {
  292. struct bnxt *bp = netdev_priv(dev);
  293. u32 i;
  294. switch (stringset) {
  295. /* The number of strings must match BNXT_NUM_STATS defined above. */
  296. case ETH_SS_STATS:
  297. for (i = 0; i < bp->cp_nr_rings; i++) {
  298. sprintf(buf, "[%d]: rx_ucast_packets", i);
  299. buf += ETH_GSTRING_LEN;
  300. sprintf(buf, "[%d]: rx_mcast_packets", i);
  301. buf += ETH_GSTRING_LEN;
  302. sprintf(buf, "[%d]: rx_bcast_packets", i);
  303. buf += ETH_GSTRING_LEN;
  304. sprintf(buf, "[%d]: rx_discards", i);
  305. buf += ETH_GSTRING_LEN;
  306. sprintf(buf, "[%d]: rx_drops", i);
  307. buf += ETH_GSTRING_LEN;
  308. sprintf(buf, "[%d]: rx_ucast_bytes", i);
  309. buf += ETH_GSTRING_LEN;
  310. sprintf(buf, "[%d]: rx_mcast_bytes", i);
  311. buf += ETH_GSTRING_LEN;
  312. sprintf(buf, "[%d]: rx_bcast_bytes", i);
  313. buf += ETH_GSTRING_LEN;
  314. sprintf(buf, "[%d]: tx_ucast_packets", i);
  315. buf += ETH_GSTRING_LEN;
  316. sprintf(buf, "[%d]: tx_mcast_packets", i);
  317. buf += ETH_GSTRING_LEN;
  318. sprintf(buf, "[%d]: tx_bcast_packets", i);
  319. buf += ETH_GSTRING_LEN;
  320. sprintf(buf, "[%d]: tx_discards", i);
  321. buf += ETH_GSTRING_LEN;
  322. sprintf(buf, "[%d]: tx_drops", i);
  323. buf += ETH_GSTRING_LEN;
  324. sprintf(buf, "[%d]: tx_ucast_bytes", i);
  325. buf += ETH_GSTRING_LEN;
  326. sprintf(buf, "[%d]: tx_mcast_bytes", i);
  327. buf += ETH_GSTRING_LEN;
  328. sprintf(buf, "[%d]: tx_bcast_bytes", i);
  329. buf += ETH_GSTRING_LEN;
  330. sprintf(buf, "[%d]: tpa_packets", i);
  331. buf += ETH_GSTRING_LEN;
  332. sprintf(buf, "[%d]: tpa_bytes", i);
  333. buf += ETH_GSTRING_LEN;
  334. sprintf(buf, "[%d]: tpa_events", i);
  335. buf += ETH_GSTRING_LEN;
  336. sprintf(buf, "[%d]: tpa_aborts", i);
  337. buf += ETH_GSTRING_LEN;
  338. sprintf(buf, "[%d]: rx_l4_csum_errors", i);
  339. buf += ETH_GSTRING_LEN;
  340. }
  341. for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) {
  342. strcpy(buf, bnxt_sw_func_stats[i].string);
  343. buf += ETH_GSTRING_LEN;
  344. }
  345. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  346. for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
  347. strcpy(buf, bnxt_port_stats_arr[i].string);
  348. buf += ETH_GSTRING_LEN;
  349. }
  350. }
  351. if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
  352. for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++) {
  353. strcpy(buf, bnxt_port_stats_ext_arr[i].string);
  354. buf += ETH_GSTRING_LEN;
  355. }
  356. }
  357. break;
  358. case ETH_SS_TEST:
  359. if (bp->num_tests)
  360. memcpy(buf, bp->test_info->string,
  361. bp->num_tests * ETH_GSTRING_LEN);
  362. break;
  363. default:
  364. netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
  365. stringset);
  366. break;
  367. }
  368. }
  369. static void bnxt_get_ringparam(struct net_device *dev,
  370. struct ethtool_ringparam *ering)
  371. {
  372. struct bnxt *bp = netdev_priv(dev);
  373. ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
  374. ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
  375. ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
  376. ering->rx_pending = bp->rx_ring_size;
  377. ering->rx_jumbo_pending = bp->rx_agg_ring_size;
  378. ering->tx_pending = bp->tx_ring_size;
  379. }
  380. static int bnxt_set_ringparam(struct net_device *dev,
  381. struct ethtool_ringparam *ering)
  382. {
  383. struct bnxt *bp = netdev_priv(dev);
  384. if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
  385. (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
  386. (ering->tx_pending <= MAX_SKB_FRAGS))
  387. return -EINVAL;
  388. if (netif_running(dev))
  389. bnxt_close_nic(bp, false, false);
  390. bp->rx_ring_size = ering->rx_pending;
  391. bp->tx_ring_size = ering->tx_pending;
  392. bnxt_set_ring_params(bp);
  393. if (netif_running(dev))
  394. return bnxt_open_nic(bp, false, false);
  395. return 0;
  396. }
  397. static void bnxt_get_channels(struct net_device *dev,
  398. struct ethtool_channels *channel)
  399. {
  400. struct bnxt *bp = netdev_priv(dev);
  401. struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
  402. int max_rx_rings, max_tx_rings, tcs;
  403. int max_tx_sch_inputs;
  404. /* Get the most up-to-date max_tx_sch_inputs. */
  405. if (bp->flags & BNXT_FLAG_NEW_RM)
  406. bnxt_hwrm_func_resc_qcaps(bp, false);
  407. max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
  408. bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
  409. if (max_tx_sch_inputs)
  410. max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
  411. channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
  412. if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
  413. max_rx_rings = 0;
  414. max_tx_rings = 0;
  415. }
  416. if (max_tx_sch_inputs)
  417. max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
  418. tcs = netdev_get_num_tc(dev);
  419. if (tcs > 1)
  420. max_tx_rings /= tcs;
  421. channel->max_rx = max_rx_rings;
  422. channel->max_tx = max_tx_rings;
  423. channel->max_other = 0;
  424. if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
  425. channel->combined_count = bp->rx_nr_rings;
  426. if (BNXT_CHIP_TYPE_NITRO_A0(bp))
  427. channel->combined_count--;
  428. } else {
  429. if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
  430. channel->rx_count = bp->rx_nr_rings;
  431. channel->tx_count = bp->tx_nr_rings_per_tc;
  432. }
  433. }
  434. }
  435. static int bnxt_set_channels(struct net_device *dev,
  436. struct ethtool_channels *channel)
  437. {
  438. struct bnxt *bp = netdev_priv(dev);
  439. int req_tx_rings, req_rx_rings, tcs;
  440. bool sh = false;
  441. int tx_xdp = 0;
  442. int rc = 0;
  443. if (channel->other_count)
  444. return -EINVAL;
  445. if (!channel->combined_count &&
  446. (!channel->rx_count || !channel->tx_count))
  447. return -EINVAL;
  448. if (channel->combined_count &&
  449. (channel->rx_count || channel->tx_count))
  450. return -EINVAL;
  451. if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
  452. channel->tx_count))
  453. return -EINVAL;
  454. if (channel->combined_count)
  455. sh = true;
  456. tcs = netdev_get_num_tc(dev);
  457. req_tx_rings = sh ? channel->combined_count : channel->tx_count;
  458. req_rx_rings = sh ? channel->combined_count : channel->rx_count;
  459. if (bp->tx_nr_rings_xdp) {
  460. if (!sh) {
  461. netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
  462. return -EINVAL;
  463. }
  464. tx_xdp = req_rx_rings;
  465. }
  466. rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
  467. if (rc) {
  468. netdev_warn(dev, "Unable to allocate the requested rings\n");
  469. return rc;
  470. }
  471. if (netif_running(dev)) {
  472. if (BNXT_PF(bp)) {
  473. /* TODO CHIMP_FW: Send message to all VF's
  474. * before PF unload
  475. */
  476. }
  477. rc = bnxt_close_nic(bp, true, false);
  478. if (rc) {
  479. netdev_err(bp->dev, "Set channel failure rc :%x\n",
  480. rc);
  481. return rc;
  482. }
  483. }
  484. if (sh) {
  485. bp->flags |= BNXT_FLAG_SHARED_RINGS;
  486. bp->rx_nr_rings = channel->combined_count;
  487. bp->tx_nr_rings_per_tc = channel->combined_count;
  488. } else {
  489. bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
  490. bp->rx_nr_rings = channel->rx_count;
  491. bp->tx_nr_rings_per_tc = channel->tx_count;
  492. }
  493. bp->tx_nr_rings_xdp = tx_xdp;
  494. bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
  495. if (tcs > 1)
  496. bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
  497. bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
  498. bp->tx_nr_rings + bp->rx_nr_rings;
  499. bp->num_stat_ctxs = bp->cp_nr_rings;
  500. /* After changing number of rx channels, update NTUPLE feature. */
  501. netdev_update_features(dev);
  502. if (netif_running(dev)) {
  503. rc = bnxt_open_nic(bp, true, false);
  504. if ((!rc) && BNXT_PF(bp)) {
  505. /* TODO CHIMP_FW: Send message to all VF's
  506. * to renable
  507. */
  508. }
  509. } else {
  510. rc = bnxt_reserve_rings(bp);
  511. }
  512. return rc;
  513. }
  514. #ifdef CONFIG_RFS_ACCEL
  515. static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
  516. u32 *rule_locs)
  517. {
  518. int i, j = 0;
  519. cmd->data = bp->ntp_fltr_count;
  520. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  521. struct hlist_head *head;
  522. struct bnxt_ntuple_filter *fltr;
  523. head = &bp->ntp_fltr_hash_tbl[i];
  524. rcu_read_lock();
  525. hlist_for_each_entry_rcu(fltr, head, hash) {
  526. if (j == cmd->rule_cnt)
  527. break;
  528. rule_locs[j++] = fltr->sw_id;
  529. }
  530. rcu_read_unlock();
  531. if (j == cmd->rule_cnt)
  532. break;
  533. }
  534. cmd->rule_cnt = j;
  535. return 0;
  536. }
  537. static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  538. {
  539. struct ethtool_rx_flow_spec *fs =
  540. (struct ethtool_rx_flow_spec *)&cmd->fs;
  541. struct bnxt_ntuple_filter *fltr;
  542. struct flow_keys *fkeys;
  543. int i, rc = -EINVAL;
  544. if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
  545. return rc;
  546. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  547. struct hlist_head *head;
  548. head = &bp->ntp_fltr_hash_tbl[i];
  549. rcu_read_lock();
  550. hlist_for_each_entry_rcu(fltr, head, hash) {
  551. if (fltr->sw_id == fs->location)
  552. goto fltr_found;
  553. }
  554. rcu_read_unlock();
  555. }
  556. return rc;
  557. fltr_found:
  558. fkeys = &fltr->fkeys;
  559. if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
  560. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  561. fs->flow_type = TCP_V4_FLOW;
  562. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  563. fs->flow_type = UDP_V4_FLOW;
  564. else
  565. goto fltr_err;
  566. fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
  567. fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
  568. fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
  569. fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
  570. fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
  571. fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
  572. fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
  573. fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
  574. } else {
  575. int i;
  576. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  577. fs->flow_type = TCP_V6_FLOW;
  578. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  579. fs->flow_type = UDP_V6_FLOW;
  580. else
  581. goto fltr_err;
  582. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
  583. fkeys->addrs.v6addrs.src;
  584. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
  585. fkeys->addrs.v6addrs.dst;
  586. for (i = 0; i < 4; i++) {
  587. fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
  588. fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
  589. }
  590. fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
  591. fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
  592. fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
  593. fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
  594. }
  595. fs->ring_cookie = fltr->rxq;
  596. rc = 0;
  597. fltr_err:
  598. rcu_read_unlock();
  599. return rc;
  600. }
  601. #endif
  602. static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
  603. {
  604. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
  605. return RXH_IP_SRC | RXH_IP_DST;
  606. return 0;
  607. }
  608. static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
  609. {
  610. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
  611. return RXH_IP_SRC | RXH_IP_DST;
  612. return 0;
  613. }
  614. static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  615. {
  616. cmd->data = 0;
  617. switch (cmd->flow_type) {
  618. case TCP_V4_FLOW:
  619. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
  620. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  621. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  622. cmd->data |= get_ethtool_ipv4_rss(bp);
  623. break;
  624. case UDP_V4_FLOW:
  625. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
  626. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  627. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  628. /* fall through */
  629. case SCTP_V4_FLOW:
  630. case AH_ESP_V4_FLOW:
  631. case AH_V4_FLOW:
  632. case ESP_V4_FLOW:
  633. case IPV4_FLOW:
  634. cmd->data |= get_ethtool_ipv4_rss(bp);
  635. break;
  636. case TCP_V6_FLOW:
  637. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
  638. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  639. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  640. cmd->data |= get_ethtool_ipv6_rss(bp);
  641. break;
  642. case UDP_V6_FLOW:
  643. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
  644. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  645. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  646. /* fall through */
  647. case SCTP_V6_FLOW:
  648. case AH_ESP_V6_FLOW:
  649. case AH_V6_FLOW:
  650. case ESP_V6_FLOW:
  651. case IPV6_FLOW:
  652. cmd->data |= get_ethtool_ipv6_rss(bp);
  653. break;
  654. }
  655. return 0;
  656. }
  657. #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
  658. #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
  659. static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  660. {
  661. u32 rss_hash_cfg = bp->rss_hash_cfg;
  662. int tuple, rc = 0;
  663. if (cmd->data == RXH_4TUPLE)
  664. tuple = 4;
  665. else if (cmd->data == RXH_2TUPLE)
  666. tuple = 2;
  667. else if (!cmd->data)
  668. tuple = 0;
  669. else
  670. return -EINVAL;
  671. if (cmd->flow_type == TCP_V4_FLOW) {
  672. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  673. if (tuple == 4)
  674. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  675. } else if (cmd->flow_type == UDP_V4_FLOW) {
  676. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  677. return -EINVAL;
  678. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  679. if (tuple == 4)
  680. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  681. } else if (cmd->flow_type == TCP_V6_FLOW) {
  682. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  683. if (tuple == 4)
  684. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  685. } else if (cmd->flow_type == UDP_V6_FLOW) {
  686. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  687. return -EINVAL;
  688. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  689. if (tuple == 4)
  690. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  691. } else if (tuple == 4) {
  692. return -EINVAL;
  693. }
  694. switch (cmd->flow_type) {
  695. case TCP_V4_FLOW:
  696. case UDP_V4_FLOW:
  697. case SCTP_V4_FLOW:
  698. case AH_ESP_V4_FLOW:
  699. case AH_V4_FLOW:
  700. case ESP_V4_FLOW:
  701. case IPV4_FLOW:
  702. if (tuple == 2)
  703. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  704. else if (!tuple)
  705. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  706. break;
  707. case TCP_V6_FLOW:
  708. case UDP_V6_FLOW:
  709. case SCTP_V6_FLOW:
  710. case AH_ESP_V6_FLOW:
  711. case AH_V6_FLOW:
  712. case ESP_V6_FLOW:
  713. case IPV6_FLOW:
  714. if (tuple == 2)
  715. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  716. else if (!tuple)
  717. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  718. break;
  719. }
  720. if (bp->rss_hash_cfg == rss_hash_cfg)
  721. return 0;
  722. bp->rss_hash_cfg = rss_hash_cfg;
  723. if (netif_running(bp->dev)) {
  724. bnxt_close_nic(bp, false, false);
  725. rc = bnxt_open_nic(bp, false, false);
  726. }
  727. return rc;
  728. }
  729. static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
  730. u32 *rule_locs)
  731. {
  732. struct bnxt *bp = netdev_priv(dev);
  733. int rc = 0;
  734. switch (cmd->cmd) {
  735. #ifdef CONFIG_RFS_ACCEL
  736. case ETHTOOL_GRXRINGS:
  737. cmd->data = bp->rx_nr_rings;
  738. break;
  739. case ETHTOOL_GRXCLSRLCNT:
  740. cmd->rule_cnt = bp->ntp_fltr_count;
  741. cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
  742. break;
  743. case ETHTOOL_GRXCLSRLALL:
  744. rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
  745. break;
  746. case ETHTOOL_GRXCLSRULE:
  747. rc = bnxt_grxclsrule(bp, cmd);
  748. break;
  749. #endif
  750. case ETHTOOL_GRXFH:
  751. rc = bnxt_grxfh(bp, cmd);
  752. break;
  753. default:
  754. rc = -EOPNOTSUPP;
  755. break;
  756. }
  757. return rc;
  758. }
  759. static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
  760. {
  761. struct bnxt *bp = netdev_priv(dev);
  762. int rc;
  763. switch (cmd->cmd) {
  764. case ETHTOOL_SRXFH:
  765. rc = bnxt_srxfh(bp, cmd);
  766. break;
  767. default:
  768. rc = -EOPNOTSUPP;
  769. break;
  770. }
  771. return rc;
  772. }
  773. static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
  774. {
  775. return HW_HASH_INDEX_SIZE;
  776. }
  777. static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
  778. {
  779. return HW_HASH_KEY_SIZE;
  780. }
  781. static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
  782. u8 *hfunc)
  783. {
  784. struct bnxt *bp = netdev_priv(dev);
  785. struct bnxt_vnic_info *vnic;
  786. int i = 0;
  787. if (hfunc)
  788. *hfunc = ETH_RSS_HASH_TOP;
  789. if (!bp->vnic_info)
  790. return 0;
  791. vnic = &bp->vnic_info[0];
  792. if (indir && vnic->rss_table) {
  793. for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
  794. indir[i] = le16_to_cpu(vnic->rss_table[i]);
  795. }
  796. if (key && vnic->rss_hash_key)
  797. memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
  798. return 0;
  799. }
  800. static void bnxt_get_drvinfo(struct net_device *dev,
  801. struct ethtool_drvinfo *info)
  802. {
  803. struct bnxt *bp = netdev_priv(dev);
  804. strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
  805. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  806. strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
  807. strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
  808. info->n_stats = bnxt_get_num_stats(bp);
  809. info->testinfo_len = bp->num_tests;
  810. /* TODO CHIMP_FW: eeprom dump details */
  811. info->eedump_len = 0;
  812. /* TODO CHIMP FW: reg dump details */
  813. info->regdump_len = 0;
  814. }
  815. static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  816. {
  817. struct bnxt *bp = netdev_priv(dev);
  818. wol->supported = 0;
  819. wol->wolopts = 0;
  820. memset(&wol->sopass, 0, sizeof(wol->sopass));
  821. if (bp->flags & BNXT_FLAG_WOL_CAP) {
  822. wol->supported = WAKE_MAGIC;
  823. if (bp->wol)
  824. wol->wolopts = WAKE_MAGIC;
  825. }
  826. }
  827. static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  828. {
  829. struct bnxt *bp = netdev_priv(dev);
  830. if (wol->wolopts & ~WAKE_MAGIC)
  831. return -EINVAL;
  832. if (wol->wolopts & WAKE_MAGIC) {
  833. if (!(bp->flags & BNXT_FLAG_WOL_CAP))
  834. return -EINVAL;
  835. if (!bp->wol) {
  836. if (bnxt_hwrm_alloc_wol_fltr(bp))
  837. return -EBUSY;
  838. bp->wol = 1;
  839. }
  840. } else {
  841. if (bp->wol) {
  842. if (bnxt_hwrm_free_wol_fltr(bp))
  843. return -EBUSY;
  844. bp->wol = 0;
  845. }
  846. }
  847. return 0;
  848. }
  849. u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
  850. {
  851. u32 speed_mask = 0;
  852. /* TODO: support 25GB, 40GB, 50GB with different cable type */
  853. /* set the advertised speeds */
  854. if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
  855. speed_mask |= ADVERTISED_100baseT_Full;
  856. if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
  857. speed_mask |= ADVERTISED_1000baseT_Full;
  858. if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
  859. speed_mask |= ADVERTISED_2500baseX_Full;
  860. if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
  861. speed_mask |= ADVERTISED_10000baseT_Full;
  862. if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
  863. speed_mask |= ADVERTISED_40000baseCR4_Full;
  864. if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
  865. speed_mask |= ADVERTISED_Pause;
  866. else if (fw_pause & BNXT_LINK_PAUSE_TX)
  867. speed_mask |= ADVERTISED_Asym_Pause;
  868. else if (fw_pause & BNXT_LINK_PAUSE_RX)
  869. speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
  870. return speed_mask;
  871. }
  872. #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
  873. { \
  874. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
  875. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  876. 100baseT_Full); \
  877. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
  878. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  879. 1000baseT_Full); \
  880. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
  881. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  882. 10000baseT_Full); \
  883. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
  884. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  885. 25000baseCR_Full); \
  886. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
  887. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  888. 40000baseCR4_Full);\
  889. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
  890. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  891. 50000baseCR2_Full);\
  892. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \
  893. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  894. 100000baseCR4_Full);\
  895. if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
  896. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  897. Pause); \
  898. if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
  899. ethtool_link_ksettings_add_link_mode( \
  900. lk_ksettings, name, Asym_Pause);\
  901. } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
  902. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  903. Asym_Pause); \
  904. } \
  905. }
  906. #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
  907. { \
  908. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  909. 100baseT_Full) || \
  910. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  911. 100baseT_Half)) \
  912. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
  913. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  914. 1000baseT_Full) || \
  915. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  916. 1000baseT_Half)) \
  917. (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
  918. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  919. 10000baseT_Full)) \
  920. (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
  921. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  922. 25000baseCR_Full)) \
  923. (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
  924. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  925. 40000baseCR4_Full)) \
  926. (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
  927. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  928. 50000baseCR2_Full)) \
  929. (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
  930. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  931. 100000baseCR4_Full)) \
  932. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \
  933. }
  934. static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
  935. struct ethtool_link_ksettings *lk_ksettings)
  936. {
  937. u16 fw_speeds = link_info->advertising;
  938. u8 fw_pause = 0;
  939. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  940. fw_pause = link_info->auto_pause_setting;
  941. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
  942. }
  943. static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
  944. struct ethtool_link_ksettings *lk_ksettings)
  945. {
  946. u16 fw_speeds = link_info->lp_auto_link_speeds;
  947. u8 fw_pause = 0;
  948. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  949. fw_pause = link_info->lp_pause;
  950. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
  951. lp_advertising);
  952. }
  953. static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
  954. struct ethtool_link_ksettings *lk_ksettings)
  955. {
  956. u16 fw_speeds = link_info->support_speeds;
  957. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
  958. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
  959. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  960. Asym_Pause);
  961. if (link_info->support_auto_speeds)
  962. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  963. Autoneg);
  964. }
  965. u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
  966. {
  967. switch (fw_link_speed) {
  968. case BNXT_LINK_SPEED_100MB:
  969. return SPEED_100;
  970. case BNXT_LINK_SPEED_1GB:
  971. return SPEED_1000;
  972. case BNXT_LINK_SPEED_2_5GB:
  973. return SPEED_2500;
  974. case BNXT_LINK_SPEED_10GB:
  975. return SPEED_10000;
  976. case BNXT_LINK_SPEED_20GB:
  977. return SPEED_20000;
  978. case BNXT_LINK_SPEED_25GB:
  979. return SPEED_25000;
  980. case BNXT_LINK_SPEED_40GB:
  981. return SPEED_40000;
  982. case BNXT_LINK_SPEED_50GB:
  983. return SPEED_50000;
  984. case BNXT_LINK_SPEED_100GB:
  985. return SPEED_100000;
  986. default:
  987. return SPEED_UNKNOWN;
  988. }
  989. }
  990. static int bnxt_get_link_ksettings(struct net_device *dev,
  991. struct ethtool_link_ksettings *lk_ksettings)
  992. {
  993. struct bnxt *bp = netdev_priv(dev);
  994. struct bnxt_link_info *link_info = &bp->link_info;
  995. struct ethtool_link_settings *base = &lk_ksettings->base;
  996. u32 ethtool_speed;
  997. ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
  998. mutex_lock(&bp->link_lock);
  999. bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
  1000. ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
  1001. if (link_info->autoneg) {
  1002. bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
  1003. ethtool_link_ksettings_add_link_mode(lk_ksettings,
  1004. advertising, Autoneg);
  1005. base->autoneg = AUTONEG_ENABLE;
  1006. if (link_info->phy_link_status == BNXT_LINK_LINK)
  1007. bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
  1008. ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
  1009. if (!netif_carrier_ok(dev))
  1010. base->duplex = DUPLEX_UNKNOWN;
  1011. else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
  1012. base->duplex = DUPLEX_FULL;
  1013. else
  1014. base->duplex = DUPLEX_HALF;
  1015. } else {
  1016. base->autoneg = AUTONEG_DISABLE;
  1017. ethtool_speed =
  1018. bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
  1019. base->duplex = DUPLEX_HALF;
  1020. if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
  1021. base->duplex = DUPLEX_FULL;
  1022. }
  1023. base->speed = ethtool_speed;
  1024. base->port = PORT_NONE;
  1025. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  1026. base->port = PORT_TP;
  1027. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  1028. TP);
  1029. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  1030. TP);
  1031. } else {
  1032. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  1033. FIBRE);
  1034. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  1035. FIBRE);
  1036. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
  1037. base->port = PORT_DA;
  1038. else if (link_info->media_type ==
  1039. PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
  1040. base->port = PORT_FIBRE;
  1041. }
  1042. base->phy_address = link_info->phy_addr;
  1043. mutex_unlock(&bp->link_lock);
  1044. return 0;
  1045. }
  1046. static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
  1047. {
  1048. struct bnxt *bp = netdev_priv(dev);
  1049. struct bnxt_link_info *link_info = &bp->link_info;
  1050. u16 support_spds = link_info->support_speeds;
  1051. u32 fw_speed = 0;
  1052. switch (ethtool_speed) {
  1053. case SPEED_100:
  1054. if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
  1055. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
  1056. break;
  1057. case SPEED_1000:
  1058. if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
  1059. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
  1060. break;
  1061. case SPEED_2500:
  1062. if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
  1063. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
  1064. break;
  1065. case SPEED_10000:
  1066. if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
  1067. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
  1068. break;
  1069. case SPEED_20000:
  1070. if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
  1071. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
  1072. break;
  1073. case SPEED_25000:
  1074. if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
  1075. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
  1076. break;
  1077. case SPEED_40000:
  1078. if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
  1079. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
  1080. break;
  1081. case SPEED_50000:
  1082. if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
  1083. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
  1084. break;
  1085. case SPEED_100000:
  1086. if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
  1087. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
  1088. break;
  1089. default:
  1090. netdev_err(dev, "unsupported speed!\n");
  1091. break;
  1092. }
  1093. return fw_speed;
  1094. }
  1095. u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
  1096. {
  1097. u16 fw_speed_mask = 0;
  1098. /* only support autoneg at speed 100, 1000, and 10000 */
  1099. if (advertising & (ADVERTISED_100baseT_Full |
  1100. ADVERTISED_100baseT_Half)) {
  1101. fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
  1102. }
  1103. if (advertising & (ADVERTISED_1000baseT_Full |
  1104. ADVERTISED_1000baseT_Half)) {
  1105. fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
  1106. }
  1107. if (advertising & ADVERTISED_10000baseT_Full)
  1108. fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
  1109. if (advertising & ADVERTISED_40000baseCR4_Full)
  1110. fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
  1111. return fw_speed_mask;
  1112. }
  1113. static int bnxt_set_link_ksettings(struct net_device *dev,
  1114. const struct ethtool_link_ksettings *lk_ksettings)
  1115. {
  1116. struct bnxt *bp = netdev_priv(dev);
  1117. struct bnxt_link_info *link_info = &bp->link_info;
  1118. const struct ethtool_link_settings *base = &lk_ksettings->base;
  1119. bool set_pause = false;
  1120. u16 fw_advertising = 0;
  1121. u32 speed;
  1122. int rc = 0;
  1123. if (!BNXT_SINGLE_PF(bp))
  1124. return -EOPNOTSUPP;
  1125. mutex_lock(&bp->link_lock);
  1126. if (base->autoneg == AUTONEG_ENABLE) {
  1127. BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
  1128. advertising);
  1129. link_info->autoneg |= BNXT_AUTONEG_SPEED;
  1130. if (!fw_advertising)
  1131. link_info->advertising = link_info->support_auto_speeds;
  1132. else
  1133. link_info->advertising = fw_advertising;
  1134. /* any change to autoneg will cause link change, therefore the
  1135. * driver should put back the original pause setting in autoneg
  1136. */
  1137. set_pause = true;
  1138. } else {
  1139. u16 fw_speed;
  1140. u8 phy_type = link_info->phy_type;
  1141. if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
  1142. phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
  1143. link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  1144. netdev_err(dev, "10GBase-T devices must autoneg\n");
  1145. rc = -EINVAL;
  1146. goto set_setting_exit;
  1147. }
  1148. if (base->duplex == DUPLEX_HALF) {
  1149. netdev_err(dev, "HALF DUPLEX is not supported!\n");
  1150. rc = -EINVAL;
  1151. goto set_setting_exit;
  1152. }
  1153. speed = base->speed;
  1154. fw_speed = bnxt_get_fw_speed(dev, speed);
  1155. if (!fw_speed) {
  1156. rc = -EINVAL;
  1157. goto set_setting_exit;
  1158. }
  1159. link_info->req_link_speed = fw_speed;
  1160. link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
  1161. link_info->autoneg = 0;
  1162. link_info->advertising = 0;
  1163. }
  1164. if (netif_running(dev))
  1165. rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
  1166. set_setting_exit:
  1167. mutex_unlock(&bp->link_lock);
  1168. return rc;
  1169. }
  1170. static void bnxt_get_pauseparam(struct net_device *dev,
  1171. struct ethtool_pauseparam *epause)
  1172. {
  1173. struct bnxt *bp = netdev_priv(dev);
  1174. struct bnxt_link_info *link_info = &bp->link_info;
  1175. if (BNXT_VF(bp))
  1176. return;
  1177. epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
  1178. epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
  1179. epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
  1180. }
  1181. static int bnxt_set_pauseparam(struct net_device *dev,
  1182. struct ethtool_pauseparam *epause)
  1183. {
  1184. int rc = 0;
  1185. struct bnxt *bp = netdev_priv(dev);
  1186. struct bnxt_link_info *link_info = &bp->link_info;
  1187. if (!BNXT_SINGLE_PF(bp))
  1188. return -EOPNOTSUPP;
  1189. if (epause->autoneg) {
  1190. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1191. return -EINVAL;
  1192. link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
  1193. if (bp->hwrm_spec_code >= 0x10201)
  1194. link_info->req_flow_ctrl =
  1195. PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
  1196. } else {
  1197. /* when transition from auto pause to force pause,
  1198. * force a link change
  1199. */
  1200. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  1201. link_info->force_link_chng = true;
  1202. link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
  1203. link_info->req_flow_ctrl = 0;
  1204. }
  1205. if (epause->rx_pause)
  1206. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
  1207. if (epause->tx_pause)
  1208. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
  1209. if (netif_running(dev))
  1210. rc = bnxt_hwrm_set_pause(bp);
  1211. return rc;
  1212. }
  1213. static u32 bnxt_get_link(struct net_device *dev)
  1214. {
  1215. struct bnxt *bp = netdev_priv(dev);
  1216. /* TODO: handle MF, VF, driver close case */
  1217. return bp->link_info.link_up;
  1218. }
  1219. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1220. u16 ext, u16 *index, u32 *item_length,
  1221. u32 *data_length);
  1222. static int bnxt_flash_nvram(struct net_device *dev,
  1223. u16 dir_type,
  1224. u16 dir_ordinal,
  1225. u16 dir_ext,
  1226. u16 dir_attr,
  1227. const u8 *data,
  1228. size_t data_len)
  1229. {
  1230. struct bnxt *bp = netdev_priv(dev);
  1231. int rc;
  1232. struct hwrm_nvm_write_input req = {0};
  1233. dma_addr_t dma_handle;
  1234. u8 *kmem;
  1235. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
  1236. req.dir_type = cpu_to_le16(dir_type);
  1237. req.dir_ordinal = cpu_to_le16(dir_ordinal);
  1238. req.dir_ext = cpu_to_le16(dir_ext);
  1239. req.dir_attr = cpu_to_le16(dir_attr);
  1240. req.dir_data_length = cpu_to_le32(data_len);
  1241. kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
  1242. GFP_KERNEL);
  1243. if (!kmem) {
  1244. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1245. (unsigned)data_len);
  1246. return -ENOMEM;
  1247. }
  1248. memcpy(kmem, data, data_len);
  1249. req.host_src_addr = cpu_to_le64(dma_handle);
  1250. rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
  1251. dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
  1252. return rc;
  1253. }
  1254. static int bnxt_firmware_reset(struct net_device *dev,
  1255. u16 dir_type)
  1256. {
  1257. struct bnxt *bp = netdev_priv(dev);
  1258. struct hwrm_fw_reset_input req = {0};
  1259. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
  1260. /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
  1261. /* (e.g. when firmware isn't already running) */
  1262. switch (dir_type) {
  1263. case BNX_DIR_TYPE_CHIMP_PATCH:
  1264. case BNX_DIR_TYPE_BOOTCODE:
  1265. case BNX_DIR_TYPE_BOOTCODE_2:
  1266. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
  1267. /* Self-reset ChiMP upon next PCIe reset: */
  1268. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1269. break;
  1270. case BNX_DIR_TYPE_APE_FW:
  1271. case BNX_DIR_TYPE_APE_PATCH:
  1272. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
  1273. /* Self-reset APE upon next PCIe reset: */
  1274. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1275. break;
  1276. case BNX_DIR_TYPE_KONG_FW:
  1277. case BNX_DIR_TYPE_KONG_PATCH:
  1278. req.embedded_proc_type =
  1279. FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
  1280. break;
  1281. case BNX_DIR_TYPE_BONO_FW:
  1282. case BNX_DIR_TYPE_BONO_PATCH:
  1283. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
  1284. break;
  1285. case BNXT_FW_RESET_CHIP:
  1286. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP;
  1287. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP;
  1288. break;
  1289. case BNXT_FW_RESET_AP:
  1290. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP;
  1291. break;
  1292. default:
  1293. return -EINVAL;
  1294. }
  1295. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1296. }
  1297. static int bnxt_flash_firmware(struct net_device *dev,
  1298. u16 dir_type,
  1299. const u8 *fw_data,
  1300. size_t fw_size)
  1301. {
  1302. int rc = 0;
  1303. u16 code_type;
  1304. u32 stored_crc;
  1305. u32 calculated_crc;
  1306. struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
  1307. switch (dir_type) {
  1308. case BNX_DIR_TYPE_BOOTCODE:
  1309. case BNX_DIR_TYPE_BOOTCODE_2:
  1310. code_type = CODE_BOOT;
  1311. break;
  1312. case BNX_DIR_TYPE_CHIMP_PATCH:
  1313. code_type = CODE_CHIMP_PATCH;
  1314. break;
  1315. case BNX_DIR_TYPE_APE_FW:
  1316. code_type = CODE_MCTP_PASSTHRU;
  1317. break;
  1318. case BNX_DIR_TYPE_APE_PATCH:
  1319. code_type = CODE_APE_PATCH;
  1320. break;
  1321. case BNX_DIR_TYPE_KONG_FW:
  1322. code_type = CODE_KONG_FW;
  1323. break;
  1324. case BNX_DIR_TYPE_KONG_PATCH:
  1325. code_type = CODE_KONG_PATCH;
  1326. break;
  1327. case BNX_DIR_TYPE_BONO_FW:
  1328. code_type = CODE_BONO_FW;
  1329. break;
  1330. case BNX_DIR_TYPE_BONO_PATCH:
  1331. code_type = CODE_BONO_PATCH;
  1332. break;
  1333. default:
  1334. netdev_err(dev, "Unsupported directory entry type: %u\n",
  1335. dir_type);
  1336. return -EINVAL;
  1337. }
  1338. if (fw_size < sizeof(struct bnxt_fw_header)) {
  1339. netdev_err(dev, "Invalid firmware file size: %u\n",
  1340. (unsigned int)fw_size);
  1341. return -EINVAL;
  1342. }
  1343. if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
  1344. netdev_err(dev, "Invalid firmware signature: %08X\n",
  1345. le32_to_cpu(header->signature));
  1346. return -EINVAL;
  1347. }
  1348. if (header->code_type != code_type) {
  1349. netdev_err(dev, "Expected firmware type: %d, read: %d\n",
  1350. code_type, header->code_type);
  1351. return -EINVAL;
  1352. }
  1353. if (header->device != DEVICE_CUMULUS_FAMILY) {
  1354. netdev_err(dev, "Expected firmware device family %d, read: %d\n",
  1355. DEVICE_CUMULUS_FAMILY, header->device);
  1356. return -EINVAL;
  1357. }
  1358. /* Confirm the CRC32 checksum of the file: */
  1359. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1360. sizeof(stored_crc)));
  1361. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1362. if (calculated_crc != stored_crc) {
  1363. netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
  1364. (unsigned long)stored_crc,
  1365. (unsigned long)calculated_crc);
  1366. return -EINVAL;
  1367. }
  1368. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1369. 0, 0, fw_data, fw_size);
  1370. if (rc == 0) /* Firmware update successful */
  1371. rc = bnxt_firmware_reset(dev, dir_type);
  1372. return rc;
  1373. }
  1374. static int bnxt_flash_microcode(struct net_device *dev,
  1375. u16 dir_type,
  1376. const u8 *fw_data,
  1377. size_t fw_size)
  1378. {
  1379. struct bnxt_ucode_trailer *trailer;
  1380. u32 calculated_crc;
  1381. u32 stored_crc;
  1382. int rc = 0;
  1383. if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
  1384. netdev_err(dev, "Invalid microcode file size: %u\n",
  1385. (unsigned int)fw_size);
  1386. return -EINVAL;
  1387. }
  1388. trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
  1389. sizeof(*trailer)));
  1390. if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
  1391. netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
  1392. le32_to_cpu(trailer->sig));
  1393. return -EINVAL;
  1394. }
  1395. if (le16_to_cpu(trailer->dir_type) != dir_type) {
  1396. netdev_err(dev, "Expected microcode type: %d, read: %d\n",
  1397. dir_type, le16_to_cpu(trailer->dir_type));
  1398. return -EINVAL;
  1399. }
  1400. if (le16_to_cpu(trailer->trailer_length) <
  1401. sizeof(struct bnxt_ucode_trailer)) {
  1402. netdev_err(dev, "Invalid microcode trailer length: %d\n",
  1403. le16_to_cpu(trailer->trailer_length));
  1404. return -EINVAL;
  1405. }
  1406. /* Confirm the CRC32 checksum of the file: */
  1407. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1408. sizeof(stored_crc)));
  1409. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1410. if (calculated_crc != stored_crc) {
  1411. netdev_err(dev,
  1412. "CRC32 (%08lX) does not match calculated: %08lX\n",
  1413. (unsigned long)stored_crc,
  1414. (unsigned long)calculated_crc);
  1415. return -EINVAL;
  1416. }
  1417. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1418. 0, 0, fw_data, fw_size);
  1419. return rc;
  1420. }
  1421. static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
  1422. {
  1423. switch (dir_type) {
  1424. case BNX_DIR_TYPE_CHIMP_PATCH:
  1425. case BNX_DIR_TYPE_BOOTCODE:
  1426. case BNX_DIR_TYPE_BOOTCODE_2:
  1427. case BNX_DIR_TYPE_APE_FW:
  1428. case BNX_DIR_TYPE_APE_PATCH:
  1429. case BNX_DIR_TYPE_KONG_FW:
  1430. case BNX_DIR_TYPE_KONG_PATCH:
  1431. case BNX_DIR_TYPE_BONO_FW:
  1432. case BNX_DIR_TYPE_BONO_PATCH:
  1433. return true;
  1434. }
  1435. return false;
  1436. }
  1437. static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
  1438. {
  1439. switch (dir_type) {
  1440. case BNX_DIR_TYPE_AVS:
  1441. case BNX_DIR_TYPE_EXP_ROM_MBA:
  1442. case BNX_DIR_TYPE_PCIE:
  1443. case BNX_DIR_TYPE_TSCF_UCODE:
  1444. case BNX_DIR_TYPE_EXT_PHY:
  1445. case BNX_DIR_TYPE_CCM:
  1446. case BNX_DIR_TYPE_ISCSI_BOOT:
  1447. case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
  1448. case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
  1449. return true;
  1450. }
  1451. return false;
  1452. }
  1453. static bool bnxt_dir_type_is_executable(u16 dir_type)
  1454. {
  1455. return bnxt_dir_type_is_ape_bin_format(dir_type) ||
  1456. bnxt_dir_type_is_other_exec_format(dir_type);
  1457. }
  1458. static int bnxt_flash_firmware_from_file(struct net_device *dev,
  1459. u16 dir_type,
  1460. const char *filename)
  1461. {
  1462. const struct firmware *fw;
  1463. int rc;
  1464. rc = request_firmware(&fw, filename, &dev->dev);
  1465. if (rc != 0) {
  1466. netdev_err(dev, "Error %d requesting firmware file: %s\n",
  1467. rc, filename);
  1468. return rc;
  1469. }
  1470. if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
  1471. rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
  1472. else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
  1473. rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
  1474. else
  1475. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1476. 0, 0, fw->data, fw->size);
  1477. release_firmware(fw);
  1478. return rc;
  1479. }
  1480. static int bnxt_flash_package_from_file(struct net_device *dev,
  1481. char *filename, u32 install_type)
  1482. {
  1483. struct bnxt *bp = netdev_priv(dev);
  1484. struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
  1485. struct hwrm_nvm_install_update_input install = {0};
  1486. const struct firmware *fw;
  1487. u32 item_len;
  1488. u16 index;
  1489. int rc;
  1490. bnxt_hwrm_fw_set_time(bp);
  1491. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
  1492. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1493. &index, &item_len, NULL) != 0) {
  1494. netdev_err(dev, "PKG update area not created in nvram\n");
  1495. return -ENOBUFS;
  1496. }
  1497. rc = request_firmware(&fw, filename, &dev->dev);
  1498. if (rc != 0) {
  1499. netdev_err(dev, "PKG error %d requesting file: %s\n",
  1500. rc, filename);
  1501. return rc;
  1502. }
  1503. if (fw->size > item_len) {
  1504. netdev_err(dev, "PKG insufficient update area in nvram: %lu",
  1505. (unsigned long)fw->size);
  1506. rc = -EFBIG;
  1507. } else {
  1508. dma_addr_t dma_handle;
  1509. u8 *kmem;
  1510. struct hwrm_nvm_modify_input modify = {0};
  1511. bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
  1512. modify.dir_idx = cpu_to_le16(index);
  1513. modify.len = cpu_to_le32(fw->size);
  1514. kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
  1515. &dma_handle, GFP_KERNEL);
  1516. if (!kmem) {
  1517. netdev_err(dev,
  1518. "dma_alloc_coherent failure, length = %u\n",
  1519. (unsigned int)fw->size);
  1520. rc = -ENOMEM;
  1521. } else {
  1522. memcpy(kmem, fw->data, fw->size);
  1523. modify.host_src_addr = cpu_to_le64(dma_handle);
  1524. rc = hwrm_send_message(bp, &modify, sizeof(modify),
  1525. FLASH_PACKAGE_TIMEOUT);
  1526. dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
  1527. dma_handle);
  1528. }
  1529. }
  1530. release_firmware(fw);
  1531. if (rc)
  1532. return rc;
  1533. if ((install_type & 0xffff) == 0)
  1534. install_type >>= 16;
  1535. bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
  1536. install.install_type = cpu_to_le32(install_type);
  1537. mutex_lock(&bp->hwrm_cmd_lock);
  1538. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1539. INSTALL_PACKAGE_TIMEOUT);
  1540. if (rc) {
  1541. rc = -EOPNOTSUPP;
  1542. goto flash_pkg_exit;
  1543. }
  1544. if (resp->error_code) {
  1545. u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
  1546. if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
  1547. install.flags |= cpu_to_le16(
  1548. NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
  1549. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1550. INSTALL_PACKAGE_TIMEOUT);
  1551. if (rc) {
  1552. rc = -EOPNOTSUPP;
  1553. goto flash_pkg_exit;
  1554. }
  1555. }
  1556. }
  1557. if (resp->result) {
  1558. netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
  1559. (s8)resp->result, (int)resp->problem_item);
  1560. rc = -ENOPKG;
  1561. }
  1562. flash_pkg_exit:
  1563. mutex_unlock(&bp->hwrm_cmd_lock);
  1564. return rc;
  1565. }
  1566. static int bnxt_flash_device(struct net_device *dev,
  1567. struct ethtool_flash *flash)
  1568. {
  1569. if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
  1570. netdev_err(dev, "flashdev not supported from a virtual function\n");
  1571. return -EINVAL;
  1572. }
  1573. if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
  1574. flash->region > 0xffff)
  1575. return bnxt_flash_package_from_file(dev, flash->data,
  1576. flash->region);
  1577. return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
  1578. }
  1579. static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
  1580. {
  1581. struct bnxt *bp = netdev_priv(dev);
  1582. int rc;
  1583. struct hwrm_nvm_get_dir_info_input req = {0};
  1584. struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
  1585. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
  1586. mutex_lock(&bp->hwrm_cmd_lock);
  1587. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1588. if (!rc) {
  1589. *entries = le32_to_cpu(output->entries);
  1590. *length = le32_to_cpu(output->entry_length);
  1591. }
  1592. mutex_unlock(&bp->hwrm_cmd_lock);
  1593. return rc;
  1594. }
  1595. static int bnxt_get_eeprom_len(struct net_device *dev)
  1596. {
  1597. struct bnxt *bp = netdev_priv(dev);
  1598. if (BNXT_VF(bp))
  1599. return 0;
  1600. /* The -1 return value allows the entire 32-bit range of offsets to be
  1601. * passed via the ethtool command-line utility.
  1602. */
  1603. return -1;
  1604. }
  1605. static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
  1606. {
  1607. struct bnxt *bp = netdev_priv(dev);
  1608. int rc;
  1609. u32 dir_entries;
  1610. u32 entry_length;
  1611. u8 *buf;
  1612. size_t buflen;
  1613. dma_addr_t dma_handle;
  1614. struct hwrm_nvm_get_dir_entries_input req = {0};
  1615. rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
  1616. if (rc != 0)
  1617. return rc;
  1618. /* Insert 2 bytes of directory info (count and size of entries) */
  1619. if (len < 2)
  1620. return -EINVAL;
  1621. *data++ = dir_entries;
  1622. *data++ = entry_length;
  1623. len -= 2;
  1624. memset(data, 0xff, len);
  1625. buflen = dir_entries * entry_length;
  1626. buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
  1627. GFP_KERNEL);
  1628. if (!buf) {
  1629. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1630. (unsigned)buflen);
  1631. return -ENOMEM;
  1632. }
  1633. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
  1634. req.host_dest_addr = cpu_to_le64(dma_handle);
  1635. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1636. if (rc == 0)
  1637. memcpy(data, buf, len > buflen ? buflen : len);
  1638. dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
  1639. return rc;
  1640. }
  1641. static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
  1642. u32 length, u8 *data)
  1643. {
  1644. struct bnxt *bp = netdev_priv(dev);
  1645. int rc;
  1646. u8 *buf;
  1647. dma_addr_t dma_handle;
  1648. struct hwrm_nvm_read_input req = {0};
  1649. if (!length)
  1650. return -EINVAL;
  1651. buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
  1652. GFP_KERNEL);
  1653. if (!buf) {
  1654. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1655. (unsigned)length);
  1656. return -ENOMEM;
  1657. }
  1658. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
  1659. req.host_dest_addr = cpu_to_le64(dma_handle);
  1660. req.dir_idx = cpu_to_le16(index);
  1661. req.offset = cpu_to_le32(offset);
  1662. req.len = cpu_to_le32(length);
  1663. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1664. if (rc == 0)
  1665. memcpy(data, buf, length);
  1666. dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
  1667. return rc;
  1668. }
  1669. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1670. u16 ext, u16 *index, u32 *item_length,
  1671. u32 *data_length)
  1672. {
  1673. struct bnxt *bp = netdev_priv(dev);
  1674. int rc;
  1675. struct hwrm_nvm_find_dir_entry_input req = {0};
  1676. struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
  1677. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
  1678. req.enables = 0;
  1679. req.dir_idx = 0;
  1680. req.dir_type = cpu_to_le16(type);
  1681. req.dir_ordinal = cpu_to_le16(ordinal);
  1682. req.dir_ext = cpu_to_le16(ext);
  1683. req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
  1684. mutex_lock(&bp->hwrm_cmd_lock);
  1685. rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1686. if (rc == 0) {
  1687. if (index)
  1688. *index = le16_to_cpu(output->dir_idx);
  1689. if (item_length)
  1690. *item_length = le32_to_cpu(output->dir_item_length);
  1691. if (data_length)
  1692. *data_length = le32_to_cpu(output->dir_data_length);
  1693. }
  1694. mutex_unlock(&bp->hwrm_cmd_lock);
  1695. return rc;
  1696. }
  1697. static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
  1698. {
  1699. char *retval = NULL;
  1700. char *p;
  1701. char *value;
  1702. int field = 0;
  1703. if (datalen < 1)
  1704. return NULL;
  1705. /* null-terminate the log data (removing last '\n'): */
  1706. data[datalen - 1] = 0;
  1707. for (p = data; *p != 0; p++) {
  1708. field = 0;
  1709. retval = NULL;
  1710. while (*p != 0 && *p != '\n') {
  1711. value = p;
  1712. while (*p != 0 && *p != '\t' && *p != '\n')
  1713. p++;
  1714. if (field == desired_field)
  1715. retval = value;
  1716. if (*p != '\t')
  1717. break;
  1718. *p = 0;
  1719. field++;
  1720. p++;
  1721. }
  1722. if (*p == 0)
  1723. break;
  1724. *p = 0;
  1725. }
  1726. return retval;
  1727. }
  1728. static void bnxt_get_pkgver(struct net_device *dev)
  1729. {
  1730. struct bnxt *bp = netdev_priv(dev);
  1731. u16 index = 0;
  1732. char *pkgver;
  1733. u32 pkglen;
  1734. u8 *pkgbuf;
  1735. int len;
  1736. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
  1737. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1738. &index, NULL, &pkglen) != 0)
  1739. return;
  1740. pkgbuf = kzalloc(pkglen, GFP_KERNEL);
  1741. if (!pkgbuf) {
  1742. dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
  1743. pkglen);
  1744. return;
  1745. }
  1746. if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf))
  1747. goto err;
  1748. pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
  1749. pkglen);
  1750. if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
  1751. len = strlen(bp->fw_ver_str);
  1752. snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
  1753. "/pkg %s", pkgver);
  1754. }
  1755. err:
  1756. kfree(pkgbuf);
  1757. }
  1758. static int bnxt_get_eeprom(struct net_device *dev,
  1759. struct ethtool_eeprom *eeprom,
  1760. u8 *data)
  1761. {
  1762. u32 index;
  1763. u32 offset;
  1764. if (eeprom->offset == 0) /* special offset value to get directory */
  1765. return bnxt_get_nvram_directory(dev, eeprom->len, data);
  1766. index = eeprom->offset >> 24;
  1767. offset = eeprom->offset & 0xffffff;
  1768. if (index == 0) {
  1769. netdev_err(dev, "unsupported index value: %d\n", index);
  1770. return -EINVAL;
  1771. }
  1772. return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
  1773. }
  1774. static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
  1775. {
  1776. struct bnxt *bp = netdev_priv(dev);
  1777. struct hwrm_nvm_erase_dir_entry_input req = {0};
  1778. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
  1779. req.dir_idx = cpu_to_le16(index);
  1780. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1781. }
  1782. static int bnxt_set_eeprom(struct net_device *dev,
  1783. struct ethtool_eeprom *eeprom,
  1784. u8 *data)
  1785. {
  1786. struct bnxt *bp = netdev_priv(dev);
  1787. u8 index, dir_op;
  1788. u16 type, ext, ordinal, attr;
  1789. if (!BNXT_PF(bp)) {
  1790. netdev_err(dev, "NVM write not supported from a virtual function\n");
  1791. return -EINVAL;
  1792. }
  1793. type = eeprom->magic >> 16;
  1794. if (type == 0xffff) { /* special value for directory operations */
  1795. index = eeprom->magic & 0xff;
  1796. dir_op = eeprom->magic >> 8;
  1797. if (index == 0)
  1798. return -EINVAL;
  1799. switch (dir_op) {
  1800. case 0x0e: /* erase */
  1801. if (eeprom->offset != ~eeprom->magic)
  1802. return -EINVAL;
  1803. return bnxt_erase_nvram_directory(dev, index - 1);
  1804. default:
  1805. return -EINVAL;
  1806. }
  1807. }
  1808. /* Create or re-write an NVM item: */
  1809. if (bnxt_dir_type_is_executable(type) == true)
  1810. return -EOPNOTSUPP;
  1811. ext = eeprom->magic & 0xffff;
  1812. ordinal = eeprom->offset >> 16;
  1813. attr = eeprom->offset & 0xffff;
  1814. return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
  1815. eeprom->len);
  1816. }
  1817. static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
  1818. {
  1819. struct bnxt *bp = netdev_priv(dev);
  1820. struct ethtool_eee *eee = &bp->eee;
  1821. struct bnxt_link_info *link_info = &bp->link_info;
  1822. u32 advertising =
  1823. _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
  1824. int rc = 0;
  1825. if (!BNXT_SINGLE_PF(bp))
  1826. return -EOPNOTSUPP;
  1827. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1828. return -EOPNOTSUPP;
  1829. if (!edata->eee_enabled)
  1830. goto eee_ok;
  1831. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
  1832. netdev_warn(dev, "EEE requires autoneg\n");
  1833. return -EINVAL;
  1834. }
  1835. if (edata->tx_lpi_enabled) {
  1836. if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
  1837. edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
  1838. netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
  1839. bp->lpi_tmr_lo, bp->lpi_tmr_hi);
  1840. return -EINVAL;
  1841. } else if (!bp->lpi_tmr_hi) {
  1842. edata->tx_lpi_timer = eee->tx_lpi_timer;
  1843. }
  1844. }
  1845. if (!edata->advertised) {
  1846. edata->advertised = advertising & eee->supported;
  1847. } else if (edata->advertised & ~advertising) {
  1848. netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
  1849. edata->advertised, advertising);
  1850. return -EINVAL;
  1851. }
  1852. eee->advertised = edata->advertised;
  1853. eee->tx_lpi_enabled = edata->tx_lpi_enabled;
  1854. eee->tx_lpi_timer = edata->tx_lpi_timer;
  1855. eee_ok:
  1856. eee->eee_enabled = edata->eee_enabled;
  1857. if (netif_running(dev))
  1858. rc = bnxt_hwrm_set_link_setting(bp, false, true);
  1859. return rc;
  1860. }
  1861. static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
  1862. {
  1863. struct bnxt *bp = netdev_priv(dev);
  1864. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1865. return -EOPNOTSUPP;
  1866. *edata = bp->eee;
  1867. if (!bp->eee.eee_enabled) {
  1868. /* Preserve tx_lpi_timer so that the last value will be used
  1869. * by default when it is re-enabled.
  1870. */
  1871. edata->advertised = 0;
  1872. edata->tx_lpi_enabled = 0;
  1873. }
  1874. if (!bp->eee.eee_active)
  1875. edata->lp_advertised = 0;
  1876. return 0;
  1877. }
  1878. static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
  1879. u16 page_number, u16 start_addr,
  1880. u16 data_length, u8 *buf)
  1881. {
  1882. struct hwrm_port_phy_i2c_read_input req = {0};
  1883. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1884. int rc, byte_offset = 0;
  1885. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1886. req.i2c_slave_addr = i2c_addr;
  1887. req.page_number = cpu_to_le16(page_number);
  1888. req.port_id = cpu_to_le16(bp->pf.port_id);
  1889. do {
  1890. u16 xfer_size;
  1891. xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
  1892. data_length -= xfer_size;
  1893. req.page_offset = cpu_to_le16(start_addr + byte_offset);
  1894. req.data_length = xfer_size;
  1895. req.enables = cpu_to_le32(start_addr + byte_offset ?
  1896. PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
  1897. mutex_lock(&bp->hwrm_cmd_lock);
  1898. rc = _hwrm_send_message(bp, &req, sizeof(req),
  1899. HWRM_CMD_TIMEOUT);
  1900. if (!rc)
  1901. memcpy(buf + byte_offset, output->data, xfer_size);
  1902. mutex_unlock(&bp->hwrm_cmd_lock);
  1903. byte_offset += xfer_size;
  1904. } while (!rc && data_length > 0);
  1905. return rc;
  1906. }
  1907. static int bnxt_get_module_info(struct net_device *dev,
  1908. struct ethtool_modinfo *modinfo)
  1909. {
  1910. u8 data[SFF_DIAG_SUPPORT_OFFSET + 1];
  1911. struct bnxt *bp = netdev_priv(dev);
  1912. int rc;
  1913. /* No point in going further if phy status indicates
  1914. * module is not inserted or if it is powered down or
  1915. * if it is of type 10GBase-T
  1916. */
  1917. if (bp->link_info.module_status >
  1918. PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
  1919. return -EOPNOTSUPP;
  1920. /* This feature is not supported in older firmware versions */
  1921. if (bp->hwrm_spec_code < 0x10202)
  1922. return -EOPNOTSUPP;
  1923. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0,
  1924. SFF_DIAG_SUPPORT_OFFSET + 1,
  1925. data);
  1926. if (!rc) {
  1927. u8 module_id = data[0];
  1928. u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET];
  1929. switch (module_id) {
  1930. case SFF_MODULE_ID_SFP:
  1931. modinfo->type = ETH_MODULE_SFF_8472;
  1932. modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
  1933. if (!diag_supported)
  1934. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  1935. break;
  1936. case SFF_MODULE_ID_QSFP:
  1937. case SFF_MODULE_ID_QSFP_PLUS:
  1938. modinfo->type = ETH_MODULE_SFF_8436;
  1939. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  1940. break;
  1941. case SFF_MODULE_ID_QSFP28:
  1942. modinfo->type = ETH_MODULE_SFF_8636;
  1943. modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
  1944. break;
  1945. default:
  1946. rc = -EOPNOTSUPP;
  1947. break;
  1948. }
  1949. }
  1950. return rc;
  1951. }
  1952. static int bnxt_get_module_eeprom(struct net_device *dev,
  1953. struct ethtool_eeprom *eeprom,
  1954. u8 *data)
  1955. {
  1956. struct bnxt *bp = netdev_priv(dev);
  1957. u16 start = eeprom->offset, length = eeprom->len;
  1958. int rc = 0;
  1959. memset(data, 0, eeprom->len);
  1960. /* Read A0 portion of the EEPROM */
  1961. if (start < ETH_MODULE_SFF_8436_LEN) {
  1962. if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
  1963. length = ETH_MODULE_SFF_8436_LEN - start;
  1964. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
  1965. start, length, data);
  1966. if (rc)
  1967. return rc;
  1968. start += length;
  1969. data += length;
  1970. length = eeprom->len - length;
  1971. }
  1972. /* Read A2 portion of the EEPROM */
  1973. if (length) {
  1974. start -= ETH_MODULE_SFF_8436_LEN;
  1975. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1,
  1976. start, length, data);
  1977. }
  1978. return rc;
  1979. }
  1980. static int bnxt_nway_reset(struct net_device *dev)
  1981. {
  1982. int rc = 0;
  1983. struct bnxt *bp = netdev_priv(dev);
  1984. struct bnxt_link_info *link_info = &bp->link_info;
  1985. if (!BNXT_SINGLE_PF(bp))
  1986. return -EOPNOTSUPP;
  1987. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1988. return -EINVAL;
  1989. if (netif_running(dev))
  1990. rc = bnxt_hwrm_set_link_setting(bp, true, false);
  1991. return rc;
  1992. }
  1993. static int bnxt_set_phys_id(struct net_device *dev,
  1994. enum ethtool_phys_id_state state)
  1995. {
  1996. struct hwrm_port_led_cfg_input req = {0};
  1997. struct bnxt *bp = netdev_priv(dev);
  1998. struct bnxt_pf_info *pf = &bp->pf;
  1999. struct bnxt_led_cfg *led_cfg;
  2000. u8 led_state;
  2001. __le16 duration;
  2002. int i, rc;
  2003. if (!bp->num_leds || BNXT_VF(bp))
  2004. return -EOPNOTSUPP;
  2005. if (state == ETHTOOL_ID_ACTIVE) {
  2006. led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
  2007. duration = cpu_to_le16(500);
  2008. } else if (state == ETHTOOL_ID_INACTIVE) {
  2009. led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
  2010. duration = cpu_to_le16(0);
  2011. } else {
  2012. return -EINVAL;
  2013. }
  2014. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
  2015. req.port_id = cpu_to_le16(pf->port_id);
  2016. req.num_leds = bp->num_leds;
  2017. led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
  2018. for (i = 0; i < bp->num_leds; i++, led_cfg++) {
  2019. req.enables |= BNXT_LED_DFLT_ENABLES(i);
  2020. led_cfg->led_id = bp->leds[i].led_id;
  2021. led_cfg->led_state = led_state;
  2022. led_cfg->led_blink_on = duration;
  2023. led_cfg->led_blink_off = duration;
  2024. led_cfg->led_group_id = bp->leds[i].led_group_id;
  2025. }
  2026. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2027. if (rc)
  2028. rc = -EIO;
  2029. return rc;
  2030. }
  2031. static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
  2032. {
  2033. struct hwrm_selftest_irq_input req = {0};
  2034. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
  2035. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2036. }
  2037. static int bnxt_test_irq(struct bnxt *bp)
  2038. {
  2039. int i;
  2040. for (i = 0; i < bp->cp_nr_rings; i++) {
  2041. u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
  2042. int rc;
  2043. rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
  2044. if (rc)
  2045. return rc;
  2046. }
  2047. return 0;
  2048. }
  2049. static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
  2050. {
  2051. struct hwrm_port_mac_cfg_input req = {0};
  2052. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
  2053. req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
  2054. if (enable)
  2055. req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
  2056. else
  2057. req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
  2058. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2059. }
  2060. static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
  2061. struct hwrm_port_phy_cfg_input *req)
  2062. {
  2063. struct bnxt_link_info *link_info = &bp->link_info;
  2064. u16 fw_advertising = link_info->advertising;
  2065. u16 fw_speed;
  2066. int rc;
  2067. if (!link_info->autoneg)
  2068. return 0;
  2069. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
  2070. if (netif_carrier_ok(bp->dev))
  2071. fw_speed = bp->link_info.link_speed;
  2072. else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
  2073. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
  2074. else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
  2075. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
  2076. else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
  2077. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
  2078. else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
  2079. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
  2080. req->force_link_speed = cpu_to_le16(fw_speed);
  2081. req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
  2082. PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
  2083. rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
  2084. req->flags = 0;
  2085. req->force_link_speed = cpu_to_le16(0);
  2086. return rc;
  2087. }
  2088. static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable)
  2089. {
  2090. struct hwrm_port_phy_cfg_input req = {0};
  2091. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
  2092. if (enable) {
  2093. bnxt_disable_an_for_lpbk(bp, &req);
  2094. req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
  2095. } else {
  2096. req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
  2097. }
  2098. req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
  2099. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2100. }
  2101. static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi,
  2102. u32 raw_cons, int pkt_size)
  2103. {
  2104. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  2105. struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
  2106. struct bnxt_sw_rx_bd *rx_buf;
  2107. struct rx_cmp *rxcmp;
  2108. u16 cp_cons, cons;
  2109. u8 *data;
  2110. u32 len;
  2111. int i;
  2112. cp_cons = RING_CMP(raw_cons);
  2113. rxcmp = (struct rx_cmp *)
  2114. &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
  2115. cons = rxcmp->rx_cmp_opaque;
  2116. rx_buf = &rxr->rx_buf_ring[cons];
  2117. data = rx_buf->data_ptr;
  2118. len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
  2119. if (len != pkt_size)
  2120. return -EIO;
  2121. i = ETH_ALEN;
  2122. if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
  2123. return -EIO;
  2124. i += ETH_ALEN;
  2125. for ( ; i < pkt_size; i++) {
  2126. if (data[i] != (u8)(i & 0xff))
  2127. return -EIO;
  2128. }
  2129. return 0;
  2130. }
  2131. static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size)
  2132. {
  2133. struct bnxt_napi *bnapi = bp->bnapi[0];
  2134. struct bnxt_cp_ring_info *cpr;
  2135. struct tx_cmp *txcmp;
  2136. int rc = -EIO;
  2137. u32 raw_cons;
  2138. u32 cons;
  2139. int i;
  2140. cpr = &bnapi->cp_ring;
  2141. raw_cons = cpr->cp_raw_cons;
  2142. for (i = 0; i < 200; i++) {
  2143. cons = RING_CMP(raw_cons);
  2144. txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
  2145. if (!TX_CMP_VALID(txcmp, raw_cons)) {
  2146. udelay(5);
  2147. continue;
  2148. }
  2149. /* The valid test of the entry must be done first before
  2150. * reading any further.
  2151. */
  2152. dma_rmb();
  2153. if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
  2154. rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size);
  2155. raw_cons = NEXT_RAW_CMP(raw_cons);
  2156. raw_cons = NEXT_RAW_CMP(raw_cons);
  2157. break;
  2158. }
  2159. raw_cons = NEXT_RAW_CMP(raw_cons);
  2160. }
  2161. cpr->cp_raw_cons = raw_cons;
  2162. return rc;
  2163. }
  2164. static int bnxt_run_loopback(struct bnxt *bp)
  2165. {
  2166. struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
  2167. int pkt_size, i = 0;
  2168. struct sk_buff *skb;
  2169. dma_addr_t map;
  2170. u8 *data;
  2171. int rc;
  2172. pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
  2173. skb = netdev_alloc_skb(bp->dev, pkt_size);
  2174. if (!skb)
  2175. return -ENOMEM;
  2176. data = skb_put(skb, pkt_size);
  2177. eth_broadcast_addr(data);
  2178. i += ETH_ALEN;
  2179. ether_addr_copy(&data[i], bp->dev->dev_addr);
  2180. i += ETH_ALEN;
  2181. for ( ; i < pkt_size; i++)
  2182. data[i] = (u8)(i & 0xff);
  2183. map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
  2184. PCI_DMA_TODEVICE);
  2185. if (dma_mapping_error(&bp->pdev->dev, map)) {
  2186. dev_kfree_skb(skb);
  2187. return -EIO;
  2188. }
  2189. bnxt_xmit_xdp(bp, txr, map, pkt_size, 0);
  2190. /* Sync BD data before updating doorbell */
  2191. wmb();
  2192. bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod);
  2193. rc = bnxt_poll_loopback(bp, pkt_size);
  2194. dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
  2195. dev_kfree_skb(skb);
  2196. return rc;
  2197. }
  2198. static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
  2199. {
  2200. struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
  2201. struct hwrm_selftest_exec_input req = {0};
  2202. int rc;
  2203. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
  2204. mutex_lock(&bp->hwrm_cmd_lock);
  2205. resp->test_success = 0;
  2206. req.flags = test_mask;
  2207. rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
  2208. *test_results = resp->test_success;
  2209. mutex_unlock(&bp->hwrm_cmd_lock);
  2210. return rc;
  2211. }
  2212. #define BNXT_DRV_TESTS 3
  2213. #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS)
  2214. #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1)
  2215. #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2)
  2216. static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
  2217. u64 *buf)
  2218. {
  2219. struct bnxt *bp = netdev_priv(dev);
  2220. bool offline = false;
  2221. u8 test_results = 0;
  2222. u8 test_mask = 0;
  2223. int rc, i;
  2224. if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
  2225. return;
  2226. memset(buf, 0, sizeof(u64) * bp->num_tests);
  2227. if (!netif_running(dev)) {
  2228. etest->flags |= ETH_TEST_FL_FAILED;
  2229. return;
  2230. }
  2231. if (etest->flags & ETH_TEST_FL_OFFLINE) {
  2232. if (bp->pf.active_vfs) {
  2233. etest->flags |= ETH_TEST_FL_FAILED;
  2234. netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
  2235. return;
  2236. }
  2237. offline = true;
  2238. }
  2239. for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
  2240. u8 bit_val = 1 << i;
  2241. if (!(bp->test_info->offline_mask & bit_val))
  2242. test_mask |= bit_val;
  2243. else if (offline)
  2244. test_mask |= bit_val;
  2245. }
  2246. if (!offline) {
  2247. bnxt_run_fw_tests(bp, test_mask, &test_results);
  2248. } else {
  2249. rc = bnxt_close_nic(bp, false, false);
  2250. if (rc)
  2251. return;
  2252. bnxt_run_fw_tests(bp, test_mask, &test_results);
  2253. buf[BNXT_MACLPBK_TEST_IDX] = 1;
  2254. bnxt_hwrm_mac_loopback(bp, true);
  2255. msleep(250);
  2256. rc = bnxt_half_open_nic(bp);
  2257. if (rc) {
  2258. bnxt_hwrm_mac_loopback(bp, false);
  2259. etest->flags |= ETH_TEST_FL_FAILED;
  2260. return;
  2261. }
  2262. if (bnxt_run_loopback(bp))
  2263. etest->flags |= ETH_TEST_FL_FAILED;
  2264. else
  2265. buf[BNXT_MACLPBK_TEST_IDX] = 0;
  2266. bnxt_hwrm_mac_loopback(bp, false);
  2267. bnxt_hwrm_phy_loopback(bp, true);
  2268. msleep(1000);
  2269. if (bnxt_run_loopback(bp)) {
  2270. buf[BNXT_PHYLPBK_TEST_IDX] = 1;
  2271. etest->flags |= ETH_TEST_FL_FAILED;
  2272. }
  2273. bnxt_hwrm_phy_loopback(bp, false);
  2274. bnxt_half_close_nic(bp);
  2275. bnxt_open_nic(bp, false, true);
  2276. }
  2277. if (bnxt_test_irq(bp)) {
  2278. buf[BNXT_IRQ_TEST_IDX] = 1;
  2279. etest->flags |= ETH_TEST_FL_FAILED;
  2280. }
  2281. for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
  2282. u8 bit_val = 1 << i;
  2283. if ((test_mask & bit_val) && !(test_results & bit_val)) {
  2284. buf[i] = 1;
  2285. etest->flags |= ETH_TEST_FL_FAILED;
  2286. }
  2287. }
  2288. }
  2289. static int bnxt_reset(struct net_device *dev, u32 *flags)
  2290. {
  2291. struct bnxt *bp = netdev_priv(dev);
  2292. int rc = 0;
  2293. if (!BNXT_PF(bp)) {
  2294. netdev_err(dev, "Reset is not supported from a VF\n");
  2295. return -EOPNOTSUPP;
  2296. }
  2297. if (pci_vfs_assigned(bp->pdev)) {
  2298. netdev_err(dev,
  2299. "Reset not allowed when VFs are assigned to VMs\n");
  2300. return -EBUSY;
  2301. }
  2302. if (*flags == ETH_RESET_ALL) {
  2303. /* This feature is not supported in older firmware versions */
  2304. if (bp->hwrm_spec_code < 0x10803)
  2305. return -EOPNOTSUPP;
  2306. rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP);
  2307. if (!rc) {
  2308. netdev_info(dev, "Reset request successful. Reload driver to complete reset\n");
  2309. *flags = 0;
  2310. }
  2311. } else if (*flags == ETH_RESET_AP) {
  2312. /* This feature is not supported in older firmware versions */
  2313. if (bp->hwrm_spec_code < 0x10803)
  2314. return -EOPNOTSUPP;
  2315. rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_AP);
  2316. if (!rc) {
  2317. netdev_info(dev, "Reset Application Processor request successful.\n");
  2318. *flags = 0;
  2319. }
  2320. } else {
  2321. rc = -EINVAL;
  2322. }
  2323. return rc;
  2324. }
  2325. void bnxt_ethtool_init(struct bnxt *bp)
  2326. {
  2327. struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
  2328. struct hwrm_selftest_qlist_input req = {0};
  2329. struct bnxt_test_info *test_info;
  2330. struct net_device *dev = bp->dev;
  2331. int i, rc;
  2332. bnxt_get_pkgver(dev);
  2333. if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
  2334. return;
  2335. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
  2336. mutex_lock(&bp->hwrm_cmd_lock);
  2337. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2338. if (rc)
  2339. goto ethtool_init_exit;
  2340. test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
  2341. if (!test_info)
  2342. goto ethtool_init_exit;
  2343. bp->test_info = test_info;
  2344. bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
  2345. if (bp->num_tests > BNXT_MAX_TEST)
  2346. bp->num_tests = BNXT_MAX_TEST;
  2347. test_info->offline_mask = resp->offline_tests;
  2348. test_info->timeout = le16_to_cpu(resp->test_timeout);
  2349. if (!test_info->timeout)
  2350. test_info->timeout = HWRM_CMD_TIMEOUT;
  2351. for (i = 0; i < bp->num_tests; i++) {
  2352. char *str = test_info->string[i];
  2353. char *fw_str = resp->test0_name + i * 32;
  2354. if (i == BNXT_MACLPBK_TEST_IDX) {
  2355. strcpy(str, "Mac loopback test (offline)");
  2356. } else if (i == BNXT_PHYLPBK_TEST_IDX) {
  2357. strcpy(str, "Phy loopback test (offline)");
  2358. } else if (i == BNXT_IRQ_TEST_IDX) {
  2359. strcpy(str, "Interrupt_test (offline)");
  2360. } else {
  2361. strlcpy(str, fw_str, ETH_GSTRING_LEN);
  2362. strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
  2363. if (test_info->offline_mask & (1 << i))
  2364. strncat(str, " (offline)",
  2365. ETH_GSTRING_LEN - strlen(str));
  2366. else
  2367. strncat(str, " (online)",
  2368. ETH_GSTRING_LEN - strlen(str));
  2369. }
  2370. }
  2371. ethtool_init_exit:
  2372. mutex_unlock(&bp->hwrm_cmd_lock);
  2373. }
  2374. void bnxt_ethtool_free(struct bnxt *bp)
  2375. {
  2376. kfree(bp->test_info);
  2377. bp->test_info = NULL;
  2378. }
  2379. const struct ethtool_ops bnxt_ethtool_ops = {
  2380. .get_link_ksettings = bnxt_get_link_ksettings,
  2381. .set_link_ksettings = bnxt_set_link_ksettings,
  2382. .get_pauseparam = bnxt_get_pauseparam,
  2383. .set_pauseparam = bnxt_set_pauseparam,
  2384. .get_drvinfo = bnxt_get_drvinfo,
  2385. .get_wol = bnxt_get_wol,
  2386. .set_wol = bnxt_set_wol,
  2387. .get_coalesce = bnxt_get_coalesce,
  2388. .set_coalesce = bnxt_set_coalesce,
  2389. .get_msglevel = bnxt_get_msglevel,
  2390. .set_msglevel = bnxt_set_msglevel,
  2391. .get_sset_count = bnxt_get_sset_count,
  2392. .get_strings = bnxt_get_strings,
  2393. .get_ethtool_stats = bnxt_get_ethtool_stats,
  2394. .set_ringparam = bnxt_set_ringparam,
  2395. .get_ringparam = bnxt_get_ringparam,
  2396. .get_channels = bnxt_get_channels,
  2397. .set_channels = bnxt_set_channels,
  2398. .get_rxnfc = bnxt_get_rxnfc,
  2399. .set_rxnfc = bnxt_set_rxnfc,
  2400. .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
  2401. .get_rxfh_key_size = bnxt_get_rxfh_key_size,
  2402. .get_rxfh = bnxt_get_rxfh,
  2403. .flash_device = bnxt_flash_device,
  2404. .get_eeprom_len = bnxt_get_eeprom_len,
  2405. .get_eeprom = bnxt_get_eeprom,
  2406. .set_eeprom = bnxt_set_eeprom,
  2407. .get_link = bnxt_get_link,
  2408. .get_eee = bnxt_get_eee,
  2409. .set_eee = bnxt_set_eee,
  2410. .get_module_info = bnxt_get_module_info,
  2411. .get_module_eeprom = bnxt_get_module_eeprom,
  2412. .nway_reset = bnxt_nway_reset,
  2413. .set_phys_id = bnxt_set_phys_id,
  2414. .self_test = bnxt_self_test,
  2415. .reset = bnxt_reset,
  2416. };