serdes.c 8.1 KB

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  1. /*
  2. * Marvell 88E6xxx SERDES manipulation, via SMI bus
  3. *
  4. * Copyright (c) 2008 Marvell Semiconductor
  5. *
  6. * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/mii.h>
  14. #include "chip.h"
  15. #include "global2.h"
  16. #include "phy.h"
  17. #include "port.h"
  18. #include "serdes.h"
  19. static int mv88e6352_serdes_read(struct mv88e6xxx_chip *chip, int reg,
  20. u16 *val)
  21. {
  22. return mv88e6xxx_phy_page_read(chip, MV88E6352_ADDR_SERDES,
  23. MV88E6352_SERDES_PAGE_FIBER,
  24. reg, val);
  25. }
  26. static int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int reg,
  27. u16 val)
  28. {
  29. return mv88e6xxx_phy_page_write(chip, MV88E6352_ADDR_SERDES,
  30. MV88E6352_SERDES_PAGE_FIBER,
  31. reg, val);
  32. }
  33. static int mv88e6352_serdes_power_set(struct mv88e6xxx_chip *chip, bool on)
  34. {
  35. u16 val, new_val;
  36. int err;
  37. err = mv88e6352_serdes_read(chip, MII_BMCR, &val);
  38. if (err)
  39. return err;
  40. if (on)
  41. new_val = val & ~BMCR_PDOWN;
  42. else
  43. new_val = val | BMCR_PDOWN;
  44. if (val != new_val)
  45. err = mv88e6352_serdes_write(chip, MII_BMCR, new_val);
  46. return err;
  47. }
  48. static bool mv88e6352_port_has_serdes(struct mv88e6xxx_chip *chip, int port)
  49. {
  50. u8 cmode;
  51. int err;
  52. err = mv88e6xxx_port_get_cmode(chip, port, &cmode);
  53. if (err) {
  54. dev_err(chip->dev, "failed to read cmode\n");
  55. return false;
  56. }
  57. if ((cmode == MV88E6XXX_PORT_STS_CMODE_100BASE_X) ||
  58. (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X) ||
  59. (cmode == MV88E6XXX_PORT_STS_CMODE_SGMII))
  60. return true;
  61. return false;
  62. }
  63. int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
  64. {
  65. int err;
  66. if (mv88e6352_port_has_serdes(chip, port)) {
  67. err = mv88e6352_serdes_power_set(chip, on);
  68. if (err < 0)
  69. return err;
  70. }
  71. return 0;
  72. }
  73. struct mv88e6352_serdes_hw_stat {
  74. char string[ETH_GSTRING_LEN];
  75. int sizeof_stat;
  76. int reg;
  77. };
  78. static struct mv88e6352_serdes_hw_stat mv88e6352_serdes_hw_stats[] = {
  79. { "serdes_fibre_rx_error", 16, 21 },
  80. { "serdes_PRBS_error", 32, 24 },
  81. };
  82. int mv88e6352_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port)
  83. {
  84. if (mv88e6352_port_has_serdes(chip, port))
  85. return ARRAY_SIZE(mv88e6352_serdes_hw_stats);
  86. return 0;
  87. }
  88. int mv88e6352_serdes_get_strings(struct mv88e6xxx_chip *chip,
  89. int port, uint8_t *data)
  90. {
  91. struct mv88e6352_serdes_hw_stat *stat;
  92. int i;
  93. if (!mv88e6352_port_has_serdes(chip, port))
  94. return 0;
  95. for (i = 0; i < ARRAY_SIZE(mv88e6352_serdes_hw_stats); i++) {
  96. stat = &mv88e6352_serdes_hw_stats[i];
  97. memcpy(data + i * ETH_GSTRING_LEN, stat->string,
  98. ETH_GSTRING_LEN);
  99. }
  100. return ARRAY_SIZE(mv88e6352_serdes_hw_stats);
  101. }
  102. static uint64_t mv88e6352_serdes_get_stat(struct mv88e6xxx_chip *chip,
  103. struct mv88e6352_serdes_hw_stat *stat)
  104. {
  105. u64 val = 0;
  106. u16 reg;
  107. int err;
  108. err = mv88e6352_serdes_read(chip, stat->reg, &reg);
  109. if (err) {
  110. dev_err(chip->dev, "failed to read statistic\n");
  111. return 0;
  112. }
  113. val = reg;
  114. if (stat->sizeof_stat == 32) {
  115. err = mv88e6352_serdes_read(chip, stat->reg + 1, &reg);
  116. if (err) {
  117. dev_err(chip->dev, "failed to read statistic\n");
  118. return 0;
  119. }
  120. val = val << 16 | reg;
  121. }
  122. return val;
  123. }
  124. int mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,
  125. uint64_t *data)
  126. {
  127. struct mv88e6xxx_port *mv88e6xxx_port = &chip->ports[port];
  128. struct mv88e6352_serdes_hw_stat *stat;
  129. u64 value;
  130. int i;
  131. if (!mv88e6352_port_has_serdes(chip, port))
  132. return 0;
  133. BUILD_BUG_ON(ARRAY_SIZE(mv88e6352_serdes_hw_stats) >
  134. ARRAY_SIZE(mv88e6xxx_port->serdes_stats));
  135. for (i = 0; i < ARRAY_SIZE(mv88e6352_serdes_hw_stats); i++) {
  136. stat = &mv88e6352_serdes_hw_stats[i];
  137. value = mv88e6352_serdes_get_stat(chip, stat);
  138. mv88e6xxx_port->serdes_stats[i] += value;
  139. data[i] = mv88e6xxx_port->serdes_stats[i];
  140. }
  141. return ARRAY_SIZE(mv88e6352_serdes_hw_stats);
  142. }
  143. /* Set the power on/off for 10GBASE-R and 10GBASE-X4/X2 */
  144. static int mv88e6390_serdes_10g(struct mv88e6xxx_chip *chip, int addr, bool on)
  145. {
  146. u16 val, new_val;
  147. int reg_c45;
  148. int err;
  149. reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE |
  150. MV88E6390_PCS_CONTROL_1;
  151. err = mv88e6xxx_phy_read(chip, addr, reg_c45, &val);
  152. if (err)
  153. return err;
  154. if (on)
  155. new_val = val & ~(MV88E6390_PCS_CONTROL_1_RESET |
  156. MV88E6390_PCS_CONTROL_1_LOOPBACK |
  157. MV88E6390_PCS_CONTROL_1_PDOWN);
  158. else
  159. new_val = val | MV88E6390_PCS_CONTROL_1_PDOWN;
  160. if (val != new_val)
  161. err = mv88e6xxx_phy_write(chip, addr, reg_c45, new_val);
  162. return err;
  163. }
  164. /* Set the power on/off for 10GBASE-R and 10GBASE-X4/X2 */
  165. static int mv88e6390_serdes_sgmii(struct mv88e6xxx_chip *chip, int addr,
  166. bool on)
  167. {
  168. u16 val, new_val;
  169. int reg_c45;
  170. int err;
  171. reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE |
  172. MV88E6390_SGMII_CONTROL;
  173. err = mv88e6xxx_phy_read(chip, addr, reg_c45, &val);
  174. if (err)
  175. return err;
  176. if (on)
  177. new_val = val & ~(MV88E6390_SGMII_CONTROL_RESET |
  178. MV88E6390_SGMII_CONTROL_LOOPBACK |
  179. MV88E6390_SGMII_CONTROL_PDOWN);
  180. else
  181. new_val = val | MV88E6390_SGMII_CONTROL_PDOWN;
  182. if (val != new_val)
  183. err = mv88e6xxx_phy_write(chip, addr, reg_c45, new_val);
  184. return err;
  185. }
  186. static int mv88e6390_serdes_lower(struct mv88e6xxx_chip *chip, u8 cmode,
  187. int port_donor, int lane, bool rxaui, bool on)
  188. {
  189. int err;
  190. u8 cmode_donor;
  191. err = mv88e6xxx_port_get_cmode(chip, port_donor, &cmode_donor);
  192. if (err)
  193. return err;
  194. switch (cmode_donor) {
  195. case MV88E6XXX_PORT_STS_CMODE_RXAUI:
  196. if (!rxaui)
  197. break;
  198. /* Fall through */
  199. case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
  200. case MV88E6XXX_PORT_STS_CMODE_SGMII:
  201. case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
  202. if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
  203. cmode == MV88E6XXX_PORT_STS_CMODE_SGMII)
  204. return mv88e6390_serdes_sgmii(chip, lane, on);
  205. }
  206. return 0;
  207. }
  208. static int mv88e6390_serdes_port9(struct mv88e6xxx_chip *chip, u8 cmode,
  209. bool on)
  210. {
  211. switch (cmode) {
  212. case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
  213. case MV88E6XXX_PORT_STS_CMODE_SGMII:
  214. return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT9_LANE0, on);
  215. case MV88E6XXX_PORT_STS_CMODE_XAUI:
  216. case MV88E6XXX_PORT_STS_CMODE_RXAUI:
  217. case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
  218. return mv88e6390_serdes_10g(chip, MV88E6390_PORT9_LANE0, on);
  219. }
  220. return 0;
  221. }
  222. static int mv88e6390_serdes_port10(struct mv88e6xxx_chip *chip, u8 cmode,
  223. bool on)
  224. {
  225. switch (cmode) {
  226. case MV88E6XXX_PORT_STS_CMODE_SGMII:
  227. return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT10_LANE0, on);
  228. case MV88E6XXX_PORT_STS_CMODE_XAUI:
  229. case MV88E6XXX_PORT_STS_CMODE_RXAUI:
  230. case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
  231. case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
  232. return mv88e6390_serdes_10g(chip, MV88E6390_PORT10_LANE0, on);
  233. }
  234. return 0;
  235. }
  236. int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
  237. {
  238. u8 cmode;
  239. int err;
  240. err = mv88e6xxx_port_get_cmode(chip, port, &cmode);
  241. if (err)
  242. return err;
  243. switch (port) {
  244. case 2:
  245. return mv88e6390_serdes_lower(chip, cmode, 9,
  246. MV88E6390_PORT9_LANE1,
  247. false, on);
  248. case 3:
  249. return mv88e6390_serdes_lower(chip, cmode, 9,
  250. MV88E6390_PORT9_LANE2,
  251. true, on);
  252. case 4:
  253. return mv88e6390_serdes_lower(chip, cmode, 9,
  254. MV88E6390_PORT9_LANE3,
  255. true, on);
  256. case 5:
  257. return mv88e6390_serdes_lower(chip, cmode, 10,
  258. MV88E6390_PORT10_LANE1,
  259. false, on);
  260. case 6:
  261. return mv88e6390_serdes_lower(chip, cmode, 10,
  262. MV88E6390_PORT10_LANE2,
  263. true, on);
  264. case 7:
  265. return mv88e6390_serdes_lower(chip, cmode, 10,
  266. MV88E6390_PORT10_LANE3,
  267. true, on);
  268. case 9:
  269. return mv88e6390_serdes_port9(chip, cmode, on);
  270. case 10:
  271. return mv88e6390_serdes_port10(chip, cmode, on);
  272. }
  273. return 0;
  274. }
  275. int mv88e6341_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
  276. {
  277. int err;
  278. u8 cmode;
  279. if (port != 5)
  280. return 0;
  281. err = mv88e6xxx_port_get_cmode(chip, port, &cmode);
  282. if (err)
  283. return err;
  284. if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
  285. cmode == MV88E6XXX_PORT_STS_CMODE_SGMII ||
  286. cmode == MV88E6XXX_PORT_STS_CMODE_2500BASEX)
  287. return mv88e6390_serdes_sgmii(chip, MV88E6341_ADDR_SERDES, on);
  288. return 0;
  289. }