tmio_mmc.h 8.8 KB

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  1. /*
  2. * Driver for the MMC / SD / SDIO cell found in:
  3. *
  4. * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
  5. *
  6. * Copyright (C) 2015-17 Renesas Electronics Corporation
  7. * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
  8. * Copyright (C) 2016-17 Horms Solutions, Simon Horman
  9. * Copyright (C) 2007 Ian Molton
  10. * Copyright (C) 2004 Ian Molton
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. */
  17. #ifndef TMIO_MMC_H
  18. #define TMIO_MMC_H
  19. #include <linux/dmaengine.h>
  20. #include <linux/highmem.h>
  21. #include <linux/mutex.h>
  22. #include <linux/pagemap.h>
  23. #include <linux/scatterlist.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/interrupt.h>
  26. #define CTL_SD_CMD 0x00
  27. #define CTL_ARG_REG 0x04
  28. #define CTL_STOP_INTERNAL_ACTION 0x08
  29. #define CTL_XFER_BLK_COUNT 0xa
  30. #define CTL_RESPONSE 0x0c
  31. /* driver merges STATUS and following STATUS2 */
  32. #define CTL_STATUS 0x1c
  33. /* driver merges IRQ_MASK and following IRQ_MASK2 */
  34. #define CTL_IRQ_MASK 0x20
  35. #define CTL_SD_CARD_CLK_CTL 0x24
  36. #define CTL_SD_XFER_LEN 0x26
  37. #define CTL_SD_MEM_CARD_OPT 0x28
  38. #define CTL_SD_ERROR_DETAIL_STATUS 0x2c
  39. #define CTL_SD_DATA_PORT 0x30
  40. #define CTL_TRANSACTION_CTL 0x34
  41. #define CTL_SDIO_STATUS 0x36
  42. #define CTL_SDIO_IRQ_MASK 0x38
  43. #define CTL_DMA_ENABLE 0xd8
  44. #define CTL_RESET_SD 0xe0
  45. #define CTL_VERSION 0xe2
  46. #define CTL_SDIO_REGS 0x100
  47. #define CTL_CLK_AND_WAIT_CTL 0x138
  48. #define CTL_RESET_SDIO 0x1e0
  49. /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
  50. #define TMIO_STOP_STP BIT(0)
  51. #define TMIO_STOP_SEC BIT(8)
  52. /* Definitions for values the CTL_STATUS register can take */
  53. #define TMIO_STAT_CMDRESPEND BIT(0)
  54. #define TMIO_STAT_DATAEND BIT(2)
  55. #define TMIO_STAT_CARD_REMOVE BIT(3)
  56. #define TMIO_STAT_CARD_INSERT BIT(4)
  57. #define TMIO_STAT_SIGSTATE BIT(5)
  58. #define TMIO_STAT_WRPROTECT BIT(7)
  59. #define TMIO_STAT_CARD_REMOVE_A BIT(8)
  60. #define TMIO_STAT_CARD_INSERT_A BIT(9)
  61. #define TMIO_STAT_SIGSTATE_A BIT(10)
  62. /* These belong technically to CTL_STATUS2, but the driver merges them */
  63. #define TMIO_STAT_CMD_IDX_ERR BIT(16)
  64. #define TMIO_STAT_CRCFAIL BIT(17)
  65. #define TMIO_STAT_STOPBIT_ERR BIT(18)
  66. #define TMIO_STAT_DATATIMEOUT BIT(19)
  67. #define TMIO_STAT_RXOVERFLOW BIT(20)
  68. #define TMIO_STAT_TXUNDERRUN BIT(21)
  69. #define TMIO_STAT_CMDTIMEOUT BIT(22)
  70. #define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */
  71. #define TMIO_STAT_RXRDY BIT(24)
  72. #define TMIO_STAT_TXRQ BIT(25)
  73. #define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
  74. #define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
  75. #define TMIO_STAT_CMD_BUSY BIT(30)
  76. #define TMIO_STAT_ILL_ACCESS BIT(31)
  77. /* Definitions for values the CTL_SD_CARD_CLK_CTL register can take */
  78. #define CLK_CTL_DIV_MASK 0xff
  79. #define CLK_CTL_SCLKEN BIT(8)
  80. /* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */
  81. #define CARD_OPT_WIDTH8 BIT(13)
  82. #define CARD_OPT_WIDTH BIT(15)
  83. /* Definitions for values the CTL_SDIO_STATUS register can take */
  84. #define TMIO_SDIO_STAT_IOIRQ 0x0001
  85. #define TMIO_SDIO_STAT_EXPUB52 0x4000
  86. #define TMIO_SDIO_STAT_EXWT 0x8000
  87. #define TMIO_SDIO_MASK_ALL 0xc007
  88. #define TMIO_SDIO_SETBITS_MASK 0x0006
  89. /* Definitions for values the CTL_DMA_ENABLE register can take */
  90. #define DMA_ENABLE_DMASDRW BIT(1)
  91. /* Define some IRQ masks */
  92. /* This is the mask used at reset by the chip */
  93. #define TMIO_MASK_ALL 0x837f031d
  94. #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
  95. #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
  96. #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
  97. TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
  98. #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
  99. struct tmio_mmc_data;
  100. struct tmio_mmc_host;
  101. struct tmio_mmc_dma_ops {
  102. void (*start)(struct tmio_mmc_host *host, struct mmc_data *data);
  103. void (*enable)(struct tmio_mmc_host *host, bool enable);
  104. void (*request)(struct tmio_mmc_host *host,
  105. struct tmio_mmc_data *pdata);
  106. void (*release)(struct tmio_mmc_host *host);
  107. void (*abort)(struct tmio_mmc_host *host);
  108. void (*dataend)(struct tmio_mmc_host *host);
  109. };
  110. struct tmio_mmc_host {
  111. void __iomem *ctl;
  112. struct mmc_command *cmd;
  113. struct mmc_request *mrq;
  114. struct mmc_data *data;
  115. struct mmc_host *mmc;
  116. struct mmc_host_ops ops;
  117. /* Callbacks for clock / power control */
  118. void (*set_pwr)(struct platform_device *host, int state);
  119. void (*set_clk_div)(struct platform_device *host, int state);
  120. /* pio related stuff */
  121. struct scatterlist *sg_ptr;
  122. struct scatterlist *sg_orig;
  123. unsigned int sg_len;
  124. unsigned int sg_off;
  125. unsigned int bus_shift;
  126. struct platform_device *pdev;
  127. struct tmio_mmc_data *pdata;
  128. /* DMA support */
  129. bool force_pio;
  130. struct dma_chan *chan_rx;
  131. struct dma_chan *chan_tx;
  132. struct tasklet_struct dma_issue;
  133. struct scatterlist bounce_sg;
  134. u8 *bounce_buf;
  135. /* Track lost interrupts */
  136. struct delayed_work delayed_reset_work;
  137. struct work_struct done;
  138. /* Cache */
  139. u32 sdcard_irq_mask;
  140. u32 sdio_irq_mask;
  141. unsigned int clk_cache;
  142. spinlock_t lock; /* protect host private data */
  143. unsigned long last_req_ts;
  144. struct mutex ios_lock; /* protect set_ios() context */
  145. bool native_hotplug;
  146. bool sdio_irq_enabled;
  147. /* Mandatory callback */
  148. int (*clk_enable)(struct tmio_mmc_host *host);
  149. /* Optional callbacks */
  150. unsigned int (*clk_update)(struct tmio_mmc_host *host,
  151. unsigned int new_clock);
  152. void (*clk_disable)(struct tmio_mmc_host *host);
  153. int (*multi_io_quirk)(struct mmc_card *card,
  154. unsigned int direction, int blk_size);
  155. int (*write16_hook)(struct tmio_mmc_host *host, int addr);
  156. void (*hw_reset)(struct tmio_mmc_host *host);
  157. void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap);
  158. bool (*check_scc_error)(struct tmio_mmc_host *host);
  159. /*
  160. * Mandatory callback for tuning to occur which is optional for SDR50
  161. * and mandatory for SDR104.
  162. */
  163. unsigned int (*init_tuning)(struct tmio_mmc_host *host);
  164. int (*select_tuning)(struct tmio_mmc_host *host);
  165. /* Tuning values: 1 for success, 0 for failure */
  166. DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long));
  167. unsigned int tap_num;
  168. const struct tmio_mmc_dma_ops *dma_ops;
  169. };
  170. struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
  171. struct tmio_mmc_data *pdata);
  172. void tmio_mmc_host_free(struct tmio_mmc_host *host);
  173. int tmio_mmc_host_probe(struct tmio_mmc_host *host);
  174. void tmio_mmc_host_remove(struct tmio_mmc_host *host);
  175. void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
  176. void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
  177. void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
  178. irqreturn_t tmio_mmc_irq(int irq, void *devid);
  179. static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
  180. unsigned long *flags)
  181. {
  182. local_irq_save(*flags);
  183. return kmap_atomic(sg_page(sg)) + sg->offset;
  184. }
  185. static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
  186. unsigned long *flags, void *virt)
  187. {
  188. kunmap_atomic(virt - sg->offset);
  189. local_irq_restore(*flags);
  190. }
  191. #ifdef CONFIG_PM
  192. int tmio_mmc_host_runtime_suspend(struct device *dev);
  193. int tmio_mmc_host_runtime_resume(struct device *dev);
  194. #endif
  195. static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
  196. {
  197. return ioread16(host->ctl + (addr << host->bus_shift));
  198. }
  199. static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
  200. u16 *buf, int count)
  201. {
  202. ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count);
  203. }
  204. static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
  205. int addr)
  206. {
  207. return ioread16(host->ctl + (addr << host->bus_shift)) |
  208. ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
  209. }
  210. static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
  211. u32 *buf, int count)
  212. {
  213. ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count);
  214. }
  215. static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
  216. u16 val)
  217. {
  218. /* If there is a hook and it returns non-zero then there
  219. * is an error and the write should be skipped
  220. */
  221. if (host->write16_hook && host->write16_hook(host, addr))
  222. return;
  223. iowrite16(val, host->ctl + (addr << host->bus_shift));
  224. }
  225. static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
  226. u16 *buf, int count)
  227. {
  228. iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count);
  229. }
  230. static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
  231. int addr, u32 val)
  232. {
  233. iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift));
  234. iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
  235. }
  236. static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
  237. const u32 *buf, int count)
  238. {
  239. iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count);
  240. }
  241. #endif