renesas_sdhi_sys_dmac.c 14 KB

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  1. /*
  2. * DMA support use of SYS DMAC with SDHI SD/SDIO controller
  3. *
  4. * Copyright (C) 2016-17 Renesas Electronics Corporation
  5. * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
  6. * Copyright (C) 2017 Horms Solutions, Simon Horman
  7. * Copyright (C) 2010-2011 Guennadi Liakhovetski
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/device.h>
  14. #include <linux/dma-mapping.h>
  15. #include <linux/dmaengine.h>
  16. #include <linux/mfd/tmio.h>
  17. #include <linux/mmc/host.h>
  18. #include <linux/mod_devicetable.h>
  19. #include <linux/module.h>
  20. #include <linux/of_device.h>
  21. #include <linux/pagemap.h>
  22. #include <linux/scatterlist.h>
  23. #include <linux/sys_soc.h>
  24. #include "renesas_sdhi.h"
  25. #include "tmio_mmc.h"
  26. #define TMIO_MMC_MIN_DMA_LEN 8
  27. static const struct renesas_sdhi_of_data of_default_cfg = {
  28. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  29. };
  30. static const struct renesas_sdhi_of_data of_rz_compatible = {
  31. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT |
  32. TMIO_MMC_HAVE_CBSY,
  33. .tmio_ocr_mask = MMC_VDD_32_33,
  34. .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
  35. };
  36. static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
  37. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
  38. .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
  39. .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
  40. };
  41. /* Definitions for sampling clocks */
  42. static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = {
  43. {
  44. .clk_rate = 156000000,
  45. .tap = 0x00000703,
  46. },
  47. {
  48. .clk_rate = 0,
  49. .tap = 0x00000300,
  50. },
  51. };
  52. static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
  53. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
  54. TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
  55. .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  56. MMC_CAP_CMD23,
  57. .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
  58. .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
  59. .dma_rx_offset = 0x2000,
  60. .scc_offset = 0x0300,
  61. .taps = rcar_gen2_scc_taps,
  62. .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps),
  63. };
  64. /* Definitions for sampling clocks */
  65. static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
  66. {
  67. .clk_rate = 0,
  68. .tap = 0x00000300,
  69. },
  70. };
  71. static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
  72. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
  73. TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
  74. .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  75. MMC_CAP_CMD23,
  76. .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
  77. .bus_shift = 2,
  78. .scc_offset = 0x1000,
  79. .taps = rcar_gen3_scc_taps,
  80. .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps),
  81. };
  82. static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
  83. { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
  84. { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
  85. { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
  86. { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
  87. { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
  88. { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
  89. { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, },
  90. { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, },
  91. { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
  92. { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
  93. { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
  94. { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
  95. { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
  96. { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
  97. { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
  98. { .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, },
  99. { .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, },
  100. { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, },
  101. { .compatible = "renesas,sdhi-shmobile" },
  102. {},
  103. };
  104. MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
  105. static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host,
  106. bool enable)
  107. {
  108. struct renesas_sdhi *priv = host_to_priv(host);
  109. if (!host->chan_tx || !host->chan_rx)
  110. return;
  111. if (priv->dma_priv.enable)
  112. priv->dma_priv.enable(host, enable);
  113. }
  114. static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
  115. {
  116. renesas_sdhi_sys_dmac_enable_dma(host, false);
  117. if (host->chan_rx)
  118. dmaengine_terminate_all(host->chan_rx);
  119. if (host->chan_tx)
  120. dmaengine_terminate_all(host->chan_tx);
  121. renesas_sdhi_sys_dmac_enable_dma(host, true);
  122. }
  123. static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host)
  124. {
  125. struct renesas_sdhi *priv = host_to_priv(host);
  126. complete(&priv->dma_priv.dma_dataend);
  127. }
  128. static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
  129. {
  130. struct tmio_mmc_host *host = arg;
  131. struct renesas_sdhi *priv = host_to_priv(host);
  132. spin_lock_irq(&host->lock);
  133. if (!host->data)
  134. goto out;
  135. if (host->data->flags & MMC_DATA_READ)
  136. dma_unmap_sg(host->chan_rx->device->dev,
  137. host->sg_ptr, host->sg_len,
  138. DMA_FROM_DEVICE);
  139. else
  140. dma_unmap_sg(host->chan_tx->device->dev,
  141. host->sg_ptr, host->sg_len,
  142. DMA_TO_DEVICE);
  143. spin_unlock_irq(&host->lock);
  144. wait_for_completion(&priv->dma_priv.dma_dataend);
  145. spin_lock_irq(&host->lock);
  146. tmio_mmc_do_data_irq(host);
  147. out:
  148. spin_unlock_irq(&host->lock);
  149. }
  150. static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
  151. {
  152. struct renesas_sdhi *priv = host_to_priv(host);
  153. struct scatterlist *sg = host->sg_ptr, *sg_tmp;
  154. struct dma_async_tx_descriptor *desc = NULL;
  155. struct dma_chan *chan = host->chan_rx;
  156. dma_cookie_t cookie;
  157. int ret, i;
  158. bool aligned = true, multiple = true;
  159. unsigned int align = (1 << host->pdata->alignment_shift) - 1;
  160. for_each_sg(sg, sg_tmp, host->sg_len, i) {
  161. if (sg_tmp->offset & align)
  162. aligned = false;
  163. if (sg_tmp->length & align) {
  164. multiple = false;
  165. break;
  166. }
  167. }
  168. if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
  169. (align & PAGE_MASK))) || !multiple) {
  170. ret = -EINVAL;
  171. goto pio;
  172. }
  173. if (sg->length < TMIO_MMC_MIN_DMA_LEN) {
  174. host->force_pio = true;
  175. return;
  176. }
  177. /* The only sg element can be unaligned, use our bounce buffer then */
  178. if (!aligned) {
  179. sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
  180. host->sg_ptr = &host->bounce_sg;
  181. sg = host->sg_ptr;
  182. }
  183. ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
  184. if (ret > 0)
  185. desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM,
  186. DMA_CTRL_ACK);
  187. if (desc) {
  188. reinit_completion(&priv->dma_priv.dma_dataend);
  189. desc->callback = renesas_sdhi_sys_dmac_dma_callback;
  190. desc->callback_param = host;
  191. cookie = dmaengine_submit(desc);
  192. if (cookie < 0) {
  193. desc = NULL;
  194. ret = cookie;
  195. }
  196. }
  197. pio:
  198. if (!desc) {
  199. /* DMA failed, fall back to PIO */
  200. renesas_sdhi_sys_dmac_enable_dma(host, false);
  201. if (ret >= 0)
  202. ret = -EIO;
  203. host->chan_rx = NULL;
  204. dma_release_channel(chan);
  205. /* Free the Tx channel too */
  206. chan = host->chan_tx;
  207. if (chan) {
  208. host->chan_tx = NULL;
  209. dma_release_channel(chan);
  210. }
  211. dev_warn(&host->pdev->dev,
  212. "DMA failed: %d, falling back to PIO\n", ret);
  213. }
  214. }
  215. static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host)
  216. {
  217. struct renesas_sdhi *priv = host_to_priv(host);
  218. struct scatterlist *sg = host->sg_ptr, *sg_tmp;
  219. struct dma_async_tx_descriptor *desc = NULL;
  220. struct dma_chan *chan = host->chan_tx;
  221. dma_cookie_t cookie;
  222. int ret, i;
  223. bool aligned = true, multiple = true;
  224. unsigned int align = (1 << host->pdata->alignment_shift) - 1;
  225. for_each_sg(sg, sg_tmp, host->sg_len, i) {
  226. if (sg_tmp->offset & align)
  227. aligned = false;
  228. if (sg_tmp->length & align) {
  229. multiple = false;
  230. break;
  231. }
  232. }
  233. if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
  234. (align & PAGE_MASK))) || !multiple) {
  235. ret = -EINVAL;
  236. goto pio;
  237. }
  238. if (sg->length < TMIO_MMC_MIN_DMA_LEN) {
  239. host->force_pio = true;
  240. return;
  241. }
  242. /* The only sg element can be unaligned, use our bounce buffer then */
  243. if (!aligned) {
  244. unsigned long flags;
  245. void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags);
  246. sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
  247. memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length);
  248. tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr);
  249. host->sg_ptr = &host->bounce_sg;
  250. sg = host->sg_ptr;
  251. }
  252. ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
  253. if (ret > 0)
  254. desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV,
  255. DMA_CTRL_ACK);
  256. if (desc) {
  257. reinit_completion(&priv->dma_priv.dma_dataend);
  258. desc->callback = renesas_sdhi_sys_dmac_dma_callback;
  259. desc->callback_param = host;
  260. cookie = dmaengine_submit(desc);
  261. if (cookie < 0) {
  262. desc = NULL;
  263. ret = cookie;
  264. }
  265. }
  266. pio:
  267. if (!desc) {
  268. /* DMA failed, fall back to PIO */
  269. renesas_sdhi_sys_dmac_enable_dma(host, false);
  270. if (ret >= 0)
  271. ret = -EIO;
  272. host->chan_tx = NULL;
  273. dma_release_channel(chan);
  274. /* Free the Rx channel too */
  275. chan = host->chan_rx;
  276. if (chan) {
  277. host->chan_rx = NULL;
  278. dma_release_channel(chan);
  279. }
  280. dev_warn(&host->pdev->dev,
  281. "DMA failed: %d, falling back to PIO\n", ret);
  282. }
  283. }
  284. static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host,
  285. struct mmc_data *data)
  286. {
  287. if (data->flags & MMC_DATA_READ) {
  288. if (host->chan_rx)
  289. renesas_sdhi_sys_dmac_start_dma_rx(host);
  290. } else {
  291. if (host->chan_tx)
  292. renesas_sdhi_sys_dmac_start_dma_tx(host);
  293. }
  294. }
  295. static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv)
  296. {
  297. struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
  298. struct dma_chan *chan = NULL;
  299. spin_lock_irq(&host->lock);
  300. if (host->data) {
  301. if (host->data->flags & MMC_DATA_READ)
  302. chan = host->chan_rx;
  303. else
  304. chan = host->chan_tx;
  305. }
  306. spin_unlock_irq(&host->lock);
  307. tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
  308. if (chan)
  309. dma_async_issue_pending(chan);
  310. }
  311. static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
  312. struct tmio_mmc_data *pdata)
  313. {
  314. struct renesas_sdhi *priv = host_to_priv(host);
  315. /* We can only either use DMA for both Tx and Rx or not use it at all */
  316. if (!host->pdev->dev.of_node &&
  317. (!pdata->chan_priv_tx || !pdata->chan_priv_rx))
  318. return;
  319. if (!host->chan_tx && !host->chan_rx) {
  320. struct resource *res = platform_get_resource(host->pdev,
  321. IORESOURCE_MEM, 0);
  322. struct dma_slave_config cfg = {};
  323. dma_cap_mask_t mask;
  324. int ret;
  325. if (!res)
  326. return;
  327. dma_cap_zero(mask);
  328. dma_cap_set(DMA_SLAVE, mask);
  329. host->chan_tx = dma_request_slave_channel_compat(mask,
  330. priv->dma_priv.filter, pdata->chan_priv_tx,
  331. &host->pdev->dev, "tx");
  332. dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
  333. host->chan_tx);
  334. if (!host->chan_tx)
  335. return;
  336. cfg.direction = DMA_MEM_TO_DEV;
  337. cfg.dst_addr = res->start +
  338. (CTL_SD_DATA_PORT << host->bus_shift);
  339. cfg.dst_addr_width = priv->dma_priv.dma_buswidth;
  340. if (!cfg.dst_addr_width)
  341. cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  342. cfg.src_addr = 0;
  343. ret = dmaengine_slave_config(host->chan_tx, &cfg);
  344. if (ret < 0)
  345. goto ecfgtx;
  346. host->chan_rx = dma_request_slave_channel_compat(mask,
  347. priv->dma_priv.filter, pdata->chan_priv_rx,
  348. &host->pdev->dev, "rx");
  349. dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
  350. host->chan_rx);
  351. if (!host->chan_rx)
  352. goto ereqrx;
  353. cfg.direction = DMA_DEV_TO_MEM;
  354. cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset;
  355. cfg.src_addr_width = priv->dma_priv.dma_buswidth;
  356. if (!cfg.src_addr_width)
  357. cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  358. cfg.dst_addr = 0;
  359. ret = dmaengine_slave_config(host->chan_rx, &cfg);
  360. if (ret < 0)
  361. goto ecfgrx;
  362. host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
  363. if (!host->bounce_buf)
  364. goto ebouncebuf;
  365. init_completion(&priv->dma_priv.dma_dataend);
  366. tasklet_init(&host->dma_issue,
  367. renesas_sdhi_sys_dmac_issue_tasklet_fn,
  368. (unsigned long)host);
  369. }
  370. renesas_sdhi_sys_dmac_enable_dma(host, true);
  371. return;
  372. ebouncebuf:
  373. ecfgrx:
  374. dma_release_channel(host->chan_rx);
  375. host->chan_rx = NULL;
  376. ereqrx:
  377. ecfgtx:
  378. dma_release_channel(host->chan_tx);
  379. host->chan_tx = NULL;
  380. }
  381. static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host)
  382. {
  383. if (host->chan_tx) {
  384. struct dma_chan *chan = host->chan_tx;
  385. host->chan_tx = NULL;
  386. dma_release_channel(chan);
  387. }
  388. if (host->chan_rx) {
  389. struct dma_chan *chan = host->chan_rx;
  390. host->chan_rx = NULL;
  391. dma_release_channel(chan);
  392. }
  393. if (host->bounce_buf) {
  394. free_pages((unsigned long)host->bounce_buf, 0);
  395. host->bounce_buf = NULL;
  396. }
  397. }
  398. static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = {
  399. .start = renesas_sdhi_sys_dmac_start_dma,
  400. .enable = renesas_sdhi_sys_dmac_enable_dma,
  401. .request = renesas_sdhi_sys_dmac_request_dma,
  402. .release = renesas_sdhi_sys_dmac_release_dma,
  403. .abort = renesas_sdhi_sys_dmac_abort_dma,
  404. .dataend = renesas_sdhi_sys_dmac_dataend_dma,
  405. };
  406. /*
  407. * Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC
  408. * implementation. Currently empty as all supported ES versions use
  409. * the internal DMAC.
  410. */
  411. static const struct soc_device_attribute gen3_soc_whitelist[] = {
  412. { /* sentinel */ }
  413. };
  414. static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev)
  415. {
  416. if (of_device_get_match_data(&pdev->dev) == &of_rcar_gen3_compatible &&
  417. !soc_device_match(gen3_soc_whitelist))
  418. return -ENODEV;
  419. return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops);
  420. }
  421. static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = {
  422. SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
  423. pm_runtime_force_resume)
  424. SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
  425. tmio_mmc_host_runtime_resume,
  426. NULL)
  427. };
  428. static struct platform_driver renesas_sys_dmac_sdhi_driver = {
  429. .driver = {
  430. .name = "sh_mobile_sdhi",
  431. .pm = &renesas_sdhi_sys_dmac_dev_pm_ops,
  432. .of_match_table = renesas_sdhi_sys_dmac_of_match,
  433. },
  434. .probe = renesas_sdhi_sys_dmac_probe,
  435. .remove = renesas_sdhi_remove,
  436. };
  437. module_platform_driver(renesas_sys_dmac_sdhi_driver);
  438. MODULE_DESCRIPTION("Renesas SDHI driver");
  439. MODULE_AUTHOR("Magnus Damm");
  440. MODULE_LICENSE("GPL v2");
  441. MODULE_ALIAS("platform:sh_mobile_sdhi");