via-pmu.c 61 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device driver for the via-pmu on Apple Powermacs.
  4. *
  5. * The VIA (versatile interface adapter) interfaces to the PMU,
  6. * a 6805 microprocessor core whose primary function is to control
  7. * battery charging and system power on the PowerBook 3400 and 2400.
  8. * The PMU also controls the ADB (Apple Desktop Bus) which connects
  9. * to the keyboard and mouse, as well as the non-volatile RAM
  10. * and the RTC (real time clock) chip.
  11. *
  12. * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
  13. * Copyright (C) 2001-2002 Benjamin Herrenschmidt
  14. * Copyright (C) 2006-2007 Johannes Berg
  15. *
  16. * THIS DRIVER IS BECOMING A TOTAL MESS !
  17. * - Cleanup atomically disabling reply to PMU events after
  18. * a sleep or a freq. switch
  19. *
  20. */
  21. #include <stdarg.h>
  22. #include <linux/mutex.h>
  23. #include <linux/types.h>
  24. #include <linux/errno.h>
  25. #include <linux/kernel.h>
  26. #include <linux/delay.h>
  27. #include <linux/sched/signal.h>
  28. #include <linux/miscdevice.h>
  29. #include <linux/blkdev.h>
  30. #include <linux/pci.h>
  31. #include <linux/slab.h>
  32. #include <linux/poll.h>
  33. #include <linux/adb.h>
  34. #include <linux/pmu.h>
  35. #include <linux/cuda.h>
  36. #include <linux/module.h>
  37. #include <linux/spinlock.h>
  38. #include <linux/pm.h>
  39. #include <linux/proc_fs.h>
  40. #include <linux/seq_file.h>
  41. #include <linux/init.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/device.h>
  44. #include <linux/syscore_ops.h>
  45. #include <linux/freezer.h>
  46. #include <linux/syscalls.h>
  47. #include <linux/suspend.h>
  48. #include <linux/cpu.h>
  49. #include <linux/compat.h>
  50. #include <linux/of_address.h>
  51. #include <linux/of_irq.h>
  52. #include <asm/prom.h>
  53. #include <asm/machdep.h>
  54. #include <asm/io.h>
  55. #include <asm/pgtable.h>
  56. #include <asm/sections.h>
  57. #include <asm/irq.h>
  58. #include <asm/pmac_feature.h>
  59. #include <asm/pmac_pfunc.h>
  60. #include <asm/pmac_low_i2c.h>
  61. #include <linux/uaccess.h>
  62. #include <asm/mmu_context.h>
  63. #include <asm/cputable.h>
  64. #include <asm/time.h>
  65. #include <asm/backlight.h>
  66. #include "via-pmu-event.h"
  67. /* Some compile options */
  68. #undef DEBUG_SLEEP
  69. /* Misc minor number allocated for /dev/pmu */
  70. #define PMU_MINOR 154
  71. /* How many iterations between battery polls */
  72. #define BATTERY_POLLING_COUNT 2
  73. static DEFINE_MUTEX(pmu_info_proc_mutex);
  74. static volatile unsigned char __iomem *via;
  75. /* VIA registers - spaced 0x200 bytes apart */
  76. #define RS 0x200 /* skip between registers */
  77. #define B 0 /* B-side data */
  78. #define A RS /* A-side data */
  79. #define DIRB (2*RS) /* B-side direction (1=output) */
  80. #define DIRA (3*RS) /* A-side direction (1=output) */
  81. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  82. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  83. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  84. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  85. #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
  86. #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
  87. #define SR (10*RS) /* Shift register */
  88. #define ACR (11*RS) /* Auxiliary control register */
  89. #define PCR (12*RS) /* Peripheral control register */
  90. #define IFR (13*RS) /* Interrupt flag register */
  91. #define IER (14*RS) /* Interrupt enable register */
  92. #define ANH (15*RS) /* A-side data, no handshake */
  93. /* Bits in B data register: both active low */
  94. #define TACK 0x08 /* Transfer acknowledge (input) */
  95. #define TREQ 0x10 /* Transfer request (output) */
  96. /* Bits in ACR */
  97. #define SR_CTRL 0x1c /* Shift register control bits */
  98. #define SR_EXT 0x0c /* Shift on external clock */
  99. #define SR_OUT 0x10 /* Shift out if 1 */
  100. /* Bits in IFR and IER */
  101. #define IER_SET 0x80 /* set bits in IER */
  102. #define IER_CLR 0 /* clear bits in IER */
  103. #define SR_INT 0x04 /* Shift register full/empty */
  104. #define CB2_INT 0x08
  105. #define CB1_INT 0x10 /* transition on CB1 input */
  106. static volatile enum pmu_state {
  107. idle,
  108. sending,
  109. intack,
  110. reading,
  111. reading_intr,
  112. locked,
  113. } pmu_state;
  114. static volatile enum int_data_state {
  115. int_data_empty,
  116. int_data_fill,
  117. int_data_ready,
  118. int_data_flush
  119. } int_data_state[2] = { int_data_empty, int_data_empty };
  120. static struct adb_request *current_req;
  121. static struct adb_request *last_req;
  122. static struct adb_request *req_awaiting_reply;
  123. static unsigned char interrupt_data[2][32];
  124. static int interrupt_data_len[2];
  125. static int int_data_last;
  126. static unsigned char *reply_ptr;
  127. static int data_index;
  128. static int data_len;
  129. static volatile int adb_int_pending;
  130. static volatile int disable_poll;
  131. static struct device_node *vias;
  132. static int pmu_kind = PMU_UNKNOWN;
  133. static int pmu_fully_inited;
  134. static int pmu_has_adb;
  135. static struct device_node *gpio_node;
  136. static unsigned char __iomem *gpio_reg;
  137. static int gpio_irq = 0;
  138. static int gpio_irq_enabled = -1;
  139. static volatile int pmu_suspended;
  140. static spinlock_t pmu_lock;
  141. static u8 pmu_intr_mask;
  142. static int pmu_version;
  143. static int drop_interrupts;
  144. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  145. static int option_lid_wakeup = 1;
  146. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  147. static unsigned long async_req_locks;
  148. static unsigned int pmu_irq_stats[11];
  149. static struct proc_dir_entry *proc_pmu_root;
  150. static struct proc_dir_entry *proc_pmu_info;
  151. static struct proc_dir_entry *proc_pmu_irqstats;
  152. static struct proc_dir_entry *proc_pmu_options;
  153. static int option_server_mode;
  154. int pmu_battery_count;
  155. int pmu_cur_battery;
  156. unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
  157. struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
  158. static int query_batt_timer = BATTERY_POLLING_COUNT;
  159. static struct adb_request batt_req;
  160. static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
  161. int __fake_sleep;
  162. int asleep;
  163. #ifdef CONFIG_ADB
  164. static int adb_dev_map;
  165. static int pmu_adb_flags;
  166. static int pmu_probe(void);
  167. static int pmu_init(void);
  168. static int pmu_send_request(struct adb_request *req, int sync);
  169. static int pmu_adb_autopoll(int devs);
  170. static int pmu_adb_reset_bus(void);
  171. #endif /* CONFIG_ADB */
  172. static int init_pmu(void);
  173. static void pmu_start(void);
  174. static irqreturn_t via_pmu_interrupt(int irq, void *arg);
  175. static irqreturn_t gpio1_interrupt(int irq, void *arg);
  176. static int pmu_info_proc_show(struct seq_file *m, void *v);
  177. static int pmu_irqstats_proc_show(struct seq_file *m, void *v);
  178. static int pmu_battery_proc_show(struct seq_file *m, void *v);
  179. static void pmu_pass_intr(unsigned char *data, int len);
  180. static const struct file_operations pmu_options_proc_fops;
  181. #ifdef CONFIG_ADB
  182. const struct adb_driver via_pmu_driver = {
  183. .name = "PMU",
  184. .probe = pmu_probe,
  185. .init = pmu_init,
  186. .send_request = pmu_send_request,
  187. .autopoll = pmu_adb_autopoll,
  188. .poll = pmu_poll_adb,
  189. .reset_bus = pmu_adb_reset_bus,
  190. };
  191. #endif /* CONFIG_ADB */
  192. extern void low_sleep_handler(void);
  193. extern void enable_kernel_altivec(void);
  194. extern void enable_kernel_fp(void);
  195. #ifdef DEBUG_SLEEP
  196. int pmu_polled_request(struct adb_request *req);
  197. void pmu_blink(int n);
  198. #endif
  199. /*
  200. * This table indicates for each PMU opcode:
  201. * - the number of data bytes to be sent with the command, or -1
  202. * if a length byte should be sent,
  203. * - the number of response bytes which the PMU will return, or
  204. * -1 if it will send a length byte.
  205. */
  206. static const s8 pmu_data_len[256][2] = {
  207. /* 0 1 2 3 4 5 6 7 */
  208. /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  209. /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  210. /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  211. /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
  212. /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
  213. /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
  214. /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  215. /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
  216. /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  217. /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
  218. /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
  219. /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
  220. /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  221. /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
  222. /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  223. /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
  224. /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  225. /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  226. /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  227. /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  228. /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
  229. /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  230. /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  231. /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  232. /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  233. /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  234. /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  235. /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
  236. /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
  237. /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
  238. /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  239. /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  240. };
  241. static char *pbook_type[] = {
  242. "Unknown PowerBook",
  243. "PowerBook 2400/3400/3500(G3)",
  244. "PowerBook G3 Series",
  245. "1999 PowerBook G3",
  246. "Core99"
  247. };
  248. int __init find_via_pmu(void)
  249. {
  250. u64 taddr;
  251. const u32 *reg;
  252. if (via)
  253. return 1;
  254. vias = of_find_node_by_name(NULL, "via-pmu");
  255. if (vias == NULL)
  256. return 0;
  257. reg = of_get_property(vias, "reg", NULL);
  258. if (reg == NULL) {
  259. printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
  260. goto fail;
  261. }
  262. taddr = of_translate_address(vias, reg);
  263. if (taddr == OF_BAD_ADDR) {
  264. printk(KERN_ERR "via-pmu: Can't translate address !\n");
  265. goto fail;
  266. }
  267. spin_lock_init(&pmu_lock);
  268. pmu_has_adb = 1;
  269. pmu_intr_mask = PMU_INT_PCEJECT |
  270. PMU_INT_SNDBRT |
  271. PMU_INT_ADB |
  272. PMU_INT_TICK;
  273. if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
  274. || of_device_is_compatible(vias->parent, "ohare")))
  275. pmu_kind = PMU_OHARE_BASED;
  276. else if (of_device_is_compatible(vias->parent, "paddington"))
  277. pmu_kind = PMU_PADDINGTON_BASED;
  278. else if (of_device_is_compatible(vias->parent, "heathrow"))
  279. pmu_kind = PMU_HEATHROW_BASED;
  280. else if (of_device_is_compatible(vias->parent, "Keylargo")
  281. || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
  282. struct device_node *gpiop;
  283. struct device_node *adbp;
  284. u64 gaddr = OF_BAD_ADDR;
  285. pmu_kind = PMU_KEYLARGO_BASED;
  286. adbp = of_find_node_by_type(NULL, "adb");
  287. pmu_has_adb = (adbp != NULL);
  288. of_node_put(adbp);
  289. pmu_intr_mask = PMU_INT_PCEJECT |
  290. PMU_INT_SNDBRT |
  291. PMU_INT_ADB |
  292. PMU_INT_TICK |
  293. PMU_INT_ENVIRONMENT;
  294. gpiop = of_find_node_by_name(NULL, "gpio");
  295. if (gpiop) {
  296. reg = of_get_property(gpiop, "reg", NULL);
  297. if (reg)
  298. gaddr = of_translate_address(gpiop, reg);
  299. if (gaddr != OF_BAD_ADDR)
  300. gpio_reg = ioremap(gaddr, 0x10);
  301. of_node_put(gpiop);
  302. }
  303. if (gpio_reg == NULL) {
  304. printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
  305. goto fail;
  306. }
  307. } else
  308. pmu_kind = PMU_UNKNOWN;
  309. via = ioremap(taddr, 0x2000);
  310. if (via == NULL) {
  311. printk(KERN_ERR "via-pmu: Can't map address !\n");
  312. goto fail_via_remap;
  313. }
  314. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  315. out_8(&via[IFR], 0x7f); /* clear IFR */
  316. pmu_state = idle;
  317. if (!init_pmu())
  318. goto fail_init;
  319. printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
  320. PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
  321. sys_ctrler = SYS_CTRLER_PMU;
  322. return 1;
  323. fail_init:
  324. iounmap(via);
  325. via = NULL;
  326. fail_via_remap:
  327. iounmap(gpio_reg);
  328. gpio_reg = NULL;
  329. fail:
  330. of_node_put(vias);
  331. vias = NULL;
  332. return 0;
  333. }
  334. #ifdef CONFIG_ADB
  335. static int pmu_probe(void)
  336. {
  337. return vias == NULL? -ENODEV: 0;
  338. }
  339. static int __init pmu_init(void)
  340. {
  341. if (vias == NULL)
  342. return -ENODEV;
  343. return 0;
  344. }
  345. #endif /* CONFIG_ADB */
  346. /*
  347. * We can't wait until pmu_init gets called, that happens too late.
  348. * It happens after IDE and SCSI initialization, which can take a few
  349. * seconds, and by that time the PMU could have given up on us and
  350. * turned us off.
  351. * Thus this is called with arch_initcall rather than device_initcall.
  352. */
  353. static int __init via_pmu_start(void)
  354. {
  355. unsigned int irq;
  356. if (vias == NULL)
  357. return -ENODEV;
  358. batt_req.complete = 1;
  359. irq = irq_of_parse_and_map(vias, 0);
  360. if (!irq) {
  361. printk(KERN_ERR "via-pmu: can't map interrupt\n");
  362. return -ENODEV;
  363. }
  364. /* We set IRQF_NO_SUSPEND because we don't want the interrupt
  365. * to be disabled between the 2 passes of driver suspend, we
  366. * control our own disabling for that one
  367. */
  368. if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
  369. "VIA-PMU", (void *)0)) {
  370. printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
  371. return -ENODEV;
  372. }
  373. if (pmu_kind == PMU_KEYLARGO_BASED) {
  374. gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
  375. if (gpio_node == NULL)
  376. gpio_node = of_find_node_by_name(NULL,
  377. "pmu-interrupt");
  378. if (gpio_node)
  379. gpio_irq = irq_of_parse_and_map(gpio_node, 0);
  380. if (gpio_irq) {
  381. if (request_irq(gpio_irq, gpio1_interrupt,
  382. IRQF_NO_SUSPEND, "GPIO1 ADB",
  383. (void *)0))
  384. printk(KERN_ERR "pmu: can't get irq %d"
  385. " (GPIO1)\n", gpio_irq);
  386. else
  387. gpio_irq_enabled = 1;
  388. }
  389. }
  390. /* Enable interrupts */
  391. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  392. pmu_fully_inited = 1;
  393. /* Make sure PMU settle down before continuing. This is _very_ important
  394. * since the IDE probe may shut interrupts down for quite a bit of time. If
  395. * a PMU communication is pending while this happens, the PMU may timeout
  396. * Not that on Core99 machines, the PMU keeps sending us environement
  397. * messages, we should find a way to either fix IDE or make it call
  398. * pmu_suspend() before masking interrupts. This can also happens while
  399. * scolling with some fbdevs.
  400. */
  401. do {
  402. pmu_poll();
  403. } while (pmu_state != idle);
  404. return 0;
  405. }
  406. arch_initcall(via_pmu_start);
  407. /*
  408. * This has to be done after pci_init, which is a subsys_initcall.
  409. */
  410. static int __init via_pmu_dev_init(void)
  411. {
  412. if (vias == NULL)
  413. return -ENODEV;
  414. #ifdef CONFIG_PMAC_BACKLIGHT
  415. /* Initialize backlight */
  416. pmu_backlight_init();
  417. #endif
  418. #ifdef CONFIG_PPC32
  419. if (of_machine_is_compatible("AAPL,3400/2400") ||
  420. of_machine_is_compatible("AAPL,3500")) {
  421. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  422. NULL, PMAC_MB_INFO_MODEL, 0);
  423. pmu_battery_count = 1;
  424. if (mb == PMAC_TYPE_COMET)
  425. pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
  426. else
  427. pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
  428. } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
  429. of_machine_is_compatible("PowerBook1,1")) {
  430. pmu_battery_count = 2;
  431. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  432. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  433. } else {
  434. struct device_node* prim =
  435. of_find_node_by_name(NULL, "power-mgt");
  436. const u32 *prim_info = NULL;
  437. if (prim)
  438. prim_info = of_get_property(prim, "prim-info", NULL);
  439. if (prim_info) {
  440. /* Other stuffs here yet unknown */
  441. pmu_battery_count = (prim_info[6] >> 16) & 0xff;
  442. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  443. if (pmu_battery_count > 1)
  444. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  445. }
  446. of_node_put(prim);
  447. }
  448. #endif /* CONFIG_PPC32 */
  449. /* Create /proc/pmu */
  450. proc_pmu_root = proc_mkdir("pmu", NULL);
  451. if (proc_pmu_root) {
  452. long i;
  453. for (i=0; i<pmu_battery_count; i++) {
  454. char title[16];
  455. sprintf(title, "battery_%ld", i);
  456. proc_pmu_batt[i] = proc_create_single_data(title, 0,
  457. proc_pmu_root, pmu_battery_proc_show,
  458. (void *)i);
  459. }
  460. proc_pmu_info = proc_create_single("info", 0, proc_pmu_root,
  461. pmu_info_proc_show);
  462. proc_pmu_irqstats = proc_create_single("interrupts", 0,
  463. proc_pmu_root, pmu_irqstats_proc_show);
  464. proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
  465. &pmu_options_proc_fops);
  466. }
  467. return 0;
  468. }
  469. device_initcall(via_pmu_dev_init);
  470. static int
  471. init_pmu(void)
  472. {
  473. int timeout;
  474. struct adb_request req;
  475. out_8(&via[B], via[B] | TREQ); /* negate TREQ */
  476. out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
  477. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  478. timeout = 100000;
  479. while (!req.complete) {
  480. if (--timeout < 0) {
  481. printk(KERN_ERR "init_pmu: no response from PMU\n");
  482. return 0;
  483. }
  484. udelay(10);
  485. pmu_poll();
  486. }
  487. /* ack all pending interrupts */
  488. timeout = 100000;
  489. interrupt_data[0][0] = 1;
  490. while (interrupt_data[0][0] || pmu_state != idle) {
  491. if (--timeout < 0) {
  492. printk(KERN_ERR "init_pmu: timed out acking intrs\n");
  493. return 0;
  494. }
  495. if (pmu_state == idle)
  496. adb_int_pending = 1;
  497. via_pmu_interrupt(0, NULL);
  498. udelay(10);
  499. }
  500. /* Tell PMU we are ready. */
  501. if (pmu_kind == PMU_KEYLARGO_BASED) {
  502. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  503. while (!req.complete)
  504. pmu_poll();
  505. }
  506. /* Read PMU version */
  507. pmu_request(&req, NULL, 1, PMU_GET_VERSION);
  508. pmu_wait_complete(&req);
  509. if (req.reply_len > 0)
  510. pmu_version = req.reply[0];
  511. /* Read server mode setting */
  512. if (pmu_kind == PMU_KEYLARGO_BASED) {
  513. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
  514. PMU_PWR_GET_POWERUP_EVENTS);
  515. pmu_wait_complete(&req);
  516. if (req.reply_len == 2) {
  517. if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
  518. option_server_mode = 1;
  519. printk(KERN_INFO "via-pmu: Server Mode is %s\n",
  520. option_server_mode ? "enabled" : "disabled");
  521. }
  522. }
  523. return 1;
  524. }
  525. int
  526. pmu_get_model(void)
  527. {
  528. return pmu_kind;
  529. }
  530. static void pmu_set_server_mode(int server_mode)
  531. {
  532. struct adb_request req;
  533. if (pmu_kind != PMU_KEYLARGO_BASED)
  534. return;
  535. option_server_mode = server_mode;
  536. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
  537. pmu_wait_complete(&req);
  538. if (req.reply_len < 2)
  539. return;
  540. if (server_mode)
  541. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  542. PMU_PWR_SET_POWERUP_EVENTS,
  543. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  544. else
  545. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  546. PMU_PWR_CLR_POWERUP_EVENTS,
  547. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  548. pmu_wait_complete(&req);
  549. }
  550. /* This new version of the code for 2400/3400/3500 powerbooks
  551. * is inspired from the implementation in gkrellm-pmu
  552. */
  553. static void
  554. done_battery_state_ohare(struct adb_request* req)
  555. {
  556. /* format:
  557. * [0] : flags
  558. * 0x01 : AC indicator
  559. * 0x02 : charging
  560. * 0x04 : battery exist
  561. * 0x08 :
  562. * 0x10 :
  563. * 0x20 : full charged
  564. * 0x40 : pcharge reset
  565. * 0x80 : battery exist
  566. *
  567. * [1][2] : battery voltage
  568. * [3] : CPU temperature
  569. * [4] : battery temperature
  570. * [5] : current
  571. * [6][7] : pcharge
  572. * --tkoba
  573. */
  574. unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
  575. long pcharge, charge, vb, vmax, lmax;
  576. long vmax_charging, vmax_charged;
  577. long amperage, voltage, time, max;
  578. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  579. NULL, PMAC_MB_INFO_MODEL, 0);
  580. if (req->reply[0] & 0x01)
  581. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  582. else
  583. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  584. if (mb == PMAC_TYPE_COMET) {
  585. vmax_charged = 189;
  586. vmax_charging = 213;
  587. lmax = 6500;
  588. } else {
  589. vmax_charged = 330;
  590. vmax_charging = 330;
  591. lmax = 6500;
  592. }
  593. vmax = vmax_charged;
  594. /* If battery installed */
  595. if (req->reply[0] & 0x04) {
  596. bat_flags |= PMU_BATT_PRESENT;
  597. if (req->reply[0] & 0x02)
  598. bat_flags |= PMU_BATT_CHARGING;
  599. vb = (req->reply[1] << 8) | req->reply[2];
  600. voltage = (vb * 265 + 72665) / 10;
  601. amperage = req->reply[5];
  602. if ((req->reply[0] & 0x01) == 0) {
  603. if (amperage > 200)
  604. vb += ((amperage - 200) * 15)/100;
  605. } else if (req->reply[0] & 0x02) {
  606. vb = (vb * 97) / 100;
  607. vmax = vmax_charging;
  608. }
  609. charge = (100 * vb) / vmax;
  610. if (req->reply[0] & 0x40) {
  611. pcharge = (req->reply[6] << 8) + req->reply[7];
  612. if (pcharge > lmax)
  613. pcharge = lmax;
  614. pcharge *= 100;
  615. pcharge = 100 - pcharge / lmax;
  616. if (pcharge < charge)
  617. charge = pcharge;
  618. }
  619. if (amperage > 0)
  620. time = (charge * 16440) / amperage;
  621. else
  622. time = 0;
  623. max = 100;
  624. amperage = -amperage;
  625. } else
  626. charge = max = amperage = voltage = time = 0;
  627. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  628. pmu_batteries[pmu_cur_battery].charge = charge;
  629. pmu_batteries[pmu_cur_battery].max_charge = max;
  630. pmu_batteries[pmu_cur_battery].amperage = amperage;
  631. pmu_batteries[pmu_cur_battery].voltage = voltage;
  632. pmu_batteries[pmu_cur_battery].time_remaining = time;
  633. clear_bit(0, &async_req_locks);
  634. }
  635. static void
  636. done_battery_state_smart(struct adb_request* req)
  637. {
  638. /* format:
  639. * [0] : format of this structure (known: 3,4,5)
  640. * [1] : flags
  641. *
  642. * format 3 & 4:
  643. *
  644. * [2] : charge
  645. * [3] : max charge
  646. * [4] : current
  647. * [5] : voltage
  648. *
  649. * format 5:
  650. *
  651. * [2][3] : charge
  652. * [4][5] : max charge
  653. * [6][7] : current
  654. * [8][9] : voltage
  655. */
  656. unsigned int bat_flags = PMU_BATT_TYPE_SMART;
  657. int amperage;
  658. unsigned int capa, max, voltage;
  659. if (req->reply[1] & 0x01)
  660. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  661. else
  662. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  663. capa = max = amperage = voltage = 0;
  664. if (req->reply[1] & 0x04) {
  665. bat_flags |= PMU_BATT_PRESENT;
  666. switch(req->reply[0]) {
  667. case 3:
  668. case 4: capa = req->reply[2];
  669. max = req->reply[3];
  670. amperage = *((signed char *)&req->reply[4]);
  671. voltage = req->reply[5];
  672. break;
  673. case 5: capa = (req->reply[2] << 8) | req->reply[3];
  674. max = (req->reply[4] << 8) | req->reply[5];
  675. amperage = *((signed short *)&req->reply[6]);
  676. voltage = (req->reply[8] << 8) | req->reply[9];
  677. break;
  678. default:
  679. pr_warn("pmu.c: unrecognized battery info, "
  680. "len: %d, %4ph\n", req->reply_len,
  681. req->reply);
  682. break;
  683. }
  684. }
  685. if ((req->reply[1] & 0x01) && (amperage > 0))
  686. bat_flags |= PMU_BATT_CHARGING;
  687. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  688. pmu_batteries[pmu_cur_battery].charge = capa;
  689. pmu_batteries[pmu_cur_battery].max_charge = max;
  690. pmu_batteries[pmu_cur_battery].amperage = amperage;
  691. pmu_batteries[pmu_cur_battery].voltage = voltage;
  692. if (amperage) {
  693. if ((req->reply[1] & 0x01) && (amperage > 0))
  694. pmu_batteries[pmu_cur_battery].time_remaining
  695. = ((max-capa) * 3600) / amperage;
  696. else
  697. pmu_batteries[pmu_cur_battery].time_remaining
  698. = (capa * 3600) / (-amperage);
  699. } else
  700. pmu_batteries[pmu_cur_battery].time_remaining = 0;
  701. pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
  702. clear_bit(0, &async_req_locks);
  703. }
  704. static void
  705. query_battery_state(void)
  706. {
  707. if (test_and_set_bit(0, &async_req_locks))
  708. return;
  709. if (pmu_kind == PMU_OHARE_BASED)
  710. pmu_request(&batt_req, done_battery_state_ohare,
  711. 1, PMU_BATTERY_STATE);
  712. else
  713. pmu_request(&batt_req, done_battery_state_smart,
  714. 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
  715. }
  716. static int pmu_info_proc_show(struct seq_file *m, void *v)
  717. {
  718. seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
  719. seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
  720. seq_printf(m, "AC Power : %d\n",
  721. ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
  722. seq_printf(m, "Battery count : %d\n", pmu_battery_count);
  723. return 0;
  724. }
  725. static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
  726. {
  727. int i;
  728. static const char *irq_names[] = {
  729. "Total CB1 triggered events",
  730. "Total GPIO1 triggered events",
  731. "PC-Card eject button",
  732. "Sound/Brightness button",
  733. "ADB message",
  734. "Battery state change",
  735. "Environment interrupt",
  736. "Tick timer",
  737. "Ghost interrupt (zero len)",
  738. "Empty interrupt (empty mask)",
  739. "Max irqs in a row"
  740. };
  741. for (i=0; i<11; i++) {
  742. seq_printf(m, " %2u: %10u (%s)\n",
  743. i, pmu_irq_stats[i], irq_names[i]);
  744. }
  745. return 0;
  746. }
  747. static int pmu_battery_proc_show(struct seq_file *m, void *v)
  748. {
  749. long batnum = (long)m->private;
  750. seq_putc(m, '\n');
  751. seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
  752. seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
  753. seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
  754. seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
  755. seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
  756. seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
  757. return 0;
  758. }
  759. static int pmu_options_proc_show(struct seq_file *m, void *v)
  760. {
  761. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  762. if (pmu_kind == PMU_KEYLARGO_BASED &&
  763. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  764. seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
  765. #endif
  766. if (pmu_kind == PMU_KEYLARGO_BASED)
  767. seq_printf(m, "server_mode=%d\n", option_server_mode);
  768. return 0;
  769. }
  770. static int pmu_options_proc_open(struct inode *inode, struct file *file)
  771. {
  772. return single_open(file, pmu_options_proc_show, NULL);
  773. }
  774. static ssize_t pmu_options_proc_write(struct file *file,
  775. const char __user *buffer, size_t count, loff_t *pos)
  776. {
  777. char tmp[33];
  778. char *label, *val;
  779. size_t fcount = count;
  780. if (!count)
  781. return -EINVAL;
  782. if (count > 32)
  783. count = 32;
  784. if (copy_from_user(tmp, buffer, count))
  785. return -EFAULT;
  786. tmp[count] = 0;
  787. label = tmp;
  788. while(*label == ' ')
  789. label++;
  790. val = label;
  791. while(*val && (*val != '=')) {
  792. if (*val == ' ')
  793. *val = 0;
  794. val++;
  795. }
  796. if ((*val) == 0)
  797. return -EINVAL;
  798. *(val++) = 0;
  799. while(*val == ' ')
  800. val++;
  801. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  802. if (pmu_kind == PMU_KEYLARGO_BASED &&
  803. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  804. if (!strcmp(label, "lid_wakeup"))
  805. option_lid_wakeup = ((*val) == '1');
  806. #endif
  807. if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
  808. int new_value;
  809. new_value = ((*val) == '1');
  810. if (new_value != option_server_mode)
  811. pmu_set_server_mode(new_value);
  812. }
  813. return fcount;
  814. }
  815. static const struct file_operations pmu_options_proc_fops = {
  816. .owner = THIS_MODULE,
  817. .open = pmu_options_proc_open,
  818. .read = seq_read,
  819. .llseek = seq_lseek,
  820. .release = single_release,
  821. .write = pmu_options_proc_write,
  822. };
  823. #ifdef CONFIG_ADB
  824. /* Send an ADB command */
  825. static int pmu_send_request(struct adb_request *req, int sync)
  826. {
  827. int i, ret;
  828. if ((vias == NULL) || (!pmu_fully_inited)) {
  829. req->complete = 1;
  830. return -ENXIO;
  831. }
  832. ret = -EINVAL;
  833. switch (req->data[0]) {
  834. case PMU_PACKET:
  835. for (i = 0; i < req->nbytes - 1; ++i)
  836. req->data[i] = req->data[i+1];
  837. --req->nbytes;
  838. if (pmu_data_len[req->data[0]][1] != 0) {
  839. req->reply[0] = ADB_RET_OK;
  840. req->reply_len = 1;
  841. } else
  842. req->reply_len = 0;
  843. ret = pmu_queue_request(req);
  844. break;
  845. case CUDA_PACKET:
  846. switch (req->data[1]) {
  847. case CUDA_GET_TIME:
  848. if (req->nbytes != 2)
  849. break;
  850. req->data[0] = PMU_READ_RTC;
  851. req->nbytes = 1;
  852. req->reply_len = 3;
  853. req->reply[0] = CUDA_PACKET;
  854. req->reply[1] = 0;
  855. req->reply[2] = CUDA_GET_TIME;
  856. ret = pmu_queue_request(req);
  857. break;
  858. case CUDA_SET_TIME:
  859. if (req->nbytes != 6)
  860. break;
  861. req->data[0] = PMU_SET_RTC;
  862. req->nbytes = 5;
  863. for (i = 1; i <= 4; ++i)
  864. req->data[i] = req->data[i+1];
  865. req->reply_len = 3;
  866. req->reply[0] = CUDA_PACKET;
  867. req->reply[1] = 0;
  868. req->reply[2] = CUDA_SET_TIME;
  869. ret = pmu_queue_request(req);
  870. break;
  871. }
  872. break;
  873. case ADB_PACKET:
  874. if (!pmu_has_adb)
  875. return -ENXIO;
  876. for (i = req->nbytes - 1; i > 1; --i)
  877. req->data[i+2] = req->data[i];
  878. req->data[3] = req->nbytes - 2;
  879. req->data[2] = pmu_adb_flags;
  880. /*req->data[1] = req->data[1];*/
  881. req->data[0] = PMU_ADB_CMD;
  882. req->nbytes += 2;
  883. req->reply_expected = 1;
  884. req->reply_len = 0;
  885. ret = pmu_queue_request(req);
  886. break;
  887. }
  888. if (ret) {
  889. req->complete = 1;
  890. return ret;
  891. }
  892. if (sync)
  893. while (!req->complete)
  894. pmu_poll();
  895. return 0;
  896. }
  897. /* Enable/disable autopolling */
  898. static int __pmu_adb_autopoll(int devs)
  899. {
  900. struct adb_request req;
  901. if (devs) {
  902. pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
  903. adb_dev_map >> 8, adb_dev_map);
  904. pmu_adb_flags = 2;
  905. } else {
  906. pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
  907. pmu_adb_flags = 0;
  908. }
  909. while (!req.complete)
  910. pmu_poll();
  911. return 0;
  912. }
  913. static int pmu_adb_autopoll(int devs)
  914. {
  915. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  916. return -ENXIO;
  917. adb_dev_map = devs;
  918. return __pmu_adb_autopoll(devs);
  919. }
  920. /* Reset the ADB bus */
  921. static int pmu_adb_reset_bus(void)
  922. {
  923. struct adb_request req;
  924. int save_autopoll = adb_dev_map;
  925. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  926. return -ENXIO;
  927. /* anyone got a better idea?? */
  928. __pmu_adb_autopoll(0);
  929. req.nbytes = 4;
  930. req.done = NULL;
  931. req.data[0] = PMU_ADB_CMD;
  932. req.data[1] = ADB_BUSRESET;
  933. req.data[2] = 0;
  934. req.data[3] = 0;
  935. req.data[4] = 0;
  936. req.reply_len = 0;
  937. req.reply_expected = 1;
  938. if (pmu_queue_request(&req) != 0) {
  939. printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
  940. return -EIO;
  941. }
  942. pmu_wait_complete(&req);
  943. if (save_autopoll != 0)
  944. __pmu_adb_autopoll(save_autopoll);
  945. return 0;
  946. }
  947. #endif /* CONFIG_ADB */
  948. /* Construct and send a pmu request */
  949. int
  950. pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
  951. int nbytes, ...)
  952. {
  953. va_list list;
  954. int i;
  955. if (vias == NULL)
  956. return -ENXIO;
  957. if (nbytes < 0 || nbytes > 32) {
  958. printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
  959. req->complete = 1;
  960. return -EINVAL;
  961. }
  962. req->nbytes = nbytes;
  963. req->done = done;
  964. va_start(list, nbytes);
  965. for (i = 0; i < nbytes; ++i)
  966. req->data[i] = va_arg(list, int);
  967. va_end(list);
  968. req->reply_len = 0;
  969. req->reply_expected = 0;
  970. return pmu_queue_request(req);
  971. }
  972. int
  973. pmu_queue_request(struct adb_request *req)
  974. {
  975. unsigned long flags;
  976. int nsend;
  977. if (via == NULL) {
  978. req->complete = 1;
  979. return -ENXIO;
  980. }
  981. if (req->nbytes <= 0) {
  982. req->complete = 1;
  983. return 0;
  984. }
  985. nsend = pmu_data_len[req->data[0]][0];
  986. if (nsend >= 0 && req->nbytes != nsend + 1) {
  987. req->complete = 1;
  988. return -EINVAL;
  989. }
  990. req->next = NULL;
  991. req->sent = 0;
  992. req->complete = 0;
  993. spin_lock_irqsave(&pmu_lock, flags);
  994. if (current_req) {
  995. last_req->next = req;
  996. last_req = req;
  997. } else {
  998. current_req = req;
  999. last_req = req;
  1000. if (pmu_state == idle)
  1001. pmu_start();
  1002. }
  1003. spin_unlock_irqrestore(&pmu_lock, flags);
  1004. return 0;
  1005. }
  1006. static inline void
  1007. wait_for_ack(void)
  1008. {
  1009. /* Sightly increased the delay, I had one occurrence of the message
  1010. * reported
  1011. */
  1012. int timeout = 4000;
  1013. while ((in_8(&via[B]) & TACK) == 0) {
  1014. if (--timeout < 0) {
  1015. printk(KERN_ERR "PMU not responding (!ack)\n");
  1016. return;
  1017. }
  1018. udelay(10);
  1019. }
  1020. }
  1021. /* New PMU seems to be very sensitive to those timings, so we make sure
  1022. * PCI is flushed immediately */
  1023. static inline void
  1024. send_byte(int x)
  1025. {
  1026. volatile unsigned char __iomem *v = via;
  1027. out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
  1028. out_8(&v[SR], x);
  1029. out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
  1030. (void)in_8(&v[B]);
  1031. }
  1032. static inline void
  1033. recv_byte(void)
  1034. {
  1035. volatile unsigned char __iomem *v = via;
  1036. out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
  1037. in_8(&v[SR]); /* resets SR */
  1038. out_8(&v[B], in_8(&v[B]) & ~TREQ);
  1039. (void)in_8(&v[B]);
  1040. }
  1041. static inline void
  1042. pmu_done(struct adb_request *req)
  1043. {
  1044. void (*done)(struct adb_request *) = req->done;
  1045. mb();
  1046. req->complete = 1;
  1047. /* Here, we assume that if the request has a done member, the
  1048. * struct request will survive to setting req->complete to 1
  1049. */
  1050. if (done)
  1051. (*done)(req);
  1052. }
  1053. static void
  1054. pmu_start(void)
  1055. {
  1056. struct adb_request *req;
  1057. /* assert pmu_state == idle */
  1058. /* get the packet to send */
  1059. req = current_req;
  1060. if (!req || pmu_state != idle
  1061. || (/*req->reply_expected && */req_awaiting_reply))
  1062. return;
  1063. pmu_state = sending;
  1064. data_index = 1;
  1065. data_len = pmu_data_len[req->data[0]][0];
  1066. /* Sounds safer to make sure ACK is high before writing. This helped
  1067. * kill a problem with ADB and some iBooks
  1068. */
  1069. wait_for_ack();
  1070. /* set the shift register to shift out and send a byte */
  1071. send_byte(req->data[0]);
  1072. }
  1073. void
  1074. pmu_poll(void)
  1075. {
  1076. if (!via)
  1077. return;
  1078. if (disable_poll)
  1079. return;
  1080. via_pmu_interrupt(0, NULL);
  1081. }
  1082. void
  1083. pmu_poll_adb(void)
  1084. {
  1085. if (!via)
  1086. return;
  1087. if (disable_poll)
  1088. return;
  1089. /* Kicks ADB read when PMU is suspended */
  1090. adb_int_pending = 1;
  1091. do {
  1092. via_pmu_interrupt(0, NULL);
  1093. } while (pmu_suspended && (adb_int_pending || pmu_state != idle
  1094. || req_awaiting_reply));
  1095. }
  1096. void
  1097. pmu_wait_complete(struct adb_request *req)
  1098. {
  1099. if (!via)
  1100. return;
  1101. while((pmu_state != idle && pmu_state != locked) || !req->complete)
  1102. via_pmu_interrupt(0, NULL);
  1103. }
  1104. /* This function loops until the PMU is idle and prevents it from
  1105. * anwsering to ADB interrupts. pmu_request can still be called.
  1106. * This is done to avoid spurrious shutdowns when we know we'll have
  1107. * interrupts switched off for a long time
  1108. */
  1109. void
  1110. pmu_suspend(void)
  1111. {
  1112. unsigned long flags;
  1113. if (!via)
  1114. return;
  1115. spin_lock_irqsave(&pmu_lock, flags);
  1116. pmu_suspended++;
  1117. if (pmu_suspended > 1) {
  1118. spin_unlock_irqrestore(&pmu_lock, flags);
  1119. return;
  1120. }
  1121. do {
  1122. spin_unlock_irqrestore(&pmu_lock, flags);
  1123. if (req_awaiting_reply)
  1124. adb_int_pending = 1;
  1125. via_pmu_interrupt(0, NULL);
  1126. spin_lock_irqsave(&pmu_lock, flags);
  1127. if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
  1128. if (gpio_irq >= 0)
  1129. disable_irq_nosync(gpio_irq);
  1130. out_8(&via[IER], CB1_INT | IER_CLR);
  1131. spin_unlock_irqrestore(&pmu_lock, flags);
  1132. break;
  1133. }
  1134. } while (1);
  1135. }
  1136. void
  1137. pmu_resume(void)
  1138. {
  1139. unsigned long flags;
  1140. if (!via || (pmu_suspended < 1))
  1141. return;
  1142. spin_lock_irqsave(&pmu_lock, flags);
  1143. pmu_suspended--;
  1144. if (pmu_suspended > 0) {
  1145. spin_unlock_irqrestore(&pmu_lock, flags);
  1146. return;
  1147. }
  1148. adb_int_pending = 1;
  1149. if (gpio_irq >= 0)
  1150. enable_irq(gpio_irq);
  1151. out_8(&via[IER], CB1_INT | IER_SET);
  1152. spin_unlock_irqrestore(&pmu_lock, flags);
  1153. pmu_poll();
  1154. }
  1155. /* Interrupt data could be the result data from an ADB cmd */
  1156. static void
  1157. pmu_handle_data(unsigned char *data, int len)
  1158. {
  1159. unsigned char ints, pirq;
  1160. int i = 0;
  1161. asleep = 0;
  1162. if (drop_interrupts || len < 1) {
  1163. adb_int_pending = 0;
  1164. pmu_irq_stats[8]++;
  1165. return;
  1166. }
  1167. /* Get PMU interrupt mask */
  1168. ints = data[0];
  1169. /* Record zero interrupts for stats */
  1170. if (ints == 0)
  1171. pmu_irq_stats[9]++;
  1172. /* Hack to deal with ADB autopoll flag */
  1173. if (ints & PMU_INT_ADB)
  1174. ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
  1175. next:
  1176. if (ints == 0) {
  1177. if (i > pmu_irq_stats[10])
  1178. pmu_irq_stats[10] = i;
  1179. return;
  1180. }
  1181. for (pirq = 0; pirq < 8; pirq++)
  1182. if (ints & (1 << pirq))
  1183. break;
  1184. pmu_irq_stats[pirq]++;
  1185. i++;
  1186. ints &= ~(1 << pirq);
  1187. /* Note: for some reason, we get an interrupt with len=1,
  1188. * data[0]==0 after each normal ADB interrupt, at least
  1189. * on the Pismo. Still investigating... --BenH
  1190. */
  1191. if ((1 << pirq) & PMU_INT_ADB) {
  1192. if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
  1193. struct adb_request *req = req_awaiting_reply;
  1194. if (!req) {
  1195. printk(KERN_ERR "PMU: extra ADB reply\n");
  1196. return;
  1197. }
  1198. req_awaiting_reply = NULL;
  1199. if (len <= 2)
  1200. req->reply_len = 0;
  1201. else {
  1202. memcpy(req->reply, data + 1, len - 1);
  1203. req->reply_len = len - 1;
  1204. }
  1205. pmu_done(req);
  1206. } else {
  1207. if (len == 4 && data[1] == 0x2c) {
  1208. extern int xmon_wants_key, xmon_adb_keycode;
  1209. if (xmon_wants_key) {
  1210. xmon_adb_keycode = data[2];
  1211. return;
  1212. }
  1213. }
  1214. #ifdef CONFIG_ADB
  1215. /*
  1216. * XXX On the [23]400 the PMU gives us an up
  1217. * event for keycodes 0x74 or 0x75 when the PC
  1218. * card eject buttons are released, so we
  1219. * ignore those events.
  1220. */
  1221. if (!(pmu_kind == PMU_OHARE_BASED && len == 4
  1222. && data[1] == 0x2c && data[3] == 0xff
  1223. && (data[2] & ~1) == 0xf4))
  1224. adb_input(data+1, len-1, 1);
  1225. #endif /* CONFIG_ADB */
  1226. }
  1227. }
  1228. /* Sound/brightness button pressed */
  1229. else if ((1 << pirq) & PMU_INT_SNDBRT) {
  1230. #ifdef CONFIG_PMAC_BACKLIGHT
  1231. if (len == 3)
  1232. pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
  1233. #endif
  1234. }
  1235. /* Tick interrupt */
  1236. else if ((1 << pirq) & PMU_INT_TICK) {
  1237. /* Environement or tick interrupt, query batteries */
  1238. if (pmu_battery_count) {
  1239. if ((--query_batt_timer) == 0) {
  1240. query_battery_state();
  1241. query_batt_timer = BATTERY_POLLING_COUNT;
  1242. }
  1243. }
  1244. }
  1245. else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
  1246. if (pmu_battery_count)
  1247. query_battery_state();
  1248. pmu_pass_intr(data, len);
  1249. /* len == 6 is probably a bad check. But how do I
  1250. * know what PMU versions send what events here? */
  1251. if (len == 6) {
  1252. via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
  1253. via_pmu_event(PMU_EVT_LID, data[1]&1);
  1254. }
  1255. } else {
  1256. pmu_pass_intr(data, len);
  1257. }
  1258. goto next;
  1259. }
  1260. static struct adb_request*
  1261. pmu_sr_intr(void)
  1262. {
  1263. struct adb_request *req;
  1264. int bite = 0;
  1265. if (via[B] & TREQ) {
  1266. printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
  1267. out_8(&via[IFR], SR_INT);
  1268. return NULL;
  1269. }
  1270. /* The ack may not yet be low when we get the interrupt */
  1271. while ((in_8(&via[B]) & TACK) != 0)
  1272. ;
  1273. /* if reading grab the byte, and reset the interrupt */
  1274. if (pmu_state == reading || pmu_state == reading_intr)
  1275. bite = in_8(&via[SR]);
  1276. /* reset TREQ and wait for TACK to go high */
  1277. out_8(&via[B], in_8(&via[B]) | TREQ);
  1278. wait_for_ack();
  1279. switch (pmu_state) {
  1280. case sending:
  1281. req = current_req;
  1282. if (data_len < 0) {
  1283. data_len = req->nbytes - 1;
  1284. send_byte(data_len);
  1285. break;
  1286. }
  1287. if (data_index <= data_len) {
  1288. send_byte(req->data[data_index++]);
  1289. break;
  1290. }
  1291. req->sent = 1;
  1292. data_len = pmu_data_len[req->data[0]][1];
  1293. if (data_len == 0) {
  1294. pmu_state = idle;
  1295. current_req = req->next;
  1296. if (req->reply_expected)
  1297. req_awaiting_reply = req;
  1298. else
  1299. return req;
  1300. } else {
  1301. pmu_state = reading;
  1302. data_index = 0;
  1303. reply_ptr = req->reply + req->reply_len;
  1304. recv_byte();
  1305. }
  1306. break;
  1307. case intack:
  1308. data_index = 0;
  1309. data_len = -1;
  1310. pmu_state = reading_intr;
  1311. reply_ptr = interrupt_data[int_data_last];
  1312. recv_byte();
  1313. if (gpio_irq >= 0 && !gpio_irq_enabled) {
  1314. enable_irq(gpio_irq);
  1315. gpio_irq_enabled = 1;
  1316. }
  1317. break;
  1318. case reading:
  1319. case reading_intr:
  1320. if (data_len == -1) {
  1321. data_len = bite;
  1322. if (bite > 32)
  1323. printk(KERN_ERR "PMU: bad reply len %d\n", bite);
  1324. } else if (data_index < 32) {
  1325. reply_ptr[data_index++] = bite;
  1326. }
  1327. if (data_index < data_len) {
  1328. recv_byte();
  1329. break;
  1330. }
  1331. if (pmu_state == reading_intr) {
  1332. pmu_state = idle;
  1333. int_data_state[int_data_last] = int_data_ready;
  1334. interrupt_data_len[int_data_last] = data_len;
  1335. } else {
  1336. req = current_req;
  1337. /*
  1338. * For PMU sleep and freq change requests, we lock the
  1339. * PMU until it's explicitly unlocked. This avoids any
  1340. * spurrious event polling getting in
  1341. */
  1342. current_req = req->next;
  1343. req->reply_len += data_index;
  1344. if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
  1345. pmu_state = locked;
  1346. else
  1347. pmu_state = idle;
  1348. return req;
  1349. }
  1350. break;
  1351. default:
  1352. printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
  1353. pmu_state);
  1354. }
  1355. return NULL;
  1356. }
  1357. static irqreturn_t
  1358. via_pmu_interrupt(int irq, void *arg)
  1359. {
  1360. unsigned long flags;
  1361. int intr;
  1362. int nloop = 0;
  1363. int int_data = -1;
  1364. struct adb_request *req = NULL;
  1365. int handled = 0;
  1366. /* This is a bit brutal, we can probably do better */
  1367. spin_lock_irqsave(&pmu_lock, flags);
  1368. ++disable_poll;
  1369. for (;;) {
  1370. intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
  1371. if (intr == 0)
  1372. break;
  1373. handled = 1;
  1374. if (++nloop > 1000) {
  1375. printk(KERN_DEBUG "PMU: stuck in intr loop, "
  1376. "intr=%x, ier=%x pmu_state=%d\n",
  1377. intr, in_8(&via[IER]), pmu_state);
  1378. break;
  1379. }
  1380. out_8(&via[IFR], intr);
  1381. if (intr & CB1_INT) {
  1382. adb_int_pending = 1;
  1383. pmu_irq_stats[0]++;
  1384. }
  1385. if (intr & SR_INT) {
  1386. req = pmu_sr_intr();
  1387. if (req)
  1388. break;
  1389. }
  1390. }
  1391. recheck:
  1392. if (pmu_state == idle) {
  1393. if (adb_int_pending) {
  1394. if (int_data_state[0] == int_data_empty)
  1395. int_data_last = 0;
  1396. else if (int_data_state[1] == int_data_empty)
  1397. int_data_last = 1;
  1398. else
  1399. goto no_free_slot;
  1400. pmu_state = intack;
  1401. int_data_state[int_data_last] = int_data_fill;
  1402. /* Sounds safer to make sure ACK is high before writing.
  1403. * This helped kill a problem with ADB and some iBooks
  1404. */
  1405. wait_for_ack();
  1406. send_byte(PMU_INT_ACK);
  1407. adb_int_pending = 0;
  1408. } else if (current_req)
  1409. pmu_start();
  1410. }
  1411. no_free_slot:
  1412. /* Mark the oldest buffer for flushing */
  1413. if (int_data_state[!int_data_last] == int_data_ready) {
  1414. int_data_state[!int_data_last] = int_data_flush;
  1415. int_data = !int_data_last;
  1416. } else if (int_data_state[int_data_last] == int_data_ready) {
  1417. int_data_state[int_data_last] = int_data_flush;
  1418. int_data = int_data_last;
  1419. }
  1420. --disable_poll;
  1421. spin_unlock_irqrestore(&pmu_lock, flags);
  1422. /* Deal with completed PMU requests outside of the lock */
  1423. if (req) {
  1424. pmu_done(req);
  1425. req = NULL;
  1426. }
  1427. /* Deal with interrupt datas outside of the lock */
  1428. if (int_data >= 0) {
  1429. pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
  1430. spin_lock_irqsave(&pmu_lock, flags);
  1431. ++disable_poll;
  1432. int_data_state[int_data] = int_data_empty;
  1433. int_data = -1;
  1434. goto recheck;
  1435. }
  1436. return IRQ_RETVAL(handled);
  1437. }
  1438. void
  1439. pmu_unlock(void)
  1440. {
  1441. unsigned long flags;
  1442. spin_lock_irqsave(&pmu_lock, flags);
  1443. if (pmu_state == locked)
  1444. pmu_state = idle;
  1445. adb_int_pending = 1;
  1446. spin_unlock_irqrestore(&pmu_lock, flags);
  1447. }
  1448. static irqreturn_t
  1449. gpio1_interrupt(int irq, void *arg)
  1450. {
  1451. unsigned long flags;
  1452. if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
  1453. spin_lock_irqsave(&pmu_lock, flags);
  1454. if (gpio_irq_enabled > 0) {
  1455. disable_irq_nosync(gpio_irq);
  1456. gpio_irq_enabled = 0;
  1457. }
  1458. pmu_irq_stats[1]++;
  1459. adb_int_pending = 1;
  1460. spin_unlock_irqrestore(&pmu_lock, flags);
  1461. via_pmu_interrupt(0, NULL);
  1462. return IRQ_HANDLED;
  1463. }
  1464. return IRQ_NONE;
  1465. }
  1466. void
  1467. pmu_enable_irled(int on)
  1468. {
  1469. struct adb_request req;
  1470. if (vias == NULL)
  1471. return ;
  1472. if (pmu_kind == PMU_KEYLARGO_BASED)
  1473. return ;
  1474. pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
  1475. (on ? PMU_POW_ON : PMU_POW_OFF));
  1476. pmu_wait_complete(&req);
  1477. }
  1478. void
  1479. pmu_restart(void)
  1480. {
  1481. struct adb_request req;
  1482. if (via == NULL)
  1483. return;
  1484. local_irq_disable();
  1485. drop_interrupts = 1;
  1486. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1487. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1488. PMU_INT_TICK );
  1489. while(!req.complete)
  1490. pmu_poll();
  1491. }
  1492. pmu_request(&req, NULL, 1, PMU_RESET);
  1493. pmu_wait_complete(&req);
  1494. for (;;)
  1495. ;
  1496. }
  1497. void
  1498. pmu_shutdown(void)
  1499. {
  1500. struct adb_request req;
  1501. if (via == NULL)
  1502. return;
  1503. local_irq_disable();
  1504. drop_interrupts = 1;
  1505. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1506. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1507. PMU_INT_TICK );
  1508. pmu_wait_complete(&req);
  1509. } else {
  1510. /* Disable server mode on shutdown or we'll just
  1511. * wake up again
  1512. */
  1513. pmu_set_server_mode(0);
  1514. }
  1515. pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
  1516. 'M', 'A', 'T', 'T');
  1517. pmu_wait_complete(&req);
  1518. for (;;)
  1519. ;
  1520. }
  1521. int
  1522. pmu_present(void)
  1523. {
  1524. return via != NULL;
  1525. }
  1526. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1527. /*
  1528. * Put the powerbook to sleep.
  1529. */
  1530. static u32 save_via[8];
  1531. static void
  1532. save_via_state(void)
  1533. {
  1534. save_via[0] = in_8(&via[ANH]);
  1535. save_via[1] = in_8(&via[DIRA]);
  1536. save_via[2] = in_8(&via[B]);
  1537. save_via[3] = in_8(&via[DIRB]);
  1538. save_via[4] = in_8(&via[PCR]);
  1539. save_via[5] = in_8(&via[ACR]);
  1540. save_via[6] = in_8(&via[T1CL]);
  1541. save_via[7] = in_8(&via[T1CH]);
  1542. }
  1543. static void
  1544. restore_via_state(void)
  1545. {
  1546. out_8(&via[ANH], save_via[0]);
  1547. out_8(&via[DIRA], save_via[1]);
  1548. out_8(&via[B], save_via[2]);
  1549. out_8(&via[DIRB], save_via[3]);
  1550. out_8(&via[PCR], save_via[4]);
  1551. out_8(&via[ACR], save_via[5]);
  1552. out_8(&via[T1CL], save_via[6]);
  1553. out_8(&via[T1CH], save_via[7]);
  1554. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  1555. out_8(&via[IFR], 0x7f); /* clear IFR */
  1556. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  1557. }
  1558. #define GRACKLE_PM (1<<7)
  1559. #define GRACKLE_DOZE (1<<5)
  1560. #define GRACKLE_NAP (1<<4)
  1561. #define GRACKLE_SLEEP (1<<3)
  1562. static int powerbook_sleep_grackle(void)
  1563. {
  1564. unsigned long save_l2cr;
  1565. unsigned short pmcr1;
  1566. struct adb_request req;
  1567. struct pci_dev *grackle;
  1568. grackle = pci_get_domain_bus_and_slot(0, 0, 0);
  1569. if (!grackle)
  1570. return -ENODEV;
  1571. /* Turn off various things. Darwin does some retry tests here... */
  1572. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
  1573. pmu_wait_complete(&req);
  1574. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1575. PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1576. pmu_wait_complete(&req);
  1577. /* For 750, save backside cache setting and disable it */
  1578. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1579. if (!__fake_sleep) {
  1580. /* Ask the PMU to put us to sleep */
  1581. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1582. pmu_wait_complete(&req);
  1583. }
  1584. /* The VIA is supposed not to be restored correctly*/
  1585. save_via_state();
  1586. /* We shut down some HW */
  1587. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  1588. pci_read_config_word(grackle, 0x70, &pmcr1);
  1589. /* Apparently, MacOS uses NAP mode for Grackle ??? */
  1590. pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
  1591. pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
  1592. pci_write_config_word(grackle, 0x70, pmcr1);
  1593. /* Call low-level ASM sleep handler */
  1594. if (__fake_sleep)
  1595. mdelay(5000);
  1596. else
  1597. low_sleep_handler();
  1598. /* We're awake again, stop grackle PM */
  1599. pci_read_config_word(grackle, 0x70, &pmcr1);
  1600. pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
  1601. pci_write_config_word(grackle, 0x70, pmcr1);
  1602. pci_dev_put(grackle);
  1603. /* Make sure the PMU is idle */
  1604. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  1605. restore_via_state();
  1606. /* Restore L2 cache */
  1607. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1608. _set_L2CR(save_l2cr);
  1609. /* Restore userland MMU context */
  1610. switch_mmu_context(NULL, current->active_mm, NULL);
  1611. /* Power things up */
  1612. pmu_unlock();
  1613. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1614. pmu_wait_complete(&req);
  1615. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
  1616. PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
  1617. pmu_wait_complete(&req);
  1618. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1619. PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1620. pmu_wait_complete(&req);
  1621. return 0;
  1622. }
  1623. static int
  1624. powerbook_sleep_Core99(void)
  1625. {
  1626. unsigned long save_l2cr;
  1627. unsigned long save_l3cr;
  1628. struct adb_request req;
  1629. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
  1630. printk(KERN_ERR "Sleep mode not supported on this machine\n");
  1631. return -ENOSYS;
  1632. }
  1633. if (num_online_cpus() > 1 || cpu_is_offline(0))
  1634. return -EAGAIN;
  1635. /* Stop environment and ADB interrupts */
  1636. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  1637. pmu_wait_complete(&req);
  1638. /* Tell PMU what events will wake us up */
  1639. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
  1640. 0xff, 0xff);
  1641. pmu_wait_complete(&req);
  1642. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
  1643. 0, PMU_PWR_WAKEUP_KEY |
  1644. (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
  1645. pmu_wait_complete(&req);
  1646. /* Save the state of the L2 and L3 caches */
  1647. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  1648. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1649. if (!__fake_sleep) {
  1650. /* Ask the PMU to put us to sleep */
  1651. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1652. pmu_wait_complete(&req);
  1653. }
  1654. /* The VIA is supposed not to be restored correctly*/
  1655. save_via_state();
  1656. /* Shut down various ASICs. There's a chance that we can no longer
  1657. * talk to the PMU after this, so I moved it to _after_ sending the
  1658. * sleep command to it. Still need to be checked.
  1659. */
  1660. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1661. /* Call low-level ASM sleep handler */
  1662. if (__fake_sleep)
  1663. mdelay(5000);
  1664. else
  1665. low_sleep_handler();
  1666. /* Restore Apple core ASICs state */
  1667. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1668. /* Restore VIA */
  1669. restore_via_state();
  1670. /* tweak LPJ before cpufreq is there */
  1671. loops_per_jiffy *= 2;
  1672. /* Restore video */
  1673. pmac_call_early_video_resume();
  1674. /* Restore L2 cache */
  1675. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1676. _set_L2CR(save_l2cr);
  1677. /* Restore L3 cache */
  1678. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  1679. _set_L3CR(save_l3cr);
  1680. /* Restore userland MMU context */
  1681. switch_mmu_context(NULL, current->active_mm, NULL);
  1682. /* Tell PMU we are ready */
  1683. pmu_unlock();
  1684. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  1685. pmu_wait_complete(&req);
  1686. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1687. pmu_wait_complete(&req);
  1688. /* Restore LPJ, cpufreq will adjust the cpu frequency */
  1689. loops_per_jiffy /= 2;
  1690. return 0;
  1691. }
  1692. #define PB3400_MEM_CTRL 0xf8000000
  1693. #define PB3400_MEM_CTRL_SLEEP 0x70
  1694. static void __iomem *pb3400_mem_ctrl;
  1695. static void powerbook_sleep_init_3400(void)
  1696. {
  1697. /* map in the memory controller registers */
  1698. pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
  1699. if (pb3400_mem_ctrl == NULL)
  1700. printk(KERN_WARNING "ioremap failed: sleep won't be possible");
  1701. }
  1702. static int powerbook_sleep_3400(void)
  1703. {
  1704. int i, x;
  1705. unsigned int hid0;
  1706. unsigned long msr;
  1707. struct adb_request sleep_req;
  1708. unsigned int __iomem *mem_ctrl_sleep;
  1709. if (pb3400_mem_ctrl == NULL)
  1710. return -ENOMEM;
  1711. mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
  1712. /* Set the memory controller to keep the memory refreshed
  1713. while we're asleep */
  1714. for (i = 0x403f; i >= 0x4000; --i) {
  1715. out_be32(mem_ctrl_sleep, i);
  1716. do {
  1717. x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
  1718. } while (x == 0);
  1719. if (x >= 0x100)
  1720. break;
  1721. }
  1722. /* Ask the PMU to put us to sleep */
  1723. pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1724. pmu_wait_complete(&sleep_req);
  1725. pmu_unlock();
  1726. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1727. asleep = 1;
  1728. /* Put the CPU into sleep mode */
  1729. hid0 = mfspr(SPRN_HID0);
  1730. hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
  1731. mtspr(SPRN_HID0, hid0);
  1732. local_irq_enable();
  1733. msr = mfmsr() | MSR_POW;
  1734. while (asleep) {
  1735. mb();
  1736. mtmsr(msr);
  1737. isync();
  1738. }
  1739. local_irq_disable();
  1740. /* OK, we're awake again, start restoring things */
  1741. out_be32(mem_ctrl_sleep, 0x3f);
  1742. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1743. return 0;
  1744. }
  1745. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  1746. /*
  1747. * Support for /dev/pmu device
  1748. */
  1749. #define RB_SIZE 0x10
  1750. struct pmu_private {
  1751. struct list_head list;
  1752. int rb_get;
  1753. int rb_put;
  1754. struct rb_entry {
  1755. unsigned short len;
  1756. unsigned char data[16];
  1757. } rb_buf[RB_SIZE];
  1758. wait_queue_head_t wait;
  1759. spinlock_t lock;
  1760. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1761. int backlight_locker;
  1762. #endif
  1763. };
  1764. static LIST_HEAD(all_pmu_pvt);
  1765. static DEFINE_SPINLOCK(all_pvt_lock);
  1766. static void
  1767. pmu_pass_intr(unsigned char *data, int len)
  1768. {
  1769. struct pmu_private *pp;
  1770. struct list_head *list;
  1771. int i;
  1772. unsigned long flags;
  1773. if (len > sizeof(pp->rb_buf[0].data))
  1774. len = sizeof(pp->rb_buf[0].data);
  1775. spin_lock_irqsave(&all_pvt_lock, flags);
  1776. for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
  1777. pp = list_entry(list, struct pmu_private, list);
  1778. spin_lock(&pp->lock);
  1779. i = pp->rb_put + 1;
  1780. if (i >= RB_SIZE)
  1781. i = 0;
  1782. if (i != pp->rb_get) {
  1783. struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
  1784. rp->len = len;
  1785. memcpy(rp->data, data, len);
  1786. pp->rb_put = i;
  1787. wake_up_interruptible(&pp->wait);
  1788. }
  1789. spin_unlock(&pp->lock);
  1790. }
  1791. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1792. }
  1793. static int
  1794. pmu_open(struct inode *inode, struct file *file)
  1795. {
  1796. struct pmu_private *pp;
  1797. unsigned long flags;
  1798. pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
  1799. if (!pp)
  1800. return -ENOMEM;
  1801. pp->rb_get = pp->rb_put = 0;
  1802. spin_lock_init(&pp->lock);
  1803. init_waitqueue_head(&pp->wait);
  1804. mutex_lock(&pmu_info_proc_mutex);
  1805. spin_lock_irqsave(&all_pvt_lock, flags);
  1806. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1807. pp->backlight_locker = 0;
  1808. #endif
  1809. list_add(&pp->list, &all_pmu_pvt);
  1810. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1811. file->private_data = pp;
  1812. mutex_unlock(&pmu_info_proc_mutex);
  1813. return 0;
  1814. }
  1815. static ssize_t
  1816. pmu_read(struct file *file, char __user *buf,
  1817. size_t count, loff_t *ppos)
  1818. {
  1819. struct pmu_private *pp = file->private_data;
  1820. DECLARE_WAITQUEUE(wait, current);
  1821. unsigned long flags;
  1822. int ret = 0;
  1823. if (count < 1 || !pp)
  1824. return -EINVAL;
  1825. if (!access_ok(VERIFY_WRITE, buf, count))
  1826. return -EFAULT;
  1827. spin_lock_irqsave(&pp->lock, flags);
  1828. add_wait_queue(&pp->wait, &wait);
  1829. set_current_state(TASK_INTERRUPTIBLE);
  1830. for (;;) {
  1831. ret = -EAGAIN;
  1832. if (pp->rb_get != pp->rb_put) {
  1833. int i = pp->rb_get;
  1834. struct rb_entry *rp = &pp->rb_buf[i];
  1835. ret = rp->len;
  1836. spin_unlock_irqrestore(&pp->lock, flags);
  1837. if (ret > count)
  1838. ret = count;
  1839. if (ret > 0 && copy_to_user(buf, rp->data, ret))
  1840. ret = -EFAULT;
  1841. if (++i >= RB_SIZE)
  1842. i = 0;
  1843. spin_lock_irqsave(&pp->lock, flags);
  1844. pp->rb_get = i;
  1845. }
  1846. if (ret >= 0)
  1847. break;
  1848. if (file->f_flags & O_NONBLOCK)
  1849. break;
  1850. ret = -ERESTARTSYS;
  1851. if (signal_pending(current))
  1852. break;
  1853. spin_unlock_irqrestore(&pp->lock, flags);
  1854. schedule();
  1855. spin_lock_irqsave(&pp->lock, flags);
  1856. }
  1857. __set_current_state(TASK_RUNNING);
  1858. remove_wait_queue(&pp->wait, &wait);
  1859. spin_unlock_irqrestore(&pp->lock, flags);
  1860. return ret;
  1861. }
  1862. static ssize_t
  1863. pmu_write(struct file *file, const char __user *buf,
  1864. size_t count, loff_t *ppos)
  1865. {
  1866. return 0;
  1867. }
  1868. static __poll_t
  1869. pmu_fpoll(struct file *filp, poll_table *wait)
  1870. {
  1871. struct pmu_private *pp = filp->private_data;
  1872. __poll_t mask = 0;
  1873. unsigned long flags;
  1874. if (!pp)
  1875. return 0;
  1876. poll_wait(filp, &pp->wait, wait);
  1877. spin_lock_irqsave(&pp->lock, flags);
  1878. if (pp->rb_get != pp->rb_put)
  1879. mask |= EPOLLIN;
  1880. spin_unlock_irqrestore(&pp->lock, flags);
  1881. return mask;
  1882. }
  1883. static int
  1884. pmu_release(struct inode *inode, struct file *file)
  1885. {
  1886. struct pmu_private *pp = file->private_data;
  1887. unsigned long flags;
  1888. if (pp) {
  1889. file->private_data = NULL;
  1890. spin_lock_irqsave(&all_pvt_lock, flags);
  1891. list_del(&pp->list);
  1892. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1893. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1894. if (pp->backlight_locker)
  1895. pmac_backlight_enable();
  1896. #endif
  1897. kfree(pp);
  1898. }
  1899. return 0;
  1900. }
  1901. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1902. static void pmac_suspend_disable_irqs(void)
  1903. {
  1904. /* Call platform functions marked "on sleep" */
  1905. pmac_pfunc_i2c_suspend();
  1906. pmac_pfunc_base_suspend();
  1907. }
  1908. static int powerbook_sleep(suspend_state_t state)
  1909. {
  1910. int error = 0;
  1911. /* Wait for completion of async requests */
  1912. while (!batt_req.complete)
  1913. pmu_poll();
  1914. /* Giveup the lazy FPU & vec so we don't have to back them
  1915. * up from the low level code
  1916. */
  1917. enable_kernel_fp();
  1918. #ifdef CONFIG_ALTIVEC
  1919. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  1920. enable_kernel_altivec();
  1921. #endif /* CONFIG_ALTIVEC */
  1922. switch (pmu_kind) {
  1923. case PMU_OHARE_BASED:
  1924. error = powerbook_sleep_3400();
  1925. break;
  1926. case PMU_HEATHROW_BASED:
  1927. case PMU_PADDINGTON_BASED:
  1928. error = powerbook_sleep_grackle();
  1929. break;
  1930. case PMU_KEYLARGO_BASED:
  1931. error = powerbook_sleep_Core99();
  1932. break;
  1933. default:
  1934. return -ENOSYS;
  1935. }
  1936. if (error)
  1937. return error;
  1938. mdelay(100);
  1939. return 0;
  1940. }
  1941. static void pmac_suspend_enable_irqs(void)
  1942. {
  1943. /* Force a poll of ADB interrupts */
  1944. adb_int_pending = 1;
  1945. via_pmu_interrupt(0, NULL);
  1946. mdelay(10);
  1947. /* Call platform functions marked "on wake" */
  1948. pmac_pfunc_base_resume();
  1949. pmac_pfunc_i2c_resume();
  1950. }
  1951. static int pmu_sleep_valid(suspend_state_t state)
  1952. {
  1953. return state == PM_SUSPEND_MEM
  1954. && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
  1955. }
  1956. static const struct platform_suspend_ops pmu_pm_ops = {
  1957. .enter = powerbook_sleep,
  1958. .valid = pmu_sleep_valid,
  1959. };
  1960. static int register_pmu_pm_ops(void)
  1961. {
  1962. if (pmu_kind == PMU_OHARE_BASED)
  1963. powerbook_sleep_init_3400();
  1964. ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
  1965. ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
  1966. suspend_set_ops(&pmu_pm_ops);
  1967. return 0;
  1968. }
  1969. device_initcall(register_pmu_pm_ops);
  1970. #endif
  1971. static int pmu_ioctl(struct file *filp,
  1972. u_int cmd, u_long arg)
  1973. {
  1974. __u32 __user *argp = (__u32 __user *)arg;
  1975. int error = -EINVAL;
  1976. switch (cmd) {
  1977. case PMU_IOC_SLEEP:
  1978. if (!capable(CAP_SYS_ADMIN))
  1979. return -EACCES;
  1980. return pm_suspend(PM_SUSPEND_MEM);
  1981. case PMU_IOC_CAN_SLEEP:
  1982. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
  1983. return put_user(0, argp);
  1984. else
  1985. return put_user(1, argp);
  1986. #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
  1987. /* Compatibility ioctl's for backlight */
  1988. case PMU_IOC_GET_BACKLIGHT:
  1989. {
  1990. int brightness;
  1991. brightness = pmac_backlight_get_legacy_brightness();
  1992. if (brightness < 0)
  1993. return brightness;
  1994. else
  1995. return put_user(brightness, argp);
  1996. }
  1997. case PMU_IOC_SET_BACKLIGHT:
  1998. {
  1999. int brightness;
  2000. error = get_user(brightness, argp);
  2001. if (error)
  2002. return error;
  2003. return pmac_backlight_set_legacy_brightness(brightness);
  2004. }
  2005. #ifdef CONFIG_INPUT_ADBHID
  2006. case PMU_IOC_GRAB_BACKLIGHT: {
  2007. struct pmu_private *pp = filp->private_data;
  2008. if (pp->backlight_locker)
  2009. return 0;
  2010. pp->backlight_locker = 1;
  2011. pmac_backlight_disable();
  2012. return 0;
  2013. }
  2014. #endif /* CONFIG_INPUT_ADBHID */
  2015. #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
  2016. case PMU_IOC_GET_MODEL:
  2017. return put_user(pmu_kind, argp);
  2018. case PMU_IOC_HAS_ADB:
  2019. return put_user(pmu_has_adb, argp);
  2020. }
  2021. return error;
  2022. }
  2023. static long pmu_unlocked_ioctl(struct file *filp,
  2024. u_int cmd, u_long arg)
  2025. {
  2026. int ret;
  2027. mutex_lock(&pmu_info_proc_mutex);
  2028. ret = pmu_ioctl(filp, cmd, arg);
  2029. mutex_unlock(&pmu_info_proc_mutex);
  2030. return ret;
  2031. }
  2032. #ifdef CONFIG_COMPAT
  2033. #define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
  2034. #define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
  2035. #define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
  2036. #define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
  2037. #define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
  2038. #define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
  2039. static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
  2040. {
  2041. switch (cmd) {
  2042. case PMU_IOC_SLEEP:
  2043. break;
  2044. case PMU_IOC_GET_BACKLIGHT32:
  2045. cmd = PMU_IOC_GET_BACKLIGHT;
  2046. break;
  2047. case PMU_IOC_SET_BACKLIGHT32:
  2048. cmd = PMU_IOC_SET_BACKLIGHT;
  2049. break;
  2050. case PMU_IOC_GET_MODEL32:
  2051. cmd = PMU_IOC_GET_MODEL;
  2052. break;
  2053. case PMU_IOC_HAS_ADB32:
  2054. cmd = PMU_IOC_HAS_ADB;
  2055. break;
  2056. case PMU_IOC_CAN_SLEEP32:
  2057. cmd = PMU_IOC_CAN_SLEEP;
  2058. break;
  2059. case PMU_IOC_GRAB_BACKLIGHT32:
  2060. cmd = PMU_IOC_GRAB_BACKLIGHT;
  2061. break;
  2062. default:
  2063. return -ENOIOCTLCMD;
  2064. }
  2065. return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
  2066. }
  2067. #endif
  2068. static const struct file_operations pmu_device_fops = {
  2069. .read = pmu_read,
  2070. .write = pmu_write,
  2071. .poll = pmu_fpoll,
  2072. .unlocked_ioctl = pmu_unlocked_ioctl,
  2073. #ifdef CONFIG_COMPAT
  2074. .compat_ioctl = compat_pmu_ioctl,
  2075. #endif
  2076. .open = pmu_open,
  2077. .release = pmu_release,
  2078. .llseek = noop_llseek,
  2079. };
  2080. static struct miscdevice pmu_device = {
  2081. PMU_MINOR, "pmu", &pmu_device_fops
  2082. };
  2083. static int pmu_device_init(void)
  2084. {
  2085. if (!via)
  2086. return 0;
  2087. if (misc_register(&pmu_device) < 0)
  2088. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  2089. return 0;
  2090. }
  2091. device_initcall(pmu_device_init);
  2092. #ifdef DEBUG_SLEEP
  2093. static inline void
  2094. polled_handshake(volatile unsigned char __iomem *via)
  2095. {
  2096. via[B] &= ~TREQ; eieio();
  2097. while ((via[B] & TACK) != 0)
  2098. ;
  2099. via[B] |= TREQ; eieio();
  2100. while ((via[B] & TACK) == 0)
  2101. ;
  2102. }
  2103. static inline void
  2104. polled_send_byte(volatile unsigned char __iomem *via, int x)
  2105. {
  2106. via[ACR] |= SR_OUT | SR_EXT; eieio();
  2107. via[SR] = x; eieio();
  2108. polled_handshake(via);
  2109. }
  2110. static inline int
  2111. polled_recv_byte(volatile unsigned char __iomem *via)
  2112. {
  2113. int x;
  2114. via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
  2115. x = via[SR]; eieio();
  2116. polled_handshake(via);
  2117. x = via[SR]; eieio();
  2118. return x;
  2119. }
  2120. int
  2121. pmu_polled_request(struct adb_request *req)
  2122. {
  2123. unsigned long flags;
  2124. int i, l, c;
  2125. volatile unsigned char __iomem *v = via;
  2126. req->complete = 1;
  2127. c = req->data[0];
  2128. l = pmu_data_len[c][0];
  2129. if (l >= 0 && req->nbytes != l + 1)
  2130. return -EINVAL;
  2131. local_irq_save(flags);
  2132. while (pmu_state != idle)
  2133. pmu_poll();
  2134. while ((via[B] & TACK) == 0)
  2135. ;
  2136. polled_send_byte(v, c);
  2137. if (l < 0) {
  2138. l = req->nbytes - 1;
  2139. polled_send_byte(v, l);
  2140. }
  2141. for (i = 1; i <= l; ++i)
  2142. polled_send_byte(v, req->data[i]);
  2143. l = pmu_data_len[c][1];
  2144. if (l < 0)
  2145. l = polled_recv_byte(v);
  2146. for (i = 0; i < l; ++i)
  2147. req->reply[i + req->reply_len] = polled_recv_byte(v);
  2148. if (req->done)
  2149. (*req->done)(req);
  2150. local_irq_restore(flags);
  2151. return 0;
  2152. }
  2153. /* N.B. This doesn't work on the 3400 */
  2154. void pmu_blink(int n)
  2155. {
  2156. struct adb_request req;
  2157. memset(&req, 0, sizeof(req));
  2158. for (; n > 0; --n) {
  2159. req.nbytes = 4;
  2160. req.done = NULL;
  2161. req.data[0] = 0xee;
  2162. req.data[1] = 4;
  2163. req.data[2] = 0;
  2164. req.data[3] = 1;
  2165. req.reply[0] = ADB_RET_OK;
  2166. req.reply_len = 1;
  2167. req.reply_expected = 0;
  2168. pmu_polled_request(&req);
  2169. mdelay(50);
  2170. req.nbytes = 4;
  2171. req.done = NULL;
  2172. req.data[0] = 0xee;
  2173. req.data[1] = 4;
  2174. req.data[2] = 0;
  2175. req.data[3] = 0;
  2176. req.reply[0] = ADB_RET_OK;
  2177. req.reply_len = 1;
  2178. req.reply_expected = 0;
  2179. pmu_polled_request(&req);
  2180. mdelay(50);
  2181. }
  2182. mdelay(50);
  2183. }
  2184. #endif /* DEBUG_SLEEP */
  2185. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  2186. int pmu_sys_suspended;
  2187. static int pmu_syscore_suspend(void)
  2188. {
  2189. /* Suspend PMU event interrupts */
  2190. pmu_suspend();
  2191. pmu_sys_suspended = 1;
  2192. #ifdef CONFIG_PMAC_BACKLIGHT
  2193. /* Tell backlight code not to muck around with the chip anymore */
  2194. pmu_backlight_set_sleep(1);
  2195. #endif
  2196. return 0;
  2197. }
  2198. static void pmu_syscore_resume(void)
  2199. {
  2200. struct adb_request req;
  2201. if (!pmu_sys_suspended)
  2202. return;
  2203. /* Tell PMU we are ready */
  2204. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2205. pmu_wait_complete(&req);
  2206. #ifdef CONFIG_PMAC_BACKLIGHT
  2207. /* Tell backlight code it can use the chip again */
  2208. pmu_backlight_set_sleep(0);
  2209. #endif
  2210. /* Resume PMU event interrupts */
  2211. pmu_resume();
  2212. pmu_sys_suspended = 0;
  2213. }
  2214. static struct syscore_ops pmu_syscore_ops = {
  2215. .suspend = pmu_syscore_suspend,
  2216. .resume = pmu_syscore_resume,
  2217. };
  2218. static int pmu_syscore_register(void)
  2219. {
  2220. register_syscore_ops(&pmu_syscore_ops);
  2221. return 0;
  2222. }
  2223. subsys_initcall(pmu_syscore_register);
  2224. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  2225. EXPORT_SYMBOL(pmu_request);
  2226. EXPORT_SYMBOL(pmu_queue_request);
  2227. EXPORT_SYMBOL(pmu_poll);
  2228. EXPORT_SYMBOL(pmu_poll_adb);
  2229. EXPORT_SYMBOL(pmu_wait_complete);
  2230. EXPORT_SYMBOL(pmu_suspend);
  2231. EXPORT_SYMBOL(pmu_resume);
  2232. EXPORT_SYMBOL(pmu_unlock);
  2233. #if defined(CONFIG_PPC32)
  2234. EXPORT_SYMBOL(pmu_enable_irled);
  2235. EXPORT_SYMBOL(pmu_battery_count);
  2236. EXPORT_SYMBOL(pmu_batteries);
  2237. EXPORT_SYMBOL(pmu_power_flags);
  2238. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */