coresight-etm4x-sysfs.c 56 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright(C) 2015 Linaro Limited. All rights reserved.
  4. * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
  5. */
  6. #include <linux/pm_runtime.h>
  7. #include <linux/sysfs.h>
  8. #include "coresight-etm4x.h"
  9. #include "coresight-priv.h"
  10. static int etm4_set_mode_exclude(struct etmv4_drvdata *drvdata, bool exclude)
  11. {
  12. u8 idx;
  13. struct etmv4_config *config = &drvdata->config;
  14. idx = config->addr_idx;
  15. /*
  16. * TRCACATRn.TYPE bit[1:0]: type of comparison
  17. * the trace unit performs
  18. */
  19. if (BMVAL(config->addr_acc[idx], 0, 1) == ETM_INSTR_ADDR) {
  20. if (idx % 2 != 0)
  21. return -EINVAL;
  22. /*
  23. * We are performing instruction address comparison. Set the
  24. * relevant bit of ViewInst Include/Exclude Control register
  25. * for corresponding address comparator pair.
  26. */
  27. if (config->addr_type[idx] != ETM_ADDR_TYPE_RANGE ||
  28. config->addr_type[idx + 1] != ETM_ADDR_TYPE_RANGE)
  29. return -EINVAL;
  30. if (exclude == true) {
  31. /*
  32. * Set exclude bit and unset the include bit
  33. * corresponding to comparator pair
  34. */
  35. config->viiectlr |= BIT(idx / 2 + 16);
  36. config->viiectlr &= ~BIT(idx / 2);
  37. } else {
  38. /*
  39. * Set include bit and unset exclude bit
  40. * corresponding to comparator pair
  41. */
  42. config->viiectlr |= BIT(idx / 2);
  43. config->viiectlr &= ~BIT(idx / 2 + 16);
  44. }
  45. }
  46. return 0;
  47. }
  48. static ssize_t nr_pe_cmp_show(struct device *dev,
  49. struct device_attribute *attr,
  50. char *buf)
  51. {
  52. unsigned long val;
  53. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  54. val = drvdata->nr_pe_cmp;
  55. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  56. }
  57. static DEVICE_ATTR_RO(nr_pe_cmp);
  58. static ssize_t nr_addr_cmp_show(struct device *dev,
  59. struct device_attribute *attr,
  60. char *buf)
  61. {
  62. unsigned long val;
  63. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  64. val = drvdata->nr_addr_cmp;
  65. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  66. }
  67. static DEVICE_ATTR_RO(nr_addr_cmp);
  68. static ssize_t nr_cntr_show(struct device *dev,
  69. struct device_attribute *attr,
  70. char *buf)
  71. {
  72. unsigned long val;
  73. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  74. val = drvdata->nr_cntr;
  75. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  76. }
  77. static DEVICE_ATTR_RO(nr_cntr);
  78. static ssize_t nr_ext_inp_show(struct device *dev,
  79. struct device_attribute *attr,
  80. char *buf)
  81. {
  82. unsigned long val;
  83. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  84. val = drvdata->nr_ext_inp;
  85. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  86. }
  87. static DEVICE_ATTR_RO(nr_ext_inp);
  88. static ssize_t numcidc_show(struct device *dev,
  89. struct device_attribute *attr,
  90. char *buf)
  91. {
  92. unsigned long val;
  93. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  94. val = drvdata->numcidc;
  95. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  96. }
  97. static DEVICE_ATTR_RO(numcidc);
  98. static ssize_t numvmidc_show(struct device *dev,
  99. struct device_attribute *attr,
  100. char *buf)
  101. {
  102. unsigned long val;
  103. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  104. val = drvdata->numvmidc;
  105. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  106. }
  107. static DEVICE_ATTR_RO(numvmidc);
  108. static ssize_t nrseqstate_show(struct device *dev,
  109. struct device_attribute *attr,
  110. char *buf)
  111. {
  112. unsigned long val;
  113. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  114. val = drvdata->nrseqstate;
  115. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  116. }
  117. static DEVICE_ATTR_RO(nrseqstate);
  118. static ssize_t nr_resource_show(struct device *dev,
  119. struct device_attribute *attr,
  120. char *buf)
  121. {
  122. unsigned long val;
  123. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  124. val = drvdata->nr_resource;
  125. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  126. }
  127. static DEVICE_ATTR_RO(nr_resource);
  128. static ssize_t nr_ss_cmp_show(struct device *dev,
  129. struct device_attribute *attr,
  130. char *buf)
  131. {
  132. unsigned long val;
  133. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  134. val = drvdata->nr_ss_cmp;
  135. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  136. }
  137. static DEVICE_ATTR_RO(nr_ss_cmp);
  138. static ssize_t reset_store(struct device *dev,
  139. struct device_attribute *attr,
  140. const char *buf, size_t size)
  141. {
  142. int i;
  143. unsigned long val;
  144. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  145. struct etmv4_config *config = &drvdata->config;
  146. if (kstrtoul(buf, 16, &val))
  147. return -EINVAL;
  148. spin_lock(&drvdata->spinlock);
  149. if (val)
  150. config->mode = 0x0;
  151. /* Disable data tracing: do not trace load and store data transfers */
  152. config->mode &= ~(ETM_MODE_LOAD | ETM_MODE_STORE);
  153. config->cfg &= ~(BIT(1) | BIT(2));
  154. /* Disable data value and data address tracing */
  155. config->mode &= ~(ETM_MODE_DATA_TRACE_ADDR |
  156. ETM_MODE_DATA_TRACE_VAL);
  157. config->cfg &= ~(BIT(16) | BIT(17));
  158. /* Disable all events tracing */
  159. config->eventctrl0 = 0x0;
  160. config->eventctrl1 = 0x0;
  161. /* Disable timestamp event */
  162. config->ts_ctrl = 0x0;
  163. /* Disable stalling */
  164. config->stall_ctrl = 0x0;
  165. /* Reset trace synchronization period to 2^8 = 256 bytes*/
  166. if (drvdata->syncpr == false)
  167. config->syncfreq = 0x8;
  168. /*
  169. * Enable ViewInst to trace everything with start-stop logic in
  170. * started state. ARM recommends start-stop logic is set before
  171. * each trace run.
  172. */
  173. config->vinst_ctrl |= BIT(0);
  174. if (drvdata->nr_addr_cmp == true) {
  175. config->mode |= ETM_MODE_VIEWINST_STARTSTOP;
  176. /* SSSTATUS, bit[9] */
  177. config->vinst_ctrl |= BIT(9);
  178. }
  179. /* No address range filtering for ViewInst */
  180. config->viiectlr = 0x0;
  181. /* No start-stop filtering for ViewInst */
  182. config->vissctlr = 0x0;
  183. /* Disable seq events */
  184. for (i = 0; i < drvdata->nrseqstate-1; i++)
  185. config->seq_ctrl[i] = 0x0;
  186. config->seq_rst = 0x0;
  187. config->seq_state = 0x0;
  188. /* Disable external input events */
  189. config->ext_inp = 0x0;
  190. config->cntr_idx = 0x0;
  191. for (i = 0; i < drvdata->nr_cntr; i++) {
  192. config->cntrldvr[i] = 0x0;
  193. config->cntr_ctrl[i] = 0x0;
  194. config->cntr_val[i] = 0x0;
  195. }
  196. config->res_idx = 0x0;
  197. for (i = 0; i < drvdata->nr_resource; i++)
  198. config->res_ctrl[i] = 0x0;
  199. for (i = 0; i < drvdata->nr_ss_cmp; i++) {
  200. config->ss_ctrl[i] = 0x0;
  201. config->ss_pe_cmp[i] = 0x0;
  202. }
  203. config->addr_idx = 0x0;
  204. for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) {
  205. config->addr_val[i] = 0x0;
  206. config->addr_acc[i] = 0x0;
  207. config->addr_type[i] = ETM_ADDR_TYPE_NONE;
  208. }
  209. config->ctxid_idx = 0x0;
  210. for (i = 0; i < drvdata->numcidc; i++) {
  211. config->ctxid_pid[i] = 0x0;
  212. config->ctxid_vpid[i] = 0x0;
  213. }
  214. config->ctxid_mask0 = 0x0;
  215. config->ctxid_mask1 = 0x0;
  216. config->vmid_idx = 0x0;
  217. for (i = 0; i < drvdata->numvmidc; i++)
  218. config->vmid_val[i] = 0x0;
  219. config->vmid_mask0 = 0x0;
  220. config->vmid_mask1 = 0x0;
  221. drvdata->trcid = drvdata->cpu + 1;
  222. spin_unlock(&drvdata->spinlock);
  223. return size;
  224. }
  225. static DEVICE_ATTR_WO(reset);
  226. static ssize_t mode_show(struct device *dev,
  227. struct device_attribute *attr,
  228. char *buf)
  229. {
  230. unsigned long val;
  231. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  232. struct etmv4_config *config = &drvdata->config;
  233. val = config->mode;
  234. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  235. }
  236. static ssize_t mode_store(struct device *dev,
  237. struct device_attribute *attr,
  238. const char *buf, size_t size)
  239. {
  240. unsigned long val, mode;
  241. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  242. struct etmv4_config *config = &drvdata->config;
  243. if (kstrtoul(buf, 16, &val))
  244. return -EINVAL;
  245. spin_lock(&drvdata->spinlock);
  246. config->mode = val & ETMv4_MODE_ALL;
  247. if (config->mode & ETM_MODE_EXCLUDE)
  248. etm4_set_mode_exclude(drvdata, true);
  249. else
  250. etm4_set_mode_exclude(drvdata, false);
  251. if (drvdata->instrp0 == true) {
  252. /* start by clearing instruction P0 field */
  253. config->cfg &= ~(BIT(1) | BIT(2));
  254. if (config->mode & ETM_MODE_LOAD)
  255. /* 0b01 Trace load instructions as P0 instructions */
  256. config->cfg |= BIT(1);
  257. if (config->mode & ETM_MODE_STORE)
  258. /* 0b10 Trace store instructions as P0 instructions */
  259. config->cfg |= BIT(2);
  260. if (config->mode & ETM_MODE_LOAD_STORE)
  261. /*
  262. * 0b11 Trace load and store instructions
  263. * as P0 instructions
  264. */
  265. config->cfg |= BIT(1) | BIT(2);
  266. }
  267. /* bit[3], Branch broadcast mode */
  268. if ((config->mode & ETM_MODE_BB) && (drvdata->trcbb == true))
  269. config->cfg |= BIT(3);
  270. else
  271. config->cfg &= ~BIT(3);
  272. /* bit[4], Cycle counting instruction trace bit */
  273. if ((config->mode & ETMv4_MODE_CYCACC) &&
  274. (drvdata->trccci == true))
  275. config->cfg |= BIT(4);
  276. else
  277. config->cfg &= ~BIT(4);
  278. /* bit[6], Context ID tracing bit */
  279. if ((config->mode & ETMv4_MODE_CTXID) && (drvdata->ctxid_size))
  280. config->cfg |= BIT(6);
  281. else
  282. config->cfg &= ~BIT(6);
  283. if ((config->mode & ETM_MODE_VMID) && (drvdata->vmid_size))
  284. config->cfg |= BIT(7);
  285. else
  286. config->cfg &= ~BIT(7);
  287. /* bits[10:8], Conditional instruction tracing bit */
  288. mode = ETM_MODE_COND(config->mode);
  289. if (drvdata->trccond == true) {
  290. config->cfg &= ~(BIT(8) | BIT(9) | BIT(10));
  291. config->cfg |= mode << 8;
  292. }
  293. /* bit[11], Global timestamp tracing bit */
  294. if ((config->mode & ETMv4_MODE_TIMESTAMP) && (drvdata->ts_size))
  295. config->cfg |= BIT(11);
  296. else
  297. config->cfg &= ~BIT(11);
  298. /* bit[12], Return stack enable bit */
  299. if ((config->mode & ETM_MODE_RETURNSTACK) &&
  300. (drvdata->retstack == true))
  301. config->cfg |= BIT(12);
  302. else
  303. config->cfg &= ~BIT(12);
  304. /* bits[14:13], Q element enable field */
  305. mode = ETM_MODE_QELEM(config->mode);
  306. /* start by clearing QE bits */
  307. config->cfg &= ~(BIT(13) | BIT(14));
  308. /* if supported, Q elements with instruction counts are enabled */
  309. if ((mode & BIT(0)) && (drvdata->q_support & BIT(0)))
  310. config->cfg |= BIT(13);
  311. /*
  312. * if supported, Q elements with and without instruction
  313. * counts are enabled
  314. */
  315. if ((mode & BIT(1)) && (drvdata->q_support & BIT(1)))
  316. config->cfg |= BIT(14);
  317. /* bit[11], AMBA Trace Bus (ATB) trigger enable bit */
  318. if ((config->mode & ETM_MODE_ATB_TRIGGER) &&
  319. (drvdata->atbtrig == true))
  320. config->eventctrl1 |= BIT(11);
  321. else
  322. config->eventctrl1 &= ~BIT(11);
  323. /* bit[12], Low-power state behavior override bit */
  324. if ((config->mode & ETM_MODE_LPOVERRIDE) &&
  325. (drvdata->lpoverride == true))
  326. config->eventctrl1 |= BIT(12);
  327. else
  328. config->eventctrl1 &= ~BIT(12);
  329. /* bit[8], Instruction stall bit */
  330. if (config->mode & ETM_MODE_ISTALL_EN)
  331. config->stall_ctrl |= BIT(8);
  332. else
  333. config->stall_ctrl &= ~BIT(8);
  334. /* bit[10], Prioritize instruction trace bit */
  335. if (config->mode & ETM_MODE_INSTPRIO)
  336. config->stall_ctrl |= BIT(10);
  337. else
  338. config->stall_ctrl &= ~BIT(10);
  339. /* bit[13], Trace overflow prevention bit */
  340. if ((config->mode & ETM_MODE_NOOVERFLOW) &&
  341. (drvdata->nooverflow == true))
  342. config->stall_ctrl |= BIT(13);
  343. else
  344. config->stall_ctrl &= ~BIT(13);
  345. /* bit[9] Start/stop logic control bit */
  346. if (config->mode & ETM_MODE_VIEWINST_STARTSTOP)
  347. config->vinst_ctrl |= BIT(9);
  348. else
  349. config->vinst_ctrl &= ~BIT(9);
  350. /* bit[10], Whether a trace unit must trace a Reset exception */
  351. if (config->mode & ETM_MODE_TRACE_RESET)
  352. config->vinst_ctrl |= BIT(10);
  353. else
  354. config->vinst_ctrl &= ~BIT(10);
  355. /* bit[11], Whether a trace unit must trace a system error exception */
  356. if ((config->mode & ETM_MODE_TRACE_ERR) &&
  357. (drvdata->trc_error == true))
  358. config->vinst_ctrl |= BIT(11);
  359. else
  360. config->vinst_ctrl &= ~BIT(11);
  361. if (config->mode & (ETM_MODE_EXCL_KERN | ETM_MODE_EXCL_USER))
  362. etm4_config_trace_mode(config);
  363. spin_unlock(&drvdata->spinlock);
  364. return size;
  365. }
  366. static DEVICE_ATTR_RW(mode);
  367. static ssize_t pe_show(struct device *dev,
  368. struct device_attribute *attr,
  369. char *buf)
  370. {
  371. unsigned long val;
  372. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  373. struct etmv4_config *config = &drvdata->config;
  374. val = config->pe_sel;
  375. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  376. }
  377. static ssize_t pe_store(struct device *dev,
  378. struct device_attribute *attr,
  379. const char *buf, size_t size)
  380. {
  381. unsigned long val;
  382. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  383. struct etmv4_config *config = &drvdata->config;
  384. if (kstrtoul(buf, 16, &val))
  385. return -EINVAL;
  386. spin_lock(&drvdata->spinlock);
  387. if (val > drvdata->nr_pe) {
  388. spin_unlock(&drvdata->spinlock);
  389. return -EINVAL;
  390. }
  391. config->pe_sel = val;
  392. spin_unlock(&drvdata->spinlock);
  393. return size;
  394. }
  395. static DEVICE_ATTR_RW(pe);
  396. static ssize_t event_show(struct device *dev,
  397. struct device_attribute *attr,
  398. char *buf)
  399. {
  400. unsigned long val;
  401. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  402. struct etmv4_config *config = &drvdata->config;
  403. val = config->eventctrl0;
  404. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  405. }
  406. static ssize_t event_store(struct device *dev,
  407. struct device_attribute *attr,
  408. const char *buf, size_t size)
  409. {
  410. unsigned long val;
  411. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  412. struct etmv4_config *config = &drvdata->config;
  413. if (kstrtoul(buf, 16, &val))
  414. return -EINVAL;
  415. spin_lock(&drvdata->spinlock);
  416. switch (drvdata->nr_event) {
  417. case 0x0:
  418. /* EVENT0, bits[7:0] */
  419. config->eventctrl0 = val & 0xFF;
  420. break;
  421. case 0x1:
  422. /* EVENT1, bits[15:8] */
  423. config->eventctrl0 = val & 0xFFFF;
  424. break;
  425. case 0x2:
  426. /* EVENT2, bits[23:16] */
  427. config->eventctrl0 = val & 0xFFFFFF;
  428. break;
  429. case 0x3:
  430. /* EVENT3, bits[31:24] */
  431. config->eventctrl0 = val;
  432. break;
  433. default:
  434. break;
  435. }
  436. spin_unlock(&drvdata->spinlock);
  437. return size;
  438. }
  439. static DEVICE_ATTR_RW(event);
  440. static ssize_t event_instren_show(struct device *dev,
  441. struct device_attribute *attr,
  442. char *buf)
  443. {
  444. unsigned long val;
  445. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  446. struct etmv4_config *config = &drvdata->config;
  447. val = BMVAL(config->eventctrl1, 0, 3);
  448. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  449. }
  450. static ssize_t event_instren_store(struct device *dev,
  451. struct device_attribute *attr,
  452. const char *buf, size_t size)
  453. {
  454. unsigned long val;
  455. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  456. struct etmv4_config *config = &drvdata->config;
  457. if (kstrtoul(buf, 16, &val))
  458. return -EINVAL;
  459. spin_lock(&drvdata->spinlock);
  460. /* start by clearing all instruction event enable bits */
  461. config->eventctrl1 &= ~(BIT(0) | BIT(1) | BIT(2) | BIT(3));
  462. switch (drvdata->nr_event) {
  463. case 0x0:
  464. /* generate Event element for event 1 */
  465. config->eventctrl1 |= val & BIT(1);
  466. break;
  467. case 0x1:
  468. /* generate Event element for event 1 and 2 */
  469. config->eventctrl1 |= val & (BIT(0) | BIT(1));
  470. break;
  471. case 0x2:
  472. /* generate Event element for event 1, 2 and 3 */
  473. config->eventctrl1 |= val & (BIT(0) | BIT(1) | BIT(2));
  474. break;
  475. case 0x3:
  476. /* generate Event element for all 4 events */
  477. config->eventctrl1 |= val & 0xF;
  478. break;
  479. default:
  480. break;
  481. }
  482. spin_unlock(&drvdata->spinlock);
  483. return size;
  484. }
  485. static DEVICE_ATTR_RW(event_instren);
  486. static ssize_t event_ts_show(struct device *dev,
  487. struct device_attribute *attr,
  488. char *buf)
  489. {
  490. unsigned long val;
  491. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  492. struct etmv4_config *config = &drvdata->config;
  493. val = config->ts_ctrl;
  494. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  495. }
  496. static ssize_t event_ts_store(struct device *dev,
  497. struct device_attribute *attr,
  498. const char *buf, size_t size)
  499. {
  500. unsigned long val;
  501. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  502. struct etmv4_config *config = &drvdata->config;
  503. if (kstrtoul(buf, 16, &val))
  504. return -EINVAL;
  505. if (!drvdata->ts_size)
  506. return -EINVAL;
  507. config->ts_ctrl = val & ETMv4_EVENT_MASK;
  508. return size;
  509. }
  510. static DEVICE_ATTR_RW(event_ts);
  511. static ssize_t syncfreq_show(struct device *dev,
  512. struct device_attribute *attr,
  513. char *buf)
  514. {
  515. unsigned long val;
  516. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  517. struct etmv4_config *config = &drvdata->config;
  518. val = config->syncfreq;
  519. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  520. }
  521. static ssize_t syncfreq_store(struct device *dev,
  522. struct device_attribute *attr,
  523. const char *buf, size_t size)
  524. {
  525. unsigned long val;
  526. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  527. struct etmv4_config *config = &drvdata->config;
  528. if (kstrtoul(buf, 16, &val))
  529. return -EINVAL;
  530. if (drvdata->syncpr == true)
  531. return -EINVAL;
  532. config->syncfreq = val & ETMv4_SYNC_MASK;
  533. return size;
  534. }
  535. static DEVICE_ATTR_RW(syncfreq);
  536. static ssize_t cyc_threshold_show(struct device *dev,
  537. struct device_attribute *attr,
  538. char *buf)
  539. {
  540. unsigned long val;
  541. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  542. struct etmv4_config *config = &drvdata->config;
  543. val = config->ccctlr;
  544. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  545. }
  546. static ssize_t cyc_threshold_store(struct device *dev,
  547. struct device_attribute *attr,
  548. const char *buf, size_t size)
  549. {
  550. unsigned long val;
  551. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  552. struct etmv4_config *config = &drvdata->config;
  553. if (kstrtoul(buf, 16, &val))
  554. return -EINVAL;
  555. if (val < drvdata->ccitmin)
  556. return -EINVAL;
  557. config->ccctlr = val & ETM_CYC_THRESHOLD_MASK;
  558. return size;
  559. }
  560. static DEVICE_ATTR_RW(cyc_threshold);
  561. static ssize_t bb_ctrl_show(struct device *dev,
  562. struct device_attribute *attr,
  563. char *buf)
  564. {
  565. unsigned long val;
  566. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  567. struct etmv4_config *config = &drvdata->config;
  568. val = config->bb_ctrl;
  569. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  570. }
  571. static ssize_t bb_ctrl_store(struct device *dev,
  572. struct device_attribute *attr,
  573. const char *buf, size_t size)
  574. {
  575. unsigned long val;
  576. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  577. struct etmv4_config *config = &drvdata->config;
  578. if (kstrtoul(buf, 16, &val))
  579. return -EINVAL;
  580. if (drvdata->trcbb == false)
  581. return -EINVAL;
  582. if (!drvdata->nr_addr_cmp)
  583. return -EINVAL;
  584. /*
  585. * Bit[7:0] selects which address range comparator is used for
  586. * branch broadcast control.
  587. */
  588. if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp)
  589. return -EINVAL;
  590. config->bb_ctrl = val;
  591. return size;
  592. }
  593. static DEVICE_ATTR_RW(bb_ctrl);
  594. static ssize_t event_vinst_show(struct device *dev,
  595. struct device_attribute *attr,
  596. char *buf)
  597. {
  598. unsigned long val;
  599. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  600. struct etmv4_config *config = &drvdata->config;
  601. val = config->vinst_ctrl & ETMv4_EVENT_MASK;
  602. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  603. }
  604. static ssize_t event_vinst_store(struct device *dev,
  605. struct device_attribute *attr,
  606. const char *buf, size_t size)
  607. {
  608. unsigned long val;
  609. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  610. struct etmv4_config *config = &drvdata->config;
  611. if (kstrtoul(buf, 16, &val))
  612. return -EINVAL;
  613. spin_lock(&drvdata->spinlock);
  614. val &= ETMv4_EVENT_MASK;
  615. config->vinst_ctrl &= ~ETMv4_EVENT_MASK;
  616. config->vinst_ctrl |= val;
  617. spin_unlock(&drvdata->spinlock);
  618. return size;
  619. }
  620. static DEVICE_ATTR_RW(event_vinst);
  621. static ssize_t s_exlevel_vinst_show(struct device *dev,
  622. struct device_attribute *attr,
  623. char *buf)
  624. {
  625. unsigned long val;
  626. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  627. struct etmv4_config *config = &drvdata->config;
  628. val = BMVAL(config->vinst_ctrl, 16, 19);
  629. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  630. }
  631. static ssize_t s_exlevel_vinst_store(struct device *dev,
  632. struct device_attribute *attr,
  633. const char *buf, size_t size)
  634. {
  635. unsigned long val;
  636. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  637. struct etmv4_config *config = &drvdata->config;
  638. if (kstrtoul(buf, 16, &val))
  639. return -EINVAL;
  640. spin_lock(&drvdata->spinlock);
  641. /* clear all EXLEVEL_S bits (bit[18] is never implemented) */
  642. config->vinst_ctrl &= ~(BIT(16) | BIT(17) | BIT(19));
  643. /* enable instruction tracing for corresponding exception level */
  644. val &= drvdata->s_ex_level;
  645. config->vinst_ctrl |= (val << 16);
  646. spin_unlock(&drvdata->spinlock);
  647. return size;
  648. }
  649. static DEVICE_ATTR_RW(s_exlevel_vinst);
  650. static ssize_t ns_exlevel_vinst_show(struct device *dev,
  651. struct device_attribute *attr,
  652. char *buf)
  653. {
  654. unsigned long val;
  655. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  656. struct etmv4_config *config = &drvdata->config;
  657. /* EXLEVEL_NS, bits[23:20] */
  658. val = BMVAL(config->vinst_ctrl, 20, 23);
  659. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  660. }
  661. static ssize_t ns_exlevel_vinst_store(struct device *dev,
  662. struct device_attribute *attr,
  663. const char *buf, size_t size)
  664. {
  665. unsigned long val;
  666. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  667. struct etmv4_config *config = &drvdata->config;
  668. if (kstrtoul(buf, 16, &val))
  669. return -EINVAL;
  670. spin_lock(&drvdata->spinlock);
  671. /* clear EXLEVEL_NS bits (bit[23] is never implemented */
  672. config->vinst_ctrl &= ~(BIT(20) | BIT(21) | BIT(22));
  673. /* enable instruction tracing for corresponding exception level */
  674. val &= drvdata->ns_ex_level;
  675. config->vinst_ctrl |= (val << 20);
  676. spin_unlock(&drvdata->spinlock);
  677. return size;
  678. }
  679. static DEVICE_ATTR_RW(ns_exlevel_vinst);
  680. static ssize_t addr_idx_show(struct device *dev,
  681. struct device_attribute *attr,
  682. char *buf)
  683. {
  684. unsigned long val;
  685. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  686. struct etmv4_config *config = &drvdata->config;
  687. val = config->addr_idx;
  688. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  689. }
  690. static ssize_t addr_idx_store(struct device *dev,
  691. struct device_attribute *attr,
  692. const char *buf, size_t size)
  693. {
  694. unsigned long val;
  695. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  696. struct etmv4_config *config = &drvdata->config;
  697. if (kstrtoul(buf, 16, &val))
  698. return -EINVAL;
  699. if (val >= drvdata->nr_addr_cmp * 2)
  700. return -EINVAL;
  701. /*
  702. * Use spinlock to ensure index doesn't change while it gets
  703. * dereferenced multiple times within a spinlock block elsewhere.
  704. */
  705. spin_lock(&drvdata->spinlock);
  706. config->addr_idx = val;
  707. spin_unlock(&drvdata->spinlock);
  708. return size;
  709. }
  710. static DEVICE_ATTR_RW(addr_idx);
  711. static ssize_t addr_instdatatype_show(struct device *dev,
  712. struct device_attribute *attr,
  713. char *buf)
  714. {
  715. ssize_t len;
  716. u8 val, idx;
  717. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  718. struct etmv4_config *config = &drvdata->config;
  719. spin_lock(&drvdata->spinlock);
  720. idx = config->addr_idx;
  721. val = BMVAL(config->addr_acc[idx], 0, 1);
  722. len = scnprintf(buf, PAGE_SIZE, "%s\n",
  723. val == ETM_INSTR_ADDR ? "instr" :
  724. (val == ETM_DATA_LOAD_ADDR ? "data_load" :
  725. (val == ETM_DATA_STORE_ADDR ? "data_store" :
  726. "data_load_store")));
  727. spin_unlock(&drvdata->spinlock);
  728. return len;
  729. }
  730. static ssize_t addr_instdatatype_store(struct device *dev,
  731. struct device_attribute *attr,
  732. const char *buf, size_t size)
  733. {
  734. u8 idx;
  735. char str[20] = "";
  736. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  737. struct etmv4_config *config = &drvdata->config;
  738. if (strlen(buf) >= 20)
  739. return -EINVAL;
  740. if (sscanf(buf, "%s", str) != 1)
  741. return -EINVAL;
  742. spin_lock(&drvdata->spinlock);
  743. idx = config->addr_idx;
  744. if (!strcmp(str, "instr"))
  745. /* TYPE, bits[1:0] */
  746. config->addr_acc[idx] &= ~(BIT(0) | BIT(1));
  747. spin_unlock(&drvdata->spinlock);
  748. return size;
  749. }
  750. static DEVICE_ATTR_RW(addr_instdatatype);
  751. static ssize_t addr_single_show(struct device *dev,
  752. struct device_attribute *attr,
  753. char *buf)
  754. {
  755. u8 idx;
  756. unsigned long val;
  757. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  758. struct etmv4_config *config = &drvdata->config;
  759. idx = config->addr_idx;
  760. spin_lock(&drvdata->spinlock);
  761. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  762. config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
  763. spin_unlock(&drvdata->spinlock);
  764. return -EPERM;
  765. }
  766. val = (unsigned long)config->addr_val[idx];
  767. spin_unlock(&drvdata->spinlock);
  768. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  769. }
  770. static ssize_t addr_single_store(struct device *dev,
  771. struct device_attribute *attr,
  772. const char *buf, size_t size)
  773. {
  774. u8 idx;
  775. unsigned long val;
  776. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  777. struct etmv4_config *config = &drvdata->config;
  778. if (kstrtoul(buf, 16, &val))
  779. return -EINVAL;
  780. spin_lock(&drvdata->spinlock);
  781. idx = config->addr_idx;
  782. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  783. config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
  784. spin_unlock(&drvdata->spinlock);
  785. return -EPERM;
  786. }
  787. config->addr_val[idx] = (u64)val;
  788. config->addr_type[idx] = ETM_ADDR_TYPE_SINGLE;
  789. spin_unlock(&drvdata->spinlock);
  790. return size;
  791. }
  792. static DEVICE_ATTR_RW(addr_single);
  793. static ssize_t addr_range_show(struct device *dev,
  794. struct device_attribute *attr,
  795. char *buf)
  796. {
  797. u8 idx;
  798. unsigned long val1, val2;
  799. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  800. struct etmv4_config *config = &drvdata->config;
  801. spin_lock(&drvdata->spinlock);
  802. idx = config->addr_idx;
  803. if (idx % 2 != 0) {
  804. spin_unlock(&drvdata->spinlock);
  805. return -EPERM;
  806. }
  807. if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
  808. config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
  809. (config->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
  810. config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
  811. spin_unlock(&drvdata->spinlock);
  812. return -EPERM;
  813. }
  814. val1 = (unsigned long)config->addr_val[idx];
  815. val2 = (unsigned long)config->addr_val[idx + 1];
  816. spin_unlock(&drvdata->spinlock);
  817. return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
  818. }
  819. static ssize_t addr_range_store(struct device *dev,
  820. struct device_attribute *attr,
  821. const char *buf, size_t size)
  822. {
  823. u8 idx;
  824. unsigned long val1, val2;
  825. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  826. struct etmv4_config *config = &drvdata->config;
  827. if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
  828. return -EINVAL;
  829. /* lower address comparator cannot have a higher address value */
  830. if (val1 > val2)
  831. return -EINVAL;
  832. spin_lock(&drvdata->spinlock);
  833. idx = config->addr_idx;
  834. if (idx % 2 != 0) {
  835. spin_unlock(&drvdata->spinlock);
  836. return -EPERM;
  837. }
  838. if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
  839. config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
  840. (config->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
  841. config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
  842. spin_unlock(&drvdata->spinlock);
  843. return -EPERM;
  844. }
  845. config->addr_val[idx] = (u64)val1;
  846. config->addr_type[idx] = ETM_ADDR_TYPE_RANGE;
  847. config->addr_val[idx + 1] = (u64)val2;
  848. config->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE;
  849. /*
  850. * Program include or exclude control bits for vinst or vdata
  851. * whenever we change addr comparators to ETM_ADDR_TYPE_RANGE
  852. */
  853. if (config->mode & ETM_MODE_EXCLUDE)
  854. etm4_set_mode_exclude(drvdata, true);
  855. else
  856. etm4_set_mode_exclude(drvdata, false);
  857. spin_unlock(&drvdata->spinlock);
  858. return size;
  859. }
  860. static DEVICE_ATTR_RW(addr_range);
  861. static ssize_t addr_start_show(struct device *dev,
  862. struct device_attribute *attr,
  863. char *buf)
  864. {
  865. u8 idx;
  866. unsigned long val;
  867. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  868. struct etmv4_config *config = &drvdata->config;
  869. spin_lock(&drvdata->spinlock);
  870. idx = config->addr_idx;
  871. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  872. config->addr_type[idx] == ETM_ADDR_TYPE_START)) {
  873. spin_unlock(&drvdata->spinlock);
  874. return -EPERM;
  875. }
  876. val = (unsigned long)config->addr_val[idx];
  877. spin_unlock(&drvdata->spinlock);
  878. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  879. }
  880. static ssize_t addr_start_store(struct device *dev,
  881. struct device_attribute *attr,
  882. const char *buf, size_t size)
  883. {
  884. u8 idx;
  885. unsigned long val;
  886. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  887. struct etmv4_config *config = &drvdata->config;
  888. if (kstrtoul(buf, 16, &val))
  889. return -EINVAL;
  890. spin_lock(&drvdata->spinlock);
  891. idx = config->addr_idx;
  892. if (!drvdata->nr_addr_cmp) {
  893. spin_unlock(&drvdata->spinlock);
  894. return -EINVAL;
  895. }
  896. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  897. config->addr_type[idx] == ETM_ADDR_TYPE_START)) {
  898. spin_unlock(&drvdata->spinlock);
  899. return -EPERM;
  900. }
  901. config->addr_val[idx] = (u64)val;
  902. config->addr_type[idx] = ETM_ADDR_TYPE_START;
  903. config->vissctlr |= BIT(idx);
  904. /* SSSTATUS, bit[9] - turn on start/stop logic */
  905. config->vinst_ctrl |= BIT(9);
  906. spin_unlock(&drvdata->spinlock);
  907. return size;
  908. }
  909. static DEVICE_ATTR_RW(addr_start);
  910. static ssize_t addr_stop_show(struct device *dev,
  911. struct device_attribute *attr,
  912. char *buf)
  913. {
  914. u8 idx;
  915. unsigned long val;
  916. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  917. struct etmv4_config *config = &drvdata->config;
  918. spin_lock(&drvdata->spinlock);
  919. idx = config->addr_idx;
  920. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  921. config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
  922. spin_unlock(&drvdata->spinlock);
  923. return -EPERM;
  924. }
  925. val = (unsigned long)config->addr_val[idx];
  926. spin_unlock(&drvdata->spinlock);
  927. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  928. }
  929. static ssize_t addr_stop_store(struct device *dev,
  930. struct device_attribute *attr,
  931. const char *buf, size_t size)
  932. {
  933. u8 idx;
  934. unsigned long val;
  935. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  936. struct etmv4_config *config = &drvdata->config;
  937. if (kstrtoul(buf, 16, &val))
  938. return -EINVAL;
  939. spin_lock(&drvdata->spinlock);
  940. idx = config->addr_idx;
  941. if (!drvdata->nr_addr_cmp) {
  942. spin_unlock(&drvdata->spinlock);
  943. return -EINVAL;
  944. }
  945. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  946. config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
  947. spin_unlock(&drvdata->spinlock);
  948. return -EPERM;
  949. }
  950. config->addr_val[idx] = (u64)val;
  951. config->addr_type[idx] = ETM_ADDR_TYPE_STOP;
  952. config->vissctlr |= BIT(idx + 16);
  953. /* SSSTATUS, bit[9] - turn on start/stop logic */
  954. config->vinst_ctrl |= BIT(9);
  955. spin_unlock(&drvdata->spinlock);
  956. return size;
  957. }
  958. static DEVICE_ATTR_RW(addr_stop);
  959. static ssize_t addr_ctxtype_show(struct device *dev,
  960. struct device_attribute *attr,
  961. char *buf)
  962. {
  963. ssize_t len;
  964. u8 idx, val;
  965. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  966. struct etmv4_config *config = &drvdata->config;
  967. spin_lock(&drvdata->spinlock);
  968. idx = config->addr_idx;
  969. /* CONTEXTTYPE, bits[3:2] */
  970. val = BMVAL(config->addr_acc[idx], 2, 3);
  971. len = scnprintf(buf, PAGE_SIZE, "%s\n", val == ETM_CTX_NONE ? "none" :
  972. (val == ETM_CTX_CTXID ? "ctxid" :
  973. (val == ETM_CTX_VMID ? "vmid" : "all")));
  974. spin_unlock(&drvdata->spinlock);
  975. return len;
  976. }
  977. static ssize_t addr_ctxtype_store(struct device *dev,
  978. struct device_attribute *attr,
  979. const char *buf, size_t size)
  980. {
  981. u8 idx;
  982. char str[10] = "";
  983. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  984. struct etmv4_config *config = &drvdata->config;
  985. if (strlen(buf) >= 10)
  986. return -EINVAL;
  987. if (sscanf(buf, "%s", str) != 1)
  988. return -EINVAL;
  989. spin_lock(&drvdata->spinlock);
  990. idx = config->addr_idx;
  991. if (!strcmp(str, "none"))
  992. /* start by clearing context type bits */
  993. config->addr_acc[idx] &= ~(BIT(2) | BIT(3));
  994. else if (!strcmp(str, "ctxid")) {
  995. /* 0b01 The trace unit performs a Context ID */
  996. if (drvdata->numcidc) {
  997. config->addr_acc[idx] |= BIT(2);
  998. config->addr_acc[idx] &= ~BIT(3);
  999. }
  1000. } else if (!strcmp(str, "vmid")) {
  1001. /* 0b10 The trace unit performs a VMID */
  1002. if (drvdata->numvmidc) {
  1003. config->addr_acc[idx] &= ~BIT(2);
  1004. config->addr_acc[idx] |= BIT(3);
  1005. }
  1006. } else if (!strcmp(str, "all")) {
  1007. /*
  1008. * 0b11 The trace unit performs a Context ID
  1009. * comparison and a VMID
  1010. */
  1011. if (drvdata->numcidc)
  1012. config->addr_acc[idx] |= BIT(2);
  1013. if (drvdata->numvmidc)
  1014. config->addr_acc[idx] |= BIT(3);
  1015. }
  1016. spin_unlock(&drvdata->spinlock);
  1017. return size;
  1018. }
  1019. static DEVICE_ATTR_RW(addr_ctxtype);
  1020. static ssize_t addr_context_show(struct device *dev,
  1021. struct device_attribute *attr,
  1022. char *buf)
  1023. {
  1024. u8 idx;
  1025. unsigned long val;
  1026. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1027. struct etmv4_config *config = &drvdata->config;
  1028. spin_lock(&drvdata->spinlock);
  1029. idx = config->addr_idx;
  1030. /* context ID comparator bits[6:4] */
  1031. val = BMVAL(config->addr_acc[idx], 4, 6);
  1032. spin_unlock(&drvdata->spinlock);
  1033. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1034. }
  1035. static ssize_t addr_context_store(struct device *dev,
  1036. struct device_attribute *attr,
  1037. const char *buf, size_t size)
  1038. {
  1039. u8 idx;
  1040. unsigned long val;
  1041. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1042. struct etmv4_config *config = &drvdata->config;
  1043. if (kstrtoul(buf, 16, &val))
  1044. return -EINVAL;
  1045. if ((drvdata->numcidc <= 1) && (drvdata->numvmidc <= 1))
  1046. return -EINVAL;
  1047. if (val >= (drvdata->numcidc >= drvdata->numvmidc ?
  1048. drvdata->numcidc : drvdata->numvmidc))
  1049. return -EINVAL;
  1050. spin_lock(&drvdata->spinlock);
  1051. idx = config->addr_idx;
  1052. /* clear context ID comparator bits[6:4] */
  1053. config->addr_acc[idx] &= ~(BIT(4) | BIT(5) | BIT(6));
  1054. config->addr_acc[idx] |= (val << 4);
  1055. spin_unlock(&drvdata->spinlock);
  1056. return size;
  1057. }
  1058. static DEVICE_ATTR_RW(addr_context);
  1059. static ssize_t seq_idx_show(struct device *dev,
  1060. struct device_attribute *attr,
  1061. char *buf)
  1062. {
  1063. unsigned long val;
  1064. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1065. struct etmv4_config *config = &drvdata->config;
  1066. val = config->seq_idx;
  1067. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1068. }
  1069. static ssize_t seq_idx_store(struct device *dev,
  1070. struct device_attribute *attr,
  1071. const char *buf, size_t size)
  1072. {
  1073. unsigned long val;
  1074. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1075. struct etmv4_config *config = &drvdata->config;
  1076. if (kstrtoul(buf, 16, &val))
  1077. return -EINVAL;
  1078. if (val >= drvdata->nrseqstate - 1)
  1079. return -EINVAL;
  1080. /*
  1081. * Use spinlock to ensure index doesn't change while it gets
  1082. * dereferenced multiple times within a spinlock block elsewhere.
  1083. */
  1084. spin_lock(&drvdata->spinlock);
  1085. config->seq_idx = val;
  1086. spin_unlock(&drvdata->spinlock);
  1087. return size;
  1088. }
  1089. static DEVICE_ATTR_RW(seq_idx);
  1090. static ssize_t seq_state_show(struct device *dev,
  1091. struct device_attribute *attr,
  1092. char *buf)
  1093. {
  1094. unsigned long val;
  1095. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1096. struct etmv4_config *config = &drvdata->config;
  1097. val = config->seq_state;
  1098. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1099. }
  1100. static ssize_t seq_state_store(struct device *dev,
  1101. struct device_attribute *attr,
  1102. const char *buf, size_t size)
  1103. {
  1104. unsigned long val;
  1105. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1106. struct etmv4_config *config = &drvdata->config;
  1107. if (kstrtoul(buf, 16, &val))
  1108. return -EINVAL;
  1109. if (val >= drvdata->nrseqstate)
  1110. return -EINVAL;
  1111. config->seq_state = val;
  1112. return size;
  1113. }
  1114. static DEVICE_ATTR_RW(seq_state);
  1115. static ssize_t seq_event_show(struct device *dev,
  1116. struct device_attribute *attr,
  1117. char *buf)
  1118. {
  1119. u8 idx;
  1120. unsigned long val;
  1121. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1122. struct etmv4_config *config = &drvdata->config;
  1123. spin_lock(&drvdata->spinlock);
  1124. idx = config->seq_idx;
  1125. val = config->seq_ctrl[idx];
  1126. spin_unlock(&drvdata->spinlock);
  1127. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1128. }
  1129. static ssize_t seq_event_store(struct device *dev,
  1130. struct device_attribute *attr,
  1131. const char *buf, size_t size)
  1132. {
  1133. u8 idx;
  1134. unsigned long val;
  1135. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1136. struct etmv4_config *config = &drvdata->config;
  1137. if (kstrtoul(buf, 16, &val))
  1138. return -EINVAL;
  1139. spin_lock(&drvdata->spinlock);
  1140. idx = config->seq_idx;
  1141. /* RST, bits[7:0] */
  1142. config->seq_ctrl[idx] = val & 0xFF;
  1143. spin_unlock(&drvdata->spinlock);
  1144. return size;
  1145. }
  1146. static DEVICE_ATTR_RW(seq_event);
  1147. static ssize_t seq_reset_event_show(struct device *dev,
  1148. struct device_attribute *attr,
  1149. char *buf)
  1150. {
  1151. unsigned long val;
  1152. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1153. struct etmv4_config *config = &drvdata->config;
  1154. val = config->seq_rst;
  1155. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1156. }
  1157. static ssize_t seq_reset_event_store(struct device *dev,
  1158. struct device_attribute *attr,
  1159. const char *buf, size_t size)
  1160. {
  1161. unsigned long val;
  1162. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1163. struct etmv4_config *config = &drvdata->config;
  1164. if (kstrtoul(buf, 16, &val))
  1165. return -EINVAL;
  1166. if (!(drvdata->nrseqstate))
  1167. return -EINVAL;
  1168. config->seq_rst = val & ETMv4_EVENT_MASK;
  1169. return size;
  1170. }
  1171. static DEVICE_ATTR_RW(seq_reset_event);
  1172. static ssize_t cntr_idx_show(struct device *dev,
  1173. struct device_attribute *attr,
  1174. char *buf)
  1175. {
  1176. unsigned long val;
  1177. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1178. struct etmv4_config *config = &drvdata->config;
  1179. val = config->cntr_idx;
  1180. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1181. }
  1182. static ssize_t cntr_idx_store(struct device *dev,
  1183. struct device_attribute *attr,
  1184. const char *buf, size_t size)
  1185. {
  1186. unsigned long val;
  1187. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1188. struct etmv4_config *config = &drvdata->config;
  1189. if (kstrtoul(buf, 16, &val))
  1190. return -EINVAL;
  1191. if (val >= drvdata->nr_cntr)
  1192. return -EINVAL;
  1193. /*
  1194. * Use spinlock to ensure index doesn't change while it gets
  1195. * dereferenced multiple times within a spinlock block elsewhere.
  1196. */
  1197. spin_lock(&drvdata->spinlock);
  1198. config->cntr_idx = val;
  1199. spin_unlock(&drvdata->spinlock);
  1200. return size;
  1201. }
  1202. static DEVICE_ATTR_RW(cntr_idx);
  1203. static ssize_t cntrldvr_show(struct device *dev,
  1204. struct device_attribute *attr,
  1205. char *buf)
  1206. {
  1207. u8 idx;
  1208. unsigned long val;
  1209. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1210. struct etmv4_config *config = &drvdata->config;
  1211. spin_lock(&drvdata->spinlock);
  1212. idx = config->cntr_idx;
  1213. val = config->cntrldvr[idx];
  1214. spin_unlock(&drvdata->spinlock);
  1215. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1216. }
  1217. static ssize_t cntrldvr_store(struct device *dev,
  1218. struct device_attribute *attr,
  1219. const char *buf, size_t size)
  1220. {
  1221. u8 idx;
  1222. unsigned long val;
  1223. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1224. struct etmv4_config *config = &drvdata->config;
  1225. if (kstrtoul(buf, 16, &val))
  1226. return -EINVAL;
  1227. if (val > ETM_CNTR_MAX_VAL)
  1228. return -EINVAL;
  1229. spin_lock(&drvdata->spinlock);
  1230. idx = config->cntr_idx;
  1231. config->cntrldvr[idx] = val;
  1232. spin_unlock(&drvdata->spinlock);
  1233. return size;
  1234. }
  1235. static DEVICE_ATTR_RW(cntrldvr);
  1236. static ssize_t cntr_val_show(struct device *dev,
  1237. struct device_attribute *attr,
  1238. char *buf)
  1239. {
  1240. u8 idx;
  1241. unsigned long val;
  1242. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1243. struct etmv4_config *config = &drvdata->config;
  1244. spin_lock(&drvdata->spinlock);
  1245. idx = config->cntr_idx;
  1246. val = config->cntr_val[idx];
  1247. spin_unlock(&drvdata->spinlock);
  1248. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1249. }
  1250. static ssize_t cntr_val_store(struct device *dev,
  1251. struct device_attribute *attr,
  1252. const char *buf, size_t size)
  1253. {
  1254. u8 idx;
  1255. unsigned long val;
  1256. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1257. struct etmv4_config *config = &drvdata->config;
  1258. if (kstrtoul(buf, 16, &val))
  1259. return -EINVAL;
  1260. if (val > ETM_CNTR_MAX_VAL)
  1261. return -EINVAL;
  1262. spin_lock(&drvdata->spinlock);
  1263. idx = config->cntr_idx;
  1264. config->cntr_val[idx] = val;
  1265. spin_unlock(&drvdata->spinlock);
  1266. return size;
  1267. }
  1268. static DEVICE_ATTR_RW(cntr_val);
  1269. static ssize_t cntr_ctrl_show(struct device *dev,
  1270. struct device_attribute *attr,
  1271. char *buf)
  1272. {
  1273. u8 idx;
  1274. unsigned long val;
  1275. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1276. struct etmv4_config *config = &drvdata->config;
  1277. spin_lock(&drvdata->spinlock);
  1278. idx = config->cntr_idx;
  1279. val = config->cntr_ctrl[idx];
  1280. spin_unlock(&drvdata->spinlock);
  1281. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1282. }
  1283. static ssize_t cntr_ctrl_store(struct device *dev,
  1284. struct device_attribute *attr,
  1285. const char *buf, size_t size)
  1286. {
  1287. u8 idx;
  1288. unsigned long val;
  1289. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1290. struct etmv4_config *config = &drvdata->config;
  1291. if (kstrtoul(buf, 16, &val))
  1292. return -EINVAL;
  1293. spin_lock(&drvdata->spinlock);
  1294. idx = config->cntr_idx;
  1295. config->cntr_ctrl[idx] = val;
  1296. spin_unlock(&drvdata->spinlock);
  1297. return size;
  1298. }
  1299. static DEVICE_ATTR_RW(cntr_ctrl);
  1300. static ssize_t res_idx_show(struct device *dev,
  1301. struct device_attribute *attr,
  1302. char *buf)
  1303. {
  1304. unsigned long val;
  1305. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1306. struct etmv4_config *config = &drvdata->config;
  1307. val = config->res_idx;
  1308. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1309. }
  1310. static ssize_t res_idx_store(struct device *dev,
  1311. struct device_attribute *attr,
  1312. const char *buf, size_t size)
  1313. {
  1314. unsigned long val;
  1315. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1316. struct etmv4_config *config = &drvdata->config;
  1317. if (kstrtoul(buf, 16, &val))
  1318. return -EINVAL;
  1319. /* Resource selector pair 0 is always implemented and reserved */
  1320. if ((val == 0) || (val >= drvdata->nr_resource))
  1321. return -EINVAL;
  1322. /*
  1323. * Use spinlock to ensure index doesn't change while it gets
  1324. * dereferenced multiple times within a spinlock block elsewhere.
  1325. */
  1326. spin_lock(&drvdata->spinlock);
  1327. config->res_idx = val;
  1328. spin_unlock(&drvdata->spinlock);
  1329. return size;
  1330. }
  1331. static DEVICE_ATTR_RW(res_idx);
  1332. static ssize_t res_ctrl_show(struct device *dev,
  1333. struct device_attribute *attr,
  1334. char *buf)
  1335. {
  1336. u8 idx;
  1337. unsigned long val;
  1338. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1339. struct etmv4_config *config = &drvdata->config;
  1340. spin_lock(&drvdata->spinlock);
  1341. idx = config->res_idx;
  1342. val = config->res_ctrl[idx];
  1343. spin_unlock(&drvdata->spinlock);
  1344. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1345. }
  1346. static ssize_t res_ctrl_store(struct device *dev,
  1347. struct device_attribute *attr,
  1348. const char *buf, size_t size)
  1349. {
  1350. u8 idx;
  1351. unsigned long val;
  1352. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1353. struct etmv4_config *config = &drvdata->config;
  1354. if (kstrtoul(buf, 16, &val))
  1355. return -EINVAL;
  1356. spin_lock(&drvdata->spinlock);
  1357. idx = config->res_idx;
  1358. /* For odd idx pair inversal bit is RES0 */
  1359. if (idx % 2 != 0)
  1360. /* PAIRINV, bit[21] */
  1361. val &= ~BIT(21);
  1362. config->res_ctrl[idx] = val;
  1363. spin_unlock(&drvdata->spinlock);
  1364. return size;
  1365. }
  1366. static DEVICE_ATTR_RW(res_ctrl);
  1367. static ssize_t ctxid_idx_show(struct device *dev,
  1368. struct device_attribute *attr,
  1369. char *buf)
  1370. {
  1371. unsigned long val;
  1372. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1373. struct etmv4_config *config = &drvdata->config;
  1374. val = config->ctxid_idx;
  1375. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1376. }
  1377. static ssize_t ctxid_idx_store(struct device *dev,
  1378. struct device_attribute *attr,
  1379. const char *buf, size_t size)
  1380. {
  1381. unsigned long val;
  1382. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1383. struct etmv4_config *config = &drvdata->config;
  1384. if (kstrtoul(buf, 16, &val))
  1385. return -EINVAL;
  1386. if (val >= drvdata->numcidc)
  1387. return -EINVAL;
  1388. /*
  1389. * Use spinlock to ensure index doesn't change while it gets
  1390. * dereferenced multiple times within a spinlock block elsewhere.
  1391. */
  1392. spin_lock(&drvdata->spinlock);
  1393. config->ctxid_idx = val;
  1394. spin_unlock(&drvdata->spinlock);
  1395. return size;
  1396. }
  1397. static DEVICE_ATTR_RW(ctxid_idx);
  1398. static ssize_t ctxid_pid_show(struct device *dev,
  1399. struct device_attribute *attr,
  1400. char *buf)
  1401. {
  1402. u8 idx;
  1403. unsigned long val;
  1404. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1405. struct etmv4_config *config = &drvdata->config;
  1406. spin_lock(&drvdata->spinlock);
  1407. idx = config->ctxid_idx;
  1408. val = (unsigned long)config->ctxid_vpid[idx];
  1409. spin_unlock(&drvdata->spinlock);
  1410. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1411. }
  1412. static ssize_t ctxid_pid_store(struct device *dev,
  1413. struct device_attribute *attr,
  1414. const char *buf, size_t size)
  1415. {
  1416. u8 idx;
  1417. unsigned long vpid, pid;
  1418. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1419. struct etmv4_config *config = &drvdata->config;
  1420. /*
  1421. * only implemented when ctxid tracing is enabled, i.e. at least one
  1422. * ctxid comparator is implemented and ctxid is greater than 0 bits
  1423. * in length
  1424. */
  1425. if (!drvdata->ctxid_size || !drvdata->numcidc)
  1426. return -EINVAL;
  1427. if (kstrtoul(buf, 16, &vpid))
  1428. return -EINVAL;
  1429. pid = coresight_vpid_to_pid(vpid);
  1430. spin_lock(&drvdata->spinlock);
  1431. idx = config->ctxid_idx;
  1432. config->ctxid_pid[idx] = (u64)pid;
  1433. config->ctxid_vpid[idx] = (u64)vpid;
  1434. spin_unlock(&drvdata->spinlock);
  1435. return size;
  1436. }
  1437. static DEVICE_ATTR_RW(ctxid_pid);
  1438. static ssize_t ctxid_masks_show(struct device *dev,
  1439. struct device_attribute *attr,
  1440. char *buf)
  1441. {
  1442. unsigned long val1, val2;
  1443. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1444. struct etmv4_config *config = &drvdata->config;
  1445. spin_lock(&drvdata->spinlock);
  1446. val1 = config->ctxid_mask0;
  1447. val2 = config->ctxid_mask1;
  1448. spin_unlock(&drvdata->spinlock);
  1449. return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
  1450. }
  1451. static ssize_t ctxid_masks_store(struct device *dev,
  1452. struct device_attribute *attr,
  1453. const char *buf, size_t size)
  1454. {
  1455. u8 i, j, maskbyte;
  1456. unsigned long val1, val2, mask;
  1457. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1458. struct etmv4_config *config = &drvdata->config;
  1459. /*
  1460. * only implemented when ctxid tracing is enabled, i.e. at least one
  1461. * ctxid comparator is implemented and ctxid is greater than 0 bits
  1462. * in length
  1463. */
  1464. if (!drvdata->ctxid_size || !drvdata->numcidc)
  1465. return -EINVAL;
  1466. if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
  1467. return -EINVAL;
  1468. spin_lock(&drvdata->spinlock);
  1469. /*
  1470. * each byte[0..3] controls mask value applied to ctxid
  1471. * comparator[0..3]
  1472. */
  1473. switch (drvdata->numcidc) {
  1474. case 0x1:
  1475. /* COMP0, bits[7:0] */
  1476. config->ctxid_mask0 = val1 & 0xFF;
  1477. break;
  1478. case 0x2:
  1479. /* COMP1, bits[15:8] */
  1480. config->ctxid_mask0 = val1 & 0xFFFF;
  1481. break;
  1482. case 0x3:
  1483. /* COMP2, bits[23:16] */
  1484. config->ctxid_mask0 = val1 & 0xFFFFFF;
  1485. break;
  1486. case 0x4:
  1487. /* COMP3, bits[31:24] */
  1488. config->ctxid_mask0 = val1;
  1489. break;
  1490. case 0x5:
  1491. /* COMP4, bits[7:0] */
  1492. config->ctxid_mask0 = val1;
  1493. config->ctxid_mask1 = val2 & 0xFF;
  1494. break;
  1495. case 0x6:
  1496. /* COMP5, bits[15:8] */
  1497. config->ctxid_mask0 = val1;
  1498. config->ctxid_mask1 = val2 & 0xFFFF;
  1499. break;
  1500. case 0x7:
  1501. /* COMP6, bits[23:16] */
  1502. config->ctxid_mask0 = val1;
  1503. config->ctxid_mask1 = val2 & 0xFFFFFF;
  1504. break;
  1505. case 0x8:
  1506. /* COMP7, bits[31:24] */
  1507. config->ctxid_mask0 = val1;
  1508. config->ctxid_mask1 = val2;
  1509. break;
  1510. default:
  1511. break;
  1512. }
  1513. /*
  1514. * If software sets a mask bit to 1, it must program relevant byte
  1515. * of ctxid comparator value 0x0, otherwise behavior is unpredictable.
  1516. * For example, if bit[3] of ctxid_mask0 is 1, we must clear bits[31:24]
  1517. * of ctxid comparator0 value (corresponding to byte 0) register.
  1518. */
  1519. mask = config->ctxid_mask0;
  1520. for (i = 0; i < drvdata->numcidc; i++) {
  1521. /* mask value of corresponding ctxid comparator */
  1522. maskbyte = mask & ETMv4_EVENT_MASK;
  1523. /*
  1524. * each bit corresponds to a byte of respective ctxid comparator
  1525. * value register
  1526. */
  1527. for (j = 0; j < 8; j++) {
  1528. if (maskbyte & 1)
  1529. config->ctxid_pid[i] &= ~(0xFFUL << (j * 8));
  1530. maskbyte >>= 1;
  1531. }
  1532. /* Select the next ctxid comparator mask value */
  1533. if (i == 3)
  1534. /* ctxid comparators[4-7] */
  1535. mask = config->ctxid_mask1;
  1536. else
  1537. mask >>= 0x8;
  1538. }
  1539. spin_unlock(&drvdata->spinlock);
  1540. return size;
  1541. }
  1542. static DEVICE_ATTR_RW(ctxid_masks);
  1543. static ssize_t vmid_idx_show(struct device *dev,
  1544. struct device_attribute *attr,
  1545. char *buf)
  1546. {
  1547. unsigned long val;
  1548. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1549. struct etmv4_config *config = &drvdata->config;
  1550. val = config->vmid_idx;
  1551. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1552. }
  1553. static ssize_t vmid_idx_store(struct device *dev,
  1554. struct device_attribute *attr,
  1555. const char *buf, size_t size)
  1556. {
  1557. unsigned long val;
  1558. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1559. struct etmv4_config *config = &drvdata->config;
  1560. if (kstrtoul(buf, 16, &val))
  1561. return -EINVAL;
  1562. if (val >= drvdata->numvmidc)
  1563. return -EINVAL;
  1564. /*
  1565. * Use spinlock to ensure index doesn't change while it gets
  1566. * dereferenced multiple times within a spinlock block elsewhere.
  1567. */
  1568. spin_lock(&drvdata->spinlock);
  1569. config->vmid_idx = val;
  1570. spin_unlock(&drvdata->spinlock);
  1571. return size;
  1572. }
  1573. static DEVICE_ATTR_RW(vmid_idx);
  1574. static ssize_t vmid_val_show(struct device *dev,
  1575. struct device_attribute *attr,
  1576. char *buf)
  1577. {
  1578. unsigned long val;
  1579. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1580. struct etmv4_config *config = &drvdata->config;
  1581. val = (unsigned long)config->vmid_val[config->vmid_idx];
  1582. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1583. }
  1584. static ssize_t vmid_val_store(struct device *dev,
  1585. struct device_attribute *attr,
  1586. const char *buf, size_t size)
  1587. {
  1588. unsigned long val;
  1589. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1590. struct etmv4_config *config = &drvdata->config;
  1591. /*
  1592. * only implemented when vmid tracing is enabled, i.e. at least one
  1593. * vmid comparator is implemented and at least 8 bit vmid size
  1594. */
  1595. if (!drvdata->vmid_size || !drvdata->numvmidc)
  1596. return -EINVAL;
  1597. if (kstrtoul(buf, 16, &val))
  1598. return -EINVAL;
  1599. spin_lock(&drvdata->spinlock);
  1600. config->vmid_val[config->vmid_idx] = (u64)val;
  1601. spin_unlock(&drvdata->spinlock);
  1602. return size;
  1603. }
  1604. static DEVICE_ATTR_RW(vmid_val);
  1605. static ssize_t vmid_masks_show(struct device *dev,
  1606. struct device_attribute *attr, char *buf)
  1607. {
  1608. unsigned long val1, val2;
  1609. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1610. struct etmv4_config *config = &drvdata->config;
  1611. spin_lock(&drvdata->spinlock);
  1612. val1 = config->vmid_mask0;
  1613. val2 = config->vmid_mask1;
  1614. spin_unlock(&drvdata->spinlock);
  1615. return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
  1616. }
  1617. static ssize_t vmid_masks_store(struct device *dev,
  1618. struct device_attribute *attr,
  1619. const char *buf, size_t size)
  1620. {
  1621. u8 i, j, maskbyte;
  1622. unsigned long val1, val2, mask;
  1623. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1624. struct etmv4_config *config = &drvdata->config;
  1625. /*
  1626. * only implemented when vmid tracing is enabled, i.e. at least one
  1627. * vmid comparator is implemented and at least 8 bit vmid size
  1628. */
  1629. if (!drvdata->vmid_size || !drvdata->numvmidc)
  1630. return -EINVAL;
  1631. if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
  1632. return -EINVAL;
  1633. spin_lock(&drvdata->spinlock);
  1634. /*
  1635. * each byte[0..3] controls mask value applied to vmid
  1636. * comparator[0..3]
  1637. */
  1638. switch (drvdata->numvmidc) {
  1639. case 0x1:
  1640. /* COMP0, bits[7:0] */
  1641. config->vmid_mask0 = val1 & 0xFF;
  1642. break;
  1643. case 0x2:
  1644. /* COMP1, bits[15:8] */
  1645. config->vmid_mask0 = val1 & 0xFFFF;
  1646. break;
  1647. case 0x3:
  1648. /* COMP2, bits[23:16] */
  1649. config->vmid_mask0 = val1 & 0xFFFFFF;
  1650. break;
  1651. case 0x4:
  1652. /* COMP3, bits[31:24] */
  1653. config->vmid_mask0 = val1;
  1654. break;
  1655. case 0x5:
  1656. /* COMP4, bits[7:0] */
  1657. config->vmid_mask0 = val1;
  1658. config->vmid_mask1 = val2 & 0xFF;
  1659. break;
  1660. case 0x6:
  1661. /* COMP5, bits[15:8] */
  1662. config->vmid_mask0 = val1;
  1663. config->vmid_mask1 = val2 & 0xFFFF;
  1664. break;
  1665. case 0x7:
  1666. /* COMP6, bits[23:16] */
  1667. config->vmid_mask0 = val1;
  1668. config->vmid_mask1 = val2 & 0xFFFFFF;
  1669. break;
  1670. case 0x8:
  1671. /* COMP7, bits[31:24] */
  1672. config->vmid_mask0 = val1;
  1673. config->vmid_mask1 = val2;
  1674. break;
  1675. default:
  1676. break;
  1677. }
  1678. /*
  1679. * If software sets a mask bit to 1, it must program relevant byte
  1680. * of vmid comparator value 0x0, otherwise behavior is unpredictable.
  1681. * For example, if bit[3] of vmid_mask0 is 1, we must clear bits[31:24]
  1682. * of vmid comparator0 value (corresponding to byte 0) register.
  1683. */
  1684. mask = config->vmid_mask0;
  1685. for (i = 0; i < drvdata->numvmidc; i++) {
  1686. /* mask value of corresponding vmid comparator */
  1687. maskbyte = mask & ETMv4_EVENT_MASK;
  1688. /*
  1689. * each bit corresponds to a byte of respective vmid comparator
  1690. * value register
  1691. */
  1692. for (j = 0; j < 8; j++) {
  1693. if (maskbyte & 1)
  1694. config->vmid_val[i] &= ~(0xFFUL << (j * 8));
  1695. maskbyte >>= 1;
  1696. }
  1697. /* Select the next vmid comparator mask value */
  1698. if (i == 3)
  1699. /* vmid comparators[4-7] */
  1700. mask = config->vmid_mask1;
  1701. else
  1702. mask >>= 0x8;
  1703. }
  1704. spin_unlock(&drvdata->spinlock);
  1705. return size;
  1706. }
  1707. static DEVICE_ATTR_RW(vmid_masks);
  1708. static ssize_t cpu_show(struct device *dev,
  1709. struct device_attribute *attr, char *buf)
  1710. {
  1711. int val;
  1712. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1713. val = drvdata->cpu;
  1714. return scnprintf(buf, PAGE_SIZE, "%d\n", val);
  1715. }
  1716. static DEVICE_ATTR_RO(cpu);
  1717. static struct attribute *coresight_etmv4_attrs[] = {
  1718. &dev_attr_nr_pe_cmp.attr,
  1719. &dev_attr_nr_addr_cmp.attr,
  1720. &dev_attr_nr_cntr.attr,
  1721. &dev_attr_nr_ext_inp.attr,
  1722. &dev_attr_numcidc.attr,
  1723. &dev_attr_numvmidc.attr,
  1724. &dev_attr_nrseqstate.attr,
  1725. &dev_attr_nr_resource.attr,
  1726. &dev_attr_nr_ss_cmp.attr,
  1727. &dev_attr_reset.attr,
  1728. &dev_attr_mode.attr,
  1729. &dev_attr_pe.attr,
  1730. &dev_attr_event.attr,
  1731. &dev_attr_event_instren.attr,
  1732. &dev_attr_event_ts.attr,
  1733. &dev_attr_syncfreq.attr,
  1734. &dev_attr_cyc_threshold.attr,
  1735. &dev_attr_bb_ctrl.attr,
  1736. &dev_attr_event_vinst.attr,
  1737. &dev_attr_s_exlevel_vinst.attr,
  1738. &dev_attr_ns_exlevel_vinst.attr,
  1739. &dev_attr_addr_idx.attr,
  1740. &dev_attr_addr_instdatatype.attr,
  1741. &dev_attr_addr_single.attr,
  1742. &dev_attr_addr_range.attr,
  1743. &dev_attr_addr_start.attr,
  1744. &dev_attr_addr_stop.attr,
  1745. &dev_attr_addr_ctxtype.attr,
  1746. &dev_attr_addr_context.attr,
  1747. &dev_attr_seq_idx.attr,
  1748. &dev_attr_seq_state.attr,
  1749. &dev_attr_seq_event.attr,
  1750. &dev_attr_seq_reset_event.attr,
  1751. &dev_attr_cntr_idx.attr,
  1752. &dev_attr_cntrldvr.attr,
  1753. &dev_attr_cntr_val.attr,
  1754. &dev_attr_cntr_ctrl.attr,
  1755. &dev_attr_res_idx.attr,
  1756. &dev_attr_res_ctrl.attr,
  1757. &dev_attr_ctxid_idx.attr,
  1758. &dev_attr_ctxid_pid.attr,
  1759. &dev_attr_ctxid_masks.attr,
  1760. &dev_attr_vmid_idx.attr,
  1761. &dev_attr_vmid_val.attr,
  1762. &dev_attr_vmid_masks.attr,
  1763. &dev_attr_cpu.attr,
  1764. NULL,
  1765. };
  1766. struct etmv4_reg {
  1767. void __iomem *addr;
  1768. u32 data;
  1769. };
  1770. static void do_smp_cross_read(void *data)
  1771. {
  1772. struct etmv4_reg *reg = data;
  1773. reg->data = readl_relaxed(reg->addr);
  1774. }
  1775. static u32 etmv4_cross_read(const struct device *dev, u32 offset)
  1776. {
  1777. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev);
  1778. struct etmv4_reg reg;
  1779. reg.addr = drvdata->base + offset;
  1780. /*
  1781. * smp cross call ensures the CPU will be powered up before
  1782. * accessing the ETMv4 trace core registers
  1783. */
  1784. smp_call_function_single(drvdata->cpu, do_smp_cross_read, &reg, 1);
  1785. return reg.data;
  1786. }
  1787. #define coresight_etm4x_reg(name, offset) \
  1788. coresight_simple_reg32(struct etmv4_drvdata, name, offset)
  1789. #define coresight_etm4x_cross_read(name, offset) \
  1790. coresight_simple_func(struct etmv4_drvdata, etmv4_cross_read, \
  1791. name, offset)
  1792. coresight_etm4x_reg(trcpdcr, TRCPDCR);
  1793. coresight_etm4x_reg(trcpdsr, TRCPDSR);
  1794. coresight_etm4x_reg(trclsr, TRCLSR);
  1795. coresight_etm4x_reg(trcauthstatus, TRCAUTHSTATUS);
  1796. coresight_etm4x_reg(trcdevid, TRCDEVID);
  1797. coresight_etm4x_reg(trcdevtype, TRCDEVTYPE);
  1798. coresight_etm4x_reg(trcpidr0, TRCPIDR0);
  1799. coresight_etm4x_reg(trcpidr1, TRCPIDR1);
  1800. coresight_etm4x_reg(trcpidr2, TRCPIDR2);
  1801. coresight_etm4x_reg(trcpidr3, TRCPIDR3);
  1802. coresight_etm4x_cross_read(trcoslsr, TRCOSLSR);
  1803. coresight_etm4x_cross_read(trcconfig, TRCCONFIGR);
  1804. coresight_etm4x_cross_read(trctraceid, TRCTRACEIDR);
  1805. static struct attribute *coresight_etmv4_mgmt_attrs[] = {
  1806. &dev_attr_trcoslsr.attr,
  1807. &dev_attr_trcpdcr.attr,
  1808. &dev_attr_trcpdsr.attr,
  1809. &dev_attr_trclsr.attr,
  1810. &dev_attr_trcconfig.attr,
  1811. &dev_attr_trctraceid.attr,
  1812. &dev_attr_trcauthstatus.attr,
  1813. &dev_attr_trcdevid.attr,
  1814. &dev_attr_trcdevtype.attr,
  1815. &dev_attr_trcpidr0.attr,
  1816. &dev_attr_trcpidr1.attr,
  1817. &dev_attr_trcpidr2.attr,
  1818. &dev_attr_trcpidr3.attr,
  1819. NULL,
  1820. };
  1821. coresight_etm4x_cross_read(trcidr0, TRCIDR0);
  1822. coresight_etm4x_cross_read(trcidr1, TRCIDR1);
  1823. coresight_etm4x_cross_read(trcidr2, TRCIDR2);
  1824. coresight_etm4x_cross_read(trcidr3, TRCIDR3);
  1825. coresight_etm4x_cross_read(trcidr4, TRCIDR4);
  1826. coresight_etm4x_cross_read(trcidr5, TRCIDR5);
  1827. /* trcidr[6,7] are reserved */
  1828. coresight_etm4x_cross_read(trcidr8, TRCIDR8);
  1829. coresight_etm4x_cross_read(trcidr9, TRCIDR9);
  1830. coresight_etm4x_cross_read(trcidr10, TRCIDR10);
  1831. coresight_etm4x_cross_read(trcidr11, TRCIDR11);
  1832. coresight_etm4x_cross_read(trcidr12, TRCIDR12);
  1833. coresight_etm4x_cross_read(trcidr13, TRCIDR13);
  1834. static struct attribute *coresight_etmv4_trcidr_attrs[] = {
  1835. &dev_attr_trcidr0.attr,
  1836. &dev_attr_trcidr1.attr,
  1837. &dev_attr_trcidr2.attr,
  1838. &dev_attr_trcidr3.attr,
  1839. &dev_attr_trcidr4.attr,
  1840. &dev_attr_trcidr5.attr,
  1841. /* trcidr[6,7] are reserved */
  1842. &dev_attr_trcidr8.attr,
  1843. &dev_attr_trcidr9.attr,
  1844. &dev_attr_trcidr10.attr,
  1845. &dev_attr_trcidr11.attr,
  1846. &dev_attr_trcidr12.attr,
  1847. &dev_attr_trcidr13.attr,
  1848. NULL,
  1849. };
  1850. static const struct attribute_group coresight_etmv4_group = {
  1851. .attrs = coresight_etmv4_attrs,
  1852. };
  1853. static const struct attribute_group coresight_etmv4_mgmt_group = {
  1854. .attrs = coresight_etmv4_mgmt_attrs,
  1855. .name = "mgmt",
  1856. };
  1857. static const struct attribute_group coresight_etmv4_trcidr_group = {
  1858. .attrs = coresight_etmv4_trcidr_attrs,
  1859. .name = "trcidr",
  1860. };
  1861. const struct attribute_group *coresight_etmv4_groups[] = {
  1862. &coresight_etmv4_group,
  1863. &coresight_etmv4_mgmt_group,
  1864. &coresight_etmv4_trcidr_group,
  1865. NULL,
  1866. };