hdmi5.c 18 KB

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  1. /*
  2. * HDMI driver for OMAP5
  3. *
  4. * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * Authors:
  7. * Yong Zhi
  8. * Mythri pk
  9. * Archit Taneja <archit@ti.com>
  10. * Tomi Valkeinen <tomi.valkeinen@ti.com>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License version 2 as published by
  14. * the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but WITHOUT
  17. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  19. * more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along with
  22. * this program. If not, see <http://www.gnu.org/licenses/>.
  23. */
  24. #define DSS_SUBSYS_NAME "HDMI"
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/err.h>
  28. #include <linux/io.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/mutex.h>
  31. #include <linux/delay.h>
  32. #include <linux/string.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/pm_runtime.h>
  35. #include <linux/clk.h>
  36. #include <linux/gpio.h>
  37. #include <linux/regulator/consumer.h>
  38. #include <linux/component.h>
  39. #include <linux/of.h>
  40. #include <linux/of_graph.h>
  41. #include <sound/omap-hdmi-audio.h>
  42. #include "omapdss.h"
  43. #include "hdmi5_core.h"
  44. #include "dss.h"
  45. static int hdmi_runtime_get(struct omap_hdmi *hdmi)
  46. {
  47. int r;
  48. DSSDBG("hdmi_runtime_get\n");
  49. r = pm_runtime_get_sync(&hdmi->pdev->dev);
  50. WARN_ON(r < 0);
  51. if (r < 0)
  52. return r;
  53. return 0;
  54. }
  55. static void hdmi_runtime_put(struct omap_hdmi *hdmi)
  56. {
  57. int r;
  58. DSSDBG("hdmi_runtime_put\n");
  59. r = pm_runtime_put_sync(&hdmi->pdev->dev);
  60. WARN_ON(r < 0 && r != -ENOSYS);
  61. }
  62. static irqreturn_t hdmi_irq_handler(int irq, void *data)
  63. {
  64. struct omap_hdmi *hdmi = data;
  65. struct hdmi_wp_data *wp = &hdmi->wp;
  66. u32 irqstatus;
  67. irqstatus = hdmi_wp_get_irqstatus(wp);
  68. hdmi_wp_set_irqstatus(wp, irqstatus);
  69. if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  70. irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  71. u32 v;
  72. /*
  73. * If we get both connect and disconnect interrupts at the same
  74. * time, turn off the PHY, clear interrupts, and restart, which
  75. * raises connect interrupt if a cable is connected, or nothing
  76. * if cable is not connected.
  77. */
  78. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  79. /*
  80. * We always get bogus CONNECT & DISCONNECT interrupts when
  81. * setting the PHY to LDOON. To ignore those, we force the RXDET
  82. * line to 0 until the PHY power state has been changed.
  83. */
  84. v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
  85. v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
  86. v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
  87. hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
  88. hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
  89. HDMI_IRQ_LINK_DISCONNECT);
  90. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  91. REG_FLD_MOD(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
  92. } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
  93. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
  94. } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  95. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  96. }
  97. return IRQ_HANDLED;
  98. }
  99. static int hdmi_init_regulator(struct omap_hdmi *hdmi)
  100. {
  101. struct regulator *reg;
  102. if (hdmi->vdda_reg != NULL)
  103. return 0;
  104. reg = devm_regulator_get(&hdmi->pdev->dev, "vdda");
  105. if (IS_ERR(reg)) {
  106. DSSERR("can't get VDDA regulator\n");
  107. return PTR_ERR(reg);
  108. }
  109. hdmi->vdda_reg = reg;
  110. return 0;
  111. }
  112. static int hdmi_power_on_core(struct omap_hdmi *hdmi)
  113. {
  114. int r;
  115. r = regulator_enable(hdmi->vdda_reg);
  116. if (r)
  117. return r;
  118. r = hdmi_runtime_get(hdmi);
  119. if (r)
  120. goto err_runtime_get;
  121. /* Make selection of HDMI in DSS */
  122. dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK);
  123. hdmi->core_enabled = true;
  124. return 0;
  125. err_runtime_get:
  126. regulator_disable(hdmi->vdda_reg);
  127. return r;
  128. }
  129. static void hdmi_power_off_core(struct omap_hdmi *hdmi)
  130. {
  131. hdmi->core_enabled = false;
  132. hdmi_runtime_put(hdmi);
  133. regulator_disable(hdmi->vdda_reg);
  134. }
  135. static int hdmi_power_on_full(struct omap_hdmi *hdmi)
  136. {
  137. int r;
  138. struct videomode *vm;
  139. struct dss_pll_clock_info hdmi_cinfo = { 0 };
  140. unsigned int pc;
  141. r = hdmi_power_on_core(hdmi);
  142. if (r)
  143. return r;
  144. vm = &hdmi->cfg.vm;
  145. DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
  146. vm->vactive);
  147. pc = vm->pixelclock;
  148. if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
  149. pc *= 2;
  150. /* DSS_HDMI_TCLK is bitclk / 10 */
  151. pc *= 10;
  152. dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin),
  153. pc, &hdmi_cinfo);
  154. /* disable and clear irqs */
  155. hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
  156. hdmi_wp_set_irqstatus(&hdmi->wp,
  157. hdmi_wp_get_irqstatus(&hdmi->wp));
  158. r = dss_pll_enable(&hdmi->pll.pll);
  159. if (r) {
  160. DSSERR("Failed to enable PLL\n");
  161. goto err_pll_enable;
  162. }
  163. r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo);
  164. if (r) {
  165. DSSERR("Failed to configure PLL\n");
  166. goto err_pll_cfg;
  167. }
  168. r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco,
  169. hdmi_cinfo.clkout[0]);
  170. if (r) {
  171. DSSDBG("Failed to start PHY\n");
  172. goto err_phy_cfg;
  173. }
  174. r = hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_LDOON);
  175. if (r)
  176. goto err_phy_pwr;
  177. hdmi5_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg);
  178. /* tv size */
  179. dss_mgr_set_timings(&hdmi->output, vm);
  180. r = dss_mgr_enable(&hdmi->output);
  181. if (r)
  182. goto err_mgr_enable;
  183. r = hdmi_wp_video_start(&hdmi->wp);
  184. if (r)
  185. goto err_vid_enable;
  186. hdmi_wp_set_irqenable(&hdmi->wp,
  187. HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
  188. return 0;
  189. err_vid_enable:
  190. dss_mgr_disable(&hdmi->output);
  191. err_mgr_enable:
  192. hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
  193. err_phy_pwr:
  194. err_phy_cfg:
  195. err_pll_cfg:
  196. dss_pll_disable(&hdmi->pll.pll);
  197. err_pll_enable:
  198. hdmi_power_off_core(hdmi);
  199. return -EIO;
  200. }
  201. static void hdmi_power_off_full(struct omap_hdmi *hdmi)
  202. {
  203. hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
  204. hdmi_wp_video_stop(&hdmi->wp);
  205. dss_mgr_disable(&hdmi->output);
  206. hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
  207. dss_pll_disable(&hdmi->pll.pll);
  208. hdmi_power_off_core(hdmi);
  209. }
  210. static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
  211. struct videomode *vm)
  212. {
  213. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  214. if (!dispc_mgr_timings_ok(hdmi->dss->dispc, dssdev->dispc_channel, vm))
  215. return -EINVAL;
  216. return 0;
  217. }
  218. static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
  219. struct videomode *vm)
  220. {
  221. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  222. mutex_lock(&hdmi->lock);
  223. hdmi->cfg.vm = *vm;
  224. dispc_set_tv_pclk(hdmi->dss->dispc, vm->pixelclock);
  225. mutex_unlock(&hdmi->lock);
  226. }
  227. static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
  228. struct videomode *vm)
  229. {
  230. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  231. *vm = hdmi->cfg.vm;
  232. }
  233. static int hdmi_dump_regs(struct seq_file *s, void *p)
  234. {
  235. struct omap_hdmi *hdmi = s->private;
  236. mutex_lock(&hdmi->lock);
  237. if (hdmi_runtime_get(hdmi)) {
  238. mutex_unlock(&hdmi->lock);
  239. return 0;
  240. }
  241. hdmi_wp_dump(&hdmi->wp, s);
  242. hdmi_pll_dump(&hdmi->pll, s);
  243. hdmi_phy_dump(&hdmi->phy, s);
  244. hdmi5_core_dump(&hdmi->core, s);
  245. hdmi_runtime_put(hdmi);
  246. mutex_unlock(&hdmi->lock);
  247. return 0;
  248. }
  249. static int read_edid(struct omap_hdmi *hdmi, u8 *buf, int len)
  250. {
  251. int r;
  252. int idlemode;
  253. mutex_lock(&hdmi->lock);
  254. r = hdmi_runtime_get(hdmi);
  255. BUG_ON(r);
  256. idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
  257. /* No-idle mode */
  258. REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
  259. r = hdmi5_read_edid(&hdmi->core, buf, len);
  260. REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
  261. hdmi_runtime_put(hdmi);
  262. mutex_unlock(&hdmi->lock);
  263. return r;
  264. }
  265. static void hdmi_start_audio_stream(struct omap_hdmi *hd)
  266. {
  267. REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
  268. hdmi_wp_audio_enable(&hd->wp, true);
  269. hdmi_wp_audio_core_req_enable(&hd->wp, true);
  270. }
  271. static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
  272. {
  273. hdmi_wp_audio_core_req_enable(&hd->wp, false);
  274. hdmi_wp_audio_enable(&hd->wp, false);
  275. REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
  276. }
  277. static int hdmi_display_enable(struct omap_dss_device *dssdev)
  278. {
  279. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  280. unsigned long flags;
  281. int r = 0;
  282. DSSDBG("ENTER hdmi_display_enable\n");
  283. mutex_lock(&hdmi->lock);
  284. if (!dssdev->dispc_channel_connected) {
  285. DSSERR("failed to enable display: no output/manager\n");
  286. r = -ENODEV;
  287. goto err0;
  288. }
  289. r = hdmi_power_on_full(hdmi);
  290. if (r) {
  291. DSSERR("failed to power on device\n");
  292. goto err0;
  293. }
  294. if (hdmi->audio_configured) {
  295. r = hdmi5_audio_config(&hdmi->core, &hdmi->wp,
  296. &hdmi->audio_config,
  297. hdmi->cfg.vm.pixelclock);
  298. if (r) {
  299. DSSERR("Error restoring audio configuration: %d", r);
  300. hdmi->audio_abort_cb(&hdmi->pdev->dev);
  301. hdmi->audio_configured = false;
  302. }
  303. }
  304. spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
  305. if (hdmi->audio_configured && hdmi->audio_playing)
  306. hdmi_start_audio_stream(hdmi);
  307. hdmi->display_enabled = true;
  308. spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
  309. mutex_unlock(&hdmi->lock);
  310. return 0;
  311. err0:
  312. mutex_unlock(&hdmi->lock);
  313. return r;
  314. }
  315. static void hdmi_display_disable(struct omap_dss_device *dssdev)
  316. {
  317. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  318. unsigned long flags;
  319. DSSDBG("Enter hdmi_display_disable\n");
  320. mutex_lock(&hdmi->lock);
  321. spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
  322. hdmi_stop_audio_stream(hdmi);
  323. hdmi->display_enabled = false;
  324. spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
  325. hdmi_power_off_full(hdmi);
  326. mutex_unlock(&hdmi->lock);
  327. }
  328. static int hdmi_core_enable(struct omap_hdmi *hdmi)
  329. {
  330. int r = 0;
  331. DSSDBG("ENTER omapdss_hdmi_core_enable\n");
  332. mutex_lock(&hdmi->lock);
  333. r = hdmi_power_on_core(hdmi);
  334. if (r) {
  335. DSSERR("failed to power on device\n");
  336. goto err0;
  337. }
  338. mutex_unlock(&hdmi->lock);
  339. return 0;
  340. err0:
  341. mutex_unlock(&hdmi->lock);
  342. return r;
  343. }
  344. static void hdmi_core_disable(struct omap_hdmi *hdmi)
  345. {
  346. DSSDBG("Enter omapdss_hdmi_core_disable\n");
  347. mutex_lock(&hdmi->lock);
  348. hdmi_power_off_core(hdmi);
  349. mutex_unlock(&hdmi->lock);
  350. }
  351. static int hdmi_connect(struct omap_dss_device *dssdev,
  352. struct omap_dss_device *dst)
  353. {
  354. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  355. int r;
  356. r = hdmi_init_regulator(hdmi);
  357. if (r)
  358. return r;
  359. r = dss_mgr_connect(&hdmi->output, dssdev);
  360. if (r)
  361. return r;
  362. r = omapdss_output_set_device(dssdev, dst);
  363. if (r) {
  364. DSSERR("failed to connect output to new device: %s\n",
  365. dst->name);
  366. dss_mgr_disconnect(&hdmi->output, dssdev);
  367. return r;
  368. }
  369. return 0;
  370. }
  371. static void hdmi_disconnect(struct omap_dss_device *dssdev,
  372. struct omap_dss_device *dst)
  373. {
  374. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  375. WARN_ON(dst != dssdev->dst);
  376. if (dst != dssdev->dst)
  377. return;
  378. omapdss_output_unset_device(dssdev);
  379. dss_mgr_disconnect(&hdmi->output, dssdev);
  380. }
  381. static int hdmi_read_edid(struct omap_dss_device *dssdev,
  382. u8 *edid, int len)
  383. {
  384. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  385. bool need_enable;
  386. int r;
  387. need_enable = hdmi->core_enabled == false;
  388. if (need_enable) {
  389. r = hdmi_core_enable(hdmi);
  390. if (r)
  391. return r;
  392. }
  393. r = read_edid(hdmi, edid, len);
  394. if (need_enable)
  395. hdmi_core_disable(hdmi);
  396. return r;
  397. }
  398. static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
  399. const struct hdmi_avi_infoframe *avi)
  400. {
  401. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  402. hdmi->cfg.infoframe = *avi;
  403. return 0;
  404. }
  405. static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
  406. bool hdmi_mode)
  407. {
  408. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  409. hdmi->cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
  410. return 0;
  411. }
  412. static const struct omapdss_hdmi_ops hdmi_ops = {
  413. .connect = hdmi_connect,
  414. .disconnect = hdmi_disconnect,
  415. .enable = hdmi_display_enable,
  416. .disable = hdmi_display_disable,
  417. .check_timings = hdmi_display_check_timing,
  418. .set_timings = hdmi_display_set_timing,
  419. .get_timings = hdmi_display_get_timings,
  420. .read_edid = hdmi_read_edid,
  421. .set_infoframe = hdmi_set_infoframe,
  422. .set_hdmi_mode = hdmi_set_hdmi_mode,
  423. };
  424. static void hdmi_init_output(struct omap_hdmi *hdmi)
  425. {
  426. struct omap_dss_device *out = &hdmi->output;
  427. out->dev = &hdmi->pdev->dev;
  428. out->id = OMAP_DSS_OUTPUT_HDMI;
  429. out->output_type = OMAP_DISPLAY_TYPE_HDMI;
  430. out->name = "hdmi.0";
  431. out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
  432. out->ops.hdmi = &hdmi_ops;
  433. out->owner = THIS_MODULE;
  434. omapdss_register_output(out);
  435. }
  436. static void hdmi_uninit_output(struct omap_hdmi *hdmi)
  437. {
  438. struct omap_dss_device *out = &hdmi->output;
  439. omapdss_unregister_output(out);
  440. }
  441. static int hdmi_probe_of(struct omap_hdmi *hdmi)
  442. {
  443. struct platform_device *pdev = hdmi->pdev;
  444. struct device_node *node = pdev->dev.of_node;
  445. struct device_node *ep;
  446. int r;
  447. ep = of_graph_get_endpoint_by_regs(node, 0, 0);
  448. if (!ep)
  449. return 0;
  450. r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy);
  451. if (r)
  452. goto err;
  453. of_node_put(ep);
  454. return 0;
  455. err:
  456. of_node_put(ep);
  457. return r;
  458. }
  459. /* Audio callbacks */
  460. static int hdmi_audio_startup(struct device *dev,
  461. void (*abort_cb)(struct device *dev))
  462. {
  463. struct omap_hdmi *hd = dev_get_drvdata(dev);
  464. mutex_lock(&hd->lock);
  465. WARN_ON(hd->audio_abort_cb != NULL);
  466. hd->audio_abort_cb = abort_cb;
  467. mutex_unlock(&hd->lock);
  468. return 0;
  469. }
  470. static int hdmi_audio_shutdown(struct device *dev)
  471. {
  472. struct omap_hdmi *hd = dev_get_drvdata(dev);
  473. mutex_lock(&hd->lock);
  474. hd->audio_abort_cb = NULL;
  475. hd->audio_configured = false;
  476. hd->audio_playing = false;
  477. mutex_unlock(&hd->lock);
  478. return 0;
  479. }
  480. static int hdmi_audio_start(struct device *dev)
  481. {
  482. struct omap_hdmi *hd = dev_get_drvdata(dev);
  483. unsigned long flags;
  484. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  485. if (hd->display_enabled) {
  486. if (!hdmi_mode_has_audio(&hd->cfg))
  487. DSSERR("%s: Video mode does not support audio\n",
  488. __func__);
  489. hdmi_start_audio_stream(hd);
  490. }
  491. hd->audio_playing = true;
  492. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  493. return 0;
  494. }
  495. static void hdmi_audio_stop(struct device *dev)
  496. {
  497. struct omap_hdmi *hd = dev_get_drvdata(dev);
  498. unsigned long flags;
  499. if (!hdmi_mode_has_audio(&hd->cfg))
  500. DSSERR("%s: Video mode does not support audio\n", __func__);
  501. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  502. if (hd->display_enabled)
  503. hdmi_stop_audio_stream(hd);
  504. hd->audio_playing = false;
  505. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  506. }
  507. static int hdmi_audio_config(struct device *dev,
  508. struct omap_dss_audio *dss_audio)
  509. {
  510. struct omap_hdmi *hd = dev_get_drvdata(dev);
  511. int ret = 0;
  512. mutex_lock(&hd->lock);
  513. if (hd->display_enabled) {
  514. ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
  515. hd->cfg.vm.pixelclock);
  516. if (ret)
  517. goto out;
  518. }
  519. hd->audio_configured = true;
  520. hd->audio_config = *dss_audio;
  521. out:
  522. mutex_unlock(&hd->lock);
  523. return ret;
  524. }
  525. static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
  526. .audio_startup = hdmi_audio_startup,
  527. .audio_shutdown = hdmi_audio_shutdown,
  528. .audio_start = hdmi_audio_start,
  529. .audio_stop = hdmi_audio_stop,
  530. .audio_config = hdmi_audio_config,
  531. };
  532. static int hdmi_audio_register(struct omap_hdmi *hdmi)
  533. {
  534. struct omap_hdmi_audio_pdata pdata = {
  535. .dev = &hdmi->pdev->dev,
  536. .version = 5,
  537. .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp),
  538. .ops = &hdmi_audio_ops,
  539. };
  540. hdmi->audio_pdev = platform_device_register_data(
  541. &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
  542. &pdata, sizeof(pdata));
  543. if (IS_ERR(hdmi->audio_pdev))
  544. return PTR_ERR(hdmi->audio_pdev);
  545. hdmi_runtime_get(hdmi);
  546. hdmi->wp_idlemode =
  547. REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
  548. hdmi_runtime_put(hdmi);
  549. return 0;
  550. }
  551. /* HDMI HW IP initialisation */
  552. static int hdmi5_bind(struct device *dev, struct device *master, void *data)
  553. {
  554. struct platform_device *pdev = to_platform_device(dev);
  555. struct dss_device *dss = dss_get_device(master);
  556. struct omap_hdmi *hdmi;
  557. int r;
  558. int irq;
  559. hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL);
  560. if (!hdmi)
  561. return -ENOMEM;
  562. hdmi->pdev = pdev;
  563. hdmi->dss = dss;
  564. dev_set_drvdata(&pdev->dev, hdmi);
  565. mutex_init(&hdmi->lock);
  566. spin_lock_init(&hdmi->audio_playing_lock);
  567. r = hdmi_probe_of(hdmi);
  568. if (r)
  569. goto err_free;
  570. r = hdmi_wp_init(pdev, &hdmi->wp, 5);
  571. if (r)
  572. goto err_free;
  573. r = hdmi_pll_init(dss, pdev, &hdmi->pll, &hdmi->wp);
  574. if (r)
  575. goto err_free;
  576. r = hdmi_phy_init(pdev, &hdmi->phy, 5);
  577. if (r)
  578. goto err_pll;
  579. r = hdmi5_core_init(pdev, &hdmi->core);
  580. if (r)
  581. goto err_pll;
  582. irq = platform_get_irq(pdev, 0);
  583. if (irq < 0) {
  584. DSSERR("platform_get_irq failed\n");
  585. r = -ENODEV;
  586. goto err_pll;
  587. }
  588. r = devm_request_threaded_irq(&pdev->dev, irq,
  589. NULL, hdmi_irq_handler,
  590. IRQF_ONESHOT, "OMAP HDMI", hdmi);
  591. if (r) {
  592. DSSERR("HDMI IRQ request failed\n");
  593. goto err_pll;
  594. }
  595. pm_runtime_enable(&pdev->dev);
  596. hdmi_init_output(hdmi);
  597. r = hdmi_audio_register(hdmi);
  598. if (r) {
  599. DSSERR("Registering HDMI audio failed %d\n", r);
  600. hdmi_uninit_output(hdmi);
  601. pm_runtime_disable(&pdev->dev);
  602. return r;
  603. }
  604. hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs,
  605. hdmi);
  606. return 0;
  607. err_pll:
  608. hdmi_pll_uninit(&hdmi->pll);
  609. err_free:
  610. kfree(hdmi);
  611. return r;
  612. }
  613. static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
  614. {
  615. struct omap_hdmi *hdmi = dev_get_drvdata(dev);
  616. dss_debugfs_remove_file(hdmi->debugfs);
  617. if (hdmi->audio_pdev)
  618. platform_device_unregister(hdmi->audio_pdev);
  619. hdmi_uninit_output(hdmi);
  620. hdmi_pll_uninit(&hdmi->pll);
  621. pm_runtime_disable(dev);
  622. kfree(hdmi);
  623. }
  624. static const struct component_ops hdmi5_component_ops = {
  625. .bind = hdmi5_bind,
  626. .unbind = hdmi5_unbind,
  627. };
  628. static int hdmi5_probe(struct platform_device *pdev)
  629. {
  630. return component_add(&pdev->dev, &hdmi5_component_ops);
  631. }
  632. static int hdmi5_remove(struct platform_device *pdev)
  633. {
  634. component_del(&pdev->dev, &hdmi5_component_ops);
  635. return 0;
  636. }
  637. static int hdmi_runtime_suspend(struct device *dev)
  638. {
  639. struct omap_hdmi *hdmi = dev_get_drvdata(dev);
  640. dispc_runtime_put(hdmi->dss->dispc);
  641. return 0;
  642. }
  643. static int hdmi_runtime_resume(struct device *dev)
  644. {
  645. struct omap_hdmi *hdmi = dev_get_drvdata(dev);
  646. int r;
  647. r = dispc_runtime_get(hdmi->dss->dispc);
  648. if (r < 0)
  649. return r;
  650. return 0;
  651. }
  652. static const struct dev_pm_ops hdmi_pm_ops = {
  653. .runtime_suspend = hdmi_runtime_suspend,
  654. .runtime_resume = hdmi_runtime_resume,
  655. };
  656. static const struct of_device_id hdmi_of_match[] = {
  657. { .compatible = "ti,omap5-hdmi", },
  658. { .compatible = "ti,dra7-hdmi", },
  659. {},
  660. };
  661. struct platform_driver omapdss_hdmi5hw_driver = {
  662. .probe = hdmi5_probe,
  663. .remove = hdmi5_remove,
  664. .driver = {
  665. .name = "omapdss_hdmi5",
  666. .pm = &hdmi_pm_ops,
  667. .of_match_table = hdmi_of_match,
  668. .suppress_bind_attrs = true,
  669. },
  670. };