intel_atomic.c 12 KB

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  1. /*
  2. * Copyright © 2015 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. */
  23. /**
  24. * DOC: atomic modeset support
  25. *
  26. * The functions here implement the state management and hardware programming
  27. * dispatch required by the atomic modeset infrastructure.
  28. * See intel_atomic_plane.c for the plane-specific atomic functionality.
  29. */
  30. #include <drm/drmP.h>
  31. #include <drm/drm_atomic.h>
  32. #include <drm/drm_atomic_helper.h>
  33. #include <drm/drm_plane_helper.h>
  34. #include "intel_drv.h"
  35. /**
  36. * intel_digital_connector_atomic_get_property - hook for connector->atomic_get_property.
  37. * @connector: Connector to get the property for.
  38. * @state: Connector state to retrieve the property from.
  39. * @property: Property to retrieve.
  40. * @val: Return value for the property.
  41. *
  42. * Returns the atomic property value for a digital connector.
  43. */
  44. int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
  45. const struct drm_connector_state *state,
  46. struct drm_property *property,
  47. uint64_t *val)
  48. {
  49. struct drm_device *dev = connector->dev;
  50. struct drm_i915_private *dev_priv = to_i915(dev);
  51. struct intel_digital_connector_state *intel_conn_state =
  52. to_intel_digital_connector_state(state);
  53. if (property == dev_priv->force_audio_property)
  54. *val = intel_conn_state->force_audio;
  55. else if (property == dev_priv->broadcast_rgb_property)
  56. *val = intel_conn_state->broadcast_rgb;
  57. else {
  58. DRM_DEBUG_ATOMIC("Unknown property %s\n", property->name);
  59. return -EINVAL;
  60. }
  61. return 0;
  62. }
  63. /**
  64. * intel_digital_connector_atomic_set_property - hook for connector->atomic_set_property.
  65. * @connector: Connector to set the property for.
  66. * @state: Connector state to set the property on.
  67. * @property: Property to set.
  68. * @val: New value for the property.
  69. *
  70. * Sets the atomic property value for a digital connector.
  71. */
  72. int intel_digital_connector_atomic_set_property(struct drm_connector *connector,
  73. struct drm_connector_state *state,
  74. struct drm_property *property,
  75. uint64_t val)
  76. {
  77. struct drm_device *dev = connector->dev;
  78. struct drm_i915_private *dev_priv = to_i915(dev);
  79. struct intel_digital_connector_state *intel_conn_state =
  80. to_intel_digital_connector_state(state);
  81. if (property == dev_priv->force_audio_property) {
  82. intel_conn_state->force_audio = val;
  83. return 0;
  84. }
  85. if (property == dev_priv->broadcast_rgb_property) {
  86. intel_conn_state->broadcast_rgb = val;
  87. return 0;
  88. }
  89. DRM_DEBUG_ATOMIC("Unknown property %s\n", property->name);
  90. return -EINVAL;
  91. }
  92. int intel_digital_connector_atomic_check(struct drm_connector *conn,
  93. struct drm_connector_state *new_state)
  94. {
  95. struct intel_digital_connector_state *new_conn_state =
  96. to_intel_digital_connector_state(new_state);
  97. struct drm_connector_state *old_state =
  98. drm_atomic_get_old_connector_state(new_state->state, conn);
  99. struct intel_digital_connector_state *old_conn_state =
  100. to_intel_digital_connector_state(old_state);
  101. struct drm_crtc_state *crtc_state;
  102. intel_hdcp_atomic_check(conn, old_state, new_state);
  103. if (!new_state->crtc)
  104. return 0;
  105. crtc_state = drm_atomic_get_new_crtc_state(new_state->state, new_state->crtc);
  106. /*
  107. * These properties are handled by fastset, and might not end
  108. * up in a modeset.
  109. */
  110. if (new_conn_state->force_audio != old_conn_state->force_audio ||
  111. new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
  112. new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
  113. new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode)
  114. crtc_state->mode_changed = true;
  115. return 0;
  116. }
  117. /**
  118. * intel_digital_connector_duplicate_state - duplicate connector state
  119. * @connector: digital connector
  120. *
  121. * Allocates and returns a copy of the connector state (both common and
  122. * digital connector specific) for the specified connector.
  123. *
  124. * Returns: The newly allocated connector state, or NULL on failure.
  125. */
  126. struct drm_connector_state *
  127. intel_digital_connector_duplicate_state(struct drm_connector *connector)
  128. {
  129. struct intel_digital_connector_state *state;
  130. state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
  131. if (!state)
  132. return NULL;
  133. __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
  134. return &state->base;
  135. }
  136. /**
  137. * intel_crtc_duplicate_state - duplicate crtc state
  138. * @crtc: drm crtc
  139. *
  140. * Allocates and returns a copy of the crtc state (both common and
  141. * Intel-specific) for the specified crtc.
  142. *
  143. * Returns: The newly allocated crtc state, or NULL on failure.
  144. */
  145. struct drm_crtc_state *
  146. intel_crtc_duplicate_state(struct drm_crtc *crtc)
  147. {
  148. struct intel_crtc_state *crtc_state;
  149. crtc_state = kmemdup(crtc->state, sizeof(*crtc_state), GFP_KERNEL);
  150. if (!crtc_state)
  151. return NULL;
  152. __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);
  153. crtc_state->update_pipe = false;
  154. crtc_state->disable_lp_wm = false;
  155. crtc_state->disable_cxsr = false;
  156. crtc_state->update_wm_pre = false;
  157. crtc_state->update_wm_post = false;
  158. crtc_state->fb_changed = false;
  159. crtc_state->fifo_changed = false;
  160. crtc_state->wm.need_postvbl_update = false;
  161. crtc_state->fb_bits = 0;
  162. return &crtc_state->base;
  163. }
  164. /**
  165. * intel_crtc_destroy_state - destroy crtc state
  166. * @crtc: drm crtc
  167. * @state: the state to destroy
  168. *
  169. * Destroys the crtc state (both common and Intel-specific) for the
  170. * specified crtc.
  171. */
  172. void
  173. intel_crtc_destroy_state(struct drm_crtc *crtc,
  174. struct drm_crtc_state *state)
  175. {
  176. drm_atomic_helper_crtc_destroy_state(crtc, state);
  177. }
  178. /**
  179. * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
  180. * @dev_priv: i915 device
  181. * @intel_crtc: intel crtc
  182. * @crtc_state: incoming crtc_state to validate and setup scalers
  183. *
  184. * This function sets up scalers based on staged scaling requests for
  185. * a @crtc and its planes. It is called from crtc level check path. If request
  186. * is a supportable request, it attaches scalers to requested planes and crtc.
  187. *
  188. * This function takes into account the current scaler(s) in use by any planes
  189. * not being part of this atomic state
  190. *
  191. * Returns:
  192. * 0 - scalers were setup succesfully
  193. * error code - otherwise
  194. */
  195. int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
  196. struct intel_crtc *intel_crtc,
  197. struct intel_crtc_state *crtc_state)
  198. {
  199. struct drm_plane *plane = NULL;
  200. struct intel_plane *intel_plane;
  201. struct intel_plane_state *plane_state = NULL;
  202. struct intel_crtc_scaler_state *scaler_state =
  203. &crtc_state->scaler_state;
  204. struct drm_atomic_state *drm_state = crtc_state->base.state;
  205. struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state);
  206. int num_scalers_need;
  207. int i, j;
  208. num_scalers_need = hweight32(scaler_state->scaler_users);
  209. /*
  210. * High level flow:
  211. * - staged scaler requests are already in scaler_state->scaler_users
  212. * - check whether staged scaling requests can be supported
  213. * - add planes using scalers that aren't in current transaction
  214. * - assign scalers to requested users
  215. * - as part of plane commit, scalers will be committed
  216. * (i.e., either attached or detached) to respective planes in hw
  217. * - as part of crtc_commit, scaler will be either attached or detached
  218. * to crtc in hw
  219. */
  220. /* fail if required scalers > available scalers */
  221. if (num_scalers_need > intel_crtc->num_scalers){
  222. DRM_DEBUG_KMS("Too many scaling requests %d > %d\n",
  223. num_scalers_need, intel_crtc->num_scalers);
  224. return -EINVAL;
  225. }
  226. /* walkthrough scaler_users bits and start assigning scalers */
  227. for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
  228. int *scaler_id;
  229. const char *name;
  230. int idx;
  231. /* skip if scaler not required */
  232. if (!(scaler_state->scaler_users & (1 << i)))
  233. continue;
  234. if (i == SKL_CRTC_INDEX) {
  235. name = "CRTC";
  236. idx = intel_crtc->base.base.id;
  237. /* panel fitter case: assign as a crtc scaler */
  238. scaler_id = &scaler_state->scaler_id;
  239. } else {
  240. name = "PLANE";
  241. /* plane scaler case: assign as a plane scaler */
  242. /* find the plane that set the bit as scaler_user */
  243. plane = drm_state->planes[i].ptr;
  244. /*
  245. * to enable/disable hq mode, add planes that are using scaler
  246. * into this transaction
  247. */
  248. if (!plane) {
  249. struct drm_plane_state *state;
  250. plane = drm_plane_from_index(&dev_priv->drm, i);
  251. state = drm_atomic_get_plane_state(drm_state, plane);
  252. if (IS_ERR(state)) {
  253. DRM_DEBUG_KMS("Failed to add [PLANE:%d] to drm_state\n",
  254. plane->base.id);
  255. return PTR_ERR(state);
  256. }
  257. /*
  258. * the plane is added after plane checks are run,
  259. * but since this plane is unchanged just do the
  260. * minimum required validation.
  261. */
  262. crtc_state->base.planes_changed = true;
  263. }
  264. intel_plane = to_intel_plane(plane);
  265. idx = plane->base.id;
  266. /* plane on different crtc cannot be a scaler user of this crtc */
  267. if (WARN_ON(intel_plane->pipe != intel_crtc->pipe)) {
  268. continue;
  269. }
  270. plane_state = intel_atomic_get_new_plane_state(intel_state,
  271. intel_plane);
  272. scaler_id = &plane_state->scaler_id;
  273. }
  274. if (*scaler_id < 0) {
  275. /* find a free scaler */
  276. for (j = 0; j < intel_crtc->num_scalers; j++) {
  277. if (!scaler_state->scalers[j].in_use) {
  278. scaler_state->scalers[j].in_use = 1;
  279. *scaler_id = j;
  280. DRM_DEBUG_KMS("Attached scaler id %u.%u to %s:%d\n",
  281. intel_crtc->pipe, *scaler_id, name, idx);
  282. break;
  283. }
  284. }
  285. }
  286. if (WARN_ON(*scaler_id < 0)) {
  287. DRM_DEBUG_KMS("Cannot find scaler for %s:%d\n", name, idx);
  288. continue;
  289. }
  290. /* set scaler mode */
  291. if ((INTEL_GEN(dev_priv) >= 9) &&
  292. plane_state && plane_state->base.fb &&
  293. plane_state->base.fb->format->format ==
  294. DRM_FORMAT_NV12) {
  295. if (INTEL_GEN(dev_priv) == 9 &&
  296. !IS_GEMINILAKE(dev_priv) &&
  297. !IS_SKYLAKE(dev_priv))
  298. scaler_state->scalers[*scaler_id].mode =
  299. SKL_PS_SCALER_MODE_NV12;
  300. else
  301. scaler_state->scalers[*scaler_id].mode =
  302. PS_SCALER_MODE_PLANAR;
  303. } else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
  304. /*
  305. * when only 1 scaler is in use on either pipe A or B,
  306. * scaler 0 operates in high quality (HQ) mode.
  307. * In this case use scaler 0 to take advantage of HQ mode
  308. */
  309. *scaler_id = 0;
  310. scaler_state->scalers[0].in_use = 1;
  311. scaler_state->scalers[0].mode = PS_SCALER_MODE_HQ;
  312. scaler_state->scalers[1].in_use = 0;
  313. } else {
  314. scaler_state->scalers[*scaler_id].mode = PS_SCALER_MODE_DYN;
  315. }
  316. }
  317. return 0;
  318. }
  319. struct drm_atomic_state *
  320. intel_atomic_state_alloc(struct drm_device *dev)
  321. {
  322. struct intel_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
  323. if (!state || drm_atomic_state_init(dev, &state->base) < 0) {
  324. kfree(state);
  325. return NULL;
  326. }
  327. return &state->base;
  328. }
  329. void intel_atomic_state_clear(struct drm_atomic_state *s)
  330. {
  331. struct intel_atomic_state *state = to_intel_atomic_state(s);
  332. drm_atomic_state_default_clear(&state->base);
  333. state->dpll_set = state->modeset = false;
  334. }