sched_policy.c 11 KB

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  1. /*
  2. * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Authors:
  24. * Anhua Xu
  25. * Kevin Tian <kevin.tian@intel.com>
  26. *
  27. * Contributors:
  28. * Min He <min.he@intel.com>
  29. * Bing Niu <bing.niu@intel.com>
  30. * Zhi Wang <zhi.a.wang@intel.com>
  31. *
  32. */
  33. #include "i915_drv.h"
  34. #include "gvt.h"
  35. static bool vgpu_has_pending_workload(struct intel_vgpu *vgpu)
  36. {
  37. enum intel_engine_id i;
  38. struct intel_engine_cs *engine;
  39. for_each_engine(engine, vgpu->gvt->dev_priv, i) {
  40. if (!list_empty(workload_q_head(vgpu, i)))
  41. return true;
  42. }
  43. return false;
  44. }
  45. struct vgpu_sched_data {
  46. struct list_head lru_list;
  47. struct intel_vgpu *vgpu;
  48. bool active;
  49. ktime_t sched_in_time;
  50. ktime_t sched_time;
  51. ktime_t left_ts;
  52. ktime_t allocated_ts;
  53. struct vgpu_sched_ctl sched_ctl;
  54. };
  55. struct gvt_sched_data {
  56. struct intel_gvt *gvt;
  57. struct hrtimer timer;
  58. unsigned long period;
  59. struct list_head lru_runq_head;
  60. ktime_t expire_time;
  61. };
  62. static void vgpu_update_timeslice(struct intel_vgpu *vgpu, ktime_t cur_time)
  63. {
  64. ktime_t delta_ts;
  65. struct vgpu_sched_data *vgpu_data;
  66. if (!vgpu || vgpu == vgpu->gvt->idle_vgpu)
  67. return;
  68. vgpu_data = vgpu->sched_data;
  69. delta_ts = ktime_sub(cur_time, vgpu_data->sched_in_time);
  70. vgpu_data->sched_time = ktime_add(vgpu_data->sched_time, delta_ts);
  71. vgpu_data->left_ts = ktime_sub(vgpu_data->left_ts, delta_ts);
  72. vgpu_data->sched_in_time = cur_time;
  73. }
  74. #define GVT_TS_BALANCE_PERIOD_MS 100
  75. #define GVT_TS_BALANCE_STAGE_NUM 10
  76. static void gvt_balance_timeslice(struct gvt_sched_data *sched_data)
  77. {
  78. struct vgpu_sched_data *vgpu_data;
  79. struct list_head *pos;
  80. static uint64_t stage_check;
  81. int stage = stage_check++ % GVT_TS_BALANCE_STAGE_NUM;
  82. /* The timeslice accumulation reset at stage 0, which is
  83. * allocated again without adding previous debt.
  84. */
  85. if (stage == 0) {
  86. int total_weight = 0;
  87. ktime_t fair_timeslice;
  88. list_for_each(pos, &sched_data->lru_runq_head) {
  89. vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
  90. total_weight += vgpu_data->sched_ctl.weight;
  91. }
  92. list_for_each(pos, &sched_data->lru_runq_head) {
  93. vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
  94. fair_timeslice = ktime_divns(ms_to_ktime(GVT_TS_BALANCE_PERIOD_MS),
  95. total_weight) * vgpu_data->sched_ctl.weight;
  96. vgpu_data->allocated_ts = fair_timeslice;
  97. vgpu_data->left_ts = vgpu_data->allocated_ts;
  98. }
  99. } else {
  100. list_for_each(pos, &sched_data->lru_runq_head) {
  101. vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
  102. /* timeslice for next 100ms should add the left/debt
  103. * slice of previous stages.
  104. */
  105. vgpu_data->left_ts += vgpu_data->allocated_ts;
  106. }
  107. }
  108. }
  109. static void try_to_schedule_next_vgpu(struct intel_gvt *gvt)
  110. {
  111. struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
  112. enum intel_engine_id i;
  113. struct intel_engine_cs *engine;
  114. struct vgpu_sched_data *vgpu_data;
  115. ktime_t cur_time;
  116. /* no need to schedule if next_vgpu is the same with current_vgpu,
  117. * let scheduler chose next_vgpu again by setting it to NULL.
  118. */
  119. if (scheduler->next_vgpu == scheduler->current_vgpu) {
  120. scheduler->next_vgpu = NULL;
  121. return;
  122. }
  123. /*
  124. * after the flag is set, workload dispatch thread will
  125. * stop dispatching workload for current vgpu
  126. */
  127. scheduler->need_reschedule = true;
  128. /* still have uncompleted workload? */
  129. for_each_engine(engine, gvt->dev_priv, i) {
  130. if (scheduler->current_workload[i])
  131. return;
  132. }
  133. cur_time = ktime_get();
  134. vgpu_update_timeslice(scheduler->current_vgpu, cur_time);
  135. vgpu_data = scheduler->next_vgpu->sched_data;
  136. vgpu_data->sched_in_time = cur_time;
  137. /* switch current vgpu */
  138. scheduler->current_vgpu = scheduler->next_vgpu;
  139. scheduler->next_vgpu = NULL;
  140. scheduler->need_reschedule = false;
  141. /* wake up workload dispatch thread */
  142. for_each_engine(engine, gvt->dev_priv, i)
  143. wake_up(&scheduler->waitq[i]);
  144. }
  145. static struct intel_vgpu *find_busy_vgpu(struct gvt_sched_data *sched_data)
  146. {
  147. struct vgpu_sched_data *vgpu_data;
  148. struct intel_vgpu *vgpu = NULL;
  149. struct list_head *head = &sched_data->lru_runq_head;
  150. struct list_head *pos;
  151. /* search a vgpu with pending workload */
  152. list_for_each(pos, head) {
  153. vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
  154. if (!vgpu_has_pending_workload(vgpu_data->vgpu))
  155. continue;
  156. /* Return the vGPU only if it has time slice left */
  157. if (vgpu_data->left_ts > 0) {
  158. vgpu = vgpu_data->vgpu;
  159. break;
  160. }
  161. }
  162. return vgpu;
  163. }
  164. /* in nanosecond */
  165. #define GVT_DEFAULT_TIME_SLICE 1000000
  166. static void tbs_sched_func(struct gvt_sched_data *sched_data)
  167. {
  168. struct intel_gvt *gvt = sched_data->gvt;
  169. struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
  170. struct vgpu_sched_data *vgpu_data;
  171. struct intel_vgpu *vgpu = NULL;
  172. /* no active vgpu or has already had a target */
  173. if (list_empty(&sched_data->lru_runq_head) || scheduler->next_vgpu)
  174. goto out;
  175. vgpu = find_busy_vgpu(sched_data);
  176. if (vgpu) {
  177. scheduler->next_vgpu = vgpu;
  178. /* Move the last used vGPU to the tail of lru_list */
  179. vgpu_data = vgpu->sched_data;
  180. list_del_init(&vgpu_data->lru_list);
  181. list_add_tail(&vgpu_data->lru_list,
  182. &sched_data->lru_runq_head);
  183. } else {
  184. scheduler->next_vgpu = gvt->idle_vgpu;
  185. }
  186. out:
  187. if (scheduler->next_vgpu)
  188. try_to_schedule_next_vgpu(gvt);
  189. }
  190. void intel_gvt_schedule(struct intel_gvt *gvt)
  191. {
  192. struct gvt_sched_data *sched_data = gvt->scheduler.sched_data;
  193. ktime_t cur_time;
  194. mutex_lock(&gvt->lock);
  195. cur_time = ktime_get();
  196. if (test_and_clear_bit(INTEL_GVT_REQUEST_SCHED,
  197. (void *)&gvt->service_request)) {
  198. if (cur_time >= sched_data->expire_time) {
  199. gvt_balance_timeslice(sched_data);
  200. sched_data->expire_time = ktime_add_ms(
  201. cur_time, GVT_TS_BALANCE_PERIOD_MS);
  202. }
  203. }
  204. clear_bit(INTEL_GVT_REQUEST_EVENT_SCHED, (void *)&gvt->service_request);
  205. vgpu_update_timeslice(gvt->scheduler.current_vgpu, cur_time);
  206. tbs_sched_func(sched_data);
  207. mutex_unlock(&gvt->lock);
  208. }
  209. static enum hrtimer_restart tbs_timer_fn(struct hrtimer *timer_data)
  210. {
  211. struct gvt_sched_data *data;
  212. data = container_of(timer_data, struct gvt_sched_data, timer);
  213. intel_gvt_request_service(data->gvt, INTEL_GVT_REQUEST_SCHED);
  214. hrtimer_add_expires_ns(&data->timer, data->period);
  215. return HRTIMER_RESTART;
  216. }
  217. static int tbs_sched_init(struct intel_gvt *gvt)
  218. {
  219. struct intel_gvt_workload_scheduler *scheduler =
  220. &gvt->scheduler;
  221. struct gvt_sched_data *data;
  222. data = kzalloc(sizeof(*data), GFP_KERNEL);
  223. if (!data)
  224. return -ENOMEM;
  225. INIT_LIST_HEAD(&data->lru_runq_head);
  226. hrtimer_init(&data->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  227. data->timer.function = tbs_timer_fn;
  228. data->period = GVT_DEFAULT_TIME_SLICE;
  229. data->gvt = gvt;
  230. scheduler->sched_data = data;
  231. return 0;
  232. }
  233. static void tbs_sched_clean(struct intel_gvt *gvt)
  234. {
  235. struct intel_gvt_workload_scheduler *scheduler =
  236. &gvt->scheduler;
  237. struct gvt_sched_data *data = scheduler->sched_data;
  238. hrtimer_cancel(&data->timer);
  239. kfree(data);
  240. scheduler->sched_data = NULL;
  241. }
  242. static int tbs_sched_init_vgpu(struct intel_vgpu *vgpu)
  243. {
  244. struct vgpu_sched_data *data;
  245. data = kzalloc(sizeof(*data), GFP_KERNEL);
  246. if (!data)
  247. return -ENOMEM;
  248. data->sched_ctl.weight = vgpu->sched_ctl.weight;
  249. data->vgpu = vgpu;
  250. INIT_LIST_HEAD(&data->lru_list);
  251. vgpu->sched_data = data;
  252. return 0;
  253. }
  254. static void tbs_sched_clean_vgpu(struct intel_vgpu *vgpu)
  255. {
  256. struct intel_gvt *gvt = vgpu->gvt;
  257. struct gvt_sched_data *sched_data = gvt->scheduler.sched_data;
  258. kfree(vgpu->sched_data);
  259. vgpu->sched_data = NULL;
  260. /* this vgpu id has been removed */
  261. if (idr_is_empty(&gvt->vgpu_idr))
  262. hrtimer_cancel(&sched_data->timer);
  263. }
  264. static void tbs_sched_start_schedule(struct intel_vgpu *vgpu)
  265. {
  266. struct gvt_sched_data *sched_data = vgpu->gvt->scheduler.sched_data;
  267. struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
  268. if (!list_empty(&vgpu_data->lru_list))
  269. return;
  270. list_add_tail(&vgpu_data->lru_list, &sched_data->lru_runq_head);
  271. if (!hrtimer_active(&sched_data->timer))
  272. hrtimer_start(&sched_data->timer, ktime_add_ns(ktime_get(),
  273. sched_data->period), HRTIMER_MODE_ABS);
  274. vgpu_data->active = true;
  275. }
  276. static void tbs_sched_stop_schedule(struct intel_vgpu *vgpu)
  277. {
  278. struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
  279. list_del_init(&vgpu_data->lru_list);
  280. vgpu_data->active = false;
  281. }
  282. static struct intel_gvt_sched_policy_ops tbs_schedule_ops = {
  283. .init = tbs_sched_init,
  284. .clean = tbs_sched_clean,
  285. .init_vgpu = tbs_sched_init_vgpu,
  286. .clean_vgpu = tbs_sched_clean_vgpu,
  287. .start_schedule = tbs_sched_start_schedule,
  288. .stop_schedule = tbs_sched_stop_schedule,
  289. };
  290. int intel_gvt_init_sched_policy(struct intel_gvt *gvt)
  291. {
  292. gvt->scheduler.sched_ops = &tbs_schedule_ops;
  293. return gvt->scheduler.sched_ops->init(gvt);
  294. }
  295. void intel_gvt_clean_sched_policy(struct intel_gvt *gvt)
  296. {
  297. gvt->scheduler.sched_ops->clean(gvt);
  298. }
  299. int intel_vgpu_init_sched_policy(struct intel_vgpu *vgpu)
  300. {
  301. return vgpu->gvt->scheduler.sched_ops->init_vgpu(vgpu);
  302. }
  303. void intel_vgpu_clean_sched_policy(struct intel_vgpu *vgpu)
  304. {
  305. vgpu->gvt->scheduler.sched_ops->clean_vgpu(vgpu);
  306. }
  307. void intel_vgpu_start_schedule(struct intel_vgpu *vgpu)
  308. {
  309. struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
  310. if (!vgpu_data->active) {
  311. gvt_dbg_core("vgpu%d: start schedule\n", vgpu->id);
  312. vgpu->gvt->scheduler.sched_ops->start_schedule(vgpu);
  313. }
  314. }
  315. void intel_gvt_kick_schedule(struct intel_gvt *gvt)
  316. {
  317. intel_gvt_request_service(gvt, INTEL_GVT_REQUEST_EVENT_SCHED);
  318. }
  319. void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu)
  320. {
  321. struct intel_gvt_workload_scheduler *scheduler =
  322. &vgpu->gvt->scheduler;
  323. int ring_id;
  324. struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
  325. if (!vgpu_data->active)
  326. return;
  327. gvt_dbg_core("vgpu%d: stop schedule\n", vgpu->id);
  328. scheduler->sched_ops->stop_schedule(vgpu);
  329. if (scheduler->next_vgpu == vgpu)
  330. scheduler->next_vgpu = NULL;
  331. if (scheduler->current_vgpu == vgpu) {
  332. /* stop workload dispatching */
  333. scheduler->need_reschedule = true;
  334. scheduler->current_vgpu = NULL;
  335. }
  336. spin_lock_bh(&scheduler->mmio_context_lock);
  337. for (ring_id = 0; ring_id < I915_NUM_ENGINES; ring_id++) {
  338. if (scheduler->engine_owner[ring_id] == vgpu) {
  339. intel_gvt_switch_mmio(vgpu, NULL, ring_id);
  340. scheduler->engine_owner[ring_id] = NULL;
  341. }
  342. }
  343. spin_unlock_bh(&scheduler->mmio_context_lock);
  344. }