opregion.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573
  1. /*
  2. * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. */
  23. #include <linux/acpi.h>
  24. #include "i915_drv.h"
  25. #include "gvt.h"
  26. /*
  27. * Note: Only for GVT-g virtual VBT generation, other usage must
  28. * not do like this.
  29. */
  30. #define _INTEL_BIOS_PRIVATE
  31. #include "intel_vbt_defs.h"
  32. #define OPREGION_SIGNATURE "IntelGraphicsMem"
  33. #define MBOX_VBT (1<<3)
  34. /* device handle */
  35. #define DEVICE_TYPE_CRT 0x01
  36. #define DEVICE_TYPE_EFP1 0x04
  37. #define DEVICE_TYPE_EFP2 0x40
  38. #define DEVICE_TYPE_EFP3 0x20
  39. #define DEVICE_TYPE_EFP4 0x10
  40. #define DEV_SIZE 38
  41. struct opregion_header {
  42. u8 signature[16];
  43. u32 size;
  44. u32 opregion_ver;
  45. u8 bios_ver[32];
  46. u8 vbios_ver[16];
  47. u8 driver_ver[16];
  48. u32 mboxes;
  49. u32 driver_model;
  50. u32 pcon;
  51. u8 dver[32];
  52. u8 rsvd[124];
  53. } __packed;
  54. struct bdb_data_header {
  55. u8 id;
  56. u16 size; /* data size */
  57. } __packed;
  58. struct efp_child_device_config {
  59. u16 handle;
  60. u16 device_type;
  61. u16 device_class;
  62. u8 i2c_speed;
  63. u8 dp_onboard_redriver; /* 158 */
  64. u8 dp_ondock_redriver; /* 158 */
  65. u8 hdmi_level_shifter_value:4; /* 169 */
  66. u8 hdmi_max_data_rate:4; /* 204 */
  67. u16 dtd_buf_ptr; /* 161 */
  68. u8 edidless_efp:1; /* 161 */
  69. u8 compression_enable:1; /* 198 */
  70. u8 compression_method:1; /* 198 */
  71. u8 ganged_edp:1; /* 202 */
  72. u8 skip0:4;
  73. u8 compression_structure_index:4; /* 198 */
  74. u8 skip1:4;
  75. u8 slave_port; /* 202 */
  76. u8 skip2;
  77. u8 dvo_port;
  78. u8 i2c_pin; /* for add-in card */
  79. u8 slave_addr; /* for add-in card */
  80. u8 ddc_pin;
  81. u16 edid_ptr;
  82. u8 dvo_config;
  83. u8 efp_docked_port:1; /* 158 */
  84. u8 lane_reversal:1; /* 184 */
  85. u8 onboard_lspcon:1; /* 192 */
  86. u8 iboost_enable:1; /* 196 */
  87. u8 hpd_invert:1; /* BXT 196 */
  88. u8 slip3:3;
  89. u8 hdmi_compat:1;
  90. u8 dp_compat:1;
  91. u8 tmds_compat:1;
  92. u8 skip4:5;
  93. u8 aux_channel;
  94. u8 dongle_detect;
  95. u8 pipe_cap:2;
  96. u8 sdvo_stall:1; /* 158 */
  97. u8 hpd_status:2;
  98. u8 integrated_encoder:1;
  99. u8 skip5:2;
  100. u8 dvo_wiring;
  101. u8 mipi_bridge_type; /* 171 */
  102. u16 device_class_ext;
  103. u8 dvo_function;
  104. u8 dp_usb_type_c:1; /* 195 */
  105. u8 skip6:7;
  106. u8 dp_usb_type_c_2x_gpio_index; /* 195 */
  107. u16 dp_usb_type_c_2x_gpio_pin; /* 195 */
  108. u8 iboost_dp:4; /* 196 */
  109. u8 iboost_hdmi:4; /* 196 */
  110. } __packed;
  111. struct vbt {
  112. /* header->bdb_offset point to bdb_header offset */
  113. struct vbt_header header;
  114. struct bdb_header bdb_header;
  115. struct bdb_data_header general_features_header;
  116. struct bdb_general_features general_features;
  117. struct bdb_data_header general_definitions_header;
  118. struct bdb_general_definitions general_definitions;
  119. struct efp_child_device_config child0;
  120. struct efp_child_device_config child1;
  121. struct efp_child_device_config child2;
  122. struct efp_child_device_config child3;
  123. struct bdb_data_header driver_features_header;
  124. struct bdb_driver_features driver_features;
  125. };
  126. static void virt_vbt_generation(struct vbt *v)
  127. {
  128. int num_child;
  129. memset(v, 0, sizeof(struct vbt));
  130. v->header.signature[0] = '$';
  131. v->header.signature[1] = 'V';
  132. v->header.signature[2] = 'B';
  133. v->header.signature[3] = 'T';
  134. /* there's features depending on version! */
  135. v->header.version = 155;
  136. v->header.header_size = sizeof(v->header);
  137. v->header.vbt_size = sizeof(struct vbt) - sizeof(v->header);
  138. v->header.bdb_offset = offsetof(struct vbt, bdb_header);
  139. strcpy(&v->bdb_header.signature[0], "BIOS_DATA_BLOCK");
  140. v->bdb_header.version = 186; /* child_dev_size = 38 */
  141. v->bdb_header.header_size = sizeof(v->bdb_header);
  142. v->bdb_header.bdb_size = sizeof(struct vbt) - sizeof(struct vbt_header)
  143. - sizeof(struct bdb_header);
  144. /* general features */
  145. v->general_features_header.id = BDB_GENERAL_FEATURES;
  146. v->general_features_header.size = sizeof(struct bdb_general_features);
  147. v->general_features.int_crt_support = 0;
  148. v->general_features.int_tv_support = 0;
  149. /* child device */
  150. num_child = 4; /* each port has one child */
  151. v->general_definitions_header.id = BDB_GENERAL_DEFINITIONS;
  152. /* size will include child devices */
  153. v->general_definitions_header.size =
  154. sizeof(struct bdb_general_definitions) + num_child * DEV_SIZE;
  155. v->general_definitions.child_dev_size = DEV_SIZE;
  156. /* portA */
  157. v->child0.handle = DEVICE_TYPE_EFP1;
  158. v->child0.device_type = DEVICE_TYPE_DP;
  159. v->child0.dvo_port = DVO_PORT_DPA;
  160. v->child0.aux_channel = DP_AUX_A;
  161. v->child0.dp_compat = true;
  162. v->child0.integrated_encoder = true;
  163. /* portB */
  164. v->child1.handle = DEVICE_TYPE_EFP2;
  165. v->child1.device_type = DEVICE_TYPE_DP;
  166. v->child1.dvo_port = DVO_PORT_DPB;
  167. v->child1.aux_channel = DP_AUX_B;
  168. v->child1.dp_compat = true;
  169. v->child1.integrated_encoder = true;
  170. /* portC */
  171. v->child2.handle = DEVICE_TYPE_EFP3;
  172. v->child2.device_type = DEVICE_TYPE_DP;
  173. v->child2.dvo_port = DVO_PORT_DPC;
  174. v->child2.aux_channel = DP_AUX_C;
  175. v->child2.dp_compat = true;
  176. v->child2.integrated_encoder = true;
  177. /* portD */
  178. v->child3.handle = DEVICE_TYPE_EFP4;
  179. v->child3.device_type = DEVICE_TYPE_DP;
  180. v->child3.dvo_port = DVO_PORT_DPD;
  181. v->child3.aux_channel = DP_AUX_D;
  182. v->child3.dp_compat = true;
  183. v->child3.integrated_encoder = true;
  184. /* driver features */
  185. v->driver_features_header.id = BDB_DRIVER_FEATURES;
  186. v->driver_features_header.size = sizeof(struct bdb_driver_features);
  187. v->driver_features.lvds_config = BDB_DRIVER_FEATURE_NO_LVDS;
  188. }
  189. /**
  190. * intel_vgpu_init_opregion - initialize the stuff used to emulate opregion
  191. * @vgpu: a vGPU
  192. * @gpa: guest physical address of opregion
  193. *
  194. * Returns:
  195. * Zero on success, negative error code if failed.
  196. */
  197. int intel_vgpu_init_opregion(struct intel_vgpu *vgpu)
  198. {
  199. u8 *buf;
  200. struct opregion_header *header;
  201. struct vbt v;
  202. const char opregion_signature[16] = OPREGION_SIGNATURE;
  203. gvt_dbg_core("init vgpu%d opregion\n", vgpu->id);
  204. vgpu_opregion(vgpu)->va = (void *)__get_free_pages(GFP_KERNEL |
  205. __GFP_ZERO,
  206. get_order(INTEL_GVT_OPREGION_SIZE));
  207. if (!vgpu_opregion(vgpu)->va) {
  208. gvt_err("fail to get memory for vgpu virt opregion\n");
  209. return -ENOMEM;
  210. }
  211. /* emulated opregion with VBT mailbox only */
  212. buf = (u8 *)vgpu_opregion(vgpu)->va;
  213. header = (struct opregion_header *)buf;
  214. memcpy(header->signature, opregion_signature,
  215. sizeof(opregion_signature));
  216. header->size = 0x8;
  217. header->opregion_ver = 0x02000000;
  218. header->mboxes = MBOX_VBT;
  219. /* for unknown reason, the value in LID field is incorrect
  220. * which block the windows guest, so workaround it by force
  221. * setting it to "OPEN"
  222. */
  223. buf[INTEL_GVT_OPREGION_CLID] = 0x3;
  224. /* emulated vbt from virt vbt generation */
  225. virt_vbt_generation(&v);
  226. memcpy(buf + INTEL_GVT_OPREGION_VBT_OFFSET, &v, sizeof(struct vbt));
  227. return 0;
  228. }
  229. static int map_vgpu_opregion(struct intel_vgpu *vgpu, bool map)
  230. {
  231. u64 mfn;
  232. int i, ret;
  233. for (i = 0; i < INTEL_GVT_OPREGION_PAGES; i++) {
  234. mfn = intel_gvt_hypervisor_virt_to_mfn(vgpu_opregion(vgpu)->va
  235. + i * PAGE_SIZE);
  236. if (mfn == INTEL_GVT_INVALID_ADDR) {
  237. gvt_vgpu_err("fail to get MFN from VA\n");
  238. return -EINVAL;
  239. }
  240. ret = intel_gvt_hypervisor_map_gfn_to_mfn(vgpu,
  241. vgpu_opregion(vgpu)->gfn[i],
  242. mfn, 1, map);
  243. if (ret) {
  244. gvt_vgpu_err("fail to map GFN to MFN, errno: %d\n",
  245. ret);
  246. return ret;
  247. }
  248. }
  249. vgpu_opregion(vgpu)->mapped = map;
  250. return 0;
  251. }
  252. /**
  253. * intel_vgpu_opregion_base_write_handler - Opregion base register write handler
  254. *
  255. * @vgpu: a vGPU
  256. * @gpa: guest physical address of opregion
  257. *
  258. * Returns:
  259. * Zero on success, negative error code if failed.
  260. */
  261. int intel_vgpu_opregion_base_write_handler(struct intel_vgpu *vgpu, u32 gpa)
  262. {
  263. int i, ret = 0;
  264. gvt_dbg_core("emulate opregion from kernel\n");
  265. switch (intel_gvt_host.hypervisor_type) {
  266. case INTEL_GVT_HYPERVISOR_KVM:
  267. for (i = 0; i < INTEL_GVT_OPREGION_PAGES; i++)
  268. vgpu_opregion(vgpu)->gfn[i] = (gpa >> PAGE_SHIFT) + i;
  269. break;
  270. case INTEL_GVT_HYPERVISOR_XEN:
  271. /**
  272. * Wins guest on Xengt will write this register twice: xen
  273. * hvmloader and windows graphic driver.
  274. */
  275. if (vgpu_opregion(vgpu)->mapped)
  276. map_vgpu_opregion(vgpu, false);
  277. for (i = 0; i < INTEL_GVT_OPREGION_PAGES; i++)
  278. vgpu_opregion(vgpu)->gfn[i] = (gpa >> PAGE_SHIFT) + i;
  279. ret = map_vgpu_opregion(vgpu, true);
  280. break;
  281. default:
  282. ret = -EINVAL;
  283. gvt_vgpu_err("not supported hypervisor\n");
  284. }
  285. return ret;
  286. }
  287. /**
  288. * intel_vgpu_clean_opregion - clean the stuff used to emulate opregion
  289. * @vgpu: a vGPU
  290. *
  291. */
  292. void intel_vgpu_clean_opregion(struct intel_vgpu *vgpu)
  293. {
  294. gvt_dbg_core("vgpu%d: clean vgpu opregion\n", vgpu->id);
  295. if (!vgpu_opregion(vgpu)->va)
  296. return;
  297. if (intel_gvt_host.hypervisor_type == INTEL_GVT_HYPERVISOR_XEN) {
  298. if (vgpu_opregion(vgpu)->mapped)
  299. map_vgpu_opregion(vgpu, false);
  300. } else if (intel_gvt_host.hypervisor_type == INTEL_GVT_HYPERVISOR_KVM) {
  301. /* Guest opregion is released by VFIO */
  302. }
  303. free_pages((unsigned long)vgpu_opregion(vgpu)->va,
  304. get_order(INTEL_GVT_OPREGION_SIZE));
  305. vgpu_opregion(vgpu)->va = NULL;
  306. }
  307. #define GVT_OPREGION_FUNC(scic) \
  308. ({ \
  309. u32 __ret; \
  310. __ret = (scic & OPREGION_SCIC_FUNC_MASK) >> \
  311. OPREGION_SCIC_FUNC_SHIFT; \
  312. __ret; \
  313. })
  314. #define GVT_OPREGION_SUBFUNC(scic) \
  315. ({ \
  316. u32 __ret; \
  317. __ret = (scic & OPREGION_SCIC_SUBFUNC_MASK) >> \
  318. OPREGION_SCIC_SUBFUNC_SHIFT; \
  319. __ret; \
  320. })
  321. static const char *opregion_func_name(u32 func)
  322. {
  323. const char *name = NULL;
  324. switch (func) {
  325. case 0 ... 3:
  326. case 5:
  327. case 7 ... 15:
  328. name = "Reserved";
  329. break;
  330. case 4:
  331. name = "Get BIOS Data";
  332. break;
  333. case 6:
  334. name = "System BIOS Callbacks";
  335. break;
  336. default:
  337. name = "Unknown";
  338. break;
  339. }
  340. return name;
  341. }
  342. static const char *opregion_subfunc_name(u32 subfunc)
  343. {
  344. const char *name = NULL;
  345. switch (subfunc) {
  346. case 0:
  347. name = "Supported Calls";
  348. break;
  349. case 1:
  350. name = "Requested Callbacks";
  351. break;
  352. case 2 ... 3:
  353. case 8 ... 9:
  354. name = "Reserved";
  355. break;
  356. case 5:
  357. name = "Boot Display";
  358. break;
  359. case 6:
  360. name = "TV-Standard/Video-Connector";
  361. break;
  362. case 7:
  363. name = "Internal Graphics";
  364. break;
  365. case 10:
  366. name = "Spread Spectrum Clocks";
  367. break;
  368. case 11:
  369. name = "Get AKSV";
  370. break;
  371. default:
  372. name = "Unknown";
  373. break;
  374. }
  375. return name;
  376. };
  377. static bool querying_capabilities(u32 scic)
  378. {
  379. u32 func, subfunc;
  380. func = GVT_OPREGION_FUNC(scic);
  381. subfunc = GVT_OPREGION_SUBFUNC(scic);
  382. if ((func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA &&
  383. subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS)
  384. || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA &&
  385. subfunc == INTEL_GVT_OPREGION_SCIC_SF_REQEUSTEDCALLBACKS)
  386. || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSCALLBACKS &&
  387. subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS)) {
  388. return true;
  389. }
  390. return false;
  391. }
  392. /**
  393. * intel_vgpu_emulate_opregion_request - emulating OpRegion request
  394. * @vgpu: a vGPU
  395. * @swsci: SWSCI request
  396. *
  397. * Returns:
  398. * Zero on success, negative error code if failed
  399. */
  400. int intel_vgpu_emulate_opregion_request(struct intel_vgpu *vgpu, u32 swsci)
  401. {
  402. u32 scic, parm;
  403. u32 func, subfunc;
  404. u64 scic_pa = 0, parm_pa = 0;
  405. int ret;
  406. switch (intel_gvt_host.hypervisor_type) {
  407. case INTEL_GVT_HYPERVISOR_XEN:
  408. scic = *((u32 *)vgpu_opregion(vgpu)->va +
  409. INTEL_GVT_OPREGION_SCIC);
  410. parm = *((u32 *)vgpu_opregion(vgpu)->va +
  411. INTEL_GVT_OPREGION_PARM);
  412. break;
  413. case INTEL_GVT_HYPERVISOR_KVM:
  414. scic_pa = (vgpu_opregion(vgpu)->gfn[0] << PAGE_SHIFT) +
  415. INTEL_GVT_OPREGION_SCIC;
  416. parm_pa = (vgpu_opregion(vgpu)->gfn[0] << PAGE_SHIFT) +
  417. INTEL_GVT_OPREGION_PARM;
  418. ret = intel_gvt_hypervisor_read_gpa(vgpu, scic_pa,
  419. &scic, sizeof(scic));
  420. if (ret) {
  421. gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n",
  422. ret, scic_pa, sizeof(scic));
  423. return ret;
  424. }
  425. ret = intel_gvt_hypervisor_read_gpa(vgpu, parm_pa,
  426. &parm, sizeof(parm));
  427. if (ret) {
  428. gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n",
  429. ret, scic_pa, sizeof(scic));
  430. return ret;
  431. }
  432. break;
  433. default:
  434. gvt_vgpu_err("not supported hypervisor\n");
  435. return -EINVAL;
  436. }
  437. if (!(swsci & SWSCI_SCI_SELECT)) {
  438. gvt_vgpu_err("requesting SMI service\n");
  439. return 0;
  440. }
  441. /* ignore non 0->1 trasitions */
  442. if ((vgpu_cfg_space(vgpu)[INTEL_GVT_PCI_SWSCI]
  443. & SWSCI_SCI_TRIGGER) ||
  444. !(swsci & SWSCI_SCI_TRIGGER)) {
  445. return 0;
  446. }
  447. func = GVT_OPREGION_FUNC(scic);
  448. subfunc = GVT_OPREGION_SUBFUNC(scic);
  449. if (!querying_capabilities(scic)) {
  450. gvt_vgpu_err("requesting runtime service: func \"%s\","
  451. " subfunc \"%s\"\n",
  452. opregion_func_name(func),
  453. opregion_subfunc_name(subfunc));
  454. /*
  455. * emulate exit status of function call, '0' means
  456. * "failure, generic, unsupported or unknown cause"
  457. */
  458. scic &= ~OPREGION_SCIC_EXIT_MASK;
  459. goto out;
  460. }
  461. scic = 0;
  462. parm = 0;
  463. out:
  464. switch (intel_gvt_host.hypervisor_type) {
  465. case INTEL_GVT_HYPERVISOR_XEN:
  466. *((u32 *)vgpu_opregion(vgpu)->va +
  467. INTEL_GVT_OPREGION_SCIC) = scic;
  468. *((u32 *)vgpu_opregion(vgpu)->va +
  469. INTEL_GVT_OPREGION_PARM) = parm;
  470. break;
  471. case INTEL_GVT_HYPERVISOR_KVM:
  472. ret = intel_gvt_hypervisor_write_gpa(vgpu, scic_pa,
  473. &scic, sizeof(scic));
  474. if (ret) {
  475. gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n",
  476. ret, scic_pa, sizeof(scic));
  477. return ret;
  478. }
  479. ret = intel_gvt_hypervisor_write_gpa(vgpu, parm_pa,
  480. &parm, sizeof(parm));
  481. if (ret) {
  482. gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n",
  483. ret, scic_pa, sizeof(scic));
  484. return ret;
  485. }
  486. break;
  487. default:
  488. gvt_vgpu_err("not supported hypervisor\n");
  489. return -EINVAL;
  490. }
  491. return 0;
  492. }