gpio_service.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592
  1. /*
  2. * Copyright 2012-15 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: AMD
  23. *
  24. */
  25. /*
  26. * Pre-requisites: headers required by header of this unit
  27. */
  28. #include "dm_services.h"
  29. #include "include/gpio_interface.h"
  30. #include "include/gpio_service_interface.h"
  31. #include "hw_translate.h"
  32. #include "hw_factory.h"
  33. /*
  34. * Header of this unit
  35. */
  36. #include "gpio_service.h"
  37. /*
  38. * Post-requisites: headers required by this unit
  39. */
  40. #include "hw_gpio.h"
  41. /*
  42. * @brief
  43. * Public API.
  44. */
  45. struct gpio_service *dal_gpio_service_create(
  46. enum dce_version dce_version_major,
  47. enum dce_version dce_version_minor,
  48. struct dc_context *ctx)
  49. {
  50. struct gpio_service *service;
  51. uint32_t index_of_id;
  52. service = kzalloc(sizeof(struct gpio_service), GFP_KERNEL);
  53. if (!service) {
  54. BREAK_TO_DEBUGGER();
  55. return NULL;
  56. }
  57. if (!dal_hw_translate_init(&service->translate, dce_version_major,
  58. dce_version_minor)) {
  59. BREAK_TO_DEBUGGER();
  60. goto failure_1;
  61. }
  62. if (!dal_hw_factory_init(&service->factory, dce_version_major,
  63. dce_version_minor)) {
  64. BREAK_TO_DEBUGGER();
  65. goto failure_1;
  66. }
  67. /* allocate and initialize business storage */
  68. {
  69. const uint32_t bits_per_uint = sizeof(uint32_t) << 3;
  70. index_of_id = 0;
  71. service->ctx = ctx;
  72. do {
  73. uint32_t number_of_bits =
  74. service->factory.number_of_pins[index_of_id];
  75. uint32_t number_of_uints =
  76. (number_of_bits + bits_per_uint - 1) /
  77. bits_per_uint;
  78. uint32_t *slot;
  79. if (number_of_bits) {
  80. uint32_t index_of_uint = 0;
  81. slot = kcalloc(number_of_uints,
  82. sizeof(uint32_t),
  83. GFP_KERNEL);
  84. if (!slot) {
  85. BREAK_TO_DEBUGGER();
  86. goto failure_2;
  87. }
  88. do {
  89. slot[index_of_uint] = 0;
  90. ++index_of_uint;
  91. } while (index_of_uint < number_of_uints);
  92. } else
  93. slot = NULL;
  94. service->busyness[index_of_id] = slot;
  95. ++index_of_id;
  96. } while (index_of_id < GPIO_ID_COUNT);
  97. }
  98. return service;
  99. failure_2:
  100. while (index_of_id) {
  101. uint32_t *slot;
  102. --index_of_id;
  103. slot = service->busyness[index_of_id];
  104. kfree(slot);
  105. }
  106. failure_1:
  107. kfree(service);
  108. return NULL;
  109. }
  110. struct gpio *dal_gpio_service_create_irq(
  111. struct gpio_service *service,
  112. uint32_t offset,
  113. uint32_t mask)
  114. {
  115. enum gpio_id id;
  116. uint32_t en;
  117. if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) {
  118. ASSERT_CRITICAL(false);
  119. return NULL;
  120. }
  121. return dal_gpio_create_irq(service, id, en);
  122. }
  123. void dal_gpio_service_destroy(
  124. struct gpio_service **ptr)
  125. {
  126. if (!ptr || !*ptr) {
  127. BREAK_TO_DEBUGGER();
  128. return;
  129. }
  130. /* free business storage */
  131. {
  132. uint32_t index_of_id = 0;
  133. do {
  134. uint32_t *slot = (*ptr)->busyness[index_of_id];
  135. kfree(slot);
  136. ++index_of_id;
  137. } while (index_of_id < GPIO_ID_COUNT);
  138. }
  139. kfree(*ptr);
  140. *ptr = NULL;
  141. }
  142. /*
  143. * @brief
  144. * Private API.
  145. */
  146. static bool is_pin_busy(
  147. const struct gpio_service *service,
  148. enum gpio_id id,
  149. uint32_t en)
  150. {
  151. const uint32_t bits_per_uint = sizeof(uint32_t) << 3;
  152. const uint32_t *slot = service->busyness[id] + (en / bits_per_uint);
  153. return 0 != (*slot & (1 << (en % bits_per_uint)));
  154. }
  155. static void set_pin_busy(
  156. struct gpio_service *service,
  157. enum gpio_id id,
  158. uint32_t en)
  159. {
  160. const uint32_t bits_per_uint = sizeof(uint32_t) << 3;
  161. service->busyness[id][en / bits_per_uint] |=
  162. (1 << (en % bits_per_uint));
  163. }
  164. static void set_pin_free(
  165. struct gpio_service *service,
  166. enum gpio_id id,
  167. uint32_t en)
  168. {
  169. const uint32_t bits_per_uint = sizeof(uint32_t) << 3;
  170. service->busyness[id][en / bits_per_uint] &=
  171. ~(1 << (en % bits_per_uint));
  172. }
  173. enum gpio_result dal_gpio_service_open(
  174. struct gpio_service *service,
  175. enum gpio_id id,
  176. uint32_t en,
  177. enum gpio_mode mode,
  178. struct hw_gpio_pin **ptr)
  179. {
  180. struct hw_gpio_pin *pin;
  181. if (!service->busyness[id]) {
  182. ASSERT_CRITICAL(false);
  183. return GPIO_RESULT_OPEN_FAILED;
  184. }
  185. if (is_pin_busy(service, id, en)) {
  186. ASSERT_CRITICAL(false);
  187. return GPIO_RESULT_DEVICE_BUSY;
  188. }
  189. switch (id) {
  190. case GPIO_ID_DDC_DATA:
  191. pin = service->factory.funcs->create_ddc_data(
  192. service->ctx, id, en);
  193. service->factory.funcs->define_ddc_registers(pin, en);
  194. break;
  195. case GPIO_ID_DDC_CLOCK:
  196. pin = service->factory.funcs->create_ddc_clock(
  197. service->ctx, id, en);
  198. service->factory.funcs->define_ddc_registers(pin, en);
  199. break;
  200. case GPIO_ID_GENERIC:
  201. pin = service->factory.funcs->create_generic(
  202. service->ctx, id, en);
  203. break;
  204. case GPIO_ID_HPD:
  205. pin = service->factory.funcs->create_hpd(
  206. service->ctx, id, en);
  207. service->factory.funcs->define_hpd_registers(pin, en);
  208. break;
  209. case GPIO_ID_SYNC:
  210. pin = service->factory.funcs->create_sync(
  211. service->ctx, id, en);
  212. break;
  213. case GPIO_ID_GSL:
  214. pin = service->factory.funcs->create_gsl(
  215. service->ctx, id, en);
  216. break;
  217. default:
  218. ASSERT_CRITICAL(false);
  219. return GPIO_RESULT_NON_SPECIFIC_ERROR;
  220. }
  221. if (!pin) {
  222. ASSERT_CRITICAL(false);
  223. return GPIO_RESULT_NON_SPECIFIC_ERROR;
  224. }
  225. if (!pin->funcs->open(pin, mode)) {
  226. ASSERT_CRITICAL(false);
  227. dal_gpio_service_close(service, &pin);
  228. return GPIO_RESULT_OPEN_FAILED;
  229. }
  230. set_pin_busy(service, id, en);
  231. *ptr = pin;
  232. return GPIO_RESULT_OK;
  233. }
  234. void dal_gpio_service_close(
  235. struct gpio_service *service,
  236. struct hw_gpio_pin **ptr)
  237. {
  238. struct hw_gpio_pin *pin;
  239. if (!ptr) {
  240. ASSERT_CRITICAL(false);
  241. return;
  242. }
  243. pin = *ptr;
  244. if (pin) {
  245. set_pin_free(service, pin->id, pin->en);
  246. pin->funcs->close(pin);
  247. pin->funcs->destroy(ptr);
  248. }
  249. }
  250. enum dc_irq_source dal_irq_get_source(
  251. const struct gpio *irq)
  252. {
  253. enum gpio_id id = dal_gpio_get_id(irq);
  254. switch (id) {
  255. case GPIO_ID_HPD:
  256. return (enum dc_irq_source)(DC_IRQ_SOURCE_HPD1 +
  257. dal_gpio_get_enum(irq));
  258. case GPIO_ID_GPIO_PAD:
  259. return (enum dc_irq_source)(DC_IRQ_SOURCE_GPIOPAD0 +
  260. dal_gpio_get_enum(irq));
  261. default:
  262. return DC_IRQ_SOURCE_INVALID;
  263. }
  264. }
  265. enum dc_irq_source dal_irq_get_rx_source(
  266. const struct gpio *irq)
  267. {
  268. enum gpio_id id = dal_gpio_get_id(irq);
  269. switch (id) {
  270. case GPIO_ID_HPD:
  271. return (enum dc_irq_source)(DC_IRQ_SOURCE_HPD1RX +
  272. dal_gpio_get_enum(irq));
  273. default:
  274. return DC_IRQ_SOURCE_INVALID;
  275. }
  276. }
  277. enum gpio_result dal_irq_setup_hpd_filter(
  278. struct gpio *irq,
  279. struct gpio_hpd_config *config)
  280. {
  281. struct gpio_config_data config_data;
  282. if (!config)
  283. return GPIO_RESULT_INVALID_DATA;
  284. config_data.type = GPIO_CONFIG_TYPE_HPD;
  285. config_data.config.hpd = *config;
  286. return dal_gpio_set_config(irq, &config_data);
  287. }
  288. /*
  289. * @brief
  290. * Creation and destruction
  291. */
  292. struct gpio *dal_gpio_create_irq(
  293. struct gpio_service *service,
  294. enum gpio_id id,
  295. uint32_t en)
  296. {
  297. struct gpio *irq;
  298. switch (id) {
  299. case GPIO_ID_HPD:
  300. case GPIO_ID_GPIO_PAD:
  301. break;
  302. default:
  303. ASSERT_CRITICAL(false);
  304. return NULL;
  305. }
  306. irq = dal_gpio_create(
  307. service, id, en, GPIO_PIN_OUTPUT_STATE_DEFAULT);
  308. if (irq)
  309. return irq;
  310. ASSERT_CRITICAL(false);
  311. return NULL;
  312. }
  313. void dal_gpio_destroy_irq(
  314. struct gpio **irq)
  315. {
  316. if (!irq || !*irq) {
  317. ASSERT_CRITICAL(false);
  318. return;
  319. }
  320. dal_gpio_close(*irq);
  321. dal_gpio_destroy(irq);
  322. kfree(*irq);
  323. *irq = NULL;
  324. }
  325. struct ddc *dal_gpio_create_ddc(
  326. struct gpio_service *service,
  327. uint32_t offset,
  328. uint32_t mask,
  329. struct gpio_ddc_hw_info *info)
  330. {
  331. enum gpio_id id;
  332. uint32_t en;
  333. struct ddc *ddc;
  334. if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en))
  335. return NULL;
  336. ddc = kzalloc(sizeof(struct ddc), GFP_KERNEL);
  337. if (!ddc) {
  338. BREAK_TO_DEBUGGER();
  339. return NULL;
  340. }
  341. ddc->pin_data = dal_gpio_create(
  342. service, GPIO_ID_DDC_DATA, en, GPIO_PIN_OUTPUT_STATE_DEFAULT);
  343. if (!ddc->pin_data) {
  344. BREAK_TO_DEBUGGER();
  345. goto failure_1;
  346. }
  347. ddc->pin_clock = dal_gpio_create(
  348. service, GPIO_ID_DDC_CLOCK, en, GPIO_PIN_OUTPUT_STATE_DEFAULT);
  349. if (!ddc->pin_clock) {
  350. BREAK_TO_DEBUGGER();
  351. goto failure_2;
  352. }
  353. ddc->hw_info = *info;
  354. ddc->ctx = service->ctx;
  355. return ddc;
  356. failure_2:
  357. dal_gpio_destroy(&ddc->pin_data);
  358. failure_1:
  359. kfree(ddc);
  360. return NULL;
  361. }
  362. void dal_gpio_destroy_ddc(
  363. struct ddc **ddc)
  364. {
  365. if (!ddc || !*ddc) {
  366. BREAK_TO_DEBUGGER();
  367. return;
  368. }
  369. dal_ddc_close(*ddc);
  370. dal_gpio_destroy(&(*ddc)->pin_data);
  371. dal_gpio_destroy(&(*ddc)->pin_clock);
  372. kfree(*ddc);
  373. *ddc = NULL;
  374. }
  375. enum gpio_result dal_ddc_open(
  376. struct ddc *ddc,
  377. enum gpio_mode mode,
  378. enum gpio_ddc_config_type config_type)
  379. {
  380. enum gpio_result result;
  381. struct gpio_config_data config_data;
  382. struct hw_gpio *hw_data;
  383. struct hw_gpio *hw_clock;
  384. result = dal_gpio_open_ex(ddc->pin_data, mode);
  385. if (result != GPIO_RESULT_OK) {
  386. BREAK_TO_DEBUGGER();
  387. return result;
  388. }
  389. result = dal_gpio_open_ex(ddc->pin_clock, mode);
  390. if (result != GPIO_RESULT_OK) {
  391. BREAK_TO_DEBUGGER();
  392. goto failure;
  393. }
  394. /* DDC clock and data pins should belong
  395. * to the same DDC block id,
  396. * we use the data pin to set the pad mode. */
  397. if (mode == GPIO_MODE_INPUT)
  398. /* this is from detect_sink_type,
  399. * we need extra delay there */
  400. config_data.type = GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE;
  401. else
  402. config_data.type = GPIO_CONFIG_TYPE_DDC;
  403. config_data.config.ddc.type = config_type;
  404. hw_data = FROM_HW_GPIO_PIN(ddc->pin_data->pin);
  405. hw_clock = FROM_HW_GPIO_PIN(ddc->pin_clock->pin);
  406. config_data.config.ddc.data_en_bit_present = hw_data->store.en != 0;
  407. config_data.config.ddc.clock_en_bit_present = hw_clock->store.en != 0;
  408. result = dal_gpio_set_config(ddc->pin_data, &config_data);
  409. if (result == GPIO_RESULT_OK)
  410. return result;
  411. BREAK_TO_DEBUGGER();
  412. dal_gpio_close(ddc->pin_clock);
  413. failure:
  414. dal_gpio_close(ddc->pin_data);
  415. return result;
  416. }
  417. enum gpio_result dal_ddc_change_mode(
  418. struct ddc *ddc,
  419. enum gpio_mode mode)
  420. {
  421. enum gpio_result result;
  422. enum gpio_mode original_mode =
  423. dal_gpio_get_mode(ddc->pin_data);
  424. result = dal_gpio_change_mode(ddc->pin_data, mode);
  425. /* [anaumov] DAL2 code returns GPIO_RESULT_NON_SPECIFIC_ERROR
  426. * in case of failures;
  427. * set_mode() is so that, in case of failure,
  428. * we must explicitly set original mode */
  429. if (result != GPIO_RESULT_OK)
  430. goto failure;
  431. result = dal_gpio_change_mode(ddc->pin_clock, mode);
  432. if (result == GPIO_RESULT_OK)
  433. return result;
  434. dal_gpio_change_mode(ddc->pin_clock, original_mode);
  435. failure:
  436. dal_gpio_change_mode(ddc->pin_data, original_mode);
  437. return result;
  438. }
  439. enum gpio_ddc_line dal_ddc_get_line(
  440. const struct ddc *ddc)
  441. {
  442. return (enum gpio_ddc_line)dal_gpio_get_enum(ddc->pin_data);
  443. }
  444. enum gpio_result dal_ddc_set_config(
  445. struct ddc *ddc,
  446. enum gpio_ddc_config_type config_type)
  447. {
  448. struct gpio_config_data config_data;
  449. config_data.type = GPIO_CONFIG_TYPE_DDC;
  450. config_data.config.ddc.type = config_type;
  451. config_data.config.ddc.data_en_bit_present = false;
  452. config_data.config.ddc.clock_en_bit_present = false;
  453. return dal_gpio_set_config(ddc->pin_data, &config_data);
  454. }
  455. void dal_ddc_close(
  456. struct ddc *ddc)
  457. {
  458. dal_gpio_close(ddc->pin_clock);
  459. dal_gpio_close(ddc->pin_data);
  460. }