kfd_iommu.c 9.2 KB

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  1. /*
  2. * Copyright 2018 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. */
  22. #include <linux/printk.h>
  23. #include <linux/device.h>
  24. #include <linux/slab.h>
  25. #include <linux/pci.h>
  26. #include <linux/amd-iommu.h>
  27. #include "kfd_priv.h"
  28. #include "kfd_dbgmgr.h"
  29. #include "kfd_topology.h"
  30. #include "kfd_iommu.h"
  31. static const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP |
  32. AMD_IOMMU_DEVICE_FLAG_PRI_SUP |
  33. AMD_IOMMU_DEVICE_FLAG_PASID_SUP;
  34. /** kfd_iommu_check_device - Check whether IOMMU is available for device
  35. */
  36. int kfd_iommu_check_device(struct kfd_dev *kfd)
  37. {
  38. struct amd_iommu_device_info iommu_info;
  39. int err;
  40. if (!kfd->device_info->needs_iommu_device)
  41. return -ENODEV;
  42. iommu_info.flags = 0;
  43. err = amd_iommu_device_info(kfd->pdev, &iommu_info);
  44. if (err)
  45. return err;
  46. if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags)
  47. return -ENODEV;
  48. return 0;
  49. }
  50. /** kfd_iommu_device_init - Initialize IOMMU for device
  51. */
  52. int kfd_iommu_device_init(struct kfd_dev *kfd)
  53. {
  54. struct amd_iommu_device_info iommu_info;
  55. unsigned int pasid_limit;
  56. int err;
  57. if (!kfd->device_info->needs_iommu_device)
  58. return 0;
  59. iommu_info.flags = 0;
  60. err = amd_iommu_device_info(kfd->pdev, &iommu_info);
  61. if (err < 0) {
  62. dev_err(kfd_device,
  63. "error getting iommu info. is the iommu enabled?\n");
  64. return -ENODEV;
  65. }
  66. if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) {
  67. dev_err(kfd_device,
  68. "error required iommu flags ats %i, pri %i, pasid %i\n",
  69. (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0,
  70. (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0,
  71. (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP)
  72. != 0);
  73. return -ENODEV;
  74. }
  75. pasid_limit = min_t(unsigned int,
  76. (unsigned int)(1 << kfd->device_info->max_pasid_bits),
  77. iommu_info.max_pasids);
  78. if (!kfd_set_pasid_limit(pasid_limit)) {
  79. dev_err(kfd_device, "error setting pasid limit\n");
  80. return -EBUSY;
  81. }
  82. return 0;
  83. }
  84. /** kfd_iommu_bind_process_to_device - Have the IOMMU bind a process
  85. *
  86. * Binds the given process to the given device using its PASID. This
  87. * enables IOMMUv2 address translation for the process on the device.
  88. *
  89. * This function assumes that the process mutex is held.
  90. */
  91. int kfd_iommu_bind_process_to_device(struct kfd_process_device *pdd)
  92. {
  93. struct kfd_dev *dev = pdd->dev;
  94. struct kfd_process *p = pdd->process;
  95. int err;
  96. if (!dev->device_info->needs_iommu_device || pdd->bound == PDD_BOUND)
  97. return 0;
  98. if (unlikely(pdd->bound == PDD_BOUND_SUSPENDED)) {
  99. pr_err("Binding PDD_BOUND_SUSPENDED pdd is unexpected!\n");
  100. return -EINVAL;
  101. }
  102. err = amd_iommu_bind_pasid(dev->pdev, p->pasid, p->lead_thread);
  103. if (!err)
  104. pdd->bound = PDD_BOUND;
  105. return err;
  106. }
  107. /** kfd_iommu_unbind_process - Unbind process from all devices
  108. *
  109. * This removes all IOMMU device bindings of the process. To be used
  110. * before process termination.
  111. */
  112. void kfd_iommu_unbind_process(struct kfd_process *p)
  113. {
  114. struct kfd_process_device *pdd;
  115. list_for_each_entry(pdd, &p->per_device_data, per_device_list)
  116. if (pdd->bound == PDD_BOUND)
  117. amd_iommu_unbind_pasid(pdd->dev->pdev, p->pasid);
  118. }
  119. /* Callback for process shutdown invoked by the IOMMU driver */
  120. static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, int pasid)
  121. {
  122. struct kfd_dev *dev = kfd_device_by_pci_dev(pdev);
  123. struct kfd_process *p;
  124. struct kfd_process_device *pdd;
  125. if (!dev)
  126. return;
  127. /*
  128. * Look for the process that matches the pasid. If there is no such
  129. * process, we either released it in amdkfd's own notifier, or there
  130. * is a bug. Unfortunately, there is no way to tell...
  131. */
  132. p = kfd_lookup_process_by_pasid(pasid);
  133. if (!p)
  134. return;
  135. pr_debug("Unbinding process %d from IOMMU\n", pasid);
  136. mutex_lock(kfd_get_dbgmgr_mutex());
  137. if (dev->dbgmgr && dev->dbgmgr->pasid == p->pasid) {
  138. if (!kfd_dbgmgr_unregister(dev->dbgmgr, p)) {
  139. kfd_dbgmgr_destroy(dev->dbgmgr);
  140. dev->dbgmgr = NULL;
  141. }
  142. }
  143. mutex_unlock(kfd_get_dbgmgr_mutex());
  144. mutex_lock(&p->mutex);
  145. pdd = kfd_get_process_device_data(dev, p);
  146. if (pdd)
  147. /* For GPU relying on IOMMU, we need to dequeue here
  148. * when PASID is still bound.
  149. */
  150. kfd_process_dequeue_from_device(pdd);
  151. mutex_unlock(&p->mutex);
  152. kfd_unref_process(p);
  153. }
  154. /* This function called by IOMMU driver on PPR failure */
  155. static int iommu_invalid_ppr_cb(struct pci_dev *pdev, int pasid,
  156. unsigned long address, u16 flags)
  157. {
  158. struct kfd_dev *dev;
  159. dev_warn(kfd_device,
  160. "Invalid PPR device %x:%x.%x pasid %d address 0x%lX flags 0x%X",
  161. PCI_BUS_NUM(pdev->devfn),
  162. PCI_SLOT(pdev->devfn),
  163. PCI_FUNC(pdev->devfn),
  164. pasid,
  165. address,
  166. flags);
  167. dev = kfd_device_by_pci_dev(pdev);
  168. if (!WARN_ON(!dev))
  169. kfd_signal_iommu_event(dev, pasid, address,
  170. flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC);
  171. return AMD_IOMMU_INV_PRI_RSP_INVALID;
  172. }
  173. /*
  174. * Bind processes do the device that have been temporarily unbound
  175. * (PDD_BOUND_SUSPENDED) in kfd_unbind_processes_from_device.
  176. */
  177. static int kfd_bind_processes_to_device(struct kfd_dev *kfd)
  178. {
  179. struct kfd_process_device *pdd;
  180. struct kfd_process *p;
  181. unsigned int temp;
  182. int err = 0;
  183. int idx = srcu_read_lock(&kfd_processes_srcu);
  184. hash_for_each_rcu(kfd_processes_table, temp, p, kfd_processes) {
  185. mutex_lock(&p->mutex);
  186. pdd = kfd_get_process_device_data(kfd, p);
  187. if (WARN_ON(!pdd) || pdd->bound != PDD_BOUND_SUSPENDED) {
  188. mutex_unlock(&p->mutex);
  189. continue;
  190. }
  191. err = amd_iommu_bind_pasid(kfd->pdev, p->pasid,
  192. p->lead_thread);
  193. if (err < 0) {
  194. pr_err("Unexpected pasid %d binding failure\n",
  195. p->pasid);
  196. mutex_unlock(&p->mutex);
  197. break;
  198. }
  199. pdd->bound = PDD_BOUND;
  200. mutex_unlock(&p->mutex);
  201. }
  202. srcu_read_unlock(&kfd_processes_srcu, idx);
  203. return err;
  204. }
  205. /*
  206. * Mark currently bound processes as PDD_BOUND_SUSPENDED. These
  207. * processes will be restored to PDD_BOUND state in
  208. * kfd_bind_processes_to_device.
  209. */
  210. static void kfd_unbind_processes_from_device(struct kfd_dev *kfd)
  211. {
  212. struct kfd_process_device *pdd;
  213. struct kfd_process *p;
  214. unsigned int temp;
  215. int idx = srcu_read_lock(&kfd_processes_srcu);
  216. hash_for_each_rcu(kfd_processes_table, temp, p, kfd_processes) {
  217. mutex_lock(&p->mutex);
  218. pdd = kfd_get_process_device_data(kfd, p);
  219. if (WARN_ON(!pdd)) {
  220. mutex_unlock(&p->mutex);
  221. continue;
  222. }
  223. if (pdd->bound == PDD_BOUND)
  224. pdd->bound = PDD_BOUND_SUSPENDED;
  225. mutex_unlock(&p->mutex);
  226. }
  227. srcu_read_unlock(&kfd_processes_srcu, idx);
  228. }
  229. /** kfd_iommu_suspend - Prepare IOMMU for suspend
  230. *
  231. * This unbinds processes from the device and disables the IOMMU for
  232. * the device.
  233. */
  234. void kfd_iommu_suspend(struct kfd_dev *kfd)
  235. {
  236. if (!kfd->device_info->needs_iommu_device)
  237. return;
  238. kfd_unbind_processes_from_device(kfd);
  239. amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL);
  240. amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL);
  241. amd_iommu_free_device(kfd->pdev);
  242. }
  243. /** kfd_iommu_resume - Restore IOMMU after resume
  244. *
  245. * This reinitializes the IOMMU for the device and re-binds previously
  246. * suspended processes to the device.
  247. */
  248. int kfd_iommu_resume(struct kfd_dev *kfd)
  249. {
  250. unsigned int pasid_limit;
  251. int err;
  252. if (!kfd->device_info->needs_iommu_device)
  253. return 0;
  254. pasid_limit = kfd_get_pasid_limit();
  255. err = amd_iommu_init_device(kfd->pdev, pasid_limit);
  256. if (err)
  257. return -ENXIO;
  258. amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
  259. iommu_pasid_shutdown_callback);
  260. amd_iommu_set_invalid_ppr_cb(kfd->pdev,
  261. iommu_invalid_ppr_cb);
  262. err = kfd_bind_processes_to_device(kfd);
  263. if (err) {
  264. amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL);
  265. amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL);
  266. amd_iommu_free_device(kfd->pdev);
  267. return err;
  268. }
  269. return 0;
  270. }
  271. extern bool amd_iommu_pc_supported(void);
  272. extern u8 amd_iommu_pc_get_max_banks(u16 devid);
  273. extern u8 amd_iommu_pc_get_max_counters(u16 devid);
  274. /** kfd_iommu_add_perf_counters - Add IOMMU performance counters to topology
  275. */
  276. int kfd_iommu_add_perf_counters(struct kfd_topology_device *kdev)
  277. {
  278. struct kfd_perf_properties *props;
  279. if (!(kdev->node_props.capability & HSA_CAP_ATS_PRESENT))
  280. return 0;
  281. if (!amd_iommu_pc_supported())
  282. return 0;
  283. props = kfd_alloc_struct(props);
  284. if (!props)
  285. return -ENOMEM;
  286. strcpy(props->block_name, "iommu");
  287. props->max_concurrent = amd_iommu_pc_get_max_banks(0) *
  288. amd_iommu_pc_get_max_counters(0); /* assume one iommu */
  289. list_add_tail(&props->list, &kdev->perf_props);
  290. return 0;
  291. }