safexcel_hash.c 33 KB

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  1. /*
  2. * Copyright (C) 2017 Marvell
  3. *
  4. * Antoine Tenart <antoine.tenart@free-electrons.com>
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <crypto/hmac.h>
  11. #include <crypto/sha.h>
  12. #include <linux/device.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/dmapool.h>
  15. #include "safexcel.h"
  16. struct safexcel_ahash_ctx {
  17. struct safexcel_context base;
  18. struct safexcel_crypto_priv *priv;
  19. u32 alg;
  20. u32 ipad[SHA256_DIGEST_SIZE / sizeof(u32)];
  21. u32 opad[SHA256_DIGEST_SIZE / sizeof(u32)];
  22. };
  23. struct safexcel_ahash_req {
  24. bool last_req;
  25. bool finish;
  26. bool hmac;
  27. bool needs_inv;
  28. int nents;
  29. dma_addr_t result_dma;
  30. u32 digest;
  31. u8 state_sz; /* expected sate size, only set once */
  32. u32 state[SHA256_DIGEST_SIZE / sizeof(u32)] __aligned(sizeof(u32));
  33. u64 len;
  34. u64 processed;
  35. u8 cache[SHA256_BLOCK_SIZE] __aligned(sizeof(u32));
  36. dma_addr_t cache_dma;
  37. unsigned int cache_sz;
  38. u8 cache_next[SHA256_BLOCK_SIZE] __aligned(sizeof(u32));
  39. };
  40. static void safexcel_hash_token(struct safexcel_command_desc *cdesc,
  41. u32 input_length, u32 result_length)
  42. {
  43. struct safexcel_token *token =
  44. (struct safexcel_token *)cdesc->control_data.token;
  45. token[0].opcode = EIP197_TOKEN_OPCODE_DIRECTION;
  46. token[0].packet_length = input_length;
  47. token[0].stat = EIP197_TOKEN_STAT_LAST_HASH;
  48. token[0].instructions = EIP197_TOKEN_INS_TYPE_HASH;
  49. token[1].opcode = EIP197_TOKEN_OPCODE_INSERT;
  50. token[1].packet_length = result_length;
  51. token[1].stat = EIP197_TOKEN_STAT_LAST_HASH |
  52. EIP197_TOKEN_STAT_LAST_PACKET;
  53. token[1].instructions = EIP197_TOKEN_INS_TYPE_OUTPUT |
  54. EIP197_TOKEN_INS_INSERT_HASH_DIGEST;
  55. }
  56. static void safexcel_context_control(struct safexcel_ahash_ctx *ctx,
  57. struct safexcel_ahash_req *req,
  58. struct safexcel_command_desc *cdesc,
  59. unsigned int digestsize,
  60. unsigned int blocksize)
  61. {
  62. int i;
  63. cdesc->control_data.control0 |= CONTEXT_CONTROL_TYPE_HASH_OUT;
  64. cdesc->control_data.control0 |= ctx->alg;
  65. cdesc->control_data.control0 |= req->digest;
  66. if (req->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED) {
  67. if (req->processed) {
  68. if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA1)
  69. cdesc->control_data.control0 |= CONTEXT_CONTROL_SIZE(6);
  70. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA224 ||
  71. ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA256)
  72. cdesc->control_data.control0 |= CONTEXT_CONTROL_SIZE(9);
  73. cdesc->control_data.control1 |= CONTEXT_CONTROL_DIGEST_CNT;
  74. } else {
  75. cdesc->control_data.control0 |= CONTEXT_CONTROL_RESTART_HASH;
  76. }
  77. if (!req->finish)
  78. cdesc->control_data.control0 |= CONTEXT_CONTROL_NO_FINISH_HASH;
  79. /*
  80. * Copy the input digest if needed, and setup the context
  81. * fields. Do this now as we need it to setup the first command
  82. * descriptor.
  83. */
  84. if (req->processed) {
  85. for (i = 0; i < digestsize / sizeof(u32); i++)
  86. ctx->base.ctxr->data[i] = cpu_to_le32(req->state[i]);
  87. if (req->finish)
  88. ctx->base.ctxr->data[i] = cpu_to_le32(req->processed / blocksize);
  89. }
  90. } else if (req->digest == CONTEXT_CONTROL_DIGEST_HMAC) {
  91. cdesc->control_data.control0 |= CONTEXT_CONTROL_SIZE(2 * req->state_sz / sizeof(u32));
  92. memcpy(ctx->base.ctxr->data, ctx->ipad, req->state_sz);
  93. memcpy(ctx->base.ctxr->data + req->state_sz / sizeof(u32),
  94. ctx->opad, req->state_sz);
  95. }
  96. }
  97. static int safexcel_handle_req_result(struct safexcel_crypto_priv *priv, int ring,
  98. struct crypto_async_request *async,
  99. bool *should_complete, int *ret)
  100. {
  101. struct safexcel_result_desc *rdesc;
  102. struct ahash_request *areq = ahash_request_cast(async);
  103. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  104. struct safexcel_ahash_req *sreq = ahash_request_ctx(areq);
  105. int cache_len;
  106. *ret = 0;
  107. spin_lock_bh(&priv->ring[ring].egress_lock);
  108. rdesc = safexcel_ring_next_rptr(priv, &priv->ring[ring].rdr);
  109. if (IS_ERR(rdesc)) {
  110. dev_err(priv->dev,
  111. "hash: result: could not retrieve the result descriptor\n");
  112. *ret = PTR_ERR(rdesc);
  113. } else {
  114. *ret = safexcel_rdesc_check_errors(priv, rdesc);
  115. }
  116. safexcel_complete(priv, ring);
  117. spin_unlock_bh(&priv->ring[ring].egress_lock);
  118. if (sreq->nents) {
  119. dma_unmap_sg(priv->dev, areq->src, sreq->nents, DMA_TO_DEVICE);
  120. sreq->nents = 0;
  121. }
  122. if (sreq->result_dma) {
  123. dma_unmap_single(priv->dev, sreq->result_dma, sreq->state_sz,
  124. DMA_FROM_DEVICE);
  125. sreq->result_dma = 0;
  126. }
  127. if (sreq->cache_dma) {
  128. dma_unmap_single(priv->dev, sreq->cache_dma, sreq->cache_sz,
  129. DMA_TO_DEVICE);
  130. sreq->cache_dma = 0;
  131. }
  132. if (sreq->finish)
  133. memcpy(areq->result, sreq->state,
  134. crypto_ahash_digestsize(ahash));
  135. cache_len = sreq->len - sreq->processed;
  136. if (cache_len)
  137. memcpy(sreq->cache, sreq->cache_next, cache_len);
  138. *should_complete = true;
  139. return 1;
  140. }
  141. static int safexcel_ahash_send_req(struct crypto_async_request *async, int ring,
  142. struct safexcel_request *request,
  143. int *commands, int *results)
  144. {
  145. struct ahash_request *areq = ahash_request_cast(async);
  146. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  147. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  148. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  149. struct safexcel_crypto_priv *priv = ctx->priv;
  150. struct safexcel_command_desc *cdesc, *first_cdesc = NULL;
  151. struct safexcel_result_desc *rdesc;
  152. struct scatterlist *sg;
  153. int i, queued, len, cache_len, extra, n_cdesc = 0, ret = 0;
  154. queued = len = req->len - req->processed;
  155. if (queued <= crypto_ahash_blocksize(ahash))
  156. cache_len = queued;
  157. else
  158. cache_len = queued - areq->nbytes;
  159. if (!req->last_req) {
  160. /* If this is not the last request and the queued data does not
  161. * fit into full blocks, cache it for the next send() call.
  162. */
  163. extra = queued & (crypto_ahash_blocksize(ahash) - 1);
  164. if (!extra)
  165. /* If this is not the last request and the queued data
  166. * is a multiple of a block, cache the last one for now.
  167. */
  168. extra = crypto_ahash_blocksize(ahash);
  169. if (extra) {
  170. sg_pcopy_to_buffer(areq->src, sg_nents(areq->src),
  171. req->cache_next, extra,
  172. areq->nbytes - extra);
  173. queued -= extra;
  174. len -= extra;
  175. if (!queued) {
  176. *commands = 0;
  177. *results = 0;
  178. return 0;
  179. }
  180. }
  181. }
  182. spin_lock_bh(&priv->ring[ring].egress_lock);
  183. /* Add a command descriptor for the cached data, if any */
  184. if (cache_len) {
  185. req->cache_dma = dma_map_single(priv->dev, req->cache,
  186. cache_len, DMA_TO_DEVICE);
  187. if (dma_mapping_error(priv->dev, req->cache_dma)) {
  188. spin_unlock_bh(&priv->ring[ring].egress_lock);
  189. return -EINVAL;
  190. }
  191. req->cache_sz = cache_len;
  192. first_cdesc = safexcel_add_cdesc(priv, ring, 1,
  193. (cache_len == len),
  194. req->cache_dma, cache_len, len,
  195. ctx->base.ctxr_dma);
  196. if (IS_ERR(first_cdesc)) {
  197. ret = PTR_ERR(first_cdesc);
  198. goto unmap_cache;
  199. }
  200. n_cdesc++;
  201. queued -= cache_len;
  202. if (!queued)
  203. goto send_command;
  204. }
  205. /* Now handle the current ahash request buffer(s) */
  206. req->nents = dma_map_sg(priv->dev, areq->src,
  207. sg_nents_for_len(areq->src, areq->nbytes),
  208. DMA_TO_DEVICE);
  209. if (!req->nents) {
  210. ret = -ENOMEM;
  211. goto cdesc_rollback;
  212. }
  213. for_each_sg(areq->src, sg, req->nents, i) {
  214. int sglen = sg_dma_len(sg);
  215. /* Do not overflow the request */
  216. if (queued - sglen < 0)
  217. sglen = queued;
  218. cdesc = safexcel_add_cdesc(priv, ring, !n_cdesc,
  219. !(queued - sglen), sg_dma_address(sg),
  220. sglen, len, ctx->base.ctxr_dma);
  221. if (IS_ERR(cdesc)) {
  222. ret = PTR_ERR(cdesc);
  223. goto unmap_sg;
  224. }
  225. n_cdesc++;
  226. if (n_cdesc == 1)
  227. first_cdesc = cdesc;
  228. queued -= sglen;
  229. if (!queued)
  230. break;
  231. }
  232. send_command:
  233. /* Setup the context options */
  234. safexcel_context_control(ctx, req, first_cdesc, req->state_sz,
  235. crypto_ahash_blocksize(ahash));
  236. /* Add the token */
  237. safexcel_hash_token(first_cdesc, len, req->state_sz);
  238. req->result_dma = dma_map_single(priv->dev, req->state, req->state_sz,
  239. DMA_FROM_DEVICE);
  240. if (dma_mapping_error(priv->dev, req->result_dma)) {
  241. ret = -EINVAL;
  242. goto unmap_sg;
  243. }
  244. /* Add a result descriptor */
  245. rdesc = safexcel_add_rdesc(priv, ring, 1, 1, req->result_dma,
  246. req->state_sz);
  247. if (IS_ERR(rdesc)) {
  248. ret = PTR_ERR(rdesc);
  249. goto unmap_result;
  250. }
  251. spin_unlock_bh(&priv->ring[ring].egress_lock);
  252. req->processed += len;
  253. request->req = &areq->base;
  254. *commands = n_cdesc;
  255. *results = 1;
  256. return 0;
  257. unmap_result:
  258. dma_unmap_single(priv->dev, req->result_dma, req->state_sz,
  259. DMA_FROM_DEVICE);
  260. unmap_sg:
  261. dma_unmap_sg(priv->dev, areq->src, req->nents, DMA_TO_DEVICE);
  262. cdesc_rollback:
  263. for (i = 0; i < n_cdesc; i++)
  264. safexcel_ring_rollback_wptr(priv, &priv->ring[ring].cdr);
  265. unmap_cache:
  266. if (req->cache_dma) {
  267. dma_unmap_single(priv->dev, req->cache_dma, req->cache_sz,
  268. DMA_TO_DEVICE);
  269. req->cache_sz = 0;
  270. }
  271. spin_unlock_bh(&priv->ring[ring].egress_lock);
  272. return ret;
  273. }
  274. static inline bool safexcel_ahash_needs_inv_get(struct ahash_request *areq)
  275. {
  276. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  277. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  278. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  279. unsigned int state_w_sz = req->state_sz / sizeof(u32);
  280. int i;
  281. for (i = 0; i < state_w_sz; i++)
  282. if (ctx->base.ctxr->data[i] != cpu_to_le32(req->state[i]))
  283. return true;
  284. if (ctx->base.ctxr->data[state_w_sz] !=
  285. cpu_to_le32(req->processed / crypto_ahash_blocksize(ahash)))
  286. return true;
  287. return false;
  288. }
  289. static int safexcel_handle_inv_result(struct safexcel_crypto_priv *priv,
  290. int ring,
  291. struct crypto_async_request *async,
  292. bool *should_complete, int *ret)
  293. {
  294. struct safexcel_result_desc *rdesc;
  295. struct ahash_request *areq = ahash_request_cast(async);
  296. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  297. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(ahash);
  298. int enq_ret;
  299. *ret = 0;
  300. spin_lock_bh(&priv->ring[ring].egress_lock);
  301. rdesc = safexcel_ring_next_rptr(priv, &priv->ring[ring].rdr);
  302. if (IS_ERR(rdesc)) {
  303. dev_err(priv->dev,
  304. "hash: invalidate: could not retrieve the result descriptor\n");
  305. *ret = PTR_ERR(rdesc);
  306. } else if (rdesc->result_data.error_code) {
  307. dev_err(priv->dev,
  308. "hash: invalidate: result descriptor error (%d)\n",
  309. rdesc->result_data.error_code);
  310. *ret = -EINVAL;
  311. }
  312. safexcel_complete(priv, ring);
  313. spin_unlock_bh(&priv->ring[ring].egress_lock);
  314. if (ctx->base.exit_inv) {
  315. dma_pool_free(priv->context_pool, ctx->base.ctxr,
  316. ctx->base.ctxr_dma);
  317. *should_complete = true;
  318. return 1;
  319. }
  320. ring = safexcel_select_ring(priv);
  321. ctx->base.ring = ring;
  322. spin_lock_bh(&priv->ring[ring].queue_lock);
  323. enq_ret = crypto_enqueue_request(&priv->ring[ring].queue, async);
  324. spin_unlock_bh(&priv->ring[ring].queue_lock);
  325. if (enq_ret != -EINPROGRESS)
  326. *ret = enq_ret;
  327. queue_work(priv->ring[ring].workqueue,
  328. &priv->ring[ring].work_data.work);
  329. *should_complete = false;
  330. return 1;
  331. }
  332. static int safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring,
  333. struct crypto_async_request *async,
  334. bool *should_complete, int *ret)
  335. {
  336. struct ahash_request *areq = ahash_request_cast(async);
  337. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  338. int err;
  339. BUG_ON(priv->version == EIP97 && req->needs_inv);
  340. if (req->needs_inv) {
  341. req->needs_inv = false;
  342. err = safexcel_handle_inv_result(priv, ring, async,
  343. should_complete, ret);
  344. } else {
  345. err = safexcel_handle_req_result(priv, ring, async,
  346. should_complete, ret);
  347. }
  348. return err;
  349. }
  350. static int safexcel_ahash_send_inv(struct crypto_async_request *async,
  351. int ring, struct safexcel_request *request,
  352. int *commands, int *results)
  353. {
  354. struct ahash_request *areq = ahash_request_cast(async);
  355. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  356. int ret;
  357. ret = safexcel_invalidate_cache(async, ctx->priv,
  358. ctx->base.ctxr_dma, ring, request);
  359. if (unlikely(ret))
  360. return ret;
  361. *commands = 1;
  362. *results = 1;
  363. return 0;
  364. }
  365. static int safexcel_ahash_send(struct crypto_async_request *async,
  366. int ring, struct safexcel_request *request,
  367. int *commands, int *results)
  368. {
  369. struct ahash_request *areq = ahash_request_cast(async);
  370. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  371. int ret;
  372. if (req->needs_inv)
  373. ret = safexcel_ahash_send_inv(async, ring, request,
  374. commands, results);
  375. else
  376. ret = safexcel_ahash_send_req(async, ring, request,
  377. commands, results);
  378. return ret;
  379. }
  380. static int safexcel_ahash_exit_inv(struct crypto_tfm *tfm)
  381. {
  382. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  383. struct safexcel_crypto_priv *priv = ctx->priv;
  384. EIP197_REQUEST_ON_STACK(req, ahash, EIP197_AHASH_REQ_SIZE);
  385. struct safexcel_ahash_req *rctx = ahash_request_ctx(req);
  386. struct safexcel_inv_result result = {};
  387. int ring = ctx->base.ring;
  388. memset(req, 0, sizeof(struct ahash_request));
  389. /* create invalidation request */
  390. init_completion(&result.completion);
  391. ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  392. safexcel_inv_complete, &result);
  393. ahash_request_set_tfm(req, __crypto_ahash_cast(tfm));
  394. ctx = crypto_tfm_ctx(req->base.tfm);
  395. ctx->base.exit_inv = true;
  396. rctx->needs_inv = true;
  397. spin_lock_bh(&priv->ring[ring].queue_lock);
  398. crypto_enqueue_request(&priv->ring[ring].queue, &req->base);
  399. spin_unlock_bh(&priv->ring[ring].queue_lock);
  400. queue_work(priv->ring[ring].workqueue,
  401. &priv->ring[ring].work_data.work);
  402. wait_for_completion(&result.completion);
  403. if (result.error) {
  404. dev_warn(priv->dev, "hash: completion error (%d)\n",
  405. result.error);
  406. return result.error;
  407. }
  408. return 0;
  409. }
  410. /* safexcel_ahash_cache: cache data until at least one request can be sent to
  411. * the engine, aka. when there is at least 1 block size in the pipe.
  412. */
  413. static int safexcel_ahash_cache(struct ahash_request *areq)
  414. {
  415. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  416. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  417. int queued, cache_len;
  418. /* cache_len: everyting accepted by the driver but not sent yet,
  419. * tot sz handled by update() - last req sz - tot sz handled by send()
  420. */
  421. cache_len = req->len - areq->nbytes - req->processed;
  422. /* queued: everything accepted by the driver which will be handled by
  423. * the next send() calls.
  424. * tot sz handled by update() - tot sz handled by send()
  425. */
  426. queued = req->len - req->processed;
  427. /*
  428. * In case there isn't enough bytes to proceed (less than a
  429. * block size), cache the data until we have enough.
  430. */
  431. if (cache_len + areq->nbytes <= crypto_ahash_blocksize(ahash)) {
  432. sg_pcopy_to_buffer(areq->src, sg_nents(areq->src),
  433. req->cache + cache_len,
  434. areq->nbytes, 0);
  435. return areq->nbytes;
  436. }
  437. /* We couldn't cache all the data */
  438. return -E2BIG;
  439. }
  440. static int safexcel_ahash_enqueue(struct ahash_request *areq)
  441. {
  442. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  443. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  444. struct safexcel_crypto_priv *priv = ctx->priv;
  445. int ret, ring;
  446. req->needs_inv = false;
  447. if (ctx->base.ctxr) {
  448. if (priv->version == EIP197 &&
  449. !ctx->base.needs_inv && req->processed &&
  450. req->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED)
  451. /* We're still setting needs_inv here, even though it is
  452. * cleared right away, because the needs_inv flag can be
  453. * set in other functions and we want to keep the same
  454. * logic.
  455. */
  456. ctx->base.needs_inv = safexcel_ahash_needs_inv_get(areq);
  457. if (ctx->base.needs_inv) {
  458. ctx->base.needs_inv = false;
  459. req->needs_inv = true;
  460. }
  461. } else {
  462. ctx->base.ring = safexcel_select_ring(priv);
  463. ctx->base.ctxr = dma_pool_zalloc(priv->context_pool,
  464. EIP197_GFP_FLAGS(areq->base),
  465. &ctx->base.ctxr_dma);
  466. if (!ctx->base.ctxr)
  467. return -ENOMEM;
  468. }
  469. ring = ctx->base.ring;
  470. spin_lock_bh(&priv->ring[ring].queue_lock);
  471. ret = crypto_enqueue_request(&priv->ring[ring].queue, &areq->base);
  472. spin_unlock_bh(&priv->ring[ring].queue_lock);
  473. queue_work(priv->ring[ring].workqueue,
  474. &priv->ring[ring].work_data.work);
  475. return ret;
  476. }
  477. static int safexcel_ahash_update(struct ahash_request *areq)
  478. {
  479. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  480. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  481. /* If the request is 0 length, do nothing */
  482. if (!areq->nbytes)
  483. return 0;
  484. req->len += areq->nbytes;
  485. safexcel_ahash_cache(areq);
  486. /*
  487. * We're not doing partial updates when performing an hmac request.
  488. * Everything will be handled by the final() call.
  489. */
  490. if (req->digest == CONTEXT_CONTROL_DIGEST_HMAC)
  491. return 0;
  492. if (req->hmac)
  493. return safexcel_ahash_enqueue(areq);
  494. if (!req->last_req &&
  495. req->len - req->processed > crypto_ahash_blocksize(ahash))
  496. return safexcel_ahash_enqueue(areq);
  497. return 0;
  498. }
  499. static int safexcel_ahash_final(struct ahash_request *areq)
  500. {
  501. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  502. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  503. req->last_req = true;
  504. req->finish = true;
  505. /* If we have an overall 0 length request */
  506. if (!(req->len + areq->nbytes)) {
  507. if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA1)
  508. memcpy(areq->result, sha1_zero_message_hash,
  509. SHA1_DIGEST_SIZE);
  510. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA224)
  511. memcpy(areq->result, sha224_zero_message_hash,
  512. SHA224_DIGEST_SIZE);
  513. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA256)
  514. memcpy(areq->result, sha256_zero_message_hash,
  515. SHA256_DIGEST_SIZE);
  516. return 0;
  517. }
  518. return safexcel_ahash_enqueue(areq);
  519. }
  520. static int safexcel_ahash_finup(struct ahash_request *areq)
  521. {
  522. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  523. req->last_req = true;
  524. req->finish = true;
  525. safexcel_ahash_update(areq);
  526. return safexcel_ahash_final(areq);
  527. }
  528. static int safexcel_ahash_export(struct ahash_request *areq, void *out)
  529. {
  530. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  531. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  532. struct safexcel_ahash_export_state *export = out;
  533. export->len = req->len;
  534. export->processed = req->processed;
  535. export->digest = req->digest;
  536. memcpy(export->state, req->state, req->state_sz);
  537. memcpy(export->cache, req->cache, crypto_ahash_blocksize(ahash));
  538. return 0;
  539. }
  540. static int safexcel_ahash_import(struct ahash_request *areq, const void *in)
  541. {
  542. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  543. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  544. const struct safexcel_ahash_export_state *export = in;
  545. int ret;
  546. ret = crypto_ahash_init(areq);
  547. if (ret)
  548. return ret;
  549. req->len = export->len;
  550. req->processed = export->processed;
  551. req->digest = export->digest;
  552. memcpy(req->cache, export->cache, crypto_ahash_blocksize(ahash));
  553. memcpy(req->state, export->state, req->state_sz);
  554. return 0;
  555. }
  556. static int safexcel_ahash_cra_init(struct crypto_tfm *tfm)
  557. {
  558. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  559. struct safexcel_alg_template *tmpl =
  560. container_of(__crypto_ahash_alg(tfm->__crt_alg),
  561. struct safexcel_alg_template, alg.ahash);
  562. ctx->priv = tmpl->priv;
  563. ctx->base.send = safexcel_ahash_send;
  564. ctx->base.handle_result = safexcel_handle_result;
  565. crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
  566. sizeof(struct safexcel_ahash_req));
  567. return 0;
  568. }
  569. static int safexcel_sha1_init(struct ahash_request *areq)
  570. {
  571. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  572. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  573. memset(req, 0, sizeof(*req));
  574. req->state[0] = SHA1_H0;
  575. req->state[1] = SHA1_H1;
  576. req->state[2] = SHA1_H2;
  577. req->state[3] = SHA1_H3;
  578. req->state[4] = SHA1_H4;
  579. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA1;
  580. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  581. req->state_sz = SHA1_DIGEST_SIZE;
  582. return 0;
  583. }
  584. static int safexcel_sha1_digest(struct ahash_request *areq)
  585. {
  586. int ret = safexcel_sha1_init(areq);
  587. if (ret)
  588. return ret;
  589. return safexcel_ahash_finup(areq);
  590. }
  591. static void safexcel_ahash_cra_exit(struct crypto_tfm *tfm)
  592. {
  593. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  594. struct safexcel_crypto_priv *priv = ctx->priv;
  595. int ret;
  596. /* context not allocated, skip invalidation */
  597. if (!ctx->base.ctxr)
  598. return;
  599. if (priv->version == EIP197) {
  600. ret = safexcel_ahash_exit_inv(tfm);
  601. if (ret)
  602. dev_warn(priv->dev, "hash: invalidation error %d\n", ret);
  603. } else {
  604. dma_pool_free(priv->context_pool, ctx->base.ctxr,
  605. ctx->base.ctxr_dma);
  606. }
  607. }
  608. struct safexcel_alg_template safexcel_alg_sha1 = {
  609. .type = SAFEXCEL_ALG_TYPE_AHASH,
  610. .alg.ahash = {
  611. .init = safexcel_sha1_init,
  612. .update = safexcel_ahash_update,
  613. .final = safexcel_ahash_final,
  614. .finup = safexcel_ahash_finup,
  615. .digest = safexcel_sha1_digest,
  616. .export = safexcel_ahash_export,
  617. .import = safexcel_ahash_import,
  618. .halg = {
  619. .digestsize = SHA1_DIGEST_SIZE,
  620. .statesize = sizeof(struct safexcel_ahash_export_state),
  621. .base = {
  622. .cra_name = "sha1",
  623. .cra_driver_name = "safexcel-sha1",
  624. .cra_priority = 300,
  625. .cra_flags = CRYPTO_ALG_ASYNC |
  626. CRYPTO_ALG_KERN_DRIVER_ONLY,
  627. .cra_blocksize = SHA1_BLOCK_SIZE,
  628. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  629. .cra_init = safexcel_ahash_cra_init,
  630. .cra_exit = safexcel_ahash_cra_exit,
  631. .cra_module = THIS_MODULE,
  632. },
  633. },
  634. },
  635. };
  636. static int safexcel_hmac_sha1_init(struct ahash_request *areq)
  637. {
  638. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  639. safexcel_sha1_init(areq);
  640. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  641. return 0;
  642. }
  643. static int safexcel_hmac_sha1_digest(struct ahash_request *areq)
  644. {
  645. int ret = safexcel_hmac_sha1_init(areq);
  646. if (ret)
  647. return ret;
  648. return safexcel_ahash_finup(areq);
  649. }
  650. struct safexcel_ahash_result {
  651. struct completion completion;
  652. int error;
  653. };
  654. static void safexcel_ahash_complete(struct crypto_async_request *req, int error)
  655. {
  656. struct safexcel_ahash_result *result = req->data;
  657. if (error == -EINPROGRESS)
  658. return;
  659. result->error = error;
  660. complete(&result->completion);
  661. }
  662. static int safexcel_hmac_init_pad(struct ahash_request *areq,
  663. unsigned int blocksize, const u8 *key,
  664. unsigned int keylen, u8 *ipad, u8 *opad)
  665. {
  666. struct safexcel_ahash_result result;
  667. struct scatterlist sg;
  668. int ret, i;
  669. u8 *keydup;
  670. if (keylen <= blocksize) {
  671. memcpy(ipad, key, keylen);
  672. } else {
  673. keydup = kmemdup(key, keylen, GFP_KERNEL);
  674. if (!keydup)
  675. return -ENOMEM;
  676. ahash_request_set_callback(areq, CRYPTO_TFM_REQ_MAY_BACKLOG,
  677. safexcel_ahash_complete, &result);
  678. sg_init_one(&sg, keydup, keylen);
  679. ahash_request_set_crypt(areq, &sg, ipad, keylen);
  680. init_completion(&result.completion);
  681. ret = crypto_ahash_digest(areq);
  682. if (ret == -EINPROGRESS || ret == -EBUSY) {
  683. wait_for_completion_interruptible(&result.completion);
  684. ret = result.error;
  685. }
  686. /* Avoid leaking */
  687. memzero_explicit(keydup, keylen);
  688. kfree(keydup);
  689. if (ret)
  690. return ret;
  691. keylen = crypto_ahash_digestsize(crypto_ahash_reqtfm(areq));
  692. }
  693. memset(ipad + keylen, 0, blocksize - keylen);
  694. memcpy(opad, ipad, blocksize);
  695. for (i = 0; i < blocksize; i++) {
  696. ipad[i] ^= HMAC_IPAD_VALUE;
  697. opad[i] ^= HMAC_OPAD_VALUE;
  698. }
  699. return 0;
  700. }
  701. static int safexcel_hmac_init_iv(struct ahash_request *areq,
  702. unsigned int blocksize, u8 *pad, void *state)
  703. {
  704. struct safexcel_ahash_result result;
  705. struct safexcel_ahash_req *req;
  706. struct scatterlist sg;
  707. int ret;
  708. ahash_request_set_callback(areq, CRYPTO_TFM_REQ_MAY_BACKLOG,
  709. safexcel_ahash_complete, &result);
  710. sg_init_one(&sg, pad, blocksize);
  711. ahash_request_set_crypt(areq, &sg, pad, blocksize);
  712. init_completion(&result.completion);
  713. ret = crypto_ahash_init(areq);
  714. if (ret)
  715. return ret;
  716. req = ahash_request_ctx(areq);
  717. req->hmac = true;
  718. req->last_req = true;
  719. ret = crypto_ahash_update(areq);
  720. if (ret && ret != -EINPROGRESS && ret != -EBUSY)
  721. return ret;
  722. wait_for_completion_interruptible(&result.completion);
  723. if (result.error)
  724. return result.error;
  725. return crypto_ahash_export(areq, state);
  726. }
  727. int safexcel_hmac_setkey(const char *alg, const u8 *key, unsigned int keylen,
  728. void *istate, void *ostate)
  729. {
  730. struct ahash_request *areq;
  731. struct crypto_ahash *tfm;
  732. unsigned int blocksize;
  733. u8 *ipad, *opad;
  734. int ret;
  735. tfm = crypto_alloc_ahash(alg, CRYPTO_ALG_TYPE_AHASH,
  736. CRYPTO_ALG_TYPE_AHASH_MASK);
  737. if (IS_ERR(tfm))
  738. return PTR_ERR(tfm);
  739. areq = ahash_request_alloc(tfm, GFP_KERNEL);
  740. if (!areq) {
  741. ret = -ENOMEM;
  742. goto free_ahash;
  743. }
  744. crypto_ahash_clear_flags(tfm, ~0);
  745. blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
  746. ipad = kcalloc(2, blocksize, GFP_KERNEL);
  747. if (!ipad) {
  748. ret = -ENOMEM;
  749. goto free_request;
  750. }
  751. opad = ipad + blocksize;
  752. ret = safexcel_hmac_init_pad(areq, blocksize, key, keylen, ipad, opad);
  753. if (ret)
  754. goto free_ipad;
  755. ret = safexcel_hmac_init_iv(areq, blocksize, ipad, istate);
  756. if (ret)
  757. goto free_ipad;
  758. ret = safexcel_hmac_init_iv(areq, blocksize, opad, ostate);
  759. free_ipad:
  760. kfree(ipad);
  761. free_request:
  762. ahash_request_free(areq);
  763. free_ahash:
  764. crypto_free_ahash(tfm);
  765. return ret;
  766. }
  767. static int safexcel_hmac_alg_setkey(struct crypto_ahash *tfm, const u8 *key,
  768. unsigned int keylen, const char *alg,
  769. unsigned int state_sz)
  770. {
  771. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  772. struct safexcel_crypto_priv *priv = ctx->priv;
  773. struct safexcel_ahash_export_state istate, ostate;
  774. int ret, i;
  775. ret = safexcel_hmac_setkey(alg, key, keylen, &istate, &ostate);
  776. if (ret)
  777. return ret;
  778. if (priv->version == EIP197 && ctx->base.ctxr) {
  779. for (i = 0; i < state_sz / sizeof(u32); i++) {
  780. if (ctx->ipad[i] != le32_to_cpu(istate.state[i]) ||
  781. ctx->opad[i] != le32_to_cpu(ostate.state[i])) {
  782. ctx->base.needs_inv = true;
  783. break;
  784. }
  785. }
  786. }
  787. memcpy(ctx->ipad, &istate.state, state_sz);
  788. memcpy(ctx->opad, &ostate.state, state_sz);
  789. return 0;
  790. }
  791. static int safexcel_hmac_sha1_setkey(struct crypto_ahash *tfm, const u8 *key,
  792. unsigned int keylen)
  793. {
  794. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha1",
  795. SHA1_DIGEST_SIZE);
  796. }
  797. struct safexcel_alg_template safexcel_alg_hmac_sha1 = {
  798. .type = SAFEXCEL_ALG_TYPE_AHASH,
  799. .alg.ahash = {
  800. .init = safexcel_hmac_sha1_init,
  801. .update = safexcel_ahash_update,
  802. .final = safexcel_ahash_final,
  803. .finup = safexcel_ahash_finup,
  804. .digest = safexcel_hmac_sha1_digest,
  805. .setkey = safexcel_hmac_sha1_setkey,
  806. .export = safexcel_ahash_export,
  807. .import = safexcel_ahash_import,
  808. .halg = {
  809. .digestsize = SHA1_DIGEST_SIZE,
  810. .statesize = sizeof(struct safexcel_ahash_export_state),
  811. .base = {
  812. .cra_name = "hmac(sha1)",
  813. .cra_driver_name = "safexcel-hmac-sha1",
  814. .cra_priority = 300,
  815. .cra_flags = CRYPTO_ALG_ASYNC |
  816. CRYPTO_ALG_KERN_DRIVER_ONLY,
  817. .cra_blocksize = SHA1_BLOCK_SIZE,
  818. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  819. .cra_init = safexcel_ahash_cra_init,
  820. .cra_exit = safexcel_ahash_cra_exit,
  821. .cra_module = THIS_MODULE,
  822. },
  823. },
  824. },
  825. };
  826. static int safexcel_sha256_init(struct ahash_request *areq)
  827. {
  828. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  829. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  830. memset(req, 0, sizeof(*req));
  831. req->state[0] = SHA256_H0;
  832. req->state[1] = SHA256_H1;
  833. req->state[2] = SHA256_H2;
  834. req->state[3] = SHA256_H3;
  835. req->state[4] = SHA256_H4;
  836. req->state[5] = SHA256_H5;
  837. req->state[6] = SHA256_H6;
  838. req->state[7] = SHA256_H7;
  839. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA256;
  840. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  841. req->state_sz = SHA256_DIGEST_SIZE;
  842. return 0;
  843. }
  844. static int safexcel_sha256_digest(struct ahash_request *areq)
  845. {
  846. int ret = safexcel_sha256_init(areq);
  847. if (ret)
  848. return ret;
  849. return safexcel_ahash_finup(areq);
  850. }
  851. struct safexcel_alg_template safexcel_alg_sha256 = {
  852. .type = SAFEXCEL_ALG_TYPE_AHASH,
  853. .alg.ahash = {
  854. .init = safexcel_sha256_init,
  855. .update = safexcel_ahash_update,
  856. .final = safexcel_ahash_final,
  857. .finup = safexcel_ahash_finup,
  858. .digest = safexcel_sha256_digest,
  859. .export = safexcel_ahash_export,
  860. .import = safexcel_ahash_import,
  861. .halg = {
  862. .digestsize = SHA256_DIGEST_SIZE,
  863. .statesize = sizeof(struct safexcel_ahash_export_state),
  864. .base = {
  865. .cra_name = "sha256",
  866. .cra_driver_name = "safexcel-sha256",
  867. .cra_priority = 300,
  868. .cra_flags = CRYPTO_ALG_ASYNC |
  869. CRYPTO_ALG_KERN_DRIVER_ONLY,
  870. .cra_blocksize = SHA256_BLOCK_SIZE,
  871. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  872. .cra_init = safexcel_ahash_cra_init,
  873. .cra_exit = safexcel_ahash_cra_exit,
  874. .cra_module = THIS_MODULE,
  875. },
  876. },
  877. },
  878. };
  879. static int safexcel_sha224_init(struct ahash_request *areq)
  880. {
  881. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  882. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  883. memset(req, 0, sizeof(*req));
  884. req->state[0] = SHA224_H0;
  885. req->state[1] = SHA224_H1;
  886. req->state[2] = SHA224_H2;
  887. req->state[3] = SHA224_H3;
  888. req->state[4] = SHA224_H4;
  889. req->state[5] = SHA224_H5;
  890. req->state[6] = SHA224_H6;
  891. req->state[7] = SHA224_H7;
  892. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA224;
  893. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  894. req->state_sz = SHA256_DIGEST_SIZE;
  895. return 0;
  896. }
  897. static int safexcel_sha224_digest(struct ahash_request *areq)
  898. {
  899. int ret = safexcel_sha224_init(areq);
  900. if (ret)
  901. return ret;
  902. return safexcel_ahash_finup(areq);
  903. }
  904. struct safexcel_alg_template safexcel_alg_sha224 = {
  905. .type = SAFEXCEL_ALG_TYPE_AHASH,
  906. .alg.ahash = {
  907. .init = safexcel_sha224_init,
  908. .update = safexcel_ahash_update,
  909. .final = safexcel_ahash_final,
  910. .finup = safexcel_ahash_finup,
  911. .digest = safexcel_sha224_digest,
  912. .export = safexcel_ahash_export,
  913. .import = safexcel_ahash_import,
  914. .halg = {
  915. .digestsize = SHA224_DIGEST_SIZE,
  916. .statesize = sizeof(struct safexcel_ahash_export_state),
  917. .base = {
  918. .cra_name = "sha224",
  919. .cra_driver_name = "safexcel-sha224",
  920. .cra_priority = 300,
  921. .cra_flags = CRYPTO_ALG_ASYNC |
  922. CRYPTO_ALG_KERN_DRIVER_ONLY,
  923. .cra_blocksize = SHA224_BLOCK_SIZE,
  924. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  925. .cra_init = safexcel_ahash_cra_init,
  926. .cra_exit = safexcel_ahash_cra_exit,
  927. .cra_module = THIS_MODULE,
  928. },
  929. },
  930. },
  931. };
  932. static int safexcel_hmac_sha224_setkey(struct crypto_ahash *tfm, const u8 *key,
  933. unsigned int keylen)
  934. {
  935. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha224",
  936. SHA256_DIGEST_SIZE);
  937. }
  938. static int safexcel_hmac_sha224_init(struct ahash_request *areq)
  939. {
  940. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  941. safexcel_sha224_init(areq);
  942. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  943. return 0;
  944. }
  945. static int safexcel_hmac_sha224_digest(struct ahash_request *areq)
  946. {
  947. int ret = safexcel_hmac_sha224_init(areq);
  948. if (ret)
  949. return ret;
  950. return safexcel_ahash_finup(areq);
  951. }
  952. struct safexcel_alg_template safexcel_alg_hmac_sha224 = {
  953. .type = SAFEXCEL_ALG_TYPE_AHASH,
  954. .alg.ahash = {
  955. .init = safexcel_hmac_sha224_init,
  956. .update = safexcel_ahash_update,
  957. .final = safexcel_ahash_final,
  958. .finup = safexcel_ahash_finup,
  959. .digest = safexcel_hmac_sha224_digest,
  960. .setkey = safexcel_hmac_sha224_setkey,
  961. .export = safexcel_ahash_export,
  962. .import = safexcel_ahash_import,
  963. .halg = {
  964. .digestsize = SHA224_DIGEST_SIZE,
  965. .statesize = sizeof(struct safexcel_ahash_export_state),
  966. .base = {
  967. .cra_name = "hmac(sha224)",
  968. .cra_driver_name = "safexcel-hmac-sha224",
  969. .cra_priority = 300,
  970. .cra_flags = CRYPTO_ALG_ASYNC |
  971. CRYPTO_ALG_KERN_DRIVER_ONLY,
  972. .cra_blocksize = SHA224_BLOCK_SIZE,
  973. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  974. .cra_init = safexcel_ahash_cra_init,
  975. .cra_exit = safexcel_ahash_cra_exit,
  976. .cra_module = THIS_MODULE,
  977. },
  978. },
  979. },
  980. };
  981. static int safexcel_hmac_sha256_setkey(struct crypto_ahash *tfm, const u8 *key,
  982. unsigned int keylen)
  983. {
  984. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha256",
  985. SHA256_DIGEST_SIZE);
  986. }
  987. static int safexcel_hmac_sha256_init(struct ahash_request *areq)
  988. {
  989. struct safexcel_ahash_req *req = ahash_request_ctx(areq);
  990. safexcel_sha256_init(areq);
  991. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  992. return 0;
  993. }
  994. static int safexcel_hmac_sha256_digest(struct ahash_request *areq)
  995. {
  996. int ret = safexcel_hmac_sha256_init(areq);
  997. if (ret)
  998. return ret;
  999. return safexcel_ahash_finup(areq);
  1000. }
  1001. struct safexcel_alg_template safexcel_alg_hmac_sha256 = {
  1002. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1003. .alg.ahash = {
  1004. .init = safexcel_hmac_sha256_init,
  1005. .update = safexcel_ahash_update,
  1006. .final = safexcel_ahash_final,
  1007. .finup = safexcel_ahash_finup,
  1008. .digest = safexcel_hmac_sha256_digest,
  1009. .setkey = safexcel_hmac_sha256_setkey,
  1010. .export = safexcel_ahash_export,
  1011. .import = safexcel_ahash_import,
  1012. .halg = {
  1013. .digestsize = SHA256_DIGEST_SIZE,
  1014. .statesize = sizeof(struct safexcel_ahash_export_state),
  1015. .base = {
  1016. .cra_name = "hmac(sha256)",
  1017. .cra_driver_name = "safexcel-hmac-sha256",
  1018. .cra_priority = 300,
  1019. .cra_flags = CRYPTO_ALG_ASYNC |
  1020. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1021. .cra_blocksize = SHA256_BLOCK_SIZE,
  1022. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1023. .cra_init = safexcel_ahash_cra_init,
  1024. .cra_exit = safexcel_ahash_cra_exit,
  1025. .cra_module = THIS_MODULE,
  1026. },
  1027. },
  1028. },
  1029. };