bcm3384_zephyr.dtsi 2.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. / {
  3. #address-cells = <1>;
  4. #size-cells = <1>;
  5. compatible = "brcm,bcm3384", "brcm,bcm33843";
  6. memory@0 {
  7. device_type = "memory";
  8. /* Typical range. The bootloader should fill this in. */
  9. reg = <0x0 0x08000000>;
  10. };
  11. cpus {
  12. #address-cells = <1>;
  13. #size-cells = <0>;
  14. /* On BMIPS5000 this is 1/8th of the CPU core clock */
  15. mips-hpt-frequency = <100000000>;
  16. cpu@0 {
  17. compatible = "brcm,bmips5000";
  18. device_type = "cpu";
  19. reg = <0>;
  20. };
  21. cpu@1 {
  22. compatible = "brcm,bmips5000";
  23. device_type = "cpu";
  24. reg = <1>;
  25. };
  26. };
  27. cpu_intc: cpu_intc {
  28. #address-cells = <0>;
  29. compatible = "mti,cpu-interrupt-controller";
  30. interrupt-controller;
  31. #interrupt-cells = <1>;
  32. };
  33. clocks {
  34. periph_clk: periph_clk {
  35. compatible = "fixed-clock";
  36. #clock-cells = <0>;
  37. clock-frequency = <54000000>;
  38. };
  39. };
  40. aliases {
  41. uart0 = &uart0;
  42. };
  43. ubus {
  44. #address-cells = <1>;
  45. #size-cells = <1>;
  46. compatible = "brcm,ubus", "simple-bus";
  47. ranges;
  48. dma-ranges = <0x00000000 0x08000000 0x08000000>,
  49. <0x08000000 0x00000000 0x08000000>;
  50. periph_intc: periph_intc@14e00038 {
  51. compatible = "brcm,bcm3380-l2-intc";
  52. reg = <0x14e00038 0x4 0x14e0003c 0x4>,
  53. <0x14e00340 0x4 0x14e00344 0x4>;
  54. interrupt-controller;
  55. #interrupt-cells = <1>;
  56. interrupt-parent = <&cpu_intc>;
  57. interrupts = <4>;
  58. };
  59. zmips_intc: zmips_intc@104b0060 {
  60. compatible = "brcm,bcm3380-l2-intc";
  61. reg = <0x104b0060 0x4 0x104b0064 0x4>;
  62. interrupt-controller;
  63. #interrupt-cells = <1>;
  64. interrupt-parent = <&periph_intc>;
  65. interrupts = <29>;
  66. brcm,int-map-mask = <0xffffffff>;
  67. };
  68. iop_intc: iop_intc@14e00058 {
  69. compatible = "brcm,bcm3380-l2-intc";
  70. reg = <0x14e00058 0x4 0x14e0005c 0x4>;
  71. interrupt-controller;
  72. #interrupt-cells = <1>;
  73. interrupt-parent = <&cpu_intc>;
  74. interrupts = <6>;
  75. brcm,int-map-mask = <0xffffffff>;
  76. };
  77. uart0: serial@14e00520 {
  78. compatible = "brcm,bcm6345-uart";
  79. reg = <0x14e00520 0x18>;
  80. interrupt-parent = <&periph_intc>;
  81. interrupts = <2>;
  82. clocks = <&periph_clk>;
  83. status = "disabled";
  84. };
  85. ehci0: usb@15400300 {
  86. compatible = "brcm,bcm3384-ehci", "generic-ehci";
  87. reg = <0x15400300 0x100>;
  88. big-endian;
  89. interrupt-parent = <&periph_intc>;
  90. interrupts = <41>;
  91. status = "disabled";
  92. };
  93. ohci0: usb@15400400 {
  94. compatible = "brcm,bcm3384-ohci", "generic-ohci";
  95. reg = <0x15400400 0x100>;
  96. big-endian;
  97. no-big-frame-no;
  98. interrupt-parent = <&periph_intc>;
  99. interrupts = <40>;
  100. status = "disabled";
  101. };
  102. };
  103. };