smp.c 17 KB

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  1. /*
  2. * linux/arch/arm/kernel/smp.c
  3. *
  4. * Copyright (C) 2002 ARM Limited, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/sched/mm.h>
  15. #include <linux/sched/hotplug.h>
  16. #include <linux/sched/task_stack.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/cache.h>
  19. #include <linux/profile.h>
  20. #include <linux/errno.h>
  21. #include <linux/mm.h>
  22. #include <linux/err.h>
  23. #include <linux/cpu.h>
  24. #include <linux/seq_file.h>
  25. #include <linux/irq.h>
  26. #include <linux/nmi.h>
  27. #include <linux/percpu.h>
  28. #include <linux/clockchips.h>
  29. #include <linux/completion.h>
  30. #include <linux/cpufreq.h>
  31. #include <linux/irq_work.h>
  32. #include <linux/atomic.h>
  33. #include <asm/bugs.h>
  34. #include <asm/smp.h>
  35. #include <asm/cacheflush.h>
  36. #include <asm/cpu.h>
  37. #include <asm/cputype.h>
  38. #include <asm/exception.h>
  39. #include <asm/idmap.h>
  40. #include <asm/topology.h>
  41. #include <asm/mmu_context.h>
  42. #include <asm/pgtable.h>
  43. #include <asm/pgalloc.h>
  44. #include <asm/processor.h>
  45. #include <asm/sections.h>
  46. #include <asm/tlbflush.h>
  47. #include <asm/ptrace.h>
  48. #include <asm/smp_plat.h>
  49. #include <asm/virt.h>
  50. #include <asm/mach/arch.h>
  51. #include <asm/mpu.h>
  52. #define CREATE_TRACE_POINTS
  53. #include <trace/events/ipi.h>
  54. /*
  55. * as from 2.5, kernels no longer have an init_tasks structure
  56. * so we need some other way of telling a new secondary core
  57. * where to place its SVC stack
  58. */
  59. struct secondary_data secondary_data;
  60. /*
  61. * control for which core is the next to come out of the secondary
  62. * boot "holding pen"
  63. */
  64. volatile int pen_release = -1;
  65. enum ipi_msg_type {
  66. IPI_WAKEUP,
  67. IPI_TIMER,
  68. IPI_RESCHEDULE,
  69. IPI_CALL_FUNC,
  70. IPI_CPU_STOP,
  71. IPI_IRQ_WORK,
  72. IPI_COMPLETION,
  73. IPI_CPU_BACKTRACE,
  74. /*
  75. * SGI8-15 can be reserved by secure firmware, and thus may
  76. * not be usable by the kernel. Please keep the above limited
  77. * to at most 8 entries.
  78. */
  79. };
  80. static DECLARE_COMPLETION(cpu_running);
  81. static struct smp_operations smp_ops __ro_after_init;
  82. void __init smp_set_ops(const struct smp_operations *ops)
  83. {
  84. if (ops)
  85. smp_ops = *ops;
  86. };
  87. static unsigned long get_arch_pgd(pgd_t *pgd)
  88. {
  89. #ifdef CONFIG_ARM_LPAE
  90. return __phys_to_pfn(virt_to_phys(pgd));
  91. #else
  92. return virt_to_phys(pgd);
  93. #endif
  94. }
  95. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  96. {
  97. int ret;
  98. if (!smp_ops.smp_boot_secondary)
  99. return -ENOSYS;
  100. /*
  101. * We need to tell the secondary core where to find
  102. * its stack and the page tables.
  103. */
  104. secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  105. #ifdef CONFIG_ARM_MPU
  106. secondary_data.mpu_rgn_info = &mpu_rgn_info;
  107. #endif
  108. #ifdef CONFIG_MMU
  109. secondary_data.pgdir = virt_to_phys(idmap_pgd);
  110. secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
  111. #endif
  112. sync_cache_w(&secondary_data);
  113. /*
  114. * Now bring the CPU into our world.
  115. */
  116. ret = smp_ops.smp_boot_secondary(cpu, idle);
  117. if (ret == 0) {
  118. /*
  119. * CPU was successfully started, wait for it
  120. * to come online or time out.
  121. */
  122. wait_for_completion_timeout(&cpu_running,
  123. msecs_to_jiffies(1000));
  124. if (!cpu_online(cpu)) {
  125. pr_crit("CPU%u: failed to come online\n", cpu);
  126. ret = -EIO;
  127. }
  128. } else {
  129. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  130. }
  131. memset(&secondary_data, 0, sizeof(secondary_data));
  132. return ret;
  133. }
  134. /* platform specific SMP operations */
  135. void __init smp_init_cpus(void)
  136. {
  137. if (smp_ops.smp_init_cpus)
  138. smp_ops.smp_init_cpus();
  139. }
  140. int platform_can_secondary_boot(void)
  141. {
  142. return !!smp_ops.smp_boot_secondary;
  143. }
  144. int platform_can_cpu_hotplug(void)
  145. {
  146. #ifdef CONFIG_HOTPLUG_CPU
  147. if (smp_ops.cpu_kill)
  148. return 1;
  149. #endif
  150. return 0;
  151. }
  152. #ifdef CONFIG_HOTPLUG_CPU
  153. static int platform_cpu_kill(unsigned int cpu)
  154. {
  155. if (smp_ops.cpu_kill)
  156. return smp_ops.cpu_kill(cpu);
  157. return 1;
  158. }
  159. static int platform_cpu_disable(unsigned int cpu)
  160. {
  161. if (smp_ops.cpu_disable)
  162. return smp_ops.cpu_disable(cpu);
  163. return 0;
  164. }
  165. int platform_can_hotplug_cpu(unsigned int cpu)
  166. {
  167. /* cpu_die must be specified to support hotplug */
  168. if (!smp_ops.cpu_die)
  169. return 0;
  170. if (smp_ops.cpu_can_disable)
  171. return smp_ops.cpu_can_disable(cpu);
  172. /*
  173. * By default, allow disabling all CPUs except the first one,
  174. * since this is special on a lot of platforms, e.g. because
  175. * of clock tick interrupts.
  176. */
  177. return cpu != 0;
  178. }
  179. /*
  180. * __cpu_disable runs on the processor to be shutdown.
  181. */
  182. int __cpu_disable(void)
  183. {
  184. unsigned int cpu = smp_processor_id();
  185. int ret;
  186. ret = platform_cpu_disable(cpu);
  187. if (ret)
  188. return ret;
  189. /*
  190. * Take this CPU offline. Once we clear this, we can't return,
  191. * and we must not schedule until we're ready to give up the cpu.
  192. */
  193. set_cpu_online(cpu, false);
  194. /*
  195. * OK - migrate IRQs away from this CPU
  196. */
  197. migrate_irqs();
  198. /*
  199. * Flush user cache and TLB mappings, and then remove this CPU
  200. * from the vm mask set of all processes.
  201. *
  202. * Caches are flushed to the Level of Unification Inner Shareable
  203. * to write-back dirty lines to unified caches shared by all CPUs.
  204. */
  205. flush_cache_louis();
  206. local_flush_tlb_all();
  207. return 0;
  208. }
  209. static DECLARE_COMPLETION(cpu_died);
  210. /*
  211. * called on the thread which is asking for a CPU to be shutdown -
  212. * waits until shutdown has completed, or it is timed out.
  213. */
  214. void __cpu_die(unsigned int cpu)
  215. {
  216. if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
  217. pr_err("CPU%u: cpu didn't die\n", cpu);
  218. return;
  219. }
  220. pr_debug("CPU%u: shutdown\n", cpu);
  221. clear_tasks_mm_cpumask(cpu);
  222. /*
  223. * platform_cpu_kill() is generally expected to do the powering off
  224. * and/or cutting of clocks to the dying CPU. Optionally, this may
  225. * be done by the CPU which is dying in preference to supporting
  226. * this call, but that means there is _no_ synchronisation between
  227. * the requesting CPU and the dying CPU actually losing power.
  228. */
  229. if (!platform_cpu_kill(cpu))
  230. pr_err("CPU%u: unable to kill\n", cpu);
  231. }
  232. /*
  233. * Called from the idle thread for the CPU which has been shutdown.
  234. *
  235. * Note that we disable IRQs here, but do not re-enable them
  236. * before returning to the caller. This is also the behaviour
  237. * of the other hotplug-cpu capable cores, so presumably coming
  238. * out of idle fixes this.
  239. */
  240. void arch_cpu_idle_dead(void)
  241. {
  242. unsigned int cpu = smp_processor_id();
  243. idle_task_exit();
  244. local_irq_disable();
  245. /*
  246. * Flush the data out of the L1 cache for this CPU. This must be
  247. * before the completion to ensure that data is safely written out
  248. * before platform_cpu_kill() gets called - which may disable
  249. * *this* CPU and power down its cache.
  250. */
  251. flush_cache_louis();
  252. /*
  253. * Tell __cpu_die() that this CPU is now safe to dispose of. Once
  254. * this returns, power and/or clocks can be removed at any point
  255. * from this CPU and its cache by platform_cpu_kill().
  256. */
  257. complete(&cpu_died);
  258. /*
  259. * Ensure that the cache lines associated with that completion are
  260. * written out. This covers the case where _this_ CPU is doing the
  261. * powering down, to ensure that the completion is visible to the
  262. * CPU waiting for this one.
  263. */
  264. flush_cache_louis();
  265. /*
  266. * The actual CPU shutdown procedure is at least platform (if not
  267. * CPU) specific. This may remove power, or it may simply spin.
  268. *
  269. * Platforms are generally expected *NOT* to return from this call,
  270. * although there are some which do because they have no way to
  271. * power down the CPU. These platforms are the _only_ reason we
  272. * have a return path which uses the fragment of assembly below.
  273. *
  274. * The return path should not be used for platforms which can
  275. * power off the CPU.
  276. */
  277. if (smp_ops.cpu_die)
  278. smp_ops.cpu_die(cpu);
  279. pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
  280. cpu);
  281. /*
  282. * Do not return to the idle loop - jump back to the secondary
  283. * cpu initialisation. There's some initialisation which needs
  284. * to be repeated to undo the effects of taking the CPU offline.
  285. */
  286. __asm__("mov sp, %0\n"
  287. " mov fp, #0\n"
  288. " b secondary_start_kernel"
  289. :
  290. : "r" (task_stack_page(current) + THREAD_SIZE - 8));
  291. }
  292. #endif /* CONFIG_HOTPLUG_CPU */
  293. /*
  294. * Called by both boot and secondaries to move global data into
  295. * per-processor storage.
  296. */
  297. static void smp_store_cpu_info(unsigned int cpuid)
  298. {
  299. struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
  300. cpu_info->loops_per_jiffy = loops_per_jiffy;
  301. cpu_info->cpuid = read_cpuid_id();
  302. store_cpu_topology(cpuid);
  303. }
  304. /*
  305. * This is the secondary CPU boot entry. We're using this CPUs
  306. * idle thread stack, but a set of temporary page tables.
  307. */
  308. asmlinkage void secondary_start_kernel(void)
  309. {
  310. struct mm_struct *mm = &init_mm;
  311. unsigned int cpu;
  312. /*
  313. * The identity mapping is uncached (strongly ordered), so
  314. * switch away from it before attempting any exclusive accesses.
  315. */
  316. cpu_switch_mm(mm->pgd, mm);
  317. local_flush_bp_all();
  318. enter_lazy_tlb(mm, current);
  319. local_flush_tlb_all();
  320. /*
  321. * All kernel threads share the same mm context; grab a
  322. * reference and switch to it.
  323. */
  324. cpu = smp_processor_id();
  325. mmgrab(mm);
  326. current->active_mm = mm;
  327. cpumask_set_cpu(cpu, mm_cpumask(mm));
  328. cpu_init();
  329. #ifndef CONFIG_MMU
  330. setup_vectors_base();
  331. #endif
  332. pr_debug("CPU%u: Booted secondary processor\n", cpu);
  333. preempt_disable();
  334. trace_hardirqs_off();
  335. /*
  336. * Give the platform a chance to do its own initialisation.
  337. */
  338. if (smp_ops.smp_secondary_init)
  339. smp_ops.smp_secondary_init(cpu);
  340. notify_cpu_starting(cpu);
  341. calibrate_delay();
  342. smp_store_cpu_info(cpu);
  343. /*
  344. * OK, now it's safe to let the boot CPU continue. Wait for
  345. * the CPU migration code to notice that the CPU is online
  346. * before we continue - which happens after __cpu_up returns.
  347. */
  348. set_cpu_online(cpu, true);
  349. check_other_bugs();
  350. complete(&cpu_running);
  351. local_irq_enable();
  352. local_fiq_enable();
  353. local_abt_enable();
  354. /*
  355. * OK, it's off to the idle thread for us
  356. */
  357. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  358. }
  359. void __init smp_cpus_done(unsigned int max_cpus)
  360. {
  361. int cpu;
  362. unsigned long bogosum = 0;
  363. for_each_online_cpu(cpu)
  364. bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
  365. printk(KERN_INFO "SMP: Total of %d processors activated "
  366. "(%lu.%02lu BogoMIPS).\n",
  367. num_online_cpus(),
  368. bogosum / (500000/HZ),
  369. (bogosum / (5000/HZ)) % 100);
  370. hyp_mode_check();
  371. }
  372. void __init smp_prepare_boot_cpu(void)
  373. {
  374. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  375. }
  376. void __init smp_prepare_cpus(unsigned int max_cpus)
  377. {
  378. unsigned int ncores = num_possible_cpus();
  379. init_cpu_topology();
  380. smp_store_cpu_info(smp_processor_id());
  381. /*
  382. * are we trying to boot more cores than exist?
  383. */
  384. if (max_cpus > ncores)
  385. max_cpus = ncores;
  386. if (ncores > 1 && max_cpus) {
  387. /*
  388. * Initialise the present map, which describes the set of CPUs
  389. * actually populated at the present time. A platform should
  390. * re-initialize the map in the platforms smp_prepare_cpus()
  391. * if present != possible (e.g. physical hotplug).
  392. */
  393. init_cpu_present(cpu_possible_mask);
  394. /*
  395. * Initialise the SCU if there are more than one CPU
  396. * and let them know where to start.
  397. */
  398. if (smp_ops.smp_prepare_cpus)
  399. smp_ops.smp_prepare_cpus(max_cpus);
  400. }
  401. }
  402. static void (*__smp_cross_call)(const struct cpumask *, unsigned int);
  403. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  404. {
  405. if (!__smp_cross_call)
  406. __smp_cross_call = fn;
  407. }
  408. static const char *ipi_types[NR_IPI] __tracepoint_string = {
  409. #define S(x,s) [x] = s
  410. S(IPI_WAKEUP, "CPU wakeup interrupts"),
  411. S(IPI_TIMER, "Timer broadcast interrupts"),
  412. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  413. S(IPI_CALL_FUNC, "Function call interrupts"),
  414. S(IPI_CPU_STOP, "CPU stop interrupts"),
  415. S(IPI_IRQ_WORK, "IRQ work interrupts"),
  416. S(IPI_COMPLETION, "completion interrupts"),
  417. };
  418. static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
  419. {
  420. trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
  421. __smp_cross_call(target, ipinr);
  422. }
  423. void show_ipi_list(struct seq_file *p, int prec)
  424. {
  425. unsigned int cpu, i;
  426. for (i = 0; i < NR_IPI; i++) {
  427. seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
  428. for_each_online_cpu(cpu)
  429. seq_printf(p, "%10u ",
  430. __get_irq_stat(cpu, ipi_irqs[i]));
  431. seq_printf(p, " %s\n", ipi_types[i]);
  432. }
  433. }
  434. u64 smp_irq_stat_cpu(unsigned int cpu)
  435. {
  436. u64 sum = 0;
  437. int i;
  438. for (i = 0; i < NR_IPI; i++)
  439. sum += __get_irq_stat(cpu, ipi_irqs[i]);
  440. return sum;
  441. }
  442. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  443. {
  444. smp_cross_call(mask, IPI_CALL_FUNC);
  445. }
  446. void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
  447. {
  448. smp_cross_call(mask, IPI_WAKEUP);
  449. }
  450. void arch_send_call_function_single_ipi(int cpu)
  451. {
  452. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
  453. }
  454. #ifdef CONFIG_IRQ_WORK
  455. void arch_irq_work_raise(void)
  456. {
  457. if (arch_irq_work_has_interrupt())
  458. smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
  459. }
  460. #endif
  461. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  462. void tick_broadcast(const struct cpumask *mask)
  463. {
  464. smp_cross_call(mask, IPI_TIMER);
  465. }
  466. #endif
  467. static DEFINE_RAW_SPINLOCK(stop_lock);
  468. /*
  469. * ipi_cpu_stop - handle IPI from smp_send_stop()
  470. */
  471. static void ipi_cpu_stop(unsigned int cpu)
  472. {
  473. if (system_state <= SYSTEM_RUNNING) {
  474. raw_spin_lock(&stop_lock);
  475. pr_crit("CPU%u: stopping\n", cpu);
  476. dump_stack();
  477. raw_spin_unlock(&stop_lock);
  478. }
  479. set_cpu_online(cpu, false);
  480. local_fiq_disable();
  481. local_irq_disable();
  482. while (1)
  483. cpu_relax();
  484. }
  485. static DEFINE_PER_CPU(struct completion *, cpu_completion);
  486. int register_ipi_completion(struct completion *completion, int cpu)
  487. {
  488. per_cpu(cpu_completion, cpu) = completion;
  489. return IPI_COMPLETION;
  490. }
  491. static void ipi_complete(unsigned int cpu)
  492. {
  493. complete(per_cpu(cpu_completion, cpu));
  494. }
  495. /*
  496. * Main handler for inter-processor interrupts
  497. */
  498. asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
  499. {
  500. handle_IPI(ipinr, regs);
  501. }
  502. void handle_IPI(int ipinr, struct pt_regs *regs)
  503. {
  504. unsigned int cpu = smp_processor_id();
  505. struct pt_regs *old_regs = set_irq_regs(regs);
  506. if ((unsigned)ipinr < NR_IPI) {
  507. trace_ipi_entry_rcuidle(ipi_types[ipinr]);
  508. __inc_irq_stat(cpu, ipi_irqs[ipinr]);
  509. }
  510. switch (ipinr) {
  511. case IPI_WAKEUP:
  512. break;
  513. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  514. case IPI_TIMER:
  515. irq_enter();
  516. tick_receive_broadcast();
  517. irq_exit();
  518. break;
  519. #endif
  520. case IPI_RESCHEDULE:
  521. scheduler_ipi();
  522. break;
  523. case IPI_CALL_FUNC:
  524. irq_enter();
  525. generic_smp_call_function_interrupt();
  526. irq_exit();
  527. break;
  528. case IPI_CPU_STOP:
  529. irq_enter();
  530. ipi_cpu_stop(cpu);
  531. irq_exit();
  532. break;
  533. #ifdef CONFIG_IRQ_WORK
  534. case IPI_IRQ_WORK:
  535. irq_enter();
  536. irq_work_run();
  537. irq_exit();
  538. break;
  539. #endif
  540. case IPI_COMPLETION:
  541. irq_enter();
  542. ipi_complete(cpu);
  543. irq_exit();
  544. break;
  545. case IPI_CPU_BACKTRACE:
  546. printk_nmi_enter();
  547. irq_enter();
  548. nmi_cpu_backtrace(regs);
  549. irq_exit();
  550. printk_nmi_exit();
  551. break;
  552. default:
  553. pr_crit("CPU%u: Unknown IPI message 0x%x\n",
  554. cpu, ipinr);
  555. break;
  556. }
  557. if ((unsigned)ipinr < NR_IPI)
  558. trace_ipi_exit_rcuidle(ipi_types[ipinr]);
  559. set_irq_regs(old_regs);
  560. }
  561. void smp_send_reschedule(int cpu)
  562. {
  563. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  564. }
  565. void smp_send_stop(void)
  566. {
  567. unsigned long timeout;
  568. struct cpumask mask;
  569. cpumask_copy(&mask, cpu_online_mask);
  570. cpumask_clear_cpu(smp_processor_id(), &mask);
  571. if (!cpumask_empty(&mask))
  572. smp_cross_call(&mask, IPI_CPU_STOP);
  573. /* Wait up to one second for other CPUs to stop */
  574. timeout = USEC_PER_SEC;
  575. while (num_online_cpus() > 1 && timeout--)
  576. udelay(1);
  577. if (num_online_cpus() > 1)
  578. pr_warn("SMP: failed to stop secondary CPUs\n");
  579. }
  580. /*
  581. * not supported here
  582. */
  583. int setup_profiling_timer(unsigned int multiplier)
  584. {
  585. return -EINVAL;
  586. }
  587. #ifdef CONFIG_CPU_FREQ
  588. static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
  589. static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
  590. static unsigned long global_l_p_j_ref;
  591. static unsigned long global_l_p_j_ref_freq;
  592. static int cpufreq_callback(struct notifier_block *nb,
  593. unsigned long val, void *data)
  594. {
  595. struct cpufreq_freqs *freq = data;
  596. int cpu = freq->cpu;
  597. if (freq->flags & CPUFREQ_CONST_LOOPS)
  598. return NOTIFY_OK;
  599. if (!per_cpu(l_p_j_ref, cpu)) {
  600. per_cpu(l_p_j_ref, cpu) =
  601. per_cpu(cpu_data, cpu).loops_per_jiffy;
  602. per_cpu(l_p_j_ref_freq, cpu) = freq->old;
  603. if (!global_l_p_j_ref) {
  604. global_l_p_j_ref = loops_per_jiffy;
  605. global_l_p_j_ref_freq = freq->old;
  606. }
  607. }
  608. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  609. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
  610. loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
  611. global_l_p_j_ref_freq,
  612. freq->new);
  613. per_cpu(cpu_data, cpu).loops_per_jiffy =
  614. cpufreq_scale(per_cpu(l_p_j_ref, cpu),
  615. per_cpu(l_p_j_ref_freq, cpu),
  616. freq->new);
  617. }
  618. return NOTIFY_OK;
  619. }
  620. static struct notifier_block cpufreq_notifier = {
  621. .notifier_call = cpufreq_callback,
  622. };
  623. static int __init register_cpufreq_notifier(void)
  624. {
  625. return cpufreq_register_notifier(&cpufreq_notifier,
  626. CPUFREQ_TRANSITION_NOTIFIER);
  627. }
  628. core_initcall(register_cpufreq_notifier);
  629. #endif
  630. static void raise_nmi(cpumask_t *mask)
  631. {
  632. smp_cross_call(mask, IPI_CPU_BACKTRACE);
  633. }
  634. void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
  635. {
  636. nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_nmi);
  637. }