platform.c 2.1 KB

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  1. /*
  2. * ARC HSDK Platform support code
  3. *
  4. * Copyright (C) 2017 Synopsys, Inc. (www.synopsys.com)
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/smp.h>
  12. #include <asm/arcregs.h>
  13. #include <asm/io.h>
  14. #include <asm/mach_desc.h>
  15. #define ARC_CCM_UNUSED_ADDR 0x60000000
  16. static void __init hsdk_init_per_cpu(unsigned int cpu)
  17. {
  18. /*
  19. * By default ICCM is mapped to 0x7z while this area is used for
  20. * kernel virtual mappings, so move it to currently unused area.
  21. */
  22. if (cpuinfo_arc700[cpu].iccm.sz)
  23. write_aux_reg(ARC_REG_AUX_ICCM, ARC_CCM_UNUSED_ADDR);
  24. /*
  25. * By default DCCM is mapped to 0x8z while this area is used by kernel,
  26. * so move it to currently unused area.
  27. */
  28. if (cpuinfo_arc700[cpu].dccm.sz)
  29. write_aux_reg(ARC_REG_AUX_DCCM, ARC_CCM_UNUSED_ADDR);
  30. }
  31. #define ARC_PERIPHERAL_BASE 0xf0000000
  32. #define CREG_BASE (ARC_PERIPHERAL_BASE + 0x1000)
  33. #define CREG_PAE (CREG_BASE + 0x180)
  34. #define CREG_PAE_UPDATE (CREG_BASE + 0x194)
  35. #define SDIO_BASE (ARC_PERIPHERAL_BASE + 0xA000)
  36. #define SDIO_UHS_REG_EXT (SDIO_BASE + 0x108)
  37. #define SDIO_UHS_REG_EXT_DIV_2 (2 << 30)
  38. static void __init hsdk_init_early(void)
  39. {
  40. /*
  41. * PAE remapping for DMA clients does not work due to an RTL bug, so
  42. * CREG_PAE register must be programmed to all zeroes, otherwise it
  43. * will cause problems with DMA to/from peripherals even if PAE40 is
  44. * not used.
  45. */
  46. /* Default is 1, which means "PAE offset = 4GByte" */
  47. writel_relaxed(0, (void __iomem *) CREG_PAE);
  48. /* Really apply settings made above */
  49. writel(1, (void __iomem *) CREG_PAE_UPDATE);
  50. /*
  51. * Switch SDIO external ciu clock divider from default div-by-8 to
  52. * minimum possible div-by-2.
  53. */
  54. iowrite32(SDIO_UHS_REG_EXT_DIV_2, (void __iomem *) SDIO_UHS_REG_EXT);
  55. }
  56. static const char *hsdk_compat[] __initconst = {
  57. "snps,hsdk",
  58. NULL,
  59. };
  60. MACHINE_START(SIMULATION, "hsdk")
  61. .dt_compat = hsdk_compat,
  62. .init_early = hsdk_init_early,
  63. .init_per_cpu = hsdk_init_per_cpu,
  64. MACHINE_END