amdgpu_gtt_mgr.c 6.8 KB

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  1. /*
  2. * Copyright 2016 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Christian König
  23. */
  24. #include <drm/drmP.h>
  25. #include "amdgpu.h"
  26. struct amdgpu_gtt_mgr {
  27. struct drm_mm mm;
  28. spinlock_t lock;
  29. uint64_t available;
  30. };
  31. /**
  32. * amdgpu_gtt_mgr_init - init GTT manager and DRM MM
  33. *
  34. * @man: TTM memory type manager
  35. * @p_size: maximum size of GTT
  36. *
  37. * Allocate and initialize the GTT manager.
  38. */
  39. static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
  40. unsigned long p_size)
  41. {
  42. struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
  43. struct amdgpu_gtt_mgr *mgr;
  44. uint64_t start, size;
  45. mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
  46. if (!mgr)
  47. return -ENOMEM;
  48. start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
  49. size = (adev->mc.gart_size >> PAGE_SHIFT) - start;
  50. drm_mm_init(&mgr->mm, start, size);
  51. spin_lock_init(&mgr->lock);
  52. mgr->available = p_size;
  53. man->priv = mgr;
  54. return 0;
  55. }
  56. /**
  57. * amdgpu_gtt_mgr_fini - free and destroy GTT manager
  58. *
  59. * @man: TTM memory type manager
  60. *
  61. * Destroy and free the GTT manager, returns -EBUSY if ranges are still
  62. * allocated inside it.
  63. */
  64. static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man)
  65. {
  66. struct amdgpu_gtt_mgr *mgr = man->priv;
  67. spin_lock(&mgr->lock);
  68. if (!drm_mm_clean(&mgr->mm)) {
  69. spin_unlock(&mgr->lock);
  70. return -EBUSY;
  71. }
  72. drm_mm_takedown(&mgr->mm);
  73. spin_unlock(&mgr->lock);
  74. kfree(mgr);
  75. man->priv = NULL;
  76. return 0;
  77. }
  78. /**
  79. * amdgpu_gtt_mgr_is_allocated - Check if mem has address space
  80. *
  81. * @mem: the mem object to check
  82. *
  83. * Check if a mem object has already address space allocated.
  84. */
  85. bool amdgpu_gtt_mgr_is_allocated(struct ttm_mem_reg *mem)
  86. {
  87. struct drm_mm_node *node = mem->mm_node;
  88. return (node->start != AMDGPU_BO_INVALID_OFFSET);
  89. }
  90. /**
  91. * amdgpu_gtt_mgr_alloc - allocate new ranges
  92. *
  93. * @man: TTM memory type manager
  94. * @tbo: TTM BO we need this range for
  95. * @place: placement flags and restrictions
  96. * @mem: the resulting mem object
  97. *
  98. * Allocate the address space for a node.
  99. */
  100. int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
  101. struct ttm_buffer_object *tbo,
  102. const struct ttm_place *place,
  103. struct ttm_mem_reg *mem)
  104. {
  105. struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
  106. struct amdgpu_gtt_mgr *mgr = man->priv;
  107. struct drm_mm_node *node = mem->mm_node;
  108. enum drm_mm_insert_mode mode;
  109. unsigned long fpfn, lpfn;
  110. int r;
  111. if (amdgpu_gtt_mgr_is_allocated(mem))
  112. return 0;
  113. if (place)
  114. fpfn = place->fpfn;
  115. else
  116. fpfn = 0;
  117. if (place && place->lpfn)
  118. lpfn = place->lpfn;
  119. else
  120. lpfn = adev->gart.num_cpu_pages;
  121. mode = DRM_MM_INSERT_BEST;
  122. if (place && place->flags & TTM_PL_FLAG_TOPDOWN)
  123. mode = DRM_MM_INSERT_HIGH;
  124. spin_lock(&mgr->lock);
  125. r = drm_mm_insert_node_in_range(&mgr->mm, node,
  126. mem->num_pages, mem->page_alignment, 0,
  127. fpfn, lpfn, mode);
  128. spin_unlock(&mgr->lock);
  129. if (!r) {
  130. mem->start = node->start;
  131. if (&tbo->mem == mem)
  132. tbo->offset = (tbo->mem.start << PAGE_SHIFT) +
  133. tbo->bdev->man[tbo->mem.mem_type].gpu_offset;
  134. }
  135. return r;
  136. }
  137. void amdgpu_gtt_mgr_print(struct seq_file *m, struct ttm_mem_type_manager *man)
  138. {
  139. struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
  140. struct amdgpu_gtt_mgr *mgr = man->priv;
  141. seq_printf(m, "man size:%llu pages, gtt available:%llu pages, usage:%lluMB\n",
  142. man->size, mgr->available, (u64)atomic64_read(&adev->gtt_usage) >> 20);
  143. }
  144. /**
  145. * amdgpu_gtt_mgr_new - allocate a new node
  146. *
  147. * @man: TTM memory type manager
  148. * @tbo: TTM BO we need this range for
  149. * @place: placement flags and restrictions
  150. * @mem: the resulting mem object
  151. *
  152. * Dummy, allocate the node but no space for it yet.
  153. */
  154. static int amdgpu_gtt_mgr_new(struct ttm_mem_type_manager *man,
  155. struct ttm_buffer_object *tbo,
  156. const struct ttm_place *place,
  157. struct ttm_mem_reg *mem)
  158. {
  159. struct amdgpu_gtt_mgr *mgr = man->priv;
  160. struct drm_mm_node *node;
  161. int r;
  162. spin_lock(&mgr->lock);
  163. if (mgr->available < mem->num_pages) {
  164. spin_unlock(&mgr->lock);
  165. return 0;
  166. }
  167. mgr->available -= mem->num_pages;
  168. spin_unlock(&mgr->lock);
  169. node = kzalloc(sizeof(*node), GFP_KERNEL);
  170. if (!node) {
  171. r = -ENOMEM;
  172. goto err_out;
  173. }
  174. node->start = AMDGPU_BO_INVALID_OFFSET;
  175. node->size = mem->num_pages;
  176. mem->mm_node = node;
  177. if (place->fpfn || place->lpfn || place->flags & TTM_PL_FLAG_TOPDOWN) {
  178. r = amdgpu_gtt_mgr_alloc(man, tbo, place, mem);
  179. if (unlikely(r)) {
  180. kfree(node);
  181. mem->mm_node = NULL;
  182. r = 0;
  183. goto err_out;
  184. }
  185. } else {
  186. mem->start = node->start;
  187. }
  188. return 0;
  189. err_out:
  190. spin_lock(&mgr->lock);
  191. mgr->available += mem->num_pages;
  192. spin_unlock(&mgr->lock);
  193. return r;
  194. }
  195. /**
  196. * amdgpu_gtt_mgr_del - free ranges
  197. *
  198. * @man: TTM memory type manager
  199. * @tbo: TTM BO we need this range for
  200. * @place: placement flags and restrictions
  201. * @mem: TTM memory object
  202. *
  203. * Free the allocated GTT again.
  204. */
  205. static void amdgpu_gtt_mgr_del(struct ttm_mem_type_manager *man,
  206. struct ttm_mem_reg *mem)
  207. {
  208. struct amdgpu_gtt_mgr *mgr = man->priv;
  209. struct drm_mm_node *node = mem->mm_node;
  210. if (!node)
  211. return;
  212. spin_lock(&mgr->lock);
  213. if (node->start != AMDGPU_BO_INVALID_OFFSET)
  214. drm_mm_remove_node(node);
  215. mgr->available += mem->num_pages;
  216. spin_unlock(&mgr->lock);
  217. kfree(node);
  218. mem->mm_node = NULL;
  219. }
  220. /**
  221. * amdgpu_gtt_mgr_debug - dump VRAM table
  222. *
  223. * @man: TTM memory type manager
  224. * @printer: DRM printer to use
  225. *
  226. * Dump the table content using printk.
  227. */
  228. static void amdgpu_gtt_mgr_debug(struct ttm_mem_type_manager *man,
  229. struct drm_printer *printer)
  230. {
  231. struct amdgpu_gtt_mgr *mgr = man->priv;
  232. spin_lock(&mgr->lock);
  233. drm_mm_print(&mgr->mm, printer);
  234. spin_unlock(&mgr->lock);
  235. }
  236. const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func = {
  237. .init = amdgpu_gtt_mgr_init,
  238. .takedown = amdgpu_gtt_mgr_fini,
  239. .get_node = amdgpu_gtt_mgr_new,
  240. .put_node = amdgpu_gtt_mgr_del,
  241. .debug = amdgpu_gtt_mgr_debug
  242. };