intel-pt.c 47 KB

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  1. /*
  2. * intel_pt.c: Intel Processor Trace support
  3. * Copyright (c) 2013-2015, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. */
  15. #include <stdio.h>
  16. #include <stdbool.h>
  17. #include <errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/types.h>
  20. #include "../perf.h"
  21. #include "session.h"
  22. #include "machine.h"
  23. #include "tool.h"
  24. #include "event.h"
  25. #include "evlist.h"
  26. #include "evsel.h"
  27. #include "map.h"
  28. #include "color.h"
  29. #include "util.h"
  30. #include "thread.h"
  31. #include "thread-stack.h"
  32. #include "symbol.h"
  33. #include "callchain.h"
  34. #include "dso.h"
  35. #include "debug.h"
  36. #include "auxtrace.h"
  37. #include "tsc.h"
  38. #include "intel-pt.h"
  39. #include "intel-pt-decoder/intel-pt-log.h"
  40. #include "intel-pt-decoder/intel-pt-decoder.h"
  41. #include "intel-pt-decoder/intel-pt-insn-decoder.h"
  42. #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
  43. #define MAX_TIMESTAMP (~0ULL)
  44. struct intel_pt {
  45. struct auxtrace auxtrace;
  46. struct auxtrace_queues queues;
  47. struct auxtrace_heap heap;
  48. u32 auxtrace_type;
  49. struct perf_session *session;
  50. struct machine *machine;
  51. struct perf_evsel *switch_evsel;
  52. struct thread *unknown_thread;
  53. bool timeless_decoding;
  54. bool sampling_mode;
  55. bool snapshot_mode;
  56. bool per_cpu_mmaps;
  57. bool have_tsc;
  58. bool data_queued;
  59. bool est_tsc;
  60. bool sync_switch;
  61. int have_sched_switch;
  62. u32 pmu_type;
  63. u64 kernel_start;
  64. u64 switch_ip;
  65. u64 ptss_ip;
  66. struct perf_tsc_conversion tc;
  67. bool cap_user_time_zero;
  68. struct itrace_synth_opts synth_opts;
  69. bool sample_instructions;
  70. u64 instructions_sample_type;
  71. u64 instructions_sample_period;
  72. u64 instructions_id;
  73. bool sample_branches;
  74. u32 branches_filter;
  75. u64 branches_sample_type;
  76. u64 branches_id;
  77. bool sample_transactions;
  78. u64 transactions_sample_type;
  79. u64 transactions_id;
  80. bool synth_needs_swap;
  81. u64 tsc_bit;
  82. u64 mtc_bit;
  83. u64 mtc_freq_bits;
  84. u32 tsc_ctc_ratio_n;
  85. u32 tsc_ctc_ratio_d;
  86. u64 cyc_bit;
  87. u64 noretcomp_bit;
  88. unsigned max_non_turbo_ratio;
  89. };
  90. enum switch_state {
  91. INTEL_PT_SS_NOT_TRACING,
  92. INTEL_PT_SS_UNKNOWN,
  93. INTEL_PT_SS_TRACING,
  94. INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
  95. INTEL_PT_SS_EXPECTING_SWITCH_IP,
  96. };
  97. struct intel_pt_queue {
  98. struct intel_pt *pt;
  99. unsigned int queue_nr;
  100. struct auxtrace_buffer *buffer;
  101. void *decoder;
  102. const struct intel_pt_state *state;
  103. struct ip_callchain *chain;
  104. union perf_event *event_buf;
  105. bool on_heap;
  106. bool stop;
  107. bool step_through_buffers;
  108. bool use_buffer_pid_tid;
  109. pid_t pid, tid;
  110. int cpu;
  111. int switch_state;
  112. pid_t next_tid;
  113. struct thread *thread;
  114. bool exclude_kernel;
  115. bool have_sample;
  116. u64 time;
  117. u64 timestamp;
  118. u32 flags;
  119. u16 insn_len;
  120. u64 last_insn_cnt;
  121. };
  122. static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
  123. unsigned char *buf, size_t len)
  124. {
  125. struct intel_pt_pkt packet;
  126. size_t pos = 0;
  127. int ret, pkt_len, i;
  128. char desc[INTEL_PT_PKT_DESC_MAX];
  129. const char *color = PERF_COLOR_BLUE;
  130. color_fprintf(stdout, color,
  131. ". ... Intel Processor Trace data: size %zu bytes\n",
  132. len);
  133. while (len) {
  134. ret = intel_pt_get_packet(buf, len, &packet);
  135. if (ret > 0)
  136. pkt_len = ret;
  137. else
  138. pkt_len = 1;
  139. printf(".");
  140. color_fprintf(stdout, color, " %08x: ", pos);
  141. for (i = 0; i < pkt_len; i++)
  142. color_fprintf(stdout, color, " %02x", buf[i]);
  143. for (; i < 16; i++)
  144. color_fprintf(stdout, color, " ");
  145. if (ret > 0) {
  146. ret = intel_pt_pkt_desc(&packet, desc,
  147. INTEL_PT_PKT_DESC_MAX);
  148. if (ret > 0)
  149. color_fprintf(stdout, color, " %s\n", desc);
  150. } else {
  151. color_fprintf(stdout, color, " Bad packet!\n");
  152. }
  153. pos += pkt_len;
  154. buf += pkt_len;
  155. len -= pkt_len;
  156. }
  157. }
  158. static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
  159. size_t len)
  160. {
  161. printf(".\n");
  162. intel_pt_dump(pt, buf, len);
  163. }
  164. static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
  165. struct auxtrace_buffer *b)
  166. {
  167. void *start;
  168. start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
  169. pt->have_tsc);
  170. if (!start)
  171. return -EINVAL;
  172. b->use_size = b->data + b->size - start;
  173. b->use_data = start;
  174. return 0;
  175. }
  176. static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,
  177. struct auxtrace_queue *queue,
  178. struct auxtrace_buffer *buffer)
  179. {
  180. if (queue->cpu == -1 && buffer->cpu != -1)
  181. ptq->cpu = buffer->cpu;
  182. ptq->pid = buffer->pid;
  183. ptq->tid = buffer->tid;
  184. intel_pt_log("queue %u cpu %d pid %d tid %d\n",
  185. ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  186. thread__zput(ptq->thread);
  187. if (ptq->tid != -1) {
  188. if (ptq->pid != -1)
  189. ptq->thread = machine__findnew_thread(ptq->pt->machine,
  190. ptq->pid,
  191. ptq->tid);
  192. else
  193. ptq->thread = machine__find_thread(ptq->pt->machine, -1,
  194. ptq->tid);
  195. }
  196. }
  197. /* This function assumes data is processed sequentially only */
  198. static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
  199. {
  200. struct intel_pt_queue *ptq = data;
  201. struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer;
  202. struct auxtrace_queue *queue;
  203. if (ptq->stop) {
  204. b->len = 0;
  205. return 0;
  206. }
  207. queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
  208. buffer = auxtrace_buffer__next(queue, buffer);
  209. if (!buffer) {
  210. if (old_buffer)
  211. auxtrace_buffer__drop_data(old_buffer);
  212. b->len = 0;
  213. return 0;
  214. }
  215. ptq->buffer = buffer;
  216. if (!buffer->data) {
  217. int fd = perf_data_file__fd(ptq->pt->session->file);
  218. buffer->data = auxtrace_buffer__get_data(buffer, fd);
  219. if (!buffer->data)
  220. return -ENOMEM;
  221. }
  222. if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer &&
  223. intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
  224. return -ENOMEM;
  225. if (old_buffer)
  226. auxtrace_buffer__drop_data(old_buffer);
  227. if (buffer->use_data) {
  228. b->len = buffer->use_size;
  229. b->buf = buffer->use_data;
  230. } else {
  231. b->len = buffer->size;
  232. b->buf = buffer->data;
  233. }
  234. b->ref_timestamp = buffer->reference;
  235. if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode &&
  236. !buffer->consecutive)) {
  237. b->consecutive = false;
  238. b->trace_nr = buffer->buffer_nr + 1;
  239. } else {
  240. b->consecutive = true;
  241. }
  242. if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid ||
  243. ptq->tid != buffer->tid))
  244. intel_pt_use_buffer_pid_tid(ptq, queue, buffer);
  245. if (ptq->step_through_buffers)
  246. ptq->stop = true;
  247. if (!b->len)
  248. return intel_pt_get_trace(b, data);
  249. return 0;
  250. }
  251. struct intel_pt_cache_entry {
  252. struct auxtrace_cache_entry entry;
  253. u64 insn_cnt;
  254. u64 byte_cnt;
  255. enum intel_pt_insn_op op;
  256. enum intel_pt_insn_branch branch;
  257. int length;
  258. int32_t rel;
  259. };
  260. static int intel_pt_config_div(const char *var, const char *value, void *data)
  261. {
  262. int *d = data;
  263. long val;
  264. if (!strcmp(var, "intel-pt.cache-divisor")) {
  265. val = strtol(value, NULL, 0);
  266. if (val > 0 && val <= INT_MAX)
  267. *d = val;
  268. }
  269. return 0;
  270. }
  271. static int intel_pt_cache_divisor(void)
  272. {
  273. static int d;
  274. if (d)
  275. return d;
  276. perf_config(intel_pt_config_div, &d);
  277. if (!d)
  278. d = 64;
  279. return d;
  280. }
  281. static unsigned int intel_pt_cache_size(struct dso *dso,
  282. struct machine *machine)
  283. {
  284. off_t size;
  285. size = dso__data_size(dso, machine);
  286. size /= intel_pt_cache_divisor();
  287. if (size < 1000)
  288. return 10;
  289. if (size > (1 << 21))
  290. return 21;
  291. return 32 - __builtin_clz(size);
  292. }
  293. static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
  294. struct machine *machine)
  295. {
  296. struct auxtrace_cache *c;
  297. unsigned int bits;
  298. if (dso->auxtrace_cache)
  299. return dso->auxtrace_cache;
  300. bits = intel_pt_cache_size(dso, machine);
  301. /* Ignoring cache creation failure */
  302. c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
  303. dso->auxtrace_cache = c;
  304. return c;
  305. }
  306. static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
  307. u64 offset, u64 insn_cnt, u64 byte_cnt,
  308. struct intel_pt_insn *intel_pt_insn)
  309. {
  310. struct auxtrace_cache *c = intel_pt_cache(dso, machine);
  311. struct intel_pt_cache_entry *e;
  312. int err;
  313. if (!c)
  314. return -ENOMEM;
  315. e = auxtrace_cache__alloc_entry(c);
  316. if (!e)
  317. return -ENOMEM;
  318. e->insn_cnt = insn_cnt;
  319. e->byte_cnt = byte_cnt;
  320. e->op = intel_pt_insn->op;
  321. e->branch = intel_pt_insn->branch;
  322. e->length = intel_pt_insn->length;
  323. e->rel = intel_pt_insn->rel;
  324. err = auxtrace_cache__add(c, offset, &e->entry);
  325. if (err)
  326. auxtrace_cache__free_entry(c, e);
  327. return err;
  328. }
  329. static struct intel_pt_cache_entry *
  330. intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
  331. {
  332. struct auxtrace_cache *c = intel_pt_cache(dso, machine);
  333. if (!c)
  334. return NULL;
  335. return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
  336. }
  337. static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
  338. uint64_t *insn_cnt_ptr, uint64_t *ip,
  339. uint64_t to_ip, uint64_t max_insn_cnt,
  340. void *data)
  341. {
  342. struct intel_pt_queue *ptq = data;
  343. struct machine *machine = ptq->pt->machine;
  344. struct thread *thread;
  345. struct addr_location al;
  346. unsigned char buf[1024];
  347. size_t bufsz;
  348. ssize_t len;
  349. int x86_64;
  350. u8 cpumode;
  351. u64 offset, start_offset, start_ip;
  352. u64 insn_cnt = 0;
  353. bool one_map = true;
  354. if (to_ip && *ip == to_ip)
  355. goto out_no_cache;
  356. bufsz = intel_pt_insn_max_size();
  357. if (*ip >= ptq->pt->kernel_start)
  358. cpumode = PERF_RECORD_MISC_KERNEL;
  359. else
  360. cpumode = PERF_RECORD_MISC_USER;
  361. thread = ptq->thread;
  362. if (!thread) {
  363. if (cpumode != PERF_RECORD_MISC_KERNEL)
  364. return -EINVAL;
  365. thread = ptq->pt->unknown_thread;
  366. }
  367. while (1) {
  368. thread__find_addr_map(thread, cpumode, MAP__FUNCTION, *ip, &al);
  369. if (!al.map || !al.map->dso)
  370. return -EINVAL;
  371. if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
  372. dso__data_status_seen(al.map->dso,
  373. DSO_DATA_STATUS_SEEN_ITRACE))
  374. return -ENOENT;
  375. offset = al.map->map_ip(al.map, *ip);
  376. if (!to_ip && one_map) {
  377. struct intel_pt_cache_entry *e;
  378. e = intel_pt_cache_lookup(al.map->dso, machine, offset);
  379. if (e &&
  380. (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
  381. *insn_cnt_ptr = e->insn_cnt;
  382. *ip += e->byte_cnt;
  383. intel_pt_insn->op = e->op;
  384. intel_pt_insn->branch = e->branch;
  385. intel_pt_insn->length = e->length;
  386. intel_pt_insn->rel = e->rel;
  387. intel_pt_log_insn_no_data(intel_pt_insn, *ip);
  388. return 0;
  389. }
  390. }
  391. start_offset = offset;
  392. start_ip = *ip;
  393. /* Load maps to ensure dso->is_64_bit has been updated */
  394. map__load(al.map, machine->symbol_filter);
  395. x86_64 = al.map->dso->is_64_bit;
  396. while (1) {
  397. len = dso__data_read_offset(al.map->dso, machine,
  398. offset, buf, bufsz);
  399. if (len <= 0)
  400. return -EINVAL;
  401. if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
  402. return -EINVAL;
  403. intel_pt_log_insn(intel_pt_insn, *ip);
  404. insn_cnt += 1;
  405. if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
  406. goto out;
  407. if (max_insn_cnt && insn_cnt >= max_insn_cnt)
  408. goto out_no_cache;
  409. *ip += intel_pt_insn->length;
  410. if (to_ip && *ip == to_ip)
  411. goto out_no_cache;
  412. if (*ip >= al.map->end)
  413. break;
  414. offset += intel_pt_insn->length;
  415. }
  416. one_map = false;
  417. }
  418. out:
  419. *insn_cnt_ptr = insn_cnt;
  420. if (!one_map)
  421. goto out_no_cache;
  422. /*
  423. * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
  424. * entries.
  425. */
  426. if (to_ip) {
  427. struct intel_pt_cache_entry *e;
  428. e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
  429. if (e)
  430. return 0;
  431. }
  432. /* Ignore cache errors */
  433. intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
  434. *ip - start_ip, intel_pt_insn);
  435. return 0;
  436. out_no_cache:
  437. *insn_cnt_ptr = insn_cnt;
  438. return 0;
  439. }
  440. static bool intel_pt_get_config(struct intel_pt *pt,
  441. struct perf_event_attr *attr, u64 *config)
  442. {
  443. if (attr->type == pt->pmu_type) {
  444. if (config)
  445. *config = attr->config;
  446. return true;
  447. }
  448. return false;
  449. }
  450. static bool intel_pt_exclude_kernel(struct intel_pt *pt)
  451. {
  452. struct perf_evsel *evsel;
  453. evlist__for_each(pt->session->evlist, evsel) {
  454. if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
  455. !evsel->attr.exclude_kernel)
  456. return false;
  457. }
  458. return true;
  459. }
  460. static bool intel_pt_return_compression(struct intel_pt *pt)
  461. {
  462. struct perf_evsel *evsel;
  463. u64 config;
  464. if (!pt->noretcomp_bit)
  465. return true;
  466. evlist__for_each(pt->session->evlist, evsel) {
  467. if (intel_pt_get_config(pt, &evsel->attr, &config) &&
  468. (config & pt->noretcomp_bit))
  469. return false;
  470. }
  471. return true;
  472. }
  473. static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
  474. {
  475. struct perf_evsel *evsel;
  476. unsigned int shift;
  477. u64 config;
  478. if (!pt->mtc_freq_bits)
  479. return 0;
  480. for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
  481. config >>= 1;
  482. evlist__for_each(pt->session->evlist, evsel) {
  483. if (intel_pt_get_config(pt, &evsel->attr, &config))
  484. return (config & pt->mtc_freq_bits) >> shift;
  485. }
  486. return 0;
  487. }
  488. static bool intel_pt_timeless_decoding(struct intel_pt *pt)
  489. {
  490. struct perf_evsel *evsel;
  491. bool timeless_decoding = true;
  492. u64 config;
  493. if (!pt->tsc_bit || !pt->cap_user_time_zero)
  494. return true;
  495. evlist__for_each(pt->session->evlist, evsel) {
  496. if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
  497. return true;
  498. if (intel_pt_get_config(pt, &evsel->attr, &config)) {
  499. if (config & pt->tsc_bit)
  500. timeless_decoding = false;
  501. else
  502. return true;
  503. }
  504. }
  505. return timeless_decoding;
  506. }
  507. static bool intel_pt_tracing_kernel(struct intel_pt *pt)
  508. {
  509. struct perf_evsel *evsel;
  510. evlist__for_each(pt->session->evlist, evsel) {
  511. if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
  512. !evsel->attr.exclude_kernel)
  513. return true;
  514. }
  515. return false;
  516. }
  517. static bool intel_pt_have_tsc(struct intel_pt *pt)
  518. {
  519. struct perf_evsel *evsel;
  520. bool have_tsc = false;
  521. u64 config;
  522. if (!pt->tsc_bit)
  523. return false;
  524. evlist__for_each(pt->session->evlist, evsel) {
  525. if (intel_pt_get_config(pt, &evsel->attr, &config)) {
  526. if (config & pt->tsc_bit)
  527. have_tsc = true;
  528. else
  529. return false;
  530. }
  531. }
  532. return have_tsc;
  533. }
  534. static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
  535. {
  536. u64 quot, rem;
  537. quot = ns / pt->tc.time_mult;
  538. rem = ns % pt->tc.time_mult;
  539. return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
  540. pt->tc.time_mult;
  541. }
  542. static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
  543. unsigned int queue_nr)
  544. {
  545. struct intel_pt_params params = { .get_trace = 0, };
  546. struct intel_pt_queue *ptq;
  547. ptq = zalloc(sizeof(struct intel_pt_queue));
  548. if (!ptq)
  549. return NULL;
  550. if (pt->synth_opts.callchain) {
  551. size_t sz = sizeof(struct ip_callchain);
  552. sz += pt->synth_opts.callchain_sz * sizeof(u64);
  553. ptq->chain = zalloc(sz);
  554. if (!ptq->chain)
  555. goto out_free;
  556. }
  557. ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
  558. if (!ptq->event_buf)
  559. goto out_free;
  560. ptq->pt = pt;
  561. ptq->queue_nr = queue_nr;
  562. ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
  563. ptq->pid = -1;
  564. ptq->tid = -1;
  565. ptq->cpu = -1;
  566. ptq->next_tid = -1;
  567. params.get_trace = intel_pt_get_trace;
  568. params.walk_insn = intel_pt_walk_next_insn;
  569. params.data = ptq;
  570. params.return_compression = intel_pt_return_compression(pt);
  571. params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
  572. params.mtc_period = intel_pt_mtc_period(pt);
  573. params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
  574. params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
  575. if (pt->synth_opts.instructions) {
  576. if (pt->synth_opts.period) {
  577. switch (pt->synth_opts.period_type) {
  578. case PERF_ITRACE_PERIOD_INSTRUCTIONS:
  579. params.period_type =
  580. INTEL_PT_PERIOD_INSTRUCTIONS;
  581. params.period = pt->synth_opts.period;
  582. break;
  583. case PERF_ITRACE_PERIOD_TICKS:
  584. params.period_type = INTEL_PT_PERIOD_TICKS;
  585. params.period = pt->synth_opts.period;
  586. break;
  587. case PERF_ITRACE_PERIOD_NANOSECS:
  588. params.period_type = INTEL_PT_PERIOD_TICKS;
  589. params.period = intel_pt_ns_to_ticks(pt,
  590. pt->synth_opts.period);
  591. break;
  592. default:
  593. break;
  594. }
  595. }
  596. if (!params.period) {
  597. params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
  598. params.period = 1000;
  599. }
  600. }
  601. ptq->decoder = intel_pt_decoder_new(&params);
  602. if (!ptq->decoder)
  603. goto out_free;
  604. return ptq;
  605. out_free:
  606. zfree(&ptq->event_buf);
  607. zfree(&ptq->chain);
  608. free(ptq);
  609. return NULL;
  610. }
  611. static void intel_pt_free_queue(void *priv)
  612. {
  613. struct intel_pt_queue *ptq = priv;
  614. if (!ptq)
  615. return;
  616. thread__zput(ptq->thread);
  617. intel_pt_decoder_free(ptq->decoder);
  618. zfree(&ptq->event_buf);
  619. zfree(&ptq->chain);
  620. free(ptq);
  621. }
  622. static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
  623. struct auxtrace_queue *queue)
  624. {
  625. struct intel_pt_queue *ptq = queue->priv;
  626. if (queue->tid == -1 || pt->have_sched_switch) {
  627. ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
  628. thread__zput(ptq->thread);
  629. }
  630. if (!ptq->thread && ptq->tid != -1)
  631. ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
  632. if (ptq->thread) {
  633. ptq->pid = ptq->thread->pid_;
  634. if (queue->cpu == -1)
  635. ptq->cpu = ptq->thread->cpu;
  636. }
  637. }
  638. static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
  639. {
  640. if (ptq->state->flags & INTEL_PT_ABORT_TX) {
  641. ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
  642. } else if (ptq->state->flags & INTEL_PT_ASYNC) {
  643. if (ptq->state->to_ip)
  644. ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
  645. PERF_IP_FLAG_ASYNC |
  646. PERF_IP_FLAG_INTERRUPT;
  647. else
  648. ptq->flags = PERF_IP_FLAG_BRANCH |
  649. PERF_IP_FLAG_TRACE_END;
  650. ptq->insn_len = 0;
  651. } else {
  652. if (ptq->state->from_ip)
  653. ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
  654. else
  655. ptq->flags = PERF_IP_FLAG_BRANCH |
  656. PERF_IP_FLAG_TRACE_BEGIN;
  657. if (ptq->state->flags & INTEL_PT_IN_TX)
  658. ptq->flags |= PERF_IP_FLAG_IN_TX;
  659. ptq->insn_len = ptq->state->insn_len;
  660. }
  661. }
  662. static int intel_pt_setup_queue(struct intel_pt *pt,
  663. struct auxtrace_queue *queue,
  664. unsigned int queue_nr)
  665. {
  666. struct intel_pt_queue *ptq = queue->priv;
  667. if (list_empty(&queue->head))
  668. return 0;
  669. if (!ptq) {
  670. ptq = intel_pt_alloc_queue(pt, queue_nr);
  671. if (!ptq)
  672. return -ENOMEM;
  673. queue->priv = ptq;
  674. if (queue->cpu != -1)
  675. ptq->cpu = queue->cpu;
  676. ptq->tid = queue->tid;
  677. if (pt->sampling_mode) {
  678. if (pt->timeless_decoding)
  679. ptq->step_through_buffers = true;
  680. if (pt->timeless_decoding || !pt->have_sched_switch)
  681. ptq->use_buffer_pid_tid = true;
  682. }
  683. }
  684. if (!ptq->on_heap &&
  685. (!pt->sync_switch ||
  686. ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
  687. const struct intel_pt_state *state;
  688. int ret;
  689. if (pt->timeless_decoding)
  690. return 0;
  691. intel_pt_log("queue %u getting timestamp\n", queue_nr);
  692. intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
  693. queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  694. while (1) {
  695. state = intel_pt_decode(ptq->decoder);
  696. if (state->err) {
  697. if (state->err == INTEL_PT_ERR_NODATA) {
  698. intel_pt_log("queue %u has no timestamp\n",
  699. queue_nr);
  700. return 0;
  701. }
  702. continue;
  703. }
  704. if (state->timestamp)
  705. break;
  706. }
  707. ptq->timestamp = state->timestamp;
  708. intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
  709. queue_nr, ptq->timestamp);
  710. ptq->state = state;
  711. ptq->have_sample = true;
  712. intel_pt_sample_flags(ptq);
  713. ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
  714. if (ret)
  715. return ret;
  716. ptq->on_heap = true;
  717. }
  718. return 0;
  719. }
  720. static int intel_pt_setup_queues(struct intel_pt *pt)
  721. {
  722. unsigned int i;
  723. int ret;
  724. for (i = 0; i < pt->queues.nr_queues; i++) {
  725. ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
  726. if (ret)
  727. return ret;
  728. }
  729. return 0;
  730. }
  731. static int intel_pt_inject_event(union perf_event *event,
  732. struct perf_sample *sample, u64 type,
  733. bool swapped)
  734. {
  735. event->header.size = perf_event__sample_event_size(sample, type, 0);
  736. return perf_event__synthesize_sample(event, type, 0, sample, swapped);
  737. }
  738. static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
  739. {
  740. int ret;
  741. struct intel_pt *pt = ptq->pt;
  742. union perf_event *event = ptq->event_buf;
  743. struct perf_sample sample = { .ip = 0, };
  744. event->sample.header.type = PERF_RECORD_SAMPLE;
  745. event->sample.header.misc = PERF_RECORD_MISC_USER;
  746. event->sample.header.size = sizeof(struct perf_event_header);
  747. if (!pt->timeless_decoding)
  748. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  749. sample.ip = ptq->state->from_ip;
  750. sample.pid = ptq->pid;
  751. sample.tid = ptq->tid;
  752. sample.addr = ptq->state->to_ip;
  753. sample.id = ptq->pt->branches_id;
  754. sample.stream_id = ptq->pt->branches_id;
  755. sample.period = 1;
  756. sample.cpu = ptq->cpu;
  757. sample.flags = ptq->flags;
  758. sample.insn_len = ptq->insn_len;
  759. if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
  760. return 0;
  761. if (pt->synth_opts.inject) {
  762. ret = intel_pt_inject_event(event, &sample,
  763. pt->branches_sample_type,
  764. pt->synth_needs_swap);
  765. if (ret)
  766. return ret;
  767. }
  768. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  769. if (ret)
  770. pr_err("Intel Processor Trace: failed to deliver branch event, error %d\n",
  771. ret);
  772. return ret;
  773. }
  774. static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
  775. {
  776. int ret;
  777. struct intel_pt *pt = ptq->pt;
  778. union perf_event *event = ptq->event_buf;
  779. struct perf_sample sample = { .ip = 0, };
  780. event->sample.header.type = PERF_RECORD_SAMPLE;
  781. event->sample.header.misc = PERF_RECORD_MISC_USER;
  782. event->sample.header.size = sizeof(struct perf_event_header);
  783. if (!pt->timeless_decoding)
  784. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  785. sample.ip = ptq->state->from_ip;
  786. sample.pid = ptq->pid;
  787. sample.tid = ptq->tid;
  788. sample.addr = ptq->state->to_ip;
  789. sample.id = ptq->pt->instructions_id;
  790. sample.stream_id = ptq->pt->instructions_id;
  791. sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
  792. sample.cpu = ptq->cpu;
  793. sample.flags = ptq->flags;
  794. sample.insn_len = ptq->insn_len;
  795. ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
  796. if (pt->synth_opts.callchain) {
  797. thread_stack__sample(ptq->thread, ptq->chain,
  798. pt->synth_opts.callchain_sz, sample.ip);
  799. sample.callchain = ptq->chain;
  800. }
  801. if (pt->synth_opts.inject) {
  802. ret = intel_pt_inject_event(event, &sample,
  803. pt->instructions_sample_type,
  804. pt->synth_needs_swap);
  805. if (ret)
  806. return ret;
  807. }
  808. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  809. if (ret)
  810. pr_err("Intel Processor Trace: failed to deliver instruction event, error %d\n",
  811. ret);
  812. return ret;
  813. }
  814. static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
  815. {
  816. int ret;
  817. struct intel_pt *pt = ptq->pt;
  818. union perf_event *event = ptq->event_buf;
  819. struct perf_sample sample = { .ip = 0, };
  820. event->sample.header.type = PERF_RECORD_SAMPLE;
  821. event->sample.header.misc = PERF_RECORD_MISC_USER;
  822. event->sample.header.size = sizeof(struct perf_event_header);
  823. if (!pt->timeless_decoding)
  824. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  825. sample.ip = ptq->state->from_ip;
  826. sample.pid = ptq->pid;
  827. sample.tid = ptq->tid;
  828. sample.addr = ptq->state->to_ip;
  829. sample.id = ptq->pt->transactions_id;
  830. sample.stream_id = ptq->pt->transactions_id;
  831. sample.period = 1;
  832. sample.cpu = ptq->cpu;
  833. sample.flags = ptq->flags;
  834. sample.insn_len = ptq->insn_len;
  835. if (pt->synth_opts.callchain) {
  836. thread_stack__sample(ptq->thread, ptq->chain,
  837. pt->synth_opts.callchain_sz, sample.ip);
  838. sample.callchain = ptq->chain;
  839. }
  840. if (pt->synth_opts.inject) {
  841. ret = intel_pt_inject_event(event, &sample,
  842. pt->transactions_sample_type,
  843. pt->synth_needs_swap);
  844. if (ret)
  845. return ret;
  846. }
  847. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  848. if (ret)
  849. pr_err("Intel Processor Trace: failed to deliver transaction event, error %d\n",
  850. ret);
  851. return ret;
  852. }
  853. static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
  854. pid_t pid, pid_t tid, u64 ip)
  855. {
  856. union perf_event event;
  857. char msg[MAX_AUXTRACE_ERROR_MSG];
  858. int err;
  859. intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
  860. auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
  861. code, cpu, pid, tid, ip, msg);
  862. err = perf_session__deliver_synth_event(pt->session, &event, NULL);
  863. if (err)
  864. pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
  865. err);
  866. return err;
  867. }
  868. static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
  869. {
  870. struct auxtrace_queue *queue;
  871. pid_t tid = ptq->next_tid;
  872. int err;
  873. if (tid == -1)
  874. return 0;
  875. intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
  876. err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
  877. queue = &pt->queues.queue_array[ptq->queue_nr];
  878. intel_pt_set_pid_tid_cpu(pt, queue);
  879. ptq->next_tid = -1;
  880. return err;
  881. }
  882. static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
  883. {
  884. struct intel_pt *pt = ptq->pt;
  885. return ip == pt->switch_ip &&
  886. (ptq->flags & PERF_IP_FLAG_BRANCH) &&
  887. !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
  888. PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
  889. }
  890. static int intel_pt_sample(struct intel_pt_queue *ptq)
  891. {
  892. const struct intel_pt_state *state = ptq->state;
  893. struct intel_pt *pt = ptq->pt;
  894. int err;
  895. if (!ptq->have_sample)
  896. return 0;
  897. ptq->have_sample = false;
  898. if (pt->sample_instructions &&
  899. (state->type & INTEL_PT_INSTRUCTION)) {
  900. err = intel_pt_synth_instruction_sample(ptq);
  901. if (err)
  902. return err;
  903. }
  904. if (pt->sample_transactions &&
  905. (state->type & INTEL_PT_TRANSACTION)) {
  906. err = intel_pt_synth_transaction_sample(ptq);
  907. if (err)
  908. return err;
  909. }
  910. if (!(state->type & INTEL_PT_BRANCH))
  911. return 0;
  912. if (pt->synth_opts.callchain)
  913. thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
  914. state->to_ip, ptq->insn_len,
  915. state->trace_nr);
  916. else
  917. thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
  918. if (pt->sample_branches) {
  919. err = intel_pt_synth_branch_sample(ptq);
  920. if (err)
  921. return err;
  922. }
  923. if (!pt->sync_switch)
  924. return 0;
  925. if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
  926. switch (ptq->switch_state) {
  927. case INTEL_PT_SS_UNKNOWN:
  928. case INTEL_PT_SS_EXPECTING_SWITCH_IP:
  929. err = intel_pt_next_tid(pt, ptq);
  930. if (err)
  931. return err;
  932. ptq->switch_state = INTEL_PT_SS_TRACING;
  933. break;
  934. default:
  935. ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
  936. return 1;
  937. }
  938. } else if (!state->to_ip) {
  939. ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
  940. } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
  941. ptq->switch_state = INTEL_PT_SS_UNKNOWN;
  942. } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
  943. state->to_ip == pt->ptss_ip &&
  944. (ptq->flags & PERF_IP_FLAG_CALL)) {
  945. ptq->switch_state = INTEL_PT_SS_TRACING;
  946. }
  947. return 0;
  948. }
  949. static u64 intel_pt_switch_ip(struct machine *machine, u64 *ptss_ip)
  950. {
  951. struct map *map;
  952. struct symbol *sym, *start;
  953. u64 ip, switch_ip = 0;
  954. if (ptss_ip)
  955. *ptss_ip = 0;
  956. map = machine__kernel_map(machine, MAP__FUNCTION);
  957. if (!map)
  958. return 0;
  959. if (map__load(map, machine->symbol_filter))
  960. return 0;
  961. start = dso__first_symbol(map->dso, MAP__FUNCTION);
  962. for (sym = start; sym; sym = dso__next_symbol(sym)) {
  963. if (sym->binding == STB_GLOBAL &&
  964. !strcmp(sym->name, "__switch_to")) {
  965. ip = map->unmap_ip(map, sym->start);
  966. if (ip >= map->start && ip < map->end) {
  967. switch_ip = ip;
  968. break;
  969. }
  970. }
  971. }
  972. if (!switch_ip || !ptss_ip)
  973. return 0;
  974. for (sym = start; sym; sym = dso__next_symbol(sym)) {
  975. if (!strcmp(sym->name, "perf_trace_sched_switch")) {
  976. ip = map->unmap_ip(map, sym->start);
  977. if (ip >= map->start && ip < map->end) {
  978. *ptss_ip = ip;
  979. break;
  980. }
  981. }
  982. }
  983. return switch_ip;
  984. }
  985. static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
  986. {
  987. const struct intel_pt_state *state = ptq->state;
  988. struct intel_pt *pt = ptq->pt;
  989. int err;
  990. if (!pt->kernel_start) {
  991. pt->kernel_start = machine__kernel_start(pt->machine);
  992. if (pt->per_cpu_mmaps && pt->have_sched_switch &&
  993. !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
  994. !pt->sampling_mode) {
  995. pt->switch_ip = intel_pt_switch_ip(pt->machine,
  996. &pt->ptss_ip);
  997. if (pt->switch_ip) {
  998. intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
  999. pt->switch_ip, pt->ptss_ip);
  1000. pt->sync_switch = true;
  1001. }
  1002. }
  1003. }
  1004. intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
  1005. ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  1006. while (1) {
  1007. err = intel_pt_sample(ptq);
  1008. if (err)
  1009. return err;
  1010. state = intel_pt_decode(ptq->decoder);
  1011. if (state->err) {
  1012. if (state->err == INTEL_PT_ERR_NODATA)
  1013. return 1;
  1014. if (pt->sync_switch &&
  1015. state->from_ip >= pt->kernel_start) {
  1016. pt->sync_switch = false;
  1017. intel_pt_next_tid(pt, ptq);
  1018. }
  1019. if (pt->synth_opts.errors) {
  1020. err = intel_pt_synth_error(pt, state->err,
  1021. ptq->cpu, ptq->pid,
  1022. ptq->tid,
  1023. state->from_ip);
  1024. if (err)
  1025. return err;
  1026. }
  1027. continue;
  1028. }
  1029. ptq->state = state;
  1030. ptq->have_sample = true;
  1031. intel_pt_sample_flags(ptq);
  1032. /* Use estimated TSC upon return to user space */
  1033. if (pt->est_tsc &&
  1034. (state->from_ip >= pt->kernel_start || !state->from_ip) &&
  1035. state->to_ip && state->to_ip < pt->kernel_start) {
  1036. intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
  1037. state->timestamp, state->est_timestamp);
  1038. ptq->timestamp = state->est_timestamp;
  1039. /* Use estimated TSC in unknown switch state */
  1040. } else if (pt->sync_switch &&
  1041. ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
  1042. intel_pt_is_switch_ip(ptq, state->to_ip) &&
  1043. ptq->next_tid == -1) {
  1044. intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
  1045. state->timestamp, state->est_timestamp);
  1046. ptq->timestamp = state->est_timestamp;
  1047. } else if (state->timestamp > ptq->timestamp) {
  1048. ptq->timestamp = state->timestamp;
  1049. }
  1050. if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
  1051. *timestamp = ptq->timestamp;
  1052. return 0;
  1053. }
  1054. }
  1055. return 0;
  1056. }
  1057. static inline int intel_pt_update_queues(struct intel_pt *pt)
  1058. {
  1059. if (pt->queues.new_data) {
  1060. pt->queues.new_data = false;
  1061. return intel_pt_setup_queues(pt);
  1062. }
  1063. return 0;
  1064. }
  1065. static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
  1066. {
  1067. unsigned int queue_nr;
  1068. u64 ts;
  1069. int ret;
  1070. while (1) {
  1071. struct auxtrace_queue *queue;
  1072. struct intel_pt_queue *ptq;
  1073. if (!pt->heap.heap_cnt)
  1074. return 0;
  1075. if (pt->heap.heap_array[0].ordinal >= timestamp)
  1076. return 0;
  1077. queue_nr = pt->heap.heap_array[0].queue_nr;
  1078. queue = &pt->queues.queue_array[queue_nr];
  1079. ptq = queue->priv;
  1080. intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
  1081. queue_nr, pt->heap.heap_array[0].ordinal,
  1082. timestamp);
  1083. auxtrace_heap__pop(&pt->heap);
  1084. if (pt->heap.heap_cnt) {
  1085. ts = pt->heap.heap_array[0].ordinal + 1;
  1086. if (ts > timestamp)
  1087. ts = timestamp;
  1088. } else {
  1089. ts = timestamp;
  1090. }
  1091. intel_pt_set_pid_tid_cpu(pt, queue);
  1092. ret = intel_pt_run_decoder(ptq, &ts);
  1093. if (ret < 0) {
  1094. auxtrace_heap__add(&pt->heap, queue_nr, ts);
  1095. return ret;
  1096. }
  1097. if (!ret) {
  1098. ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
  1099. if (ret < 0)
  1100. return ret;
  1101. } else {
  1102. ptq->on_heap = false;
  1103. }
  1104. }
  1105. return 0;
  1106. }
  1107. static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
  1108. u64 time_)
  1109. {
  1110. struct auxtrace_queues *queues = &pt->queues;
  1111. unsigned int i;
  1112. u64 ts = 0;
  1113. for (i = 0; i < queues->nr_queues; i++) {
  1114. struct auxtrace_queue *queue = &pt->queues.queue_array[i];
  1115. struct intel_pt_queue *ptq = queue->priv;
  1116. if (ptq && (tid == -1 || ptq->tid == tid)) {
  1117. ptq->time = time_;
  1118. intel_pt_set_pid_tid_cpu(pt, queue);
  1119. intel_pt_run_decoder(ptq, &ts);
  1120. }
  1121. }
  1122. return 0;
  1123. }
  1124. static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
  1125. {
  1126. return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
  1127. sample->pid, sample->tid, 0);
  1128. }
  1129. static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
  1130. {
  1131. unsigned i, j;
  1132. if (cpu < 0 || !pt->queues.nr_queues)
  1133. return NULL;
  1134. if ((unsigned)cpu >= pt->queues.nr_queues)
  1135. i = pt->queues.nr_queues - 1;
  1136. else
  1137. i = cpu;
  1138. if (pt->queues.queue_array[i].cpu == cpu)
  1139. return pt->queues.queue_array[i].priv;
  1140. for (j = 0; i > 0; j++) {
  1141. if (pt->queues.queue_array[--i].cpu == cpu)
  1142. return pt->queues.queue_array[i].priv;
  1143. }
  1144. for (; j < pt->queues.nr_queues; j++) {
  1145. if (pt->queues.queue_array[j].cpu == cpu)
  1146. return pt->queues.queue_array[j].priv;
  1147. }
  1148. return NULL;
  1149. }
  1150. static int intel_pt_process_switch(struct intel_pt *pt,
  1151. struct perf_sample *sample)
  1152. {
  1153. struct intel_pt_queue *ptq;
  1154. struct perf_evsel *evsel;
  1155. pid_t tid;
  1156. int cpu, err;
  1157. evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
  1158. if (evsel != pt->switch_evsel)
  1159. return 0;
  1160. tid = perf_evsel__intval(evsel, sample, "next_pid");
  1161. cpu = sample->cpu;
  1162. intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
  1163. cpu, tid, sample->time, perf_time_to_tsc(sample->time,
  1164. &pt->tc));
  1165. if (!pt->sync_switch)
  1166. goto out;
  1167. ptq = intel_pt_cpu_to_ptq(pt, cpu);
  1168. if (!ptq)
  1169. goto out;
  1170. switch (ptq->switch_state) {
  1171. case INTEL_PT_SS_NOT_TRACING:
  1172. ptq->next_tid = -1;
  1173. break;
  1174. case INTEL_PT_SS_UNKNOWN:
  1175. case INTEL_PT_SS_TRACING:
  1176. ptq->next_tid = tid;
  1177. ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
  1178. return 0;
  1179. case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
  1180. if (!ptq->on_heap) {
  1181. ptq->timestamp = perf_time_to_tsc(sample->time,
  1182. &pt->tc);
  1183. err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
  1184. ptq->timestamp);
  1185. if (err)
  1186. return err;
  1187. ptq->on_heap = true;
  1188. }
  1189. ptq->switch_state = INTEL_PT_SS_TRACING;
  1190. break;
  1191. case INTEL_PT_SS_EXPECTING_SWITCH_IP:
  1192. ptq->next_tid = tid;
  1193. intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
  1194. break;
  1195. default:
  1196. break;
  1197. }
  1198. out:
  1199. return machine__set_current_tid(pt->machine, cpu, -1, tid);
  1200. }
  1201. static int intel_pt_process_itrace_start(struct intel_pt *pt,
  1202. union perf_event *event,
  1203. struct perf_sample *sample)
  1204. {
  1205. if (!pt->per_cpu_mmaps)
  1206. return 0;
  1207. intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
  1208. sample->cpu, event->itrace_start.pid,
  1209. event->itrace_start.tid, sample->time,
  1210. perf_time_to_tsc(sample->time, &pt->tc));
  1211. return machine__set_current_tid(pt->machine, sample->cpu,
  1212. event->itrace_start.pid,
  1213. event->itrace_start.tid);
  1214. }
  1215. static int intel_pt_process_event(struct perf_session *session,
  1216. union perf_event *event,
  1217. struct perf_sample *sample,
  1218. struct perf_tool *tool)
  1219. {
  1220. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1221. auxtrace);
  1222. u64 timestamp;
  1223. int err = 0;
  1224. if (dump_trace)
  1225. return 0;
  1226. if (!tool->ordered_events) {
  1227. pr_err("Intel Processor Trace requires ordered events\n");
  1228. return -EINVAL;
  1229. }
  1230. if (sample->time && sample->time != (u64)-1)
  1231. timestamp = perf_time_to_tsc(sample->time, &pt->tc);
  1232. else
  1233. timestamp = 0;
  1234. if (timestamp || pt->timeless_decoding) {
  1235. err = intel_pt_update_queues(pt);
  1236. if (err)
  1237. return err;
  1238. }
  1239. if (pt->timeless_decoding) {
  1240. if (event->header.type == PERF_RECORD_EXIT) {
  1241. err = intel_pt_process_timeless_queues(pt,
  1242. event->fork.tid,
  1243. sample->time);
  1244. }
  1245. } else if (timestamp) {
  1246. err = intel_pt_process_queues(pt, timestamp);
  1247. }
  1248. if (err)
  1249. return err;
  1250. if (event->header.type == PERF_RECORD_AUX &&
  1251. (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
  1252. pt->synth_opts.errors) {
  1253. err = intel_pt_lost(pt, sample);
  1254. if (err)
  1255. return err;
  1256. }
  1257. if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
  1258. err = intel_pt_process_switch(pt, sample);
  1259. else if (event->header.type == PERF_RECORD_ITRACE_START)
  1260. err = intel_pt_process_itrace_start(pt, event, sample);
  1261. intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
  1262. perf_event__name(event->header.type), event->header.type,
  1263. sample->cpu, sample->time, timestamp);
  1264. return err;
  1265. }
  1266. static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
  1267. {
  1268. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1269. auxtrace);
  1270. int ret;
  1271. if (dump_trace)
  1272. return 0;
  1273. if (!tool->ordered_events)
  1274. return -EINVAL;
  1275. ret = intel_pt_update_queues(pt);
  1276. if (ret < 0)
  1277. return ret;
  1278. if (pt->timeless_decoding)
  1279. return intel_pt_process_timeless_queues(pt, -1,
  1280. MAX_TIMESTAMP - 1);
  1281. return intel_pt_process_queues(pt, MAX_TIMESTAMP);
  1282. }
  1283. static void intel_pt_free_events(struct perf_session *session)
  1284. {
  1285. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1286. auxtrace);
  1287. struct auxtrace_queues *queues = &pt->queues;
  1288. unsigned int i;
  1289. for (i = 0; i < queues->nr_queues; i++) {
  1290. intel_pt_free_queue(queues->queue_array[i].priv);
  1291. queues->queue_array[i].priv = NULL;
  1292. }
  1293. intel_pt_log_disable();
  1294. auxtrace_queues__free(queues);
  1295. }
  1296. static void intel_pt_free(struct perf_session *session)
  1297. {
  1298. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1299. auxtrace);
  1300. auxtrace_heap__free(&pt->heap);
  1301. intel_pt_free_events(session);
  1302. session->auxtrace = NULL;
  1303. thread__delete(pt->unknown_thread);
  1304. free(pt);
  1305. }
  1306. static int intel_pt_process_auxtrace_event(struct perf_session *session,
  1307. union perf_event *event,
  1308. struct perf_tool *tool __maybe_unused)
  1309. {
  1310. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1311. auxtrace);
  1312. if (pt->sampling_mode)
  1313. return 0;
  1314. if (!pt->data_queued) {
  1315. struct auxtrace_buffer *buffer;
  1316. off_t data_offset;
  1317. int fd = perf_data_file__fd(session->file);
  1318. int err;
  1319. if (perf_data_file__is_pipe(session->file)) {
  1320. data_offset = 0;
  1321. } else {
  1322. data_offset = lseek(fd, 0, SEEK_CUR);
  1323. if (data_offset == -1)
  1324. return -errno;
  1325. }
  1326. err = auxtrace_queues__add_event(&pt->queues, session, event,
  1327. data_offset, &buffer);
  1328. if (err)
  1329. return err;
  1330. /* Dump here now we have copied a piped trace out of the pipe */
  1331. if (dump_trace) {
  1332. if (auxtrace_buffer__get_data(buffer, fd)) {
  1333. intel_pt_dump_event(pt, buffer->data,
  1334. buffer->size);
  1335. auxtrace_buffer__put_data(buffer);
  1336. }
  1337. }
  1338. }
  1339. return 0;
  1340. }
  1341. struct intel_pt_synth {
  1342. struct perf_tool dummy_tool;
  1343. struct perf_session *session;
  1344. };
  1345. static int intel_pt_event_synth(struct perf_tool *tool,
  1346. union perf_event *event,
  1347. struct perf_sample *sample __maybe_unused,
  1348. struct machine *machine __maybe_unused)
  1349. {
  1350. struct intel_pt_synth *intel_pt_synth =
  1351. container_of(tool, struct intel_pt_synth, dummy_tool);
  1352. return perf_session__deliver_synth_event(intel_pt_synth->session, event,
  1353. NULL);
  1354. }
  1355. static int intel_pt_synth_event(struct perf_session *session,
  1356. struct perf_event_attr *attr, u64 id)
  1357. {
  1358. struct intel_pt_synth intel_pt_synth;
  1359. memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
  1360. intel_pt_synth.session = session;
  1361. return perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
  1362. &id, intel_pt_event_synth);
  1363. }
  1364. static int intel_pt_synth_events(struct intel_pt *pt,
  1365. struct perf_session *session)
  1366. {
  1367. struct perf_evlist *evlist = session->evlist;
  1368. struct perf_evsel *evsel;
  1369. struct perf_event_attr attr;
  1370. bool found = false;
  1371. u64 id;
  1372. int err;
  1373. evlist__for_each(evlist, evsel) {
  1374. if (evsel->attr.type == pt->pmu_type && evsel->ids) {
  1375. found = true;
  1376. break;
  1377. }
  1378. }
  1379. if (!found) {
  1380. pr_debug("There are no selected events with Intel Processor Trace data\n");
  1381. return 0;
  1382. }
  1383. memset(&attr, 0, sizeof(struct perf_event_attr));
  1384. attr.size = sizeof(struct perf_event_attr);
  1385. attr.type = PERF_TYPE_HARDWARE;
  1386. attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
  1387. attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
  1388. PERF_SAMPLE_PERIOD;
  1389. if (pt->timeless_decoding)
  1390. attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
  1391. else
  1392. attr.sample_type |= PERF_SAMPLE_TIME;
  1393. if (!pt->per_cpu_mmaps)
  1394. attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
  1395. attr.exclude_user = evsel->attr.exclude_user;
  1396. attr.exclude_kernel = evsel->attr.exclude_kernel;
  1397. attr.exclude_hv = evsel->attr.exclude_hv;
  1398. attr.exclude_host = evsel->attr.exclude_host;
  1399. attr.exclude_guest = evsel->attr.exclude_guest;
  1400. attr.sample_id_all = evsel->attr.sample_id_all;
  1401. attr.read_format = evsel->attr.read_format;
  1402. id = evsel->id[0] + 1000000000;
  1403. if (!id)
  1404. id = 1;
  1405. if (pt->synth_opts.instructions) {
  1406. attr.config = PERF_COUNT_HW_INSTRUCTIONS;
  1407. if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
  1408. attr.sample_period =
  1409. intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
  1410. else
  1411. attr.sample_period = pt->synth_opts.period;
  1412. pt->instructions_sample_period = attr.sample_period;
  1413. if (pt->synth_opts.callchain)
  1414. attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
  1415. pr_debug("Synthesizing 'instructions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1416. id, (u64)attr.sample_type);
  1417. err = intel_pt_synth_event(session, &attr, id);
  1418. if (err) {
  1419. pr_err("%s: failed to synthesize 'instructions' event type\n",
  1420. __func__);
  1421. return err;
  1422. }
  1423. pt->sample_instructions = true;
  1424. pt->instructions_sample_type = attr.sample_type;
  1425. pt->instructions_id = id;
  1426. id += 1;
  1427. }
  1428. if (pt->synth_opts.transactions) {
  1429. attr.config = PERF_COUNT_HW_INSTRUCTIONS;
  1430. attr.sample_period = 1;
  1431. if (pt->synth_opts.callchain)
  1432. attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
  1433. pr_debug("Synthesizing 'transactions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1434. id, (u64)attr.sample_type);
  1435. err = intel_pt_synth_event(session, &attr, id);
  1436. if (err) {
  1437. pr_err("%s: failed to synthesize 'transactions' event type\n",
  1438. __func__);
  1439. return err;
  1440. }
  1441. pt->sample_transactions = true;
  1442. pt->transactions_id = id;
  1443. id += 1;
  1444. evlist__for_each(evlist, evsel) {
  1445. if (evsel->id && evsel->id[0] == pt->transactions_id) {
  1446. if (evsel->name)
  1447. zfree(&evsel->name);
  1448. evsel->name = strdup("transactions");
  1449. break;
  1450. }
  1451. }
  1452. }
  1453. if (pt->synth_opts.branches) {
  1454. attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
  1455. attr.sample_period = 1;
  1456. attr.sample_type |= PERF_SAMPLE_ADDR;
  1457. attr.sample_type &= ~(u64)PERF_SAMPLE_CALLCHAIN;
  1458. pr_debug("Synthesizing 'branches' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1459. id, (u64)attr.sample_type);
  1460. err = intel_pt_synth_event(session, &attr, id);
  1461. if (err) {
  1462. pr_err("%s: failed to synthesize 'branches' event type\n",
  1463. __func__);
  1464. return err;
  1465. }
  1466. pt->sample_branches = true;
  1467. pt->branches_sample_type = attr.sample_type;
  1468. pt->branches_id = id;
  1469. }
  1470. pt->synth_needs_swap = evsel->needs_swap;
  1471. return 0;
  1472. }
  1473. static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
  1474. {
  1475. struct perf_evsel *evsel;
  1476. evlist__for_each_reverse(evlist, evsel) {
  1477. const char *name = perf_evsel__name(evsel);
  1478. if (!strcmp(name, "sched:sched_switch"))
  1479. return evsel;
  1480. }
  1481. return NULL;
  1482. }
  1483. static const char * const intel_pt_info_fmts[] = {
  1484. [INTEL_PT_PMU_TYPE] = " PMU Type %"PRId64"\n",
  1485. [INTEL_PT_TIME_SHIFT] = " Time Shift %"PRIu64"\n",
  1486. [INTEL_PT_TIME_MULT] = " Time Muliplier %"PRIu64"\n",
  1487. [INTEL_PT_TIME_ZERO] = " Time Zero %"PRIu64"\n",
  1488. [INTEL_PT_CAP_USER_TIME_ZERO] = " Cap Time Zero %"PRId64"\n",
  1489. [INTEL_PT_TSC_BIT] = " TSC bit %#"PRIx64"\n",
  1490. [INTEL_PT_NORETCOMP_BIT] = " NoRETComp bit %#"PRIx64"\n",
  1491. [INTEL_PT_HAVE_SCHED_SWITCH] = " Have sched_switch %"PRId64"\n",
  1492. [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n",
  1493. [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n",
  1494. [INTEL_PT_MTC_BIT] = " MTC bit %#"PRIx64"\n",
  1495. [INTEL_PT_TSC_CTC_N] = " TSC:CTC numerator %"PRIu64"\n",
  1496. [INTEL_PT_TSC_CTC_D] = " TSC:CTC denominator %"PRIu64"\n",
  1497. [INTEL_PT_CYC_BIT] = " CYC bit %#"PRIx64"\n",
  1498. };
  1499. static void intel_pt_print_info(u64 *arr, int start, int finish)
  1500. {
  1501. int i;
  1502. if (!dump_trace)
  1503. return;
  1504. for (i = start; i <= finish; i++)
  1505. fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
  1506. }
  1507. int intel_pt_process_auxtrace_info(union perf_event *event,
  1508. struct perf_session *session)
  1509. {
  1510. struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
  1511. size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
  1512. struct intel_pt *pt;
  1513. int err;
  1514. if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
  1515. min_sz)
  1516. return -EINVAL;
  1517. pt = zalloc(sizeof(struct intel_pt));
  1518. if (!pt)
  1519. return -ENOMEM;
  1520. err = auxtrace_queues__init(&pt->queues);
  1521. if (err)
  1522. goto err_free;
  1523. intel_pt_log_set_name(INTEL_PT_PMU_NAME);
  1524. pt->session = session;
  1525. pt->machine = &session->machines.host; /* No kvm support */
  1526. pt->auxtrace_type = auxtrace_info->type;
  1527. pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
  1528. pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
  1529. pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
  1530. pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
  1531. pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
  1532. pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
  1533. pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
  1534. pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
  1535. pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
  1536. pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
  1537. intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
  1538. INTEL_PT_PER_CPU_MMAPS);
  1539. if (auxtrace_info->header.size >= sizeof(struct auxtrace_info_event) +
  1540. (sizeof(u64) * INTEL_PT_CYC_BIT)) {
  1541. pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
  1542. pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
  1543. pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
  1544. pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
  1545. pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
  1546. intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
  1547. INTEL_PT_CYC_BIT);
  1548. }
  1549. pt->timeless_decoding = intel_pt_timeless_decoding(pt);
  1550. pt->have_tsc = intel_pt_have_tsc(pt);
  1551. pt->sampling_mode = false;
  1552. pt->est_tsc = !pt->timeless_decoding;
  1553. pt->unknown_thread = thread__new(999999999, 999999999);
  1554. if (!pt->unknown_thread) {
  1555. err = -ENOMEM;
  1556. goto err_free_queues;
  1557. }
  1558. err = thread__set_comm(pt->unknown_thread, "unknown", 0);
  1559. if (err)
  1560. goto err_delete_thread;
  1561. if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
  1562. err = -ENOMEM;
  1563. goto err_delete_thread;
  1564. }
  1565. pt->auxtrace.process_event = intel_pt_process_event;
  1566. pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
  1567. pt->auxtrace.flush_events = intel_pt_flush;
  1568. pt->auxtrace.free_events = intel_pt_free_events;
  1569. pt->auxtrace.free = intel_pt_free;
  1570. session->auxtrace = &pt->auxtrace;
  1571. if (dump_trace)
  1572. return 0;
  1573. if (pt->have_sched_switch == 1) {
  1574. pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
  1575. if (!pt->switch_evsel) {
  1576. pr_err("%s: missing sched_switch event\n", __func__);
  1577. goto err_delete_thread;
  1578. }
  1579. }
  1580. if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
  1581. pt->synth_opts = *session->itrace_synth_opts;
  1582. } else {
  1583. itrace_synth_opts__set_default(&pt->synth_opts);
  1584. if (use_browser != -1) {
  1585. pt->synth_opts.branches = false;
  1586. pt->synth_opts.callchain = true;
  1587. }
  1588. }
  1589. if (pt->synth_opts.log)
  1590. intel_pt_log_enable();
  1591. /* Maximum non-turbo ratio is TSC freq / 100 MHz */
  1592. if (pt->tc.time_mult) {
  1593. u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
  1594. pt->max_non_turbo_ratio = (tsc_freq + 50000000) / 100000000;
  1595. intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
  1596. intel_pt_log("Maximum non-turbo ratio %u\n",
  1597. pt->max_non_turbo_ratio);
  1598. }
  1599. if (pt->synth_opts.calls)
  1600. pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
  1601. PERF_IP_FLAG_TRACE_END;
  1602. if (pt->synth_opts.returns)
  1603. pt->branches_filter |= PERF_IP_FLAG_RETURN |
  1604. PERF_IP_FLAG_TRACE_BEGIN;
  1605. if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
  1606. symbol_conf.use_callchain = true;
  1607. if (callchain_register_param(&callchain_param) < 0) {
  1608. symbol_conf.use_callchain = false;
  1609. pt->synth_opts.callchain = false;
  1610. }
  1611. }
  1612. err = intel_pt_synth_events(pt, session);
  1613. if (err)
  1614. goto err_delete_thread;
  1615. err = auxtrace_queues__process_index(&pt->queues, session);
  1616. if (err)
  1617. goto err_delete_thread;
  1618. if (pt->queues.populated)
  1619. pt->data_queued = true;
  1620. if (pt->timeless_decoding)
  1621. pr_debug2("Intel PT decoding without timestamps\n");
  1622. return 0;
  1623. err_delete_thread:
  1624. thread__delete(pt->unknown_thread);
  1625. err_free_queues:
  1626. intel_pt_log_disable();
  1627. auxtrace_queues__free(&pt->queues);
  1628. session->auxtrace = NULL;
  1629. err_free:
  1630. free(pt);
  1631. return err;
  1632. }