atmel_usba_udc.c 54 KB

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  1. /*
  2. * Driver for the Atmel USBA high speed USB device controller
  3. *
  4. * Copyright (C) 2005-2007 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/clk.h>
  11. #include <linux/clk/at91_pmc.h>
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/io.h>
  16. #include <linux/slab.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/list.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/usb/ch9.h>
  22. #include <linux/usb/gadget.h>
  23. #include <linux/usb/atmel_usba_udc.h>
  24. #include <linux/delay.h>
  25. #include <linux/of.h>
  26. #include <linux/of_gpio.h>
  27. #include <asm/gpio.h>
  28. #include "atmel_usba_udc.h"
  29. #ifdef CONFIG_USB_GADGET_DEBUG_FS
  30. #include <linux/debugfs.h>
  31. #include <linux/uaccess.h>
  32. static int queue_dbg_open(struct inode *inode, struct file *file)
  33. {
  34. struct usba_ep *ep = inode->i_private;
  35. struct usba_request *req, *req_copy;
  36. struct list_head *queue_data;
  37. queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
  38. if (!queue_data)
  39. return -ENOMEM;
  40. INIT_LIST_HEAD(queue_data);
  41. spin_lock_irq(&ep->udc->lock);
  42. list_for_each_entry(req, &ep->queue, queue) {
  43. req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
  44. if (!req_copy)
  45. goto fail;
  46. list_add_tail(&req_copy->queue, queue_data);
  47. }
  48. spin_unlock_irq(&ep->udc->lock);
  49. file->private_data = queue_data;
  50. return 0;
  51. fail:
  52. spin_unlock_irq(&ep->udc->lock);
  53. list_for_each_entry_safe(req, req_copy, queue_data, queue) {
  54. list_del(&req->queue);
  55. kfree(req);
  56. }
  57. kfree(queue_data);
  58. return -ENOMEM;
  59. }
  60. /*
  61. * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
  62. *
  63. * b: buffer address
  64. * l: buffer length
  65. * I/i: interrupt/no interrupt
  66. * Z/z: zero/no zero
  67. * S/s: short ok/short not ok
  68. * s: status
  69. * n: nr_packets
  70. * F/f: submitted/not submitted to FIFO
  71. * D/d: using/not using DMA
  72. * L/l: last transaction/not last transaction
  73. */
  74. static ssize_t queue_dbg_read(struct file *file, char __user *buf,
  75. size_t nbytes, loff_t *ppos)
  76. {
  77. struct list_head *queue = file->private_data;
  78. struct usba_request *req, *tmp_req;
  79. size_t len, remaining, actual = 0;
  80. char tmpbuf[38];
  81. if (!access_ok(VERIFY_WRITE, buf, nbytes))
  82. return -EFAULT;
  83. mutex_lock(&file_inode(file)->i_mutex);
  84. list_for_each_entry_safe(req, tmp_req, queue, queue) {
  85. len = snprintf(tmpbuf, sizeof(tmpbuf),
  86. "%8p %08x %c%c%c %5d %c%c%c\n",
  87. req->req.buf, req->req.length,
  88. req->req.no_interrupt ? 'i' : 'I',
  89. req->req.zero ? 'Z' : 'z',
  90. req->req.short_not_ok ? 's' : 'S',
  91. req->req.status,
  92. req->submitted ? 'F' : 'f',
  93. req->using_dma ? 'D' : 'd',
  94. req->last_transaction ? 'L' : 'l');
  95. len = min(len, sizeof(tmpbuf));
  96. if (len > nbytes)
  97. break;
  98. list_del(&req->queue);
  99. kfree(req);
  100. remaining = __copy_to_user(buf, tmpbuf, len);
  101. actual += len - remaining;
  102. if (remaining)
  103. break;
  104. nbytes -= len;
  105. buf += len;
  106. }
  107. mutex_unlock(&file_inode(file)->i_mutex);
  108. return actual;
  109. }
  110. static int queue_dbg_release(struct inode *inode, struct file *file)
  111. {
  112. struct list_head *queue_data = file->private_data;
  113. struct usba_request *req, *tmp_req;
  114. list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
  115. list_del(&req->queue);
  116. kfree(req);
  117. }
  118. kfree(queue_data);
  119. return 0;
  120. }
  121. static int regs_dbg_open(struct inode *inode, struct file *file)
  122. {
  123. struct usba_udc *udc;
  124. unsigned int i;
  125. u32 *data;
  126. int ret = -ENOMEM;
  127. mutex_lock(&inode->i_mutex);
  128. udc = inode->i_private;
  129. data = kmalloc(inode->i_size, GFP_KERNEL);
  130. if (!data)
  131. goto out;
  132. spin_lock_irq(&udc->lock);
  133. for (i = 0; i < inode->i_size / 4; i++)
  134. data[i] = usba_io_readl(udc->regs + i * 4);
  135. spin_unlock_irq(&udc->lock);
  136. file->private_data = data;
  137. ret = 0;
  138. out:
  139. mutex_unlock(&inode->i_mutex);
  140. return ret;
  141. }
  142. static ssize_t regs_dbg_read(struct file *file, char __user *buf,
  143. size_t nbytes, loff_t *ppos)
  144. {
  145. struct inode *inode = file_inode(file);
  146. int ret;
  147. mutex_lock(&inode->i_mutex);
  148. ret = simple_read_from_buffer(buf, nbytes, ppos,
  149. file->private_data,
  150. file_inode(file)->i_size);
  151. mutex_unlock(&inode->i_mutex);
  152. return ret;
  153. }
  154. static int regs_dbg_release(struct inode *inode, struct file *file)
  155. {
  156. kfree(file->private_data);
  157. return 0;
  158. }
  159. const struct file_operations queue_dbg_fops = {
  160. .owner = THIS_MODULE,
  161. .open = queue_dbg_open,
  162. .llseek = no_llseek,
  163. .read = queue_dbg_read,
  164. .release = queue_dbg_release,
  165. };
  166. const struct file_operations regs_dbg_fops = {
  167. .owner = THIS_MODULE,
  168. .open = regs_dbg_open,
  169. .llseek = generic_file_llseek,
  170. .read = regs_dbg_read,
  171. .release = regs_dbg_release,
  172. };
  173. static void usba_ep_init_debugfs(struct usba_udc *udc,
  174. struct usba_ep *ep)
  175. {
  176. struct dentry *ep_root;
  177. ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
  178. if (!ep_root)
  179. goto err_root;
  180. ep->debugfs_dir = ep_root;
  181. ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
  182. ep, &queue_dbg_fops);
  183. if (!ep->debugfs_queue)
  184. goto err_queue;
  185. if (ep->can_dma) {
  186. ep->debugfs_dma_status
  187. = debugfs_create_u32("dma_status", 0400, ep_root,
  188. &ep->last_dma_status);
  189. if (!ep->debugfs_dma_status)
  190. goto err_dma_status;
  191. }
  192. if (ep_is_control(ep)) {
  193. ep->debugfs_state
  194. = debugfs_create_u32("state", 0400, ep_root,
  195. &ep->state);
  196. if (!ep->debugfs_state)
  197. goto err_state;
  198. }
  199. return;
  200. err_state:
  201. if (ep->can_dma)
  202. debugfs_remove(ep->debugfs_dma_status);
  203. err_dma_status:
  204. debugfs_remove(ep->debugfs_queue);
  205. err_queue:
  206. debugfs_remove(ep_root);
  207. err_root:
  208. dev_err(&ep->udc->pdev->dev,
  209. "failed to create debugfs directory for %s\n", ep->ep.name);
  210. }
  211. static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
  212. {
  213. debugfs_remove(ep->debugfs_queue);
  214. debugfs_remove(ep->debugfs_dma_status);
  215. debugfs_remove(ep->debugfs_state);
  216. debugfs_remove(ep->debugfs_dir);
  217. ep->debugfs_dma_status = NULL;
  218. ep->debugfs_dir = NULL;
  219. }
  220. static void usba_init_debugfs(struct usba_udc *udc)
  221. {
  222. struct dentry *root, *regs;
  223. struct resource *regs_resource;
  224. root = debugfs_create_dir(udc->gadget.name, NULL);
  225. if (IS_ERR(root) || !root)
  226. goto err_root;
  227. udc->debugfs_root = root;
  228. regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
  229. CTRL_IOMEM_ID);
  230. if (regs_resource) {
  231. regs = debugfs_create_file_size("regs", 0400, root, udc,
  232. &regs_dbg_fops,
  233. resource_size(regs_resource));
  234. if (!regs)
  235. goto err_regs;
  236. udc->debugfs_regs = regs;
  237. }
  238. usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
  239. return;
  240. err_regs:
  241. debugfs_remove(root);
  242. err_root:
  243. udc->debugfs_root = NULL;
  244. dev_err(&udc->pdev->dev, "debugfs is not available\n");
  245. }
  246. static void usba_cleanup_debugfs(struct usba_udc *udc)
  247. {
  248. usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
  249. debugfs_remove(udc->debugfs_regs);
  250. debugfs_remove(udc->debugfs_root);
  251. udc->debugfs_regs = NULL;
  252. udc->debugfs_root = NULL;
  253. }
  254. #else
  255. static inline void usba_ep_init_debugfs(struct usba_udc *udc,
  256. struct usba_ep *ep)
  257. {
  258. }
  259. static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
  260. {
  261. }
  262. static inline void usba_init_debugfs(struct usba_udc *udc)
  263. {
  264. }
  265. static inline void usba_cleanup_debugfs(struct usba_udc *udc)
  266. {
  267. }
  268. #endif
  269. static inline u32 usba_int_enb_get(struct usba_udc *udc)
  270. {
  271. return udc->int_enb_cache;
  272. }
  273. static inline void usba_int_enb_set(struct usba_udc *udc, u32 val)
  274. {
  275. usba_writel(udc, INT_ENB, val);
  276. udc->int_enb_cache = val;
  277. }
  278. static int vbus_is_present(struct usba_udc *udc)
  279. {
  280. if (gpio_is_valid(udc->vbus_pin))
  281. return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted;
  282. /* No Vbus detection: Assume always present */
  283. return 1;
  284. }
  285. static void toggle_bias(struct usba_udc *udc, int is_on)
  286. {
  287. if (udc->errata && udc->errata->toggle_bias)
  288. udc->errata->toggle_bias(udc, is_on);
  289. }
  290. static void generate_bias_pulse(struct usba_udc *udc)
  291. {
  292. if (!udc->bias_pulse_needed)
  293. return;
  294. if (udc->errata && udc->errata->pulse_bias)
  295. udc->errata->pulse_bias(udc);
  296. udc->bias_pulse_needed = false;
  297. }
  298. static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
  299. {
  300. unsigned int transaction_len;
  301. transaction_len = req->req.length - req->req.actual;
  302. req->last_transaction = 1;
  303. if (transaction_len > ep->ep.maxpacket) {
  304. transaction_len = ep->ep.maxpacket;
  305. req->last_transaction = 0;
  306. } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
  307. req->last_transaction = 0;
  308. DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
  309. ep->ep.name, req, transaction_len,
  310. req->last_transaction ? ", done" : "");
  311. memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
  312. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  313. req->req.actual += transaction_len;
  314. }
  315. static void submit_request(struct usba_ep *ep, struct usba_request *req)
  316. {
  317. DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
  318. ep->ep.name, req, req->req.length);
  319. req->req.actual = 0;
  320. req->submitted = 1;
  321. if (req->using_dma) {
  322. if (req->req.length == 0) {
  323. usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
  324. return;
  325. }
  326. if (req->req.zero)
  327. usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
  328. else
  329. usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
  330. usba_dma_writel(ep, ADDRESS, req->req.dma);
  331. usba_dma_writel(ep, CONTROL, req->ctrl);
  332. } else {
  333. next_fifo_transaction(ep, req);
  334. if (req->last_transaction) {
  335. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  336. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  337. } else {
  338. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  339. usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
  340. }
  341. }
  342. }
  343. static void submit_next_request(struct usba_ep *ep)
  344. {
  345. struct usba_request *req;
  346. if (list_empty(&ep->queue)) {
  347. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
  348. return;
  349. }
  350. req = list_entry(ep->queue.next, struct usba_request, queue);
  351. if (!req->submitted)
  352. submit_request(ep, req);
  353. }
  354. static void send_status(struct usba_udc *udc, struct usba_ep *ep)
  355. {
  356. ep->state = STATUS_STAGE_IN;
  357. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  358. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  359. }
  360. static void receive_data(struct usba_ep *ep)
  361. {
  362. struct usba_udc *udc = ep->udc;
  363. struct usba_request *req;
  364. unsigned long status;
  365. unsigned int bytecount, nr_busy;
  366. int is_complete = 0;
  367. status = usba_ep_readl(ep, STA);
  368. nr_busy = USBA_BFEXT(BUSY_BANKS, status);
  369. DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
  370. while (nr_busy > 0) {
  371. if (list_empty(&ep->queue)) {
  372. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  373. break;
  374. }
  375. req = list_entry(ep->queue.next,
  376. struct usba_request, queue);
  377. bytecount = USBA_BFEXT(BYTE_COUNT, status);
  378. if (status & (1 << 31))
  379. is_complete = 1;
  380. if (req->req.actual + bytecount >= req->req.length) {
  381. is_complete = 1;
  382. bytecount = req->req.length - req->req.actual;
  383. }
  384. memcpy_fromio(req->req.buf + req->req.actual,
  385. ep->fifo, bytecount);
  386. req->req.actual += bytecount;
  387. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  388. if (is_complete) {
  389. DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
  390. req->req.status = 0;
  391. list_del_init(&req->queue);
  392. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  393. spin_unlock(&udc->lock);
  394. usb_gadget_giveback_request(&ep->ep, &req->req);
  395. spin_lock(&udc->lock);
  396. }
  397. status = usba_ep_readl(ep, STA);
  398. nr_busy = USBA_BFEXT(BUSY_BANKS, status);
  399. if (is_complete && ep_is_control(ep)) {
  400. send_status(udc, ep);
  401. break;
  402. }
  403. }
  404. }
  405. static void
  406. request_complete(struct usba_ep *ep, struct usba_request *req, int status)
  407. {
  408. struct usba_udc *udc = ep->udc;
  409. WARN_ON(!list_empty(&req->queue));
  410. if (req->req.status == -EINPROGRESS)
  411. req->req.status = status;
  412. if (req->using_dma)
  413. usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
  414. DBG(DBG_GADGET | DBG_REQ,
  415. "%s: req %p complete: status %d, actual %u\n",
  416. ep->ep.name, req, req->req.status, req->req.actual);
  417. spin_unlock(&udc->lock);
  418. usb_gadget_giveback_request(&ep->ep, &req->req);
  419. spin_lock(&udc->lock);
  420. }
  421. static void
  422. request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
  423. {
  424. struct usba_request *req, *tmp_req;
  425. list_for_each_entry_safe(req, tmp_req, list, queue) {
  426. list_del_init(&req->queue);
  427. request_complete(ep, req, status);
  428. }
  429. }
  430. static int
  431. usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
  432. {
  433. struct usba_ep *ep = to_usba_ep(_ep);
  434. struct usba_udc *udc = ep->udc;
  435. unsigned long flags, ept_cfg, maxpacket;
  436. unsigned int nr_trans;
  437. DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
  438. maxpacket = usb_endpoint_maxp(desc) & 0x7ff;
  439. if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
  440. || ep->index == 0
  441. || desc->bDescriptorType != USB_DT_ENDPOINT
  442. || maxpacket == 0
  443. || maxpacket > ep->fifo_size) {
  444. DBG(DBG_ERR, "ep_enable: Invalid argument");
  445. return -EINVAL;
  446. }
  447. ep->is_isoc = 0;
  448. ep->is_in = 0;
  449. if (maxpacket <= 8)
  450. ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
  451. else
  452. /* LSB is bit 1, not 0 */
  453. ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
  454. DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
  455. ep->ep.name, ept_cfg, maxpacket);
  456. if (usb_endpoint_dir_in(desc)) {
  457. ep->is_in = 1;
  458. ept_cfg |= USBA_EPT_DIR_IN;
  459. }
  460. switch (usb_endpoint_type(desc)) {
  461. case USB_ENDPOINT_XFER_CONTROL:
  462. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
  463. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
  464. break;
  465. case USB_ENDPOINT_XFER_ISOC:
  466. if (!ep->can_isoc) {
  467. DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
  468. ep->ep.name);
  469. return -EINVAL;
  470. }
  471. /*
  472. * Bits 11:12 specify number of _additional_
  473. * transactions per microframe.
  474. */
  475. nr_trans = ((usb_endpoint_maxp(desc) >> 11) & 3) + 1;
  476. if (nr_trans > 3)
  477. return -EINVAL;
  478. ep->is_isoc = 1;
  479. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
  480. /*
  481. * Do triple-buffering on high-bandwidth iso endpoints.
  482. */
  483. if (nr_trans > 1 && ep->nr_banks == 3)
  484. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
  485. else
  486. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
  487. ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
  488. break;
  489. case USB_ENDPOINT_XFER_BULK:
  490. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
  491. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
  492. break;
  493. case USB_ENDPOINT_XFER_INT:
  494. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
  495. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
  496. break;
  497. }
  498. spin_lock_irqsave(&ep->udc->lock, flags);
  499. ep->ep.desc = desc;
  500. ep->ep.maxpacket = maxpacket;
  501. usba_ep_writel(ep, CFG, ept_cfg);
  502. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  503. if (ep->can_dma) {
  504. u32 ctrl;
  505. usba_int_enb_set(udc, usba_int_enb_get(udc) |
  506. USBA_BF(EPT_INT, 1 << ep->index) |
  507. USBA_BF(DMA_INT, 1 << ep->index));
  508. ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
  509. usba_ep_writel(ep, CTL_ENB, ctrl);
  510. } else {
  511. usba_int_enb_set(udc, usba_int_enb_get(udc) |
  512. USBA_BF(EPT_INT, 1 << ep->index));
  513. }
  514. spin_unlock_irqrestore(&udc->lock, flags);
  515. DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
  516. (unsigned long)usba_ep_readl(ep, CFG));
  517. DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
  518. (unsigned long)usba_int_enb_get(udc));
  519. return 0;
  520. }
  521. static int usba_ep_disable(struct usb_ep *_ep)
  522. {
  523. struct usba_ep *ep = to_usba_ep(_ep);
  524. struct usba_udc *udc = ep->udc;
  525. LIST_HEAD(req_list);
  526. unsigned long flags;
  527. DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
  528. spin_lock_irqsave(&udc->lock, flags);
  529. if (!ep->ep.desc) {
  530. spin_unlock_irqrestore(&udc->lock, flags);
  531. /* REVISIT because this driver disables endpoints in
  532. * reset_all_endpoints() before calling disconnect(),
  533. * most gadget drivers would trigger this non-error ...
  534. */
  535. if (udc->gadget.speed != USB_SPEED_UNKNOWN)
  536. DBG(DBG_ERR, "ep_disable: %s not enabled\n",
  537. ep->ep.name);
  538. return -EINVAL;
  539. }
  540. ep->ep.desc = NULL;
  541. list_splice_init(&ep->queue, &req_list);
  542. if (ep->can_dma) {
  543. usba_dma_writel(ep, CONTROL, 0);
  544. usba_dma_writel(ep, ADDRESS, 0);
  545. usba_dma_readl(ep, STATUS);
  546. }
  547. usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
  548. usba_int_enb_set(udc, usba_int_enb_get(udc) &
  549. ~USBA_BF(EPT_INT, 1 << ep->index));
  550. request_complete_list(ep, &req_list, -ESHUTDOWN);
  551. spin_unlock_irqrestore(&udc->lock, flags);
  552. return 0;
  553. }
  554. static struct usb_request *
  555. usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  556. {
  557. struct usba_request *req;
  558. DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
  559. req = kzalloc(sizeof(*req), gfp_flags);
  560. if (!req)
  561. return NULL;
  562. INIT_LIST_HEAD(&req->queue);
  563. return &req->req;
  564. }
  565. static void
  566. usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
  567. {
  568. struct usba_request *req = to_usba_req(_req);
  569. DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
  570. kfree(req);
  571. }
  572. static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
  573. struct usba_request *req, gfp_t gfp_flags)
  574. {
  575. unsigned long flags;
  576. int ret;
  577. DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
  578. ep->ep.name, req->req.length, &req->req.dma,
  579. req->req.zero ? 'Z' : 'z',
  580. req->req.short_not_ok ? 'S' : 's',
  581. req->req.no_interrupt ? 'I' : 'i');
  582. if (req->req.length > 0x10000) {
  583. /* Lengths from 0 to 65536 (inclusive) are supported */
  584. DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
  585. return -EINVAL;
  586. }
  587. ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
  588. if (ret)
  589. return ret;
  590. req->using_dma = 1;
  591. req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
  592. | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
  593. | USBA_DMA_END_BUF_EN;
  594. if (!ep->is_in)
  595. req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
  596. /*
  597. * Add this request to the queue and submit for DMA if
  598. * possible. Check if we're still alive first -- we may have
  599. * received a reset since last time we checked.
  600. */
  601. ret = -ESHUTDOWN;
  602. spin_lock_irqsave(&udc->lock, flags);
  603. if (ep->ep.desc) {
  604. if (list_empty(&ep->queue))
  605. submit_request(ep, req);
  606. list_add_tail(&req->queue, &ep->queue);
  607. ret = 0;
  608. }
  609. spin_unlock_irqrestore(&udc->lock, flags);
  610. return ret;
  611. }
  612. static int
  613. usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
  614. {
  615. struct usba_request *req = to_usba_req(_req);
  616. struct usba_ep *ep = to_usba_ep(_ep);
  617. struct usba_udc *udc = ep->udc;
  618. unsigned long flags;
  619. int ret;
  620. DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
  621. ep->ep.name, req, _req->length);
  622. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
  623. !ep->ep.desc)
  624. return -ESHUTDOWN;
  625. req->submitted = 0;
  626. req->using_dma = 0;
  627. req->last_transaction = 0;
  628. _req->status = -EINPROGRESS;
  629. _req->actual = 0;
  630. if (ep->can_dma)
  631. return queue_dma(udc, ep, req, gfp_flags);
  632. /* May have received a reset since last time we checked */
  633. ret = -ESHUTDOWN;
  634. spin_lock_irqsave(&udc->lock, flags);
  635. if (ep->ep.desc) {
  636. list_add_tail(&req->queue, &ep->queue);
  637. if ((!ep_is_control(ep) && ep->is_in) ||
  638. (ep_is_control(ep)
  639. && (ep->state == DATA_STAGE_IN
  640. || ep->state == STATUS_STAGE_IN)))
  641. usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
  642. else
  643. usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
  644. ret = 0;
  645. }
  646. spin_unlock_irqrestore(&udc->lock, flags);
  647. return ret;
  648. }
  649. static void
  650. usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
  651. {
  652. req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
  653. }
  654. static int stop_dma(struct usba_ep *ep, u32 *pstatus)
  655. {
  656. unsigned int timeout;
  657. u32 status;
  658. /*
  659. * Stop the DMA controller. When writing both CH_EN
  660. * and LINK to 0, the other bits are not affected.
  661. */
  662. usba_dma_writel(ep, CONTROL, 0);
  663. /* Wait for the FIFO to empty */
  664. for (timeout = 40; timeout; --timeout) {
  665. status = usba_dma_readl(ep, STATUS);
  666. if (!(status & USBA_DMA_CH_EN))
  667. break;
  668. udelay(1);
  669. }
  670. if (pstatus)
  671. *pstatus = status;
  672. if (timeout == 0) {
  673. dev_err(&ep->udc->pdev->dev,
  674. "%s: timed out waiting for DMA FIFO to empty\n",
  675. ep->ep.name);
  676. return -ETIMEDOUT;
  677. }
  678. return 0;
  679. }
  680. static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  681. {
  682. struct usba_ep *ep = to_usba_ep(_ep);
  683. struct usba_udc *udc = ep->udc;
  684. struct usba_request *req;
  685. unsigned long flags;
  686. u32 status;
  687. DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
  688. ep->ep.name, req);
  689. spin_lock_irqsave(&udc->lock, flags);
  690. list_for_each_entry(req, &ep->queue, queue) {
  691. if (&req->req == _req)
  692. break;
  693. }
  694. if (&req->req != _req) {
  695. spin_unlock_irqrestore(&udc->lock, flags);
  696. return -EINVAL;
  697. }
  698. if (req->using_dma) {
  699. /*
  700. * If this request is currently being transferred,
  701. * stop the DMA controller and reset the FIFO.
  702. */
  703. if (ep->queue.next == &req->queue) {
  704. status = usba_dma_readl(ep, STATUS);
  705. if (status & USBA_DMA_CH_EN)
  706. stop_dma(ep, &status);
  707. #ifdef CONFIG_USB_GADGET_DEBUG_FS
  708. ep->last_dma_status = status;
  709. #endif
  710. usba_writel(udc, EPT_RST, 1 << ep->index);
  711. usba_update_req(ep, req, status);
  712. }
  713. }
  714. /*
  715. * Errors should stop the queue from advancing until the
  716. * completion function returns.
  717. */
  718. list_del_init(&req->queue);
  719. request_complete(ep, req, -ECONNRESET);
  720. /* Process the next request if any */
  721. submit_next_request(ep);
  722. spin_unlock_irqrestore(&udc->lock, flags);
  723. return 0;
  724. }
  725. static int usba_ep_set_halt(struct usb_ep *_ep, int value)
  726. {
  727. struct usba_ep *ep = to_usba_ep(_ep);
  728. struct usba_udc *udc = ep->udc;
  729. unsigned long flags;
  730. int ret = 0;
  731. DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
  732. value ? "set" : "clear");
  733. if (!ep->ep.desc) {
  734. DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
  735. ep->ep.name);
  736. return -ENODEV;
  737. }
  738. if (ep->is_isoc) {
  739. DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
  740. ep->ep.name);
  741. return -ENOTTY;
  742. }
  743. spin_lock_irqsave(&udc->lock, flags);
  744. /*
  745. * We can't halt IN endpoints while there are still data to be
  746. * transferred
  747. */
  748. if (!list_empty(&ep->queue)
  749. || ((value && ep->is_in && (usba_ep_readl(ep, STA)
  750. & USBA_BF(BUSY_BANKS, -1L))))) {
  751. ret = -EAGAIN;
  752. } else {
  753. if (value)
  754. usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
  755. else
  756. usba_ep_writel(ep, CLR_STA,
  757. USBA_FORCE_STALL | USBA_TOGGLE_CLR);
  758. usba_ep_readl(ep, STA);
  759. }
  760. spin_unlock_irqrestore(&udc->lock, flags);
  761. return ret;
  762. }
  763. static int usba_ep_fifo_status(struct usb_ep *_ep)
  764. {
  765. struct usba_ep *ep = to_usba_ep(_ep);
  766. return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
  767. }
  768. static void usba_ep_fifo_flush(struct usb_ep *_ep)
  769. {
  770. struct usba_ep *ep = to_usba_ep(_ep);
  771. struct usba_udc *udc = ep->udc;
  772. usba_writel(udc, EPT_RST, 1 << ep->index);
  773. }
  774. static const struct usb_ep_ops usba_ep_ops = {
  775. .enable = usba_ep_enable,
  776. .disable = usba_ep_disable,
  777. .alloc_request = usba_ep_alloc_request,
  778. .free_request = usba_ep_free_request,
  779. .queue = usba_ep_queue,
  780. .dequeue = usba_ep_dequeue,
  781. .set_halt = usba_ep_set_halt,
  782. .fifo_status = usba_ep_fifo_status,
  783. .fifo_flush = usba_ep_fifo_flush,
  784. };
  785. static int usba_udc_get_frame(struct usb_gadget *gadget)
  786. {
  787. struct usba_udc *udc = to_usba_udc(gadget);
  788. return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
  789. }
  790. static int usba_udc_wakeup(struct usb_gadget *gadget)
  791. {
  792. struct usba_udc *udc = to_usba_udc(gadget);
  793. unsigned long flags;
  794. u32 ctrl;
  795. int ret = -EINVAL;
  796. spin_lock_irqsave(&udc->lock, flags);
  797. if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
  798. ctrl = usba_readl(udc, CTRL);
  799. usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
  800. ret = 0;
  801. }
  802. spin_unlock_irqrestore(&udc->lock, flags);
  803. return ret;
  804. }
  805. static int
  806. usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
  807. {
  808. struct usba_udc *udc = to_usba_udc(gadget);
  809. unsigned long flags;
  810. gadget->is_selfpowered = (is_selfpowered != 0);
  811. spin_lock_irqsave(&udc->lock, flags);
  812. if (is_selfpowered)
  813. udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
  814. else
  815. udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
  816. spin_unlock_irqrestore(&udc->lock, flags);
  817. return 0;
  818. }
  819. static int atmel_usba_start(struct usb_gadget *gadget,
  820. struct usb_gadget_driver *driver);
  821. static int atmel_usba_stop(struct usb_gadget *gadget);
  822. static const struct usb_gadget_ops usba_udc_ops = {
  823. .get_frame = usba_udc_get_frame,
  824. .wakeup = usba_udc_wakeup,
  825. .set_selfpowered = usba_udc_set_selfpowered,
  826. .udc_start = atmel_usba_start,
  827. .udc_stop = atmel_usba_stop,
  828. };
  829. static struct usb_endpoint_descriptor usba_ep0_desc = {
  830. .bLength = USB_DT_ENDPOINT_SIZE,
  831. .bDescriptorType = USB_DT_ENDPOINT,
  832. .bEndpointAddress = 0,
  833. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  834. .wMaxPacketSize = cpu_to_le16(64),
  835. /* FIXME: I have no idea what to put here */
  836. .bInterval = 1,
  837. };
  838. static struct usb_gadget usba_gadget_template = {
  839. .ops = &usba_udc_ops,
  840. .max_speed = USB_SPEED_HIGH,
  841. .name = "atmel_usba_udc",
  842. };
  843. /*
  844. * Called with interrupts disabled and udc->lock held.
  845. */
  846. static void reset_all_endpoints(struct usba_udc *udc)
  847. {
  848. struct usba_ep *ep;
  849. struct usba_request *req, *tmp_req;
  850. usba_writel(udc, EPT_RST, ~0UL);
  851. ep = to_usba_ep(udc->gadget.ep0);
  852. list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
  853. list_del_init(&req->queue);
  854. request_complete(ep, req, -ECONNRESET);
  855. }
  856. /* NOTE: normally, the next call to the gadget driver is in
  857. * charge of disabling endpoints... usually disconnect().
  858. * The exception would be entering a high speed test mode.
  859. *
  860. * FIXME remove this code ... and retest thoroughly.
  861. */
  862. list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
  863. if (ep->ep.desc) {
  864. spin_unlock(&udc->lock);
  865. usba_ep_disable(&ep->ep);
  866. spin_lock(&udc->lock);
  867. }
  868. }
  869. }
  870. static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
  871. {
  872. struct usba_ep *ep;
  873. if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
  874. return to_usba_ep(udc->gadget.ep0);
  875. list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
  876. u8 bEndpointAddress;
  877. if (!ep->ep.desc)
  878. continue;
  879. bEndpointAddress = ep->ep.desc->bEndpointAddress;
  880. if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
  881. continue;
  882. if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
  883. == (wIndex & USB_ENDPOINT_NUMBER_MASK))
  884. return ep;
  885. }
  886. return NULL;
  887. }
  888. /* Called with interrupts disabled and udc->lock held */
  889. static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
  890. {
  891. usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
  892. ep->state = WAIT_FOR_SETUP;
  893. }
  894. static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
  895. {
  896. if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
  897. return 1;
  898. return 0;
  899. }
  900. static inline void set_address(struct usba_udc *udc, unsigned int addr)
  901. {
  902. u32 regval;
  903. DBG(DBG_BUS, "setting address %u...\n", addr);
  904. regval = usba_readl(udc, CTRL);
  905. regval = USBA_BFINS(DEV_ADDR, addr, regval);
  906. usba_writel(udc, CTRL, regval);
  907. }
  908. static int do_test_mode(struct usba_udc *udc)
  909. {
  910. static const char test_packet_buffer[] = {
  911. /* JKJKJKJK * 9 */
  912. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  913. /* JJKKJJKK * 8 */
  914. 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
  915. /* JJKKJJKK * 8 */
  916. 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
  917. /* JJJJJJJKKKKKKK * 8 */
  918. 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
  919. 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
  920. /* JJJJJJJK * 8 */
  921. 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
  922. /* {JKKKKKKK * 10}, JK */
  923. 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
  924. };
  925. struct usba_ep *ep;
  926. struct device *dev = &udc->pdev->dev;
  927. int test_mode;
  928. test_mode = udc->test_mode;
  929. /* Start from a clean slate */
  930. reset_all_endpoints(udc);
  931. switch (test_mode) {
  932. case 0x0100:
  933. /* Test_J */
  934. usba_writel(udc, TST, USBA_TST_J_MODE);
  935. dev_info(dev, "Entering Test_J mode...\n");
  936. break;
  937. case 0x0200:
  938. /* Test_K */
  939. usba_writel(udc, TST, USBA_TST_K_MODE);
  940. dev_info(dev, "Entering Test_K mode...\n");
  941. break;
  942. case 0x0300:
  943. /*
  944. * Test_SE0_NAK: Force high-speed mode and set up ep0
  945. * for Bulk IN transfers
  946. */
  947. ep = &udc->usba_ep[0];
  948. usba_writel(udc, TST,
  949. USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
  950. usba_ep_writel(ep, CFG,
  951. USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
  952. | USBA_EPT_DIR_IN
  953. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
  954. | USBA_BF(BK_NUMBER, 1));
  955. if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
  956. set_protocol_stall(udc, ep);
  957. dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
  958. } else {
  959. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  960. dev_info(dev, "Entering Test_SE0_NAK mode...\n");
  961. }
  962. break;
  963. case 0x0400:
  964. /* Test_Packet */
  965. ep = &udc->usba_ep[0];
  966. usba_ep_writel(ep, CFG,
  967. USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
  968. | USBA_EPT_DIR_IN
  969. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
  970. | USBA_BF(BK_NUMBER, 1));
  971. if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
  972. set_protocol_stall(udc, ep);
  973. dev_err(dev, "Test_Packet: ep0 not mapped\n");
  974. } else {
  975. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  976. usba_writel(udc, TST, USBA_TST_PKT_MODE);
  977. memcpy_toio(ep->fifo, test_packet_buffer,
  978. sizeof(test_packet_buffer));
  979. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  980. dev_info(dev, "Entering Test_Packet mode...\n");
  981. }
  982. break;
  983. default:
  984. dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
  985. return -EINVAL;
  986. }
  987. return 0;
  988. }
  989. /* Avoid overly long expressions */
  990. static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
  991. {
  992. if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
  993. return true;
  994. return false;
  995. }
  996. static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
  997. {
  998. if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
  999. return true;
  1000. return false;
  1001. }
  1002. static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
  1003. {
  1004. if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
  1005. return true;
  1006. return false;
  1007. }
  1008. static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
  1009. struct usb_ctrlrequest *crq)
  1010. {
  1011. int retval = 0;
  1012. switch (crq->bRequest) {
  1013. case USB_REQ_GET_STATUS: {
  1014. u16 status;
  1015. if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
  1016. status = cpu_to_le16(udc->devstatus);
  1017. } else if (crq->bRequestType
  1018. == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
  1019. status = cpu_to_le16(0);
  1020. } else if (crq->bRequestType
  1021. == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
  1022. struct usba_ep *target;
  1023. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  1024. if (!target)
  1025. goto stall;
  1026. status = 0;
  1027. if (is_stalled(udc, target))
  1028. status |= cpu_to_le16(1);
  1029. } else
  1030. goto delegate;
  1031. /* Write directly to the FIFO. No queueing is done. */
  1032. if (crq->wLength != cpu_to_le16(sizeof(status)))
  1033. goto stall;
  1034. ep->state = DATA_STAGE_IN;
  1035. usba_io_writew(status, ep->fifo);
  1036. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  1037. break;
  1038. }
  1039. case USB_REQ_CLEAR_FEATURE: {
  1040. if (crq->bRequestType == USB_RECIP_DEVICE) {
  1041. if (feature_is_dev_remote_wakeup(crq))
  1042. udc->devstatus
  1043. &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
  1044. else
  1045. /* Can't CLEAR_FEATURE TEST_MODE */
  1046. goto stall;
  1047. } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
  1048. struct usba_ep *target;
  1049. if (crq->wLength != cpu_to_le16(0)
  1050. || !feature_is_ep_halt(crq))
  1051. goto stall;
  1052. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  1053. if (!target)
  1054. goto stall;
  1055. usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
  1056. if (target->index != 0)
  1057. usba_ep_writel(target, CLR_STA,
  1058. USBA_TOGGLE_CLR);
  1059. } else {
  1060. goto delegate;
  1061. }
  1062. send_status(udc, ep);
  1063. break;
  1064. }
  1065. case USB_REQ_SET_FEATURE: {
  1066. if (crq->bRequestType == USB_RECIP_DEVICE) {
  1067. if (feature_is_dev_test_mode(crq)) {
  1068. send_status(udc, ep);
  1069. ep->state = STATUS_STAGE_TEST;
  1070. udc->test_mode = le16_to_cpu(crq->wIndex);
  1071. return 0;
  1072. } else if (feature_is_dev_remote_wakeup(crq)) {
  1073. udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
  1074. } else {
  1075. goto stall;
  1076. }
  1077. } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
  1078. struct usba_ep *target;
  1079. if (crq->wLength != cpu_to_le16(0)
  1080. || !feature_is_ep_halt(crq))
  1081. goto stall;
  1082. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  1083. if (!target)
  1084. goto stall;
  1085. usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
  1086. } else
  1087. goto delegate;
  1088. send_status(udc, ep);
  1089. break;
  1090. }
  1091. case USB_REQ_SET_ADDRESS:
  1092. if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
  1093. goto delegate;
  1094. set_address(udc, le16_to_cpu(crq->wValue));
  1095. send_status(udc, ep);
  1096. ep->state = STATUS_STAGE_ADDR;
  1097. break;
  1098. default:
  1099. delegate:
  1100. spin_unlock(&udc->lock);
  1101. retval = udc->driver->setup(&udc->gadget, crq);
  1102. spin_lock(&udc->lock);
  1103. }
  1104. return retval;
  1105. stall:
  1106. pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
  1107. "halting endpoint...\n",
  1108. ep->ep.name, crq->bRequestType, crq->bRequest,
  1109. le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
  1110. le16_to_cpu(crq->wLength));
  1111. set_protocol_stall(udc, ep);
  1112. return -1;
  1113. }
  1114. static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
  1115. {
  1116. struct usba_request *req;
  1117. u32 epstatus;
  1118. u32 epctrl;
  1119. restart:
  1120. epstatus = usba_ep_readl(ep, STA);
  1121. epctrl = usba_ep_readl(ep, CTL);
  1122. DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
  1123. ep->ep.name, ep->state, epstatus, epctrl);
  1124. req = NULL;
  1125. if (!list_empty(&ep->queue))
  1126. req = list_entry(ep->queue.next,
  1127. struct usba_request, queue);
  1128. if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
  1129. if (req->submitted)
  1130. next_fifo_transaction(ep, req);
  1131. else
  1132. submit_request(ep, req);
  1133. if (req->last_transaction) {
  1134. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  1135. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  1136. }
  1137. goto restart;
  1138. }
  1139. if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
  1140. usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
  1141. switch (ep->state) {
  1142. case DATA_STAGE_IN:
  1143. usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
  1144. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  1145. ep->state = STATUS_STAGE_OUT;
  1146. break;
  1147. case STATUS_STAGE_ADDR:
  1148. /* Activate our new address */
  1149. usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
  1150. | USBA_FADDR_EN));
  1151. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  1152. ep->state = WAIT_FOR_SETUP;
  1153. break;
  1154. case STATUS_STAGE_IN:
  1155. if (req) {
  1156. list_del_init(&req->queue);
  1157. request_complete(ep, req, 0);
  1158. submit_next_request(ep);
  1159. }
  1160. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  1161. ep->state = WAIT_FOR_SETUP;
  1162. break;
  1163. case STATUS_STAGE_TEST:
  1164. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  1165. ep->state = WAIT_FOR_SETUP;
  1166. if (do_test_mode(udc))
  1167. set_protocol_stall(udc, ep);
  1168. break;
  1169. default:
  1170. pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
  1171. "halting endpoint...\n",
  1172. ep->ep.name, ep->state);
  1173. set_protocol_stall(udc, ep);
  1174. break;
  1175. }
  1176. goto restart;
  1177. }
  1178. if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
  1179. switch (ep->state) {
  1180. case STATUS_STAGE_OUT:
  1181. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  1182. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  1183. if (req) {
  1184. list_del_init(&req->queue);
  1185. request_complete(ep, req, 0);
  1186. }
  1187. ep->state = WAIT_FOR_SETUP;
  1188. break;
  1189. case DATA_STAGE_OUT:
  1190. receive_data(ep);
  1191. break;
  1192. default:
  1193. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  1194. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  1195. pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
  1196. "halting endpoint...\n",
  1197. ep->ep.name, ep->state);
  1198. set_protocol_stall(udc, ep);
  1199. break;
  1200. }
  1201. goto restart;
  1202. }
  1203. if (epstatus & USBA_RX_SETUP) {
  1204. union {
  1205. struct usb_ctrlrequest crq;
  1206. unsigned long data[2];
  1207. } crq;
  1208. unsigned int pkt_len;
  1209. int ret;
  1210. if (ep->state != WAIT_FOR_SETUP) {
  1211. /*
  1212. * Didn't expect a SETUP packet at this
  1213. * point. Clean up any pending requests (which
  1214. * may be successful).
  1215. */
  1216. int status = -EPROTO;
  1217. /*
  1218. * RXRDY and TXCOMP are dropped when SETUP
  1219. * packets arrive. Just pretend we received
  1220. * the status packet.
  1221. */
  1222. if (ep->state == STATUS_STAGE_OUT
  1223. || ep->state == STATUS_STAGE_IN) {
  1224. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  1225. status = 0;
  1226. }
  1227. if (req) {
  1228. list_del_init(&req->queue);
  1229. request_complete(ep, req, status);
  1230. }
  1231. }
  1232. pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
  1233. DBG(DBG_HW, "Packet length: %u\n", pkt_len);
  1234. if (pkt_len != sizeof(crq)) {
  1235. pr_warning("udc: Invalid packet length %u "
  1236. "(expected %zu)\n", pkt_len, sizeof(crq));
  1237. set_protocol_stall(udc, ep);
  1238. return;
  1239. }
  1240. DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
  1241. memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
  1242. /* Free up one bank in the FIFO so that we can
  1243. * generate or receive a reply right away. */
  1244. usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
  1245. /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
  1246. ep->state, crq.crq.bRequestType,
  1247. crq.crq.bRequest); */
  1248. if (crq.crq.bRequestType & USB_DIR_IN) {
  1249. /*
  1250. * The USB 2.0 spec states that "if wLength is
  1251. * zero, there is no data transfer phase."
  1252. * However, testusb #14 seems to actually
  1253. * expect a data phase even if wLength = 0...
  1254. */
  1255. ep->state = DATA_STAGE_IN;
  1256. } else {
  1257. if (crq.crq.wLength != cpu_to_le16(0))
  1258. ep->state = DATA_STAGE_OUT;
  1259. else
  1260. ep->state = STATUS_STAGE_IN;
  1261. }
  1262. ret = -1;
  1263. if (ep->index == 0)
  1264. ret = handle_ep0_setup(udc, ep, &crq.crq);
  1265. else {
  1266. spin_unlock(&udc->lock);
  1267. ret = udc->driver->setup(&udc->gadget, &crq.crq);
  1268. spin_lock(&udc->lock);
  1269. }
  1270. DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
  1271. crq.crq.bRequestType, crq.crq.bRequest,
  1272. le16_to_cpu(crq.crq.wLength), ep->state, ret);
  1273. if (ret < 0) {
  1274. /* Let the host know that we failed */
  1275. set_protocol_stall(udc, ep);
  1276. }
  1277. }
  1278. }
  1279. static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
  1280. {
  1281. struct usba_request *req;
  1282. u32 epstatus;
  1283. u32 epctrl;
  1284. epstatus = usba_ep_readl(ep, STA);
  1285. epctrl = usba_ep_readl(ep, CTL);
  1286. DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
  1287. while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
  1288. DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
  1289. if (list_empty(&ep->queue)) {
  1290. dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
  1291. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  1292. return;
  1293. }
  1294. req = list_entry(ep->queue.next, struct usba_request, queue);
  1295. if (req->using_dma) {
  1296. /* Send a zero-length packet */
  1297. usba_ep_writel(ep, SET_STA,
  1298. USBA_TX_PK_RDY);
  1299. usba_ep_writel(ep, CTL_DIS,
  1300. USBA_TX_PK_RDY);
  1301. list_del_init(&req->queue);
  1302. submit_next_request(ep);
  1303. request_complete(ep, req, 0);
  1304. } else {
  1305. if (req->submitted)
  1306. next_fifo_transaction(ep, req);
  1307. else
  1308. submit_request(ep, req);
  1309. if (req->last_transaction) {
  1310. list_del_init(&req->queue);
  1311. submit_next_request(ep);
  1312. request_complete(ep, req, 0);
  1313. }
  1314. }
  1315. epstatus = usba_ep_readl(ep, STA);
  1316. epctrl = usba_ep_readl(ep, CTL);
  1317. }
  1318. if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
  1319. DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
  1320. receive_data(ep);
  1321. }
  1322. }
  1323. static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
  1324. {
  1325. struct usba_request *req;
  1326. u32 status, control, pending;
  1327. status = usba_dma_readl(ep, STATUS);
  1328. control = usba_dma_readl(ep, CONTROL);
  1329. #ifdef CONFIG_USB_GADGET_DEBUG_FS
  1330. ep->last_dma_status = status;
  1331. #endif
  1332. pending = status & control;
  1333. DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
  1334. if (status & USBA_DMA_CH_EN) {
  1335. dev_err(&udc->pdev->dev,
  1336. "DMA_CH_EN is set after transfer is finished!\n");
  1337. dev_err(&udc->pdev->dev,
  1338. "status=%#08x, pending=%#08x, control=%#08x\n",
  1339. status, pending, control);
  1340. /*
  1341. * try to pretend nothing happened. We might have to
  1342. * do something here...
  1343. */
  1344. }
  1345. if (list_empty(&ep->queue))
  1346. /* Might happen if a reset comes along at the right moment */
  1347. return;
  1348. if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
  1349. req = list_entry(ep->queue.next, struct usba_request, queue);
  1350. usba_update_req(ep, req, status);
  1351. list_del_init(&req->queue);
  1352. submit_next_request(ep);
  1353. request_complete(ep, req, 0);
  1354. }
  1355. }
  1356. static irqreturn_t usba_udc_irq(int irq, void *devid)
  1357. {
  1358. struct usba_udc *udc = devid;
  1359. u32 status, int_enb;
  1360. u32 dma_status;
  1361. u32 ep_status;
  1362. spin_lock(&udc->lock);
  1363. int_enb = usba_int_enb_get(udc);
  1364. status = usba_readl(udc, INT_STA) & int_enb;
  1365. DBG(DBG_INT, "irq, status=%#08x\n", status);
  1366. if (status & USBA_DET_SUSPEND) {
  1367. toggle_bias(udc, 0);
  1368. usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
  1369. usba_int_enb_set(udc, int_enb | USBA_WAKE_UP);
  1370. udc->bias_pulse_needed = true;
  1371. DBG(DBG_BUS, "Suspend detected\n");
  1372. if (udc->gadget.speed != USB_SPEED_UNKNOWN
  1373. && udc->driver && udc->driver->suspend) {
  1374. spin_unlock(&udc->lock);
  1375. udc->driver->suspend(&udc->gadget);
  1376. spin_lock(&udc->lock);
  1377. }
  1378. }
  1379. if (status & USBA_WAKE_UP) {
  1380. toggle_bias(udc, 1);
  1381. usba_writel(udc, INT_CLR, USBA_WAKE_UP);
  1382. usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP);
  1383. DBG(DBG_BUS, "Wake Up CPU detected\n");
  1384. }
  1385. if (status & USBA_END_OF_RESUME) {
  1386. usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
  1387. generate_bias_pulse(udc);
  1388. DBG(DBG_BUS, "Resume detected\n");
  1389. if (udc->gadget.speed != USB_SPEED_UNKNOWN
  1390. && udc->driver && udc->driver->resume) {
  1391. spin_unlock(&udc->lock);
  1392. udc->driver->resume(&udc->gadget);
  1393. spin_lock(&udc->lock);
  1394. }
  1395. }
  1396. dma_status = USBA_BFEXT(DMA_INT, status);
  1397. if (dma_status) {
  1398. int i;
  1399. for (i = 1; i <= USBA_NR_DMAS; i++)
  1400. if (dma_status & (1 << i))
  1401. usba_dma_irq(udc, &udc->usba_ep[i]);
  1402. }
  1403. ep_status = USBA_BFEXT(EPT_INT, status);
  1404. if (ep_status) {
  1405. int i;
  1406. for (i = 0; i < udc->num_ep; i++)
  1407. if (ep_status & (1 << i)) {
  1408. if (ep_is_control(&udc->usba_ep[i]))
  1409. usba_control_irq(udc, &udc->usba_ep[i]);
  1410. else
  1411. usba_ep_irq(udc, &udc->usba_ep[i]);
  1412. }
  1413. }
  1414. if (status & USBA_END_OF_RESET) {
  1415. struct usba_ep *ep0;
  1416. usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
  1417. generate_bias_pulse(udc);
  1418. reset_all_endpoints(udc);
  1419. if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
  1420. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1421. spin_unlock(&udc->lock);
  1422. usb_gadget_udc_reset(&udc->gadget, udc->driver);
  1423. spin_lock(&udc->lock);
  1424. }
  1425. if (status & USBA_HIGH_SPEED)
  1426. udc->gadget.speed = USB_SPEED_HIGH;
  1427. else
  1428. udc->gadget.speed = USB_SPEED_FULL;
  1429. DBG(DBG_BUS, "%s bus reset detected\n",
  1430. usb_speed_string(udc->gadget.speed));
  1431. ep0 = &udc->usba_ep[0];
  1432. ep0->ep.desc = &usba_ep0_desc;
  1433. ep0->state = WAIT_FOR_SETUP;
  1434. usba_ep_writel(ep0, CFG,
  1435. (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
  1436. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
  1437. | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
  1438. usba_ep_writel(ep0, CTL_ENB,
  1439. USBA_EPT_ENABLE | USBA_RX_SETUP);
  1440. usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) |
  1441. USBA_DET_SUSPEND | USBA_END_OF_RESUME);
  1442. /*
  1443. * Unclear why we hit this irregularly, e.g. in usbtest,
  1444. * but it's clearly harmless...
  1445. */
  1446. if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
  1447. dev_dbg(&udc->pdev->dev,
  1448. "ODD: EP0 configuration is invalid!\n");
  1449. }
  1450. spin_unlock(&udc->lock);
  1451. return IRQ_HANDLED;
  1452. }
  1453. static int start_clock(struct usba_udc *udc)
  1454. {
  1455. int ret;
  1456. if (udc->clocked)
  1457. return 0;
  1458. ret = clk_prepare_enable(udc->pclk);
  1459. if (ret)
  1460. return ret;
  1461. ret = clk_prepare_enable(udc->hclk);
  1462. if (ret) {
  1463. clk_disable_unprepare(udc->pclk);
  1464. return ret;
  1465. }
  1466. udc->clocked = true;
  1467. return 0;
  1468. }
  1469. static void stop_clock(struct usba_udc *udc)
  1470. {
  1471. if (!udc->clocked)
  1472. return;
  1473. clk_disable_unprepare(udc->hclk);
  1474. clk_disable_unprepare(udc->pclk);
  1475. udc->clocked = false;
  1476. }
  1477. static int usba_start(struct usba_udc *udc)
  1478. {
  1479. unsigned long flags;
  1480. int ret;
  1481. ret = start_clock(udc);
  1482. if (ret)
  1483. return ret;
  1484. spin_lock_irqsave(&udc->lock, flags);
  1485. toggle_bias(udc, 1);
  1486. usba_writel(udc, CTRL, USBA_ENABLE_MASK);
  1487. usba_int_enb_set(udc, USBA_END_OF_RESET);
  1488. spin_unlock_irqrestore(&udc->lock, flags);
  1489. return 0;
  1490. }
  1491. static void usba_stop(struct usba_udc *udc)
  1492. {
  1493. unsigned long flags;
  1494. spin_lock_irqsave(&udc->lock, flags);
  1495. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1496. reset_all_endpoints(udc);
  1497. /* This will also disable the DP pullup */
  1498. toggle_bias(udc, 0);
  1499. usba_writel(udc, CTRL, USBA_DISABLE_MASK);
  1500. spin_unlock_irqrestore(&udc->lock, flags);
  1501. stop_clock(udc);
  1502. }
  1503. static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
  1504. {
  1505. struct usba_udc *udc = devid;
  1506. int vbus;
  1507. /* debounce */
  1508. udelay(10);
  1509. mutex_lock(&udc->vbus_mutex);
  1510. vbus = vbus_is_present(udc);
  1511. if (vbus != udc->vbus_prev) {
  1512. if (vbus) {
  1513. usba_start(udc);
  1514. } else {
  1515. usba_stop(udc);
  1516. if (udc->driver->disconnect)
  1517. udc->driver->disconnect(&udc->gadget);
  1518. }
  1519. udc->vbus_prev = vbus;
  1520. }
  1521. mutex_unlock(&udc->vbus_mutex);
  1522. return IRQ_HANDLED;
  1523. }
  1524. static int atmel_usba_start(struct usb_gadget *gadget,
  1525. struct usb_gadget_driver *driver)
  1526. {
  1527. int ret;
  1528. struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
  1529. unsigned long flags;
  1530. spin_lock_irqsave(&udc->lock, flags);
  1531. udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
  1532. udc->driver = driver;
  1533. spin_unlock_irqrestore(&udc->lock, flags);
  1534. mutex_lock(&udc->vbus_mutex);
  1535. if (gpio_is_valid(udc->vbus_pin))
  1536. enable_irq(gpio_to_irq(udc->vbus_pin));
  1537. /* If Vbus is present, enable the controller and wait for reset */
  1538. udc->vbus_prev = vbus_is_present(udc);
  1539. if (udc->vbus_prev) {
  1540. ret = usba_start(udc);
  1541. if (ret)
  1542. goto err;
  1543. }
  1544. mutex_unlock(&udc->vbus_mutex);
  1545. return 0;
  1546. err:
  1547. if (gpio_is_valid(udc->vbus_pin))
  1548. disable_irq(gpio_to_irq(udc->vbus_pin));
  1549. mutex_unlock(&udc->vbus_mutex);
  1550. spin_lock_irqsave(&udc->lock, flags);
  1551. udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
  1552. udc->driver = NULL;
  1553. spin_unlock_irqrestore(&udc->lock, flags);
  1554. return ret;
  1555. }
  1556. static int atmel_usba_stop(struct usb_gadget *gadget)
  1557. {
  1558. struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
  1559. if (gpio_is_valid(udc->vbus_pin))
  1560. disable_irq(gpio_to_irq(udc->vbus_pin));
  1561. usba_stop(udc);
  1562. udc->driver = NULL;
  1563. return 0;
  1564. }
  1565. #ifdef CONFIG_OF
  1566. static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
  1567. {
  1568. unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
  1569. if (is_on)
  1570. at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
  1571. else
  1572. at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
  1573. }
  1574. static void at91sam9g45_pulse_bias(struct usba_udc *udc)
  1575. {
  1576. unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
  1577. at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
  1578. at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
  1579. }
  1580. static const struct usba_udc_errata at91sam9rl_errata = {
  1581. .toggle_bias = at91sam9rl_toggle_bias,
  1582. };
  1583. static const struct usba_udc_errata at91sam9g45_errata = {
  1584. .pulse_bias = at91sam9g45_pulse_bias,
  1585. };
  1586. static const struct of_device_id atmel_udc_dt_ids[] = {
  1587. { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
  1588. { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
  1589. { .compatible = "atmel,sama5d3-udc" },
  1590. { /* sentinel */ }
  1591. };
  1592. MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
  1593. static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
  1594. struct usba_udc *udc)
  1595. {
  1596. u32 val;
  1597. const char *name;
  1598. enum of_gpio_flags flags;
  1599. struct device_node *np = pdev->dev.of_node;
  1600. const struct of_device_id *match;
  1601. struct device_node *pp;
  1602. int i, ret;
  1603. struct usba_ep *eps, *ep;
  1604. match = of_match_node(atmel_udc_dt_ids, np);
  1605. if (!match)
  1606. return ERR_PTR(-EINVAL);
  1607. udc->errata = match->data;
  1608. udc->num_ep = 0;
  1609. udc->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0,
  1610. &flags);
  1611. udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
  1612. pp = NULL;
  1613. while ((pp = of_get_next_child(np, pp)))
  1614. udc->num_ep++;
  1615. eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep,
  1616. GFP_KERNEL);
  1617. if (!eps)
  1618. return ERR_PTR(-ENOMEM);
  1619. udc->gadget.ep0 = &eps[0].ep;
  1620. INIT_LIST_HEAD(&eps[0].ep.ep_list);
  1621. pp = NULL;
  1622. i = 0;
  1623. while ((pp = of_get_next_child(np, pp))) {
  1624. ep = &eps[i];
  1625. ret = of_property_read_u32(pp, "reg", &val);
  1626. if (ret) {
  1627. dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
  1628. goto err;
  1629. }
  1630. ep->index = val;
  1631. ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
  1632. if (ret) {
  1633. dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
  1634. goto err;
  1635. }
  1636. ep->fifo_size = val;
  1637. ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
  1638. if (ret) {
  1639. dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
  1640. goto err;
  1641. }
  1642. ep->nr_banks = val;
  1643. ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
  1644. ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
  1645. ret = of_property_read_string(pp, "name", &name);
  1646. if (ret) {
  1647. dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret);
  1648. goto err;
  1649. }
  1650. ep->ep.name = name;
  1651. ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
  1652. ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
  1653. ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
  1654. ep->ep.ops = &usba_ep_ops;
  1655. usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
  1656. ep->udc = udc;
  1657. INIT_LIST_HEAD(&ep->queue);
  1658. if (ep->index == 0) {
  1659. ep->ep.caps.type_control = true;
  1660. } else {
  1661. ep->ep.caps.type_iso = ep->can_isoc;
  1662. ep->ep.caps.type_bulk = true;
  1663. ep->ep.caps.type_int = true;
  1664. }
  1665. ep->ep.caps.dir_in = true;
  1666. ep->ep.caps.dir_out = true;
  1667. if (i)
  1668. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  1669. i++;
  1670. }
  1671. if (i == 0) {
  1672. dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
  1673. ret = -EINVAL;
  1674. goto err;
  1675. }
  1676. return eps;
  1677. err:
  1678. return ERR_PTR(ret);
  1679. }
  1680. #else
  1681. static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
  1682. struct usba_udc *udc)
  1683. {
  1684. return ERR_PTR(-ENOSYS);
  1685. }
  1686. #endif
  1687. static struct usba_ep * usba_udc_pdata(struct platform_device *pdev,
  1688. struct usba_udc *udc)
  1689. {
  1690. struct usba_platform_data *pdata = dev_get_platdata(&pdev->dev);
  1691. struct usba_ep *eps;
  1692. int i;
  1693. if (!pdata)
  1694. return ERR_PTR(-ENXIO);
  1695. eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * pdata->num_ep,
  1696. GFP_KERNEL);
  1697. if (!eps)
  1698. return ERR_PTR(-ENOMEM);
  1699. udc->gadget.ep0 = &eps[0].ep;
  1700. udc->vbus_pin = pdata->vbus_pin;
  1701. udc->vbus_pin_inverted = pdata->vbus_pin_inverted;
  1702. udc->num_ep = pdata->num_ep;
  1703. INIT_LIST_HEAD(&eps[0].ep.ep_list);
  1704. for (i = 0; i < pdata->num_ep; i++) {
  1705. struct usba_ep *ep = &eps[i];
  1706. ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
  1707. ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
  1708. ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
  1709. ep->ep.ops = &usba_ep_ops;
  1710. ep->ep.name = pdata->ep[i].name;
  1711. ep->fifo_size = pdata->ep[i].fifo_size;
  1712. usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
  1713. ep->udc = udc;
  1714. INIT_LIST_HEAD(&ep->queue);
  1715. ep->nr_banks = pdata->ep[i].nr_banks;
  1716. ep->index = pdata->ep[i].index;
  1717. ep->can_dma = pdata->ep[i].can_dma;
  1718. ep->can_isoc = pdata->ep[i].can_isoc;
  1719. if (i == 0) {
  1720. ep->ep.caps.type_control = true;
  1721. } else {
  1722. ep->ep.caps.type_iso = ep->can_isoc;
  1723. ep->ep.caps.type_bulk = true;
  1724. ep->ep.caps.type_int = true;
  1725. }
  1726. ep->ep.caps.dir_in = true;
  1727. ep->ep.caps.dir_out = true;
  1728. if (i)
  1729. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  1730. }
  1731. return eps;
  1732. }
  1733. static int usba_udc_probe(struct platform_device *pdev)
  1734. {
  1735. struct resource *regs, *fifo;
  1736. struct clk *pclk, *hclk;
  1737. struct usba_udc *udc;
  1738. int irq, ret, i;
  1739. udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
  1740. if (!udc)
  1741. return -ENOMEM;
  1742. udc->gadget = usba_gadget_template;
  1743. INIT_LIST_HEAD(&udc->gadget.ep_list);
  1744. regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
  1745. fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
  1746. if (!regs || !fifo)
  1747. return -ENXIO;
  1748. irq = platform_get_irq(pdev, 0);
  1749. if (irq < 0)
  1750. return irq;
  1751. pclk = devm_clk_get(&pdev->dev, "pclk");
  1752. if (IS_ERR(pclk))
  1753. return PTR_ERR(pclk);
  1754. hclk = devm_clk_get(&pdev->dev, "hclk");
  1755. if (IS_ERR(hclk))
  1756. return PTR_ERR(hclk);
  1757. spin_lock_init(&udc->lock);
  1758. mutex_init(&udc->vbus_mutex);
  1759. udc->pdev = pdev;
  1760. udc->pclk = pclk;
  1761. udc->hclk = hclk;
  1762. udc->vbus_pin = -ENODEV;
  1763. ret = -ENOMEM;
  1764. udc->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
  1765. if (!udc->regs) {
  1766. dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
  1767. return ret;
  1768. }
  1769. dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
  1770. (unsigned long)regs->start, udc->regs);
  1771. udc->fifo = devm_ioremap(&pdev->dev, fifo->start, resource_size(fifo));
  1772. if (!udc->fifo) {
  1773. dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
  1774. return ret;
  1775. }
  1776. dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
  1777. (unsigned long)fifo->start, udc->fifo);
  1778. platform_set_drvdata(pdev, udc);
  1779. /* Make sure we start from a clean slate */
  1780. ret = clk_prepare_enable(pclk);
  1781. if (ret) {
  1782. dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
  1783. return ret;
  1784. }
  1785. usba_writel(udc, CTRL, USBA_DISABLE_MASK);
  1786. clk_disable_unprepare(pclk);
  1787. if (pdev->dev.of_node)
  1788. udc->usba_ep = atmel_udc_of_init(pdev, udc);
  1789. else
  1790. udc->usba_ep = usba_udc_pdata(pdev, udc);
  1791. toggle_bias(udc, 0);
  1792. if (IS_ERR(udc->usba_ep))
  1793. return PTR_ERR(udc->usba_ep);
  1794. ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
  1795. "atmel_usba_udc", udc);
  1796. if (ret) {
  1797. dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
  1798. irq, ret);
  1799. return ret;
  1800. }
  1801. udc->irq = irq;
  1802. if (gpio_is_valid(udc->vbus_pin)) {
  1803. if (!devm_gpio_request(&pdev->dev, udc->vbus_pin, "atmel_usba_udc")) {
  1804. irq_set_status_flags(gpio_to_irq(udc->vbus_pin),
  1805. IRQ_NOAUTOEN);
  1806. ret = devm_request_threaded_irq(&pdev->dev,
  1807. gpio_to_irq(udc->vbus_pin), NULL,
  1808. usba_vbus_irq_thread, IRQF_ONESHOT,
  1809. "atmel_usba_udc", udc);
  1810. if (ret) {
  1811. udc->vbus_pin = -ENODEV;
  1812. dev_warn(&udc->pdev->dev,
  1813. "failed to request vbus irq; "
  1814. "assuming always on\n");
  1815. }
  1816. } else {
  1817. /* gpio_request fail so use -EINVAL for gpio_is_valid */
  1818. udc->vbus_pin = -EINVAL;
  1819. }
  1820. }
  1821. ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
  1822. if (ret)
  1823. return ret;
  1824. device_init_wakeup(&pdev->dev, 1);
  1825. usba_init_debugfs(udc);
  1826. for (i = 1; i < udc->num_ep; i++)
  1827. usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
  1828. return 0;
  1829. }
  1830. static int usba_udc_remove(struct platform_device *pdev)
  1831. {
  1832. struct usba_udc *udc;
  1833. int i;
  1834. udc = platform_get_drvdata(pdev);
  1835. device_init_wakeup(&pdev->dev, 0);
  1836. usb_del_gadget_udc(&udc->gadget);
  1837. for (i = 1; i < udc->num_ep; i++)
  1838. usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
  1839. usba_cleanup_debugfs(udc);
  1840. return 0;
  1841. }
  1842. #ifdef CONFIG_PM_SLEEP
  1843. static int usba_udc_suspend(struct device *dev)
  1844. {
  1845. struct usba_udc *udc = dev_get_drvdata(dev);
  1846. /* Not started */
  1847. if (!udc->driver)
  1848. return 0;
  1849. mutex_lock(&udc->vbus_mutex);
  1850. if (!device_may_wakeup(dev)) {
  1851. usba_stop(udc);
  1852. goto out;
  1853. }
  1854. /*
  1855. * Device may wake up. We stay clocked if we failed
  1856. * to request vbus irq, assuming always on.
  1857. */
  1858. if (gpio_is_valid(udc->vbus_pin)) {
  1859. usba_stop(udc);
  1860. enable_irq_wake(gpio_to_irq(udc->vbus_pin));
  1861. }
  1862. out:
  1863. mutex_unlock(&udc->vbus_mutex);
  1864. return 0;
  1865. }
  1866. static int usba_udc_resume(struct device *dev)
  1867. {
  1868. struct usba_udc *udc = dev_get_drvdata(dev);
  1869. /* Not started */
  1870. if (!udc->driver)
  1871. return 0;
  1872. if (device_may_wakeup(dev) && gpio_is_valid(udc->vbus_pin))
  1873. disable_irq_wake(gpio_to_irq(udc->vbus_pin));
  1874. /* If Vbus is present, enable the controller and wait for reset */
  1875. mutex_lock(&udc->vbus_mutex);
  1876. udc->vbus_prev = vbus_is_present(udc);
  1877. if (udc->vbus_prev)
  1878. usba_start(udc);
  1879. mutex_unlock(&udc->vbus_mutex);
  1880. return 0;
  1881. }
  1882. #endif
  1883. static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
  1884. static struct platform_driver udc_driver = {
  1885. .remove = usba_udc_remove,
  1886. .driver = {
  1887. .name = "atmel_usba_udc",
  1888. .pm = &usba_udc_pm_ops,
  1889. .of_match_table = of_match_ptr(atmel_udc_dt_ids),
  1890. },
  1891. };
  1892. module_platform_driver_probe(udc_driver, usba_udc_probe);
  1893. MODULE_DESCRIPTION("Atmel USBA UDC driver");
  1894. MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
  1895. MODULE_LICENSE("GPL");
  1896. MODULE_ALIAS("platform:atmel_usba_udc");