scif_main.c 9.1 KB

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  1. /*
  2. * Intel MIC Platform Software Stack (MPSS)
  3. *
  4. * Copyright(c) 2014 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License, version 2, as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * Intel SCIF driver.
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/idr.h>
  20. #include <linux/mic_common.h>
  21. #include "../common/mic_dev.h"
  22. #include "../bus/scif_bus.h"
  23. #include "scif_peer_bus.h"
  24. #include "scif_main.h"
  25. #include "scif_map.h"
  26. struct scif_info scif_info = {
  27. .mdev = {
  28. .minor = MISC_DYNAMIC_MINOR,
  29. .name = "scif",
  30. .fops = &scif_fops,
  31. }
  32. };
  33. struct scif_dev *scif_dev;
  34. static atomic_t g_loopb_cnt;
  35. /* Runs in the context of intr_wq */
  36. static void scif_intr_bh_handler(struct work_struct *work)
  37. {
  38. struct scif_dev *scifdev =
  39. container_of(work, struct scif_dev, intr_bh);
  40. if (scifdev_self(scifdev))
  41. scif_loopb_msg_handler(scifdev, scifdev->qpairs);
  42. else
  43. scif_nodeqp_intrhandler(scifdev, scifdev->qpairs);
  44. }
  45. int scif_setup_intr_wq(struct scif_dev *scifdev)
  46. {
  47. if (!scifdev->intr_wq) {
  48. snprintf(scifdev->intr_wqname, sizeof(scifdev->intr_wqname),
  49. "SCIF INTR %d", scifdev->node);
  50. scifdev->intr_wq =
  51. alloc_ordered_workqueue(scifdev->intr_wqname, 0);
  52. if (!scifdev->intr_wq)
  53. return -ENOMEM;
  54. INIT_WORK(&scifdev->intr_bh, scif_intr_bh_handler);
  55. }
  56. return 0;
  57. }
  58. void scif_destroy_intr_wq(struct scif_dev *scifdev)
  59. {
  60. if (scifdev->intr_wq) {
  61. destroy_workqueue(scifdev->intr_wq);
  62. scifdev->intr_wq = NULL;
  63. }
  64. }
  65. irqreturn_t scif_intr_handler(int irq, void *data)
  66. {
  67. struct scif_dev *scifdev = data;
  68. struct scif_hw_dev *sdev = scifdev->sdev;
  69. sdev->hw_ops->ack_interrupt(sdev, scifdev->db);
  70. queue_work(scifdev->intr_wq, &scifdev->intr_bh);
  71. return IRQ_HANDLED;
  72. }
  73. static int scif_peer_probe(struct scif_peer_dev *spdev)
  74. {
  75. struct scif_dev *scifdev = &scif_dev[spdev->dnode];
  76. mutex_lock(&scif_info.conflock);
  77. scif_info.total++;
  78. scif_info.maxid = max_t(u32, spdev->dnode, scif_info.maxid);
  79. mutex_unlock(&scif_info.conflock);
  80. rcu_assign_pointer(scifdev->spdev, spdev);
  81. /* In the future SCIF kernel client devices will be added here */
  82. return 0;
  83. }
  84. static void scif_peer_remove(struct scif_peer_dev *spdev)
  85. {
  86. struct scif_dev *scifdev = &scif_dev[spdev->dnode];
  87. /* In the future SCIF kernel client devices will be removed here */
  88. spdev = rcu_dereference(scifdev->spdev);
  89. if (spdev)
  90. RCU_INIT_POINTER(scifdev->spdev, NULL);
  91. synchronize_rcu();
  92. mutex_lock(&scif_info.conflock);
  93. scif_info.total--;
  94. mutex_unlock(&scif_info.conflock);
  95. }
  96. static void scif_qp_setup_handler(struct work_struct *work)
  97. {
  98. struct scif_dev *scifdev = container_of(work, struct scif_dev,
  99. qp_dwork.work);
  100. struct scif_hw_dev *sdev = scifdev->sdev;
  101. dma_addr_t da = 0;
  102. int err;
  103. if (scif_is_mgmt_node()) {
  104. struct mic_bootparam *bp = sdev->dp;
  105. da = bp->scif_card_dma_addr;
  106. scifdev->rdb = bp->h2c_scif_db;
  107. } else {
  108. struct mic_bootparam __iomem *bp = sdev->rdp;
  109. da = readq(&bp->scif_host_dma_addr);
  110. scifdev->rdb = ioread8(&bp->c2h_scif_db);
  111. }
  112. if (da) {
  113. err = scif_qp_response(da, scifdev);
  114. if (err)
  115. dev_err(&scifdev->sdev->dev,
  116. "scif_qp_response err %d\n", err);
  117. } else {
  118. schedule_delayed_work(&scifdev->qp_dwork,
  119. msecs_to_jiffies(1000));
  120. }
  121. }
  122. static int scif_setup_scifdev(struct scif_hw_dev *sdev)
  123. {
  124. int i;
  125. u8 num_nodes;
  126. if (sdev->snode) {
  127. struct mic_bootparam __iomem *bp = sdev->rdp;
  128. num_nodes = ioread8(&bp->tot_nodes);
  129. } else {
  130. struct mic_bootparam *bp = sdev->dp;
  131. num_nodes = bp->tot_nodes;
  132. }
  133. scif_dev = kcalloc(num_nodes, sizeof(*scif_dev), GFP_KERNEL);
  134. if (!scif_dev)
  135. return -ENOMEM;
  136. for (i = 0; i < num_nodes; i++) {
  137. struct scif_dev *scifdev = &scif_dev[i];
  138. scifdev->node = i;
  139. scifdev->exit = OP_IDLE;
  140. init_waitqueue_head(&scifdev->disconn_wq);
  141. mutex_init(&scifdev->lock);
  142. INIT_WORK(&scifdev->init_msg_work, scif_qp_response_ack);
  143. INIT_DELAYED_WORK(&scifdev->p2p_dwork,
  144. scif_poll_qp_state);
  145. INIT_DELAYED_WORK(&scifdev->qp_dwork,
  146. scif_qp_setup_handler);
  147. INIT_LIST_HEAD(&scifdev->p2p);
  148. RCU_INIT_POINTER(scifdev->spdev, NULL);
  149. }
  150. return 0;
  151. }
  152. static void scif_destroy_scifdev(void)
  153. {
  154. kfree(scif_dev);
  155. }
  156. static int scif_probe(struct scif_hw_dev *sdev)
  157. {
  158. struct scif_dev *scifdev;
  159. int rc;
  160. dev_set_drvdata(&sdev->dev, sdev);
  161. if (1 == atomic_add_return(1, &g_loopb_cnt)) {
  162. struct scif_dev *loopb_dev;
  163. rc = scif_setup_scifdev(sdev);
  164. if (rc)
  165. goto exit;
  166. scifdev = &scif_dev[sdev->dnode];
  167. scifdev->sdev = sdev;
  168. loopb_dev = &scif_dev[sdev->snode];
  169. loopb_dev->sdev = sdev;
  170. rc = scif_setup_loopback_qp(loopb_dev);
  171. if (rc)
  172. goto free_sdev;
  173. } else {
  174. scifdev = &scif_dev[sdev->dnode];
  175. scifdev->sdev = sdev;
  176. }
  177. rc = scif_setup_intr_wq(scifdev);
  178. if (rc)
  179. goto destroy_loopb;
  180. rc = scif_setup_qp(scifdev);
  181. if (rc)
  182. goto destroy_intr;
  183. scifdev->db = sdev->hw_ops->next_db(sdev);
  184. scifdev->cookie = sdev->hw_ops->request_irq(sdev, scif_intr_handler,
  185. "SCIF_INTR", scifdev,
  186. scifdev->db);
  187. if (IS_ERR(scifdev->cookie)) {
  188. rc = PTR_ERR(scifdev->cookie);
  189. goto free_qp;
  190. }
  191. if (scif_is_mgmt_node()) {
  192. struct mic_bootparam *bp = sdev->dp;
  193. bp->c2h_scif_db = scifdev->db;
  194. bp->scif_host_dma_addr = scifdev->qp_dma_addr;
  195. } else {
  196. struct mic_bootparam __iomem *bp = sdev->rdp;
  197. iowrite8(scifdev->db, &bp->h2c_scif_db);
  198. writeq(scifdev->qp_dma_addr, &bp->scif_card_dma_addr);
  199. }
  200. schedule_delayed_work(&scifdev->qp_dwork,
  201. msecs_to_jiffies(1000));
  202. return rc;
  203. free_qp:
  204. scif_free_qp(scifdev);
  205. destroy_intr:
  206. scif_destroy_intr_wq(scifdev);
  207. destroy_loopb:
  208. if (atomic_dec_and_test(&g_loopb_cnt))
  209. scif_destroy_loopback_qp(&scif_dev[sdev->snode]);
  210. free_sdev:
  211. scif_destroy_scifdev();
  212. exit:
  213. return rc;
  214. }
  215. void scif_stop(struct scif_dev *scifdev)
  216. {
  217. struct scif_dev *dev;
  218. int i;
  219. for (i = scif_info.maxid; i >= 0; i--) {
  220. dev = &scif_dev[i];
  221. if (scifdev_self(dev))
  222. continue;
  223. scif_handle_remove_node(i);
  224. }
  225. }
  226. static void scif_remove(struct scif_hw_dev *sdev)
  227. {
  228. struct scif_dev *scifdev = &scif_dev[sdev->dnode];
  229. if (scif_is_mgmt_node()) {
  230. struct mic_bootparam *bp = sdev->dp;
  231. bp->c2h_scif_db = -1;
  232. bp->scif_host_dma_addr = 0x0;
  233. } else {
  234. struct mic_bootparam __iomem *bp = sdev->rdp;
  235. iowrite8(-1, &bp->h2c_scif_db);
  236. writeq(0x0, &bp->scif_card_dma_addr);
  237. }
  238. if (scif_is_mgmt_node()) {
  239. scif_disconnect_node(scifdev->node, true);
  240. } else {
  241. scif_info.card_initiated_exit = true;
  242. scif_stop(scifdev);
  243. }
  244. if (atomic_dec_and_test(&g_loopb_cnt))
  245. scif_destroy_loopback_qp(&scif_dev[sdev->snode]);
  246. if (scifdev->cookie) {
  247. sdev->hw_ops->free_irq(sdev, scifdev->cookie, scifdev);
  248. scifdev->cookie = NULL;
  249. }
  250. scif_destroy_intr_wq(scifdev);
  251. cancel_delayed_work(&scifdev->qp_dwork);
  252. scif_free_qp(scifdev);
  253. scifdev->rdb = -1;
  254. scifdev->sdev = NULL;
  255. }
  256. static struct scif_peer_driver scif_peer_driver = {
  257. .driver.name = KBUILD_MODNAME,
  258. .driver.owner = THIS_MODULE,
  259. .probe = scif_peer_probe,
  260. .remove = scif_peer_remove,
  261. };
  262. static struct scif_hw_dev_id id_table[] = {
  263. { MIC_SCIF_DEV, SCIF_DEV_ANY_ID },
  264. { 0 },
  265. };
  266. static struct scif_driver scif_driver = {
  267. .driver.name = KBUILD_MODNAME,
  268. .driver.owner = THIS_MODULE,
  269. .id_table = id_table,
  270. .probe = scif_probe,
  271. .remove = scif_remove,
  272. };
  273. static int _scif_init(void)
  274. {
  275. spin_lock_init(&scif_info.eplock);
  276. spin_lock_init(&scif_info.nb_connect_lock);
  277. spin_lock_init(&scif_info.port_lock);
  278. mutex_init(&scif_info.conflock);
  279. mutex_init(&scif_info.connlock);
  280. INIT_LIST_HEAD(&scif_info.uaccept);
  281. INIT_LIST_HEAD(&scif_info.listen);
  282. INIT_LIST_HEAD(&scif_info.zombie);
  283. INIT_LIST_HEAD(&scif_info.connected);
  284. INIT_LIST_HEAD(&scif_info.disconnected);
  285. INIT_LIST_HEAD(&scif_info.nb_connect_list);
  286. init_waitqueue_head(&scif_info.exitwq);
  287. scif_info.en_msg_log = 0;
  288. scif_info.p2p_enable = 1;
  289. INIT_WORK(&scif_info.misc_work, scif_misc_handler);
  290. INIT_WORK(&scif_info.conn_work, scif_conn_handler);
  291. idr_init(&scif_ports);
  292. return 0;
  293. }
  294. static void _scif_exit(void)
  295. {
  296. idr_destroy(&scif_ports);
  297. scif_destroy_scifdev();
  298. }
  299. static int __init scif_init(void)
  300. {
  301. struct miscdevice *mdev = &scif_info.mdev;
  302. int rc;
  303. _scif_init();
  304. rc = scif_peer_bus_init();
  305. if (rc)
  306. goto exit;
  307. rc = scif_peer_register_driver(&scif_peer_driver);
  308. if (rc)
  309. goto peer_bus_exit;
  310. rc = scif_register_driver(&scif_driver);
  311. if (rc)
  312. goto unreg_scif_peer;
  313. rc = misc_register(mdev);
  314. if (rc)
  315. goto unreg_scif;
  316. scif_init_debugfs();
  317. return 0;
  318. unreg_scif:
  319. scif_unregister_driver(&scif_driver);
  320. unreg_scif_peer:
  321. scif_peer_unregister_driver(&scif_peer_driver);
  322. peer_bus_exit:
  323. scif_peer_bus_exit();
  324. exit:
  325. _scif_exit();
  326. return rc;
  327. }
  328. static void __exit scif_exit(void)
  329. {
  330. scif_exit_debugfs();
  331. misc_deregister(&scif_info.mdev);
  332. scif_unregister_driver(&scif_driver);
  333. scif_peer_unregister_driver(&scif_peer_driver);
  334. scif_peer_bus_exit();
  335. _scif_exit();
  336. }
  337. module_init(scif_init);
  338. module_exit(scif_exit);
  339. MODULE_DEVICE_TABLE(scif, id_table);
  340. MODULE_AUTHOR("Intel Corporation");
  341. MODULE_DESCRIPTION("Intel(R) SCIF driver");
  342. MODULE_LICENSE("GPL v2");