Kconfig 3.6 KB

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  1. #
  2. # Memory devices
  3. #
  4. menuconfig MEMORY
  5. bool "Memory Controller drivers"
  6. if MEMORY
  7. config ARM_PL172_MPMC
  8. tristate "ARM PL172 MPMC driver"
  9. depends on ARM_AMBA && OF
  10. help
  11. This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
  12. If you have an embedded system with an AMBA bus and a PL172
  13. controller, say Y or M here.
  14. config ATMEL_SDRAMC
  15. bool "Atmel (Multi-port DDR-)SDRAM Controller"
  16. default y
  17. depends on ARCH_AT91 && OF
  18. help
  19. This driver is for Atmel SDRAM Controller or Atmel Multi-port
  20. DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
  21. Starting with the at91sam9g45, this controller supports SDR, DDR and
  22. LP-DDR memories.
  23. config TI_AEMIF
  24. tristate "Texas Instruments AEMIF driver"
  25. depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
  26. help
  27. This driver is for the AEMIF module available in Texas Instruments
  28. SoCs. AEMIF stands for Asynchronous External Memory Interface and
  29. is intended to provide a glue-less interface to a variety of
  30. asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
  31. of 256M bytes of any of these memories can be accessed at a given
  32. time via four chip selects with 64M byte access per chip select.
  33. config TI_EMIF
  34. tristate "Texas Instruments EMIF driver"
  35. depends on ARCH_OMAP2PLUS
  36. select DDR
  37. help
  38. This driver is for the EMIF module available in Texas Instruments
  39. SoCs. EMIF is an SDRAM controller that, based on its revision,
  40. supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
  41. This driver takes care of only LPDDR2 memories presently. The
  42. functions of the driver includes re-configuring AC timing
  43. parameters and other settings during frequency, voltage and
  44. temperature changes
  45. config OMAP_GPMC
  46. bool
  47. help
  48. This driver is for the General Purpose Memory Controller (GPMC)
  49. present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
  50. interfacing to a variety of asynchronous as well as synchronous
  51. memory drives like NOR, NAND, OneNAND, SRAM.
  52. config OMAP_GPMC_DEBUG
  53. bool
  54. depends on OMAP_GPMC
  55. help
  56. Enables verbose debugging mostly to decode the bootloader provided
  57. timings. Enable this during development to configure devices
  58. connected to the GPMC bus.
  59. config MVEBU_DEVBUS
  60. bool "Marvell EBU Device Bus Controller"
  61. default y
  62. depends on PLAT_ORION && OF
  63. help
  64. This driver is for the Device Bus controller available in some
  65. Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
  66. Armada 370 and Armada XP. This controller allows to handle flash
  67. devices such as NOR, NAND, SRAM, and FPGA.
  68. config TEGRA20_MC
  69. bool "Tegra20 Memory Controller(MC) driver"
  70. default y
  71. depends on ARCH_TEGRA_2x_SOC
  72. help
  73. This driver is for the Memory Controller(MC) module available
  74. in Tegra20 SoCs, mainly for a address translation fault
  75. analysis, especially for IOMMU/GART(Graphics Address
  76. Relocation Table) module.
  77. config FSL_CORENET_CF
  78. tristate "Freescale CoreNet Error Reporting"
  79. depends on FSL_SOC_BOOKE
  80. help
  81. Say Y for reporting of errors from the Freescale CoreNet
  82. Coherency Fabric. Errors reported include accesses to
  83. physical addresses that mapped by no local access window
  84. (LAW) or an invalid LAW, as well as bad cache state that
  85. represents a coherency violation.
  86. config FSL_IFC
  87. bool
  88. depends on FSL_SOC
  89. config JZ4780_NEMC
  90. bool "Ingenic JZ4780 SoC NEMC driver"
  91. default y
  92. depends on MACH_JZ4780
  93. help
  94. This driver is for the NAND/External Memory Controller (NEMC) in
  95. the Ingenic JZ4780. This controller is used to handle external
  96. memory devices such as NAND and SRAM.
  97. source "drivers/memory/tegra/Kconfig"
  98. endif