mr.c 12 KB

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  1. /*
  2. * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/slab.h>
  34. #include "mlx4_ib.h"
  35. static u32 convert_access(int acc)
  36. {
  37. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX4_PERM_ATOMIC : 0) |
  38. (acc & IB_ACCESS_REMOTE_WRITE ? MLX4_PERM_REMOTE_WRITE : 0) |
  39. (acc & IB_ACCESS_REMOTE_READ ? MLX4_PERM_REMOTE_READ : 0) |
  40. (acc & IB_ACCESS_LOCAL_WRITE ? MLX4_PERM_LOCAL_WRITE : 0) |
  41. (acc & IB_ACCESS_MW_BIND ? MLX4_PERM_BIND_MW : 0) |
  42. MLX4_PERM_LOCAL_READ;
  43. }
  44. static enum mlx4_mw_type to_mlx4_type(enum ib_mw_type type)
  45. {
  46. switch (type) {
  47. case IB_MW_TYPE_1: return MLX4_MW_TYPE_1;
  48. case IB_MW_TYPE_2: return MLX4_MW_TYPE_2;
  49. default: return -1;
  50. }
  51. }
  52. struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc)
  53. {
  54. struct mlx4_ib_mr *mr;
  55. int err;
  56. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  57. if (!mr)
  58. return ERR_PTR(-ENOMEM);
  59. err = mlx4_mr_alloc(to_mdev(pd->device)->dev, to_mpd(pd)->pdn, 0,
  60. ~0ull, convert_access(acc), 0, 0, &mr->mmr);
  61. if (err)
  62. goto err_free;
  63. err = mlx4_mr_enable(to_mdev(pd->device)->dev, &mr->mmr);
  64. if (err)
  65. goto err_mr;
  66. mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
  67. mr->umem = NULL;
  68. return &mr->ibmr;
  69. err_mr:
  70. (void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr);
  71. err_free:
  72. kfree(mr);
  73. return ERR_PTR(err);
  74. }
  75. int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
  76. struct ib_umem *umem)
  77. {
  78. u64 *pages;
  79. int i, k, entry;
  80. int n;
  81. int len;
  82. int err = 0;
  83. struct scatterlist *sg;
  84. pages = (u64 *) __get_free_page(GFP_KERNEL);
  85. if (!pages)
  86. return -ENOMEM;
  87. i = n = 0;
  88. for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
  89. len = sg_dma_len(sg) >> mtt->page_shift;
  90. for (k = 0; k < len; ++k) {
  91. pages[i++] = sg_dma_address(sg) +
  92. umem->page_size * k;
  93. /*
  94. * Be friendly to mlx4_write_mtt() and
  95. * pass it chunks of appropriate size.
  96. */
  97. if (i == PAGE_SIZE / sizeof (u64)) {
  98. err = mlx4_write_mtt(dev->dev, mtt, n,
  99. i, pages);
  100. if (err)
  101. goto out;
  102. n += i;
  103. i = 0;
  104. }
  105. }
  106. }
  107. if (i)
  108. err = mlx4_write_mtt(dev->dev, mtt, n, i, pages);
  109. out:
  110. free_page((unsigned long) pages);
  111. return err;
  112. }
  113. struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  114. u64 virt_addr, int access_flags,
  115. struct ib_udata *udata)
  116. {
  117. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  118. struct mlx4_ib_mr *mr;
  119. int shift;
  120. int err;
  121. int n;
  122. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  123. if (!mr)
  124. return ERR_PTR(-ENOMEM);
  125. /* Force registering the memory as writable. */
  126. /* Used for memory re-registeration. HCA protects the access */
  127. mr->umem = ib_umem_get(pd->uobject->context, start, length,
  128. access_flags | IB_ACCESS_LOCAL_WRITE, 0);
  129. if (IS_ERR(mr->umem)) {
  130. err = PTR_ERR(mr->umem);
  131. goto err_free;
  132. }
  133. n = ib_umem_page_count(mr->umem);
  134. shift = ilog2(mr->umem->page_size);
  135. err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, virt_addr, length,
  136. convert_access(access_flags), n, shift, &mr->mmr);
  137. if (err)
  138. goto err_umem;
  139. err = mlx4_ib_umem_write_mtt(dev, &mr->mmr.mtt, mr->umem);
  140. if (err)
  141. goto err_mr;
  142. err = mlx4_mr_enable(dev->dev, &mr->mmr);
  143. if (err)
  144. goto err_mr;
  145. mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
  146. return &mr->ibmr;
  147. err_mr:
  148. (void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr);
  149. err_umem:
  150. ib_umem_release(mr->umem);
  151. err_free:
  152. kfree(mr);
  153. return ERR_PTR(err);
  154. }
  155. int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,
  156. u64 start, u64 length, u64 virt_addr,
  157. int mr_access_flags, struct ib_pd *pd,
  158. struct ib_udata *udata)
  159. {
  160. struct mlx4_ib_dev *dev = to_mdev(mr->device);
  161. struct mlx4_ib_mr *mmr = to_mmr(mr);
  162. struct mlx4_mpt_entry *mpt_entry;
  163. struct mlx4_mpt_entry **pmpt_entry = &mpt_entry;
  164. int err;
  165. /* Since we synchronize this call and mlx4_ib_dereg_mr via uverbs,
  166. * we assume that the calls can't run concurrently. Otherwise, a
  167. * race exists.
  168. */
  169. err = mlx4_mr_hw_get_mpt(dev->dev, &mmr->mmr, &pmpt_entry);
  170. if (err)
  171. return err;
  172. if (flags & IB_MR_REREG_PD) {
  173. err = mlx4_mr_hw_change_pd(dev->dev, *pmpt_entry,
  174. to_mpd(pd)->pdn);
  175. if (err)
  176. goto release_mpt_entry;
  177. }
  178. if (flags & IB_MR_REREG_ACCESS) {
  179. err = mlx4_mr_hw_change_access(dev->dev, *pmpt_entry,
  180. convert_access(mr_access_flags));
  181. if (err)
  182. goto release_mpt_entry;
  183. }
  184. if (flags & IB_MR_REREG_TRANS) {
  185. int shift;
  186. int n;
  187. mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr);
  188. ib_umem_release(mmr->umem);
  189. mmr->umem = ib_umem_get(mr->uobject->context, start, length,
  190. mr_access_flags |
  191. IB_ACCESS_LOCAL_WRITE,
  192. 0);
  193. if (IS_ERR(mmr->umem)) {
  194. err = PTR_ERR(mmr->umem);
  195. /* Prevent mlx4_ib_dereg_mr from free'ing invalid pointer */
  196. mmr->umem = NULL;
  197. goto release_mpt_entry;
  198. }
  199. n = ib_umem_page_count(mmr->umem);
  200. shift = ilog2(mmr->umem->page_size);
  201. err = mlx4_mr_rereg_mem_write(dev->dev, &mmr->mmr,
  202. virt_addr, length, n, shift,
  203. *pmpt_entry);
  204. if (err) {
  205. ib_umem_release(mmr->umem);
  206. goto release_mpt_entry;
  207. }
  208. mmr->mmr.iova = virt_addr;
  209. mmr->mmr.size = length;
  210. err = mlx4_ib_umem_write_mtt(dev, &mmr->mmr.mtt, mmr->umem);
  211. if (err) {
  212. mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr);
  213. ib_umem_release(mmr->umem);
  214. goto release_mpt_entry;
  215. }
  216. }
  217. /* If we couldn't transfer the MR to the HCA, just remember to
  218. * return a failure. But dereg_mr will free the resources.
  219. */
  220. err = mlx4_mr_hw_write_mpt(dev->dev, &mmr->mmr, pmpt_entry);
  221. if (!err && flags & IB_MR_REREG_ACCESS)
  222. mmr->mmr.access = mr_access_flags;
  223. release_mpt_entry:
  224. mlx4_mr_hw_put_mpt(dev->dev, pmpt_entry);
  225. return err;
  226. }
  227. int mlx4_ib_dereg_mr(struct ib_mr *ibmr)
  228. {
  229. struct mlx4_ib_mr *mr = to_mmr(ibmr);
  230. int ret;
  231. ret = mlx4_mr_free(to_mdev(ibmr->device)->dev, &mr->mmr);
  232. if (ret)
  233. return ret;
  234. if (mr->umem)
  235. ib_umem_release(mr->umem);
  236. kfree(mr);
  237. return 0;
  238. }
  239. struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type)
  240. {
  241. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  242. struct mlx4_ib_mw *mw;
  243. int err;
  244. mw = kmalloc(sizeof(*mw), GFP_KERNEL);
  245. if (!mw)
  246. return ERR_PTR(-ENOMEM);
  247. err = mlx4_mw_alloc(dev->dev, to_mpd(pd)->pdn,
  248. to_mlx4_type(type), &mw->mmw);
  249. if (err)
  250. goto err_free;
  251. err = mlx4_mw_enable(dev->dev, &mw->mmw);
  252. if (err)
  253. goto err_mw;
  254. mw->ibmw.rkey = mw->mmw.key;
  255. return &mw->ibmw;
  256. err_mw:
  257. mlx4_mw_free(dev->dev, &mw->mmw);
  258. err_free:
  259. kfree(mw);
  260. return ERR_PTR(err);
  261. }
  262. int mlx4_ib_bind_mw(struct ib_qp *qp, struct ib_mw *mw,
  263. struct ib_mw_bind *mw_bind)
  264. {
  265. struct ib_send_wr wr;
  266. struct ib_send_wr *bad_wr;
  267. int ret;
  268. memset(&wr, 0, sizeof(wr));
  269. wr.opcode = IB_WR_BIND_MW;
  270. wr.wr_id = mw_bind->wr_id;
  271. wr.send_flags = mw_bind->send_flags;
  272. wr.wr.bind_mw.mw = mw;
  273. wr.wr.bind_mw.bind_info = mw_bind->bind_info;
  274. wr.wr.bind_mw.rkey = ib_inc_rkey(mw->rkey);
  275. ret = mlx4_ib_post_send(qp, &wr, &bad_wr);
  276. if (!ret)
  277. mw->rkey = wr.wr.bind_mw.rkey;
  278. return ret;
  279. }
  280. int mlx4_ib_dealloc_mw(struct ib_mw *ibmw)
  281. {
  282. struct mlx4_ib_mw *mw = to_mmw(ibmw);
  283. mlx4_mw_free(to_mdev(ibmw->device)->dev, &mw->mmw);
  284. kfree(mw);
  285. return 0;
  286. }
  287. struct ib_mr *mlx4_ib_alloc_mr(struct ib_pd *pd,
  288. enum ib_mr_type mr_type,
  289. u32 max_num_sg)
  290. {
  291. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  292. struct mlx4_ib_mr *mr;
  293. int err;
  294. if (mr_type != IB_MR_TYPE_MEM_REG ||
  295. max_num_sg > MLX4_MAX_FAST_REG_PAGES)
  296. return ERR_PTR(-EINVAL);
  297. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  298. if (!mr)
  299. return ERR_PTR(-ENOMEM);
  300. err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, 0, 0, 0,
  301. max_num_sg, 0, &mr->mmr);
  302. if (err)
  303. goto err_free;
  304. err = mlx4_mr_enable(dev->dev, &mr->mmr);
  305. if (err)
  306. goto err_mr;
  307. mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
  308. mr->umem = NULL;
  309. return &mr->ibmr;
  310. err_mr:
  311. (void) mlx4_mr_free(dev->dev, &mr->mmr);
  312. err_free:
  313. kfree(mr);
  314. return ERR_PTR(err);
  315. }
  316. struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
  317. int page_list_len)
  318. {
  319. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  320. struct mlx4_ib_fast_reg_page_list *mfrpl;
  321. int size = page_list_len * sizeof (u64);
  322. if (page_list_len > MLX4_MAX_FAST_REG_PAGES)
  323. return ERR_PTR(-EINVAL);
  324. mfrpl = kmalloc(sizeof *mfrpl, GFP_KERNEL);
  325. if (!mfrpl)
  326. return ERR_PTR(-ENOMEM);
  327. mfrpl->ibfrpl.page_list = kmalloc(size, GFP_KERNEL);
  328. if (!mfrpl->ibfrpl.page_list)
  329. goto err_free;
  330. mfrpl->mapped_page_list = dma_alloc_coherent(&dev->dev->persist->
  331. pdev->dev,
  332. size, &mfrpl->map,
  333. GFP_KERNEL);
  334. if (!mfrpl->mapped_page_list)
  335. goto err_free;
  336. WARN_ON(mfrpl->map & 0x3f);
  337. return &mfrpl->ibfrpl;
  338. err_free:
  339. kfree(mfrpl->ibfrpl.page_list);
  340. kfree(mfrpl);
  341. return ERR_PTR(-ENOMEM);
  342. }
  343. void mlx4_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list)
  344. {
  345. struct mlx4_ib_dev *dev = to_mdev(page_list->device);
  346. struct mlx4_ib_fast_reg_page_list *mfrpl = to_mfrpl(page_list);
  347. int size = page_list->max_page_list_len * sizeof (u64);
  348. dma_free_coherent(&dev->dev->persist->pdev->dev, size,
  349. mfrpl->mapped_page_list,
  350. mfrpl->map);
  351. kfree(mfrpl->ibfrpl.page_list);
  352. kfree(mfrpl);
  353. }
  354. struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int acc,
  355. struct ib_fmr_attr *fmr_attr)
  356. {
  357. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  358. struct mlx4_ib_fmr *fmr;
  359. int err = -ENOMEM;
  360. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  361. if (!fmr)
  362. return ERR_PTR(-ENOMEM);
  363. err = mlx4_fmr_alloc(dev->dev, to_mpd(pd)->pdn, convert_access(acc),
  364. fmr_attr->max_pages, fmr_attr->max_maps,
  365. fmr_attr->page_shift, &fmr->mfmr);
  366. if (err)
  367. goto err_free;
  368. err = mlx4_fmr_enable(to_mdev(pd->device)->dev, &fmr->mfmr);
  369. if (err)
  370. goto err_mr;
  371. fmr->ibfmr.rkey = fmr->ibfmr.lkey = fmr->mfmr.mr.key;
  372. return &fmr->ibfmr;
  373. err_mr:
  374. (void) mlx4_mr_free(to_mdev(pd->device)->dev, &fmr->mfmr.mr);
  375. err_free:
  376. kfree(fmr);
  377. return ERR_PTR(err);
  378. }
  379. int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  380. int npages, u64 iova)
  381. {
  382. struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
  383. struct mlx4_ib_dev *dev = to_mdev(ifmr->ibfmr.device);
  384. return mlx4_map_phys_fmr(dev->dev, &ifmr->mfmr, page_list, npages, iova,
  385. &ifmr->ibfmr.lkey, &ifmr->ibfmr.rkey);
  386. }
  387. int mlx4_ib_unmap_fmr(struct list_head *fmr_list)
  388. {
  389. struct ib_fmr *ibfmr;
  390. int err;
  391. struct mlx4_dev *mdev = NULL;
  392. list_for_each_entry(ibfmr, fmr_list, list) {
  393. if (mdev && to_mdev(ibfmr->device)->dev != mdev)
  394. return -EINVAL;
  395. mdev = to_mdev(ibfmr->device)->dev;
  396. }
  397. if (!mdev)
  398. return 0;
  399. list_for_each_entry(ibfmr, fmr_list, list) {
  400. struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
  401. mlx4_fmr_unmap(mdev, &ifmr->mfmr, &ifmr->ibfmr.lkey, &ifmr->ibfmr.rkey);
  402. }
  403. /*
  404. * Make sure all MPT status updates are visible before issuing
  405. * SYNC_TPT firmware command.
  406. */
  407. wmb();
  408. err = mlx4_SYNC_TPT(mdev);
  409. if (err)
  410. pr_warn("SYNC_TPT error %d when "
  411. "unmapping FMRs\n", err);
  412. return 0;
  413. }
  414. int mlx4_ib_fmr_dealloc(struct ib_fmr *ibfmr)
  415. {
  416. struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
  417. struct mlx4_ib_dev *dev = to_mdev(ibfmr->device);
  418. int err;
  419. err = mlx4_fmr_free(dev->dev, &ifmr->mfmr);
  420. if (!err)
  421. kfree(ifmr);
  422. return err;
  423. }