ti_am335x_adc.c 15 KB

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  1. /*
  2. * TI ADC MFD driver
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/err.h>
  17. #include <linux/module.h>
  18. #include <linux/slab.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/iio/iio.h>
  23. #include <linux/of.h>
  24. #include <linux/of_device.h>
  25. #include <linux/iio/machine.h>
  26. #include <linux/iio/driver.h>
  27. #include <linux/mfd/ti_am335x_tscadc.h>
  28. #include <linux/iio/buffer.h>
  29. #include <linux/iio/kfifo_buf.h>
  30. struct tiadc_device {
  31. struct ti_tscadc_dev *mfd_tscadc;
  32. int channels;
  33. u8 channel_line[8];
  34. u8 channel_step[8];
  35. int buffer_en_ch_steps;
  36. u16 data[8];
  37. u32 open_delay[8], sample_delay[8], step_avg[8];
  38. };
  39. static unsigned int tiadc_readl(struct tiadc_device *adc, unsigned int reg)
  40. {
  41. return readl(adc->mfd_tscadc->tscadc_base + reg);
  42. }
  43. static void tiadc_writel(struct tiadc_device *adc, unsigned int reg,
  44. unsigned int val)
  45. {
  46. writel(val, adc->mfd_tscadc->tscadc_base + reg);
  47. }
  48. static u32 get_adc_step_mask(struct tiadc_device *adc_dev)
  49. {
  50. u32 step_en;
  51. step_en = ((1 << adc_dev->channels) - 1);
  52. step_en <<= TOTAL_STEPS - adc_dev->channels + 1;
  53. return step_en;
  54. }
  55. static u32 get_adc_chan_step_mask(struct tiadc_device *adc_dev,
  56. struct iio_chan_spec const *chan)
  57. {
  58. int i;
  59. for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) {
  60. if (chan->channel == adc_dev->channel_line[i]) {
  61. u32 step;
  62. step = adc_dev->channel_step[i];
  63. /* +1 for the charger */
  64. return 1 << (step + 1);
  65. }
  66. }
  67. WARN_ON(1);
  68. return 0;
  69. }
  70. static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan)
  71. {
  72. return 1 << adc_dev->channel_step[chan];
  73. }
  74. static void tiadc_step_config(struct iio_dev *indio_dev)
  75. {
  76. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  77. struct device *dev = adc_dev->mfd_tscadc->dev;
  78. unsigned int stepconfig;
  79. int i, steps = 0;
  80. /*
  81. * There are 16 configurable steps and 8 analog input
  82. * lines available which are shared between Touchscreen and ADC.
  83. *
  84. * Steps forwards i.e. from 0 towards 16 are used by ADC
  85. * depending on number of input lines needed.
  86. * Channel would represent which analog input
  87. * needs to be given to ADC to digitalize data.
  88. */
  89. for (i = 0; i < adc_dev->channels; i++) {
  90. int chan;
  91. chan = adc_dev->channel_line[i];
  92. if (adc_dev->step_avg[i] > STEPCONFIG_AVG_16) {
  93. dev_warn(dev, "chan %d step_avg truncating to %d\n",
  94. chan, STEPCONFIG_AVG_16);
  95. adc_dev->step_avg[i] = STEPCONFIG_AVG_16;
  96. }
  97. if (adc_dev->step_avg[i])
  98. stepconfig =
  99. STEPCONFIG_AVG(ffs(adc_dev->step_avg[i]) - 1) |
  100. STEPCONFIG_FIFO1;
  101. else
  102. stepconfig = STEPCONFIG_FIFO1;
  103. if (iio_buffer_enabled(indio_dev))
  104. stepconfig |= STEPCONFIG_MODE_SWCNT;
  105. tiadc_writel(adc_dev, REG_STEPCONFIG(steps),
  106. stepconfig | STEPCONFIG_INP(chan));
  107. if (adc_dev->open_delay[i] > STEPDELAY_OPEN_MASK) {
  108. dev_warn(dev, "chan %d open delay truncating to 0x3FFFF\n",
  109. chan);
  110. adc_dev->open_delay[i] = STEPDELAY_OPEN_MASK;
  111. }
  112. if (adc_dev->sample_delay[i] > 0xFF) {
  113. dev_warn(dev, "chan %d sample delay truncating to 0xFF\n",
  114. chan);
  115. adc_dev->sample_delay[i] = 0xFF;
  116. }
  117. tiadc_writel(adc_dev, REG_STEPDELAY(steps),
  118. STEPDELAY_OPEN(adc_dev->open_delay[i]) |
  119. STEPDELAY_SAMPLE(adc_dev->sample_delay[i]));
  120. adc_dev->channel_step[i] = steps;
  121. steps++;
  122. }
  123. }
  124. static irqreturn_t tiadc_irq_h(int irq, void *private)
  125. {
  126. struct iio_dev *indio_dev = private;
  127. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  128. unsigned int status, config;
  129. status = tiadc_readl(adc_dev, REG_IRQSTATUS);
  130. /*
  131. * ADC and touchscreen share the IRQ line.
  132. * FIFO0 interrupts are used by TSC. Handle FIFO1 IRQs here only
  133. */
  134. if (status & IRQENB_FIFO1OVRRUN) {
  135. /* FIFO Overrun. Clear flag. Disable/Enable ADC to recover */
  136. config = tiadc_readl(adc_dev, REG_CTRL);
  137. config &= ~(CNTRLREG_TSCSSENB);
  138. tiadc_writel(adc_dev, REG_CTRL, config);
  139. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN
  140. | IRQENB_FIFO1UNDRFLW | IRQENB_FIFO1THRES);
  141. tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB));
  142. return IRQ_HANDLED;
  143. } else if (status & IRQENB_FIFO1THRES) {
  144. /* Disable irq and wake worker thread */
  145. tiadc_writel(adc_dev, REG_IRQCLR, IRQENB_FIFO1THRES);
  146. return IRQ_WAKE_THREAD;
  147. }
  148. return IRQ_NONE;
  149. }
  150. static irqreturn_t tiadc_worker_h(int irq, void *private)
  151. {
  152. struct iio_dev *indio_dev = private;
  153. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  154. int i, k, fifo1count, read;
  155. u16 *data = adc_dev->data;
  156. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  157. for (k = 0; k < fifo1count; k = k + i) {
  158. for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
  159. read = tiadc_readl(adc_dev, REG_FIFO1);
  160. data[i] = read & FIFOREAD_DATA_MASK;
  161. }
  162. iio_push_to_buffers(indio_dev, (u8 *) data);
  163. }
  164. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES);
  165. tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES);
  166. return IRQ_HANDLED;
  167. }
  168. static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
  169. {
  170. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  171. int i, fifo1count, read;
  172. tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
  173. IRQENB_FIFO1OVRRUN |
  174. IRQENB_FIFO1UNDRFLW));
  175. /* Flush FIFO. Needed in corner cases in simultaneous tsc/adc use */
  176. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  177. for (i = 0; i < fifo1count; i++)
  178. read = tiadc_readl(adc_dev, REG_FIFO1);
  179. return 0;
  180. }
  181. static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
  182. {
  183. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  184. unsigned int enb = 0;
  185. u8 bit;
  186. tiadc_step_config(indio_dev);
  187. for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels)
  188. enb |= (get_adc_step_bit(adc_dev, bit) << 1);
  189. adc_dev->buffer_en_ch_steps = enb;
  190. am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
  191. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
  192. | IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
  193. tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES
  194. | IRQENB_FIFO1OVRRUN);
  195. return 0;
  196. }
  197. static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
  198. {
  199. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  200. int fifo1count, i, read;
  201. tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
  202. IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
  203. am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
  204. adc_dev->buffer_en_ch_steps = 0;
  205. /* Flush FIFO of leftover data in the time it takes to disable adc */
  206. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  207. for (i = 0; i < fifo1count; i++)
  208. read = tiadc_readl(adc_dev, REG_FIFO1);
  209. return 0;
  210. }
  211. static int tiadc_buffer_postdisable(struct iio_dev *indio_dev)
  212. {
  213. tiadc_step_config(indio_dev);
  214. return 0;
  215. }
  216. static const struct iio_buffer_setup_ops tiadc_buffer_setup_ops = {
  217. .preenable = &tiadc_buffer_preenable,
  218. .postenable = &tiadc_buffer_postenable,
  219. .predisable = &tiadc_buffer_predisable,
  220. .postdisable = &tiadc_buffer_postdisable,
  221. };
  222. static int tiadc_iio_buffered_hardware_setup(struct iio_dev *indio_dev,
  223. irqreturn_t (*pollfunc_bh)(int irq, void *p),
  224. irqreturn_t (*pollfunc_th)(int irq, void *p),
  225. int irq,
  226. unsigned long flags,
  227. const struct iio_buffer_setup_ops *setup_ops)
  228. {
  229. struct iio_buffer *buffer;
  230. int ret;
  231. buffer = iio_kfifo_allocate();
  232. if (!buffer)
  233. return -ENOMEM;
  234. iio_device_attach_buffer(indio_dev, buffer);
  235. ret = request_threaded_irq(irq, pollfunc_th, pollfunc_bh,
  236. flags, indio_dev->name, indio_dev);
  237. if (ret)
  238. goto error_kfifo_free;
  239. indio_dev->setup_ops = setup_ops;
  240. indio_dev->modes |= INDIO_BUFFER_HARDWARE;
  241. return 0;
  242. error_kfifo_free:
  243. iio_kfifo_free(indio_dev->buffer);
  244. return ret;
  245. }
  246. static void tiadc_iio_buffered_hardware_remove(struct iio_dev *indio_dev)
  247. {
  248. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  249. free_irq(adc_dev->mfd_tscadc->irq, indio_dev);
  250. iio_kfifo_free(indio_dev->buffer);
  251. }
  252. static const char * const chan_name_ain[] = {
  253. "AIN0",
  254. "AIN1",
  255. "AIN2",
  256. "AIN3",
  257. "AIN4",
  258. "AIN5",
  259. "AIN6",
  260. "AIN7",
  261. };
  262. static int tiadc_channel_init(struct iio_dev *indio_dev, int channels)
  263. {
  264. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  265. struct iio_chan_spec *chan_array;
  266. struct iio_chan_spec *chan;
  267. int i;
  268. indio_dev->num_channels = channels;
  269. chan_array = kcalloc(channels,
  270. sizeof(struct iio_chan_spec), GFP_KERNEL);
  271. if (chan_array == NULL)
  272. return -ENOMEM;
  273. chan = chan_array;
  274. for (i = 0; i < channels; i++, chan++) {
  275. chan->type = IIO_VOLTAGE;
  276. chan->indexed = 1;
  277. chan->channel = adc_dev->channel_line[i];
  278. chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
  279. chan->datasheet_name = chan_name_ain[chan->channel];
  280. chan->scan_index = i;
  281. chan->scan_type.sign = 'u';
  282. chan->scan_type.realbits = 12;
  283. chan->scan_type.storagebits = 16;
  284. }
  285. indio_dev->channels = chan_array;
  286. return 0;
  287. }
  288. static void tiadc_channels_remove(struct iio_dev *indio_dev)
  289. {
  290. kfree(indio_dev->channels);
  291. }
  292. static int tiadc_read_raw(struct iio_dev *indio_dev,
  293. struct iio_chan_spec const *chan,
  294. int *val, int *val2, long mask)
  295. {
  296. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  297. int i, map_val;
  298. unsigned int fifo1count, read, stepid;
  299. bool found = false;
  300. u32 step_en;
  301. unsigned long timeout;
  302. if (iio_buffer_enabled(indio_dev))
  303. return -EBUSY;
  304. step_en = get_adc_chan_step_mask(adc_dev, chan);
  305. if (!step_en)
  306. return -EINVAL;
  307. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  308. while (fifo1count--)
  309. tiadc_readl(adc_dev, REG_FIFO1);
  310. am335x_tsc_se_set_once(adc_dev->mfd_tscadc, step_en);
  311. timeout = jiffies + usecs_to_jiffies
  312. (IDLE_TIMEOUT * adc_dev->channels);
  313. /* Wait for Fifo threshold interrupt */
  314. while (1) {
  315. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  316. if (fifo1count)
  317. break;
  318. if (time_after(jiffies, timeout)) {
  319. am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
  320. return -EAGAIN;
  321. }
  322. }
  323. map_val = adc_dev->channel_step[chan->scan_index];
  324. /*
  325. * We check the complete FIFO. We programmed just one entry but in case
  326. * something went wrong we left empty handed (-EAGAIN previously) and
  327. * then the value apeared somehow in the FIFO we would have two entries.
  328. * Therefore we read every item and keep only the latest version of the
  329. * requested channel.
  330. */
  331. for (i = 0; i < fifo1count; i++) {
  332. read = tiadc_readl(adc_dev, REG_FIFO1);
  333. stepid = read & FIFOREAD_CHNLID_MASK;
  334. stepid = stepid >> 0x10;
  335. if (stepid == map_val) {
  336. read = read & FIFOREAD_DATA_MASK;
  337. found = true;
  338. *val = (u16) read;
  339. }
  340. }
  341. am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
  342. if (found == false)
  343. return -EBUSY;
  344. return IIO_VAL_INT;
  345. }
  346. static const struct iio_info tiadc_info = {
  347. .read_raw = &tiadc_read_raw,
  348. .driver_module = THIS_MODULE,
  349. };
  350. static int tiadc_parse_dt(struct platform_device *pdev,
  351. struct tiadc_device *adc_dev)
  352. {
  353. struct device_node *node = pdev->dev.of_node;
  354. struct property *prop;
  355. const __be32 *cur;
  356. int channels = 0;
  357. u32 val;
  358. of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
  359. adc_dev->channel_line[channels] = val;
  360. /* Set Default values for optional DT parameters */
  361. adc_dev->open_delay[channels] = STEPCONFIG_OPENDLY;
  362. adc_dev->sample_delay[channels] = STEPCONFIG_SAMPLEDLY;
  363. adc_dev->step_avg[channels] = 16;
  364. channels++;
  365. }
  366. of_property_read_u32_array(node, "ti,chan-step-avg",
  367. adc_dev->step_avg, channels);
  368. of_property_read_u32_array(node, "ti,chan-step-opendelay",
  369. adc_dev->open_delay, channels);
  370. of_property_read_u32_array(node, "ti,chan-step-sampledelay",
  371. adc_dev->sample_delay, channels);
  372. adc_dev->channels = channels;
  373. return 0;
  374. }
  375. static int tiadc_probe(struct platform_device *pdev)
  376. {
  377. struct iio_dev *indio_dev;
  378. struct tiadc_device *adc_dev;
  379. struct device_node *node = pdev->dev.of_node;
  380. int err;
  381. if (!node) {
  382. dev_err(&pdev->dev, "Could not find valid DT data.\n");
  383. return -EINVAL;
  384. }
  385. indio_dev = devm_iio_device_alloc(&pdev->dev,
  386. sizeof(struct tiadc_device));
  387. if (indio_dev == NULL) {
  388. dev_err(&pdev->dev, "failed to allocate iio device\n");
  389. return -ENOMEM;
  390. }
  391. adc_dev = iio_priv(indio_dev);
  392. adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev);
  393. tiadc_parse_dt(pdev, adc_dev);
  394. indio_dev->dev.parent = &pdev->dev;
  395. indio_dev->name = dev_name(&pdev->dev);
  396. indio_dev->modes = INDIO_DIRECT_MODE;
  397. indio_dev->info = &tiadc_info;
  398. tiadc_step_config(indio_dev);
  399. tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD);
  400. err = tiadc_channel_init(indio_dev, adc_dev->channels);
  401. if (err < 0)
  402. return err;
  403. err = tiadc_iio_buffered_hardware_setup(indio_dev,
  404. &tiadc_worker_h,
  405. &tiadc_irq_h,
  406. adc_dev->mfd_tscadc->irq,
  407. IRQF_SHARED,
  408. &tiadc_buffer_setup_ops);
  409. if (err)
  410. goto err_free_channels;
  411. err = iio_device_register(indio_dev);
  412. if (err)
  413. goto err_buffer_unregister;
  414. platform_set_drvdata(pdev, indio_dev);
  415. return 0;
  416. err_buffer_unregister:
  417. tiadc_iio_buffered_hardware_remove(indio_dev);
  418. err_free_channels:
  419. tiadc_channels_remove(indio_dev);
  420. return err;
  421. }
  422. static int tiadc_remove(struct platform_device *pdev)
  423. {
  424. struct iio_dev *indio_dev = platform_get_drvdata(pdev);
  425. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  426. u32 step_en;
  427. iio_device_unregister(indio_dev);
  428. tiadc_iio_buffered_hardware_remove(indio_dev);
  429. tiadc_channels_remove(indio_dev);
  430. step_en = get_adc_step_mask(adc_dev);
  431. am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);
  432. return 0;
  433. }
  434. #ifdef CONFIG_PM
  435. static int tiadc_suspend(struct device *dev)
  436. {
  437. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  438. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  439. struct ti_tscadc_dev *tscadc_dev;
  440. unsigned int idle;
  441. tscadc_dev = ti_tscadc_dev_get(to_platform_device(dev));
  442. if (!device_may_wakeup(tscadc_dev->dev)) {
  443. idle = tiadc_readl(adc_dev, REG_CTRL);
  444. idle &= ~(CNTRLREG_TSCSSENB);
  445. tiadc_writel(adc_dev, REG_CTRL, (idle |
  446. CNTRLREG_POWERDOWN));
  447. }
  448. return 0;
  449. }
  450. static int tiadc_resume(struct device *dev)
  451. {
  452. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  453. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  454. unsigned int restore;
  455. /* Make sure ADC is powered up */
  456. restore = tiadc_readl(adc_dev, REG_CTRL);
  457. restore &= ~(CNTRLREG_POWERDOWN);
  458. tiadc_writel(adc_dev, REG_CTRL, restore);
  459. tiadc_step_config(indio_dev);
  460. am335x_tsc_se_set_cache(adc_dev->mfd_tscadc,
  461. adc_dev->buffer_en_ch_steps);
  462. return 0;
  463. }
  464. static const struct dev_pm_ops tiadc_pm_ops = {
  465. .suspend = tiadc_suspend,
  466. .resume = tiadc_resume,
  467. };
  468. #define TIADC_PM_OPS (&tiadc_pm_ops)
  469. #else
  470. #define TIADC_PM_OPS NULL
  471. #endif
  472. static const struct of_device_id ti_adc_dt_ids[] = {
  473. { .compatible = "ti,am3359-adc", },
  474. { }
  475. };
  476. MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
  477. static struct platform_driver tiadc_driver = {
  478. .driver = {
  479. .name = "TI-am335x-adc",
  480. .pm = TIADC_PM_OPS,
  481. .of_match_table = ti_adc_dt_ids,
  482. },
  483. .probe = tiadc_probe,
  484. .remove = tiadc_remove,
  485. };
  486. module_platform_driver(tiadc_driver);
  487. MODULE_DESCRIPTION("TI ADC controller driver");
  488. MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
  489. MODULE_LICENSE("GPL");