st_accel_core.c 20 KB

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  1. /*
  2. * STMicroelectronics accelerometers driver
  3. *
  4. * Copyright 2012-2013 STMicroelectronics Inc.
  5. *
  6. * Denis Ciocca <denis.ciocca@st.com>
  7. *
  8. * Licensed under the GPL-2.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/slab.h>
  13. #include <linux/errno.h>
  14. #include <linux/types.h>
  15. #include <linux/mutex.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/i2c.h>
  18. #include <linux/gpio.h>
  19. #include <linux/irq.h>
  20. #include <linux/iio/iio.h>
  21. #include <linux/iio/sysfs.h>
  22. #include <linux/iio/trigger.h>
  23. #include <linux/iio/buffer.h>
  24. #include <linux/iio/common/st_sensors.h>
  25. #include "st_accel.h"
  26. #define ST_ACCEL_NUMBER_DATA_CHANNELS 3
  27. /* DEFAULT VALUE FOR SENSORS */
  28. #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28
  29. #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a
  30. #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c
  31. /* FULLSCALE */
  32. #define ST_ACCEL_FS_AVL_2G 2
  33. #define ST_ACCEL_FS_AVL_4G 4
  34. #define ST_ACCEL_FS_AVL_6G 6
  35. #define ST_ACCEL_FS_AVL_8G 8
  36. #define ST_ACCEL_FS_AVL_16G 16
  37. /* CUSTOM VALUES FOR SENSOR 1 */
  38. #define ST_ACCEL_1_WAI_EXP 0x33
  39. #define ST_ACCEL_1_ODR_ADDR 0x20
  40. #define ST_ACCEL_1_ODR_MASK 0xf0
  41. #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01
  42. #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02
  43. #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03
  44. #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04
  45. #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05
  46. #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06
  47. #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07
  48. #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08
  49. #define ST_ACCEL_1_FS_ADDR 0x23
  50. #define ST_ACCEL_1_FS_MASK 0x30
  51. #define ST_ACCEL_1_FS_AVL_2_VAL 0x00
  52. #define ST_ACCEL_1_FS_AVL_4_VAL 0x01
  53. #define ST_ACCEL_1_FS_AVL_8_VAL 0x02
  54. #define ST_ACCEL_1_FS_AVL_16_VAL 0x03
  55. #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
  56. #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
  57. #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000)
  58. #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000)
  59. #define ST_ACCEL_1_BDU_ADDR 0x23
  60. #define ST_ACCEL_1_BDU_MASK 0x80
  61. #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22
  62. #define ST_ACCEL_1_DRDY_IRQ_INT1_MASK 0x10
  63. #define ST_ACCEL_1_DRDY_IRQ_INT2_MASK 0x08
  64. #define ST_ACCEL_1_MULTIREAD_BIT true
  65. /* CUSTOM VALUES FOR SENSOR 2 */
  66. #define ST_ACCEL_2_WAI_EXP 0x32
  67. #define ST_ACCEL_2_ODR_ADDR 0x20
  68. #define ST_ACCEL_2_ODR_MASK 0x18
  69. #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00
  70. #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01
  71. #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02
  72. #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03
  73. #define ST_ACCEL_2_PW_ADDR 0x20
  74. #define ST_ACCEL_2_PW_MASK 0xe0
  75. #define ST_ACCEL_2_FS_ADDR 0x23
  76. #define ST_ACCEL_2_FS_MASK 0x30
  77. #define ST_ACCEL_2_FS_AVL_2_VAL 0X00
  78. #define ST_ACCEL_2_FS_AVL_4_VAL 0X01
  79. #define ST_ACCEL_2_FS_AVL_8_VAL 0x03
  80. #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
  81. #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
  82. #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900)
  83. #define ST_ACCEL_2_BDU_ADDR 0x23
  84. #define ST_ACCEL_2_BDU_MASK 0x80
  85. #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22
  86. #define ST_ACCEL_2_DRDY_IRQ_INT1_MASK 0x02
  87. #define ST_ACCEL_2_DRDY_IRQ_INT2_MASK 0x10
  88. #define ST_ACCEL_2_MULTIREAD_BIT true
  89. /* CUSTOM VALUES FOR SENSOR 3 */
  90. #define ST_ACCEL_3_WAI_EXP 0x40
  91. #define ST_ACCEL_3_ODR_ADDR 0x20
  92. #define ST_ACCEL_3_ODR_MASK 0xf0
  93. #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01
  94. #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02
  95. #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03
  96. #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04
  97. #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05
  98. #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06
  99. #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07
  100. #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08
  101. #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09
  102. #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a
  103. #define ST_ACCEL_3_FS_ADDR 0x24
  104. #define ST_ACCEL_3_FS_MASK 0x38
  105. #define ST_ACCEL_3_FS_AVL_2_VAL 0X00
  106. #define ST_ACCEL_3_FS_AVL_4_VAL 0X01
  107. #define ST_ACCEL_3_FS_AVL_6_VAL 0x02
  108. #define ST_ACCEL_3_FS_AVL_8_VAL 0x03
  109. #define ST_ACCEL_3_FS_AVL_16_VAL 0x04
  110. #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61)
  111. #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122)
  112. #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183)
  113. #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244)
  114. #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732)
  115. #define ST_ACCEL_3_BDU_ADDR 0x20
  116. #define ST_ACCEL_3_BDU_MASK 0x08
  117. #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23
  118. #define ST_ACCEL_3_DRDY_IRQ_INT1_MASK 0x80
  119. #define ST_ACCEL_3_DRDY_IRQ_INT2_MASK 0x00
  120. #define ST_ACCEL_3_IG1_EN_ADDR 0x23
  121. #define ST_ACCEL_3_IG1_EN_MASK 0x08
  122. #define ST_ACCEL_3_MULTIREAD_BIT false
  123. /* CUSTOM VALUES FOR SENSOR 4 */
  124. #define ST_ACCEL_4_WAI_EXP 0x3a
  125. #define ST_ACCEL_4_ODR_ADDR 0x20
  126. #define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */
  127. #define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00
  128. #define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01
  129. #define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02
  130. #define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03
  131. #define ST_ACCEL_4_PW_ADDR 0x20
  132. #define ST_ACCEL_4_PW_MASK 0xc0
  133. #define ST_ACCEL_4_FS_ADDR 0x21
  134. #define ST_ACCEL_4_FS_MASK 0x80
  135. #define ST_ACCEL_4_FS_AVL_2_VAL 0X00
  136. #define ST_ACCEL_4_FS_AVL_6_VAL 0X01
  137. #define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1024)
  138. #define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(340)
  139. #define ST_ACCEL_4_BDU_ADDR 0x21
  140. #define ST_ACCEL_4_BDU_MASK 0x40
  141. #define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21
  142. #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04
  143. #define ST_ACCEL_4_IG1_EN_ADDR 0x21
  144. #define ST_ACCEL_4_IG1_EN_MASK 0x08
  145. #define ST_ACCEL_4_MULTIREAD_BIT true
  146. /* CUSTOM VALUES FOR SENSOR 5 */
  147. #define ST_ACCEL_5_WAI_EXP 0x3b
  148. #define ST_ACCEL_5_ODR_ADDR 0x20
  149. #define ST_ACCEL_5_ODR_MASK 0x80
  150. #define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00
  151. #define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01
  152. #define ST_ACCEL_5_PW_ADDR 0x20
  153. #define ST_ACCEL_5_PW_MASK 0x40
  154. #define ST_ACCEL_5_FS_ADDR 0x20
  155. #define ST_ACCEL_5_FS_MASK 0x20
  156. #define ST_ACCEL_5_FS_AVL_2_VAL 0X00
  157. #define ST_ACCEL_5_FS_AVL_8_VAL 0X01
  158. /* TODO: check these resulting gain settings, these are not in the datsheet */
  159. #define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000)
  160. #define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000)
  161. #define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22
  162. #define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04
  163. #define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20
  164. #define ST_ACCEL_5_IG1_EN_ADDR 0x21
  165. #define ST_ACCEL_5_IG1_EN_MASK 0x08
  166. #define ST_ACCEL_5_MULTIREAD_BIT false
  167. static const struct iio_chan_spec st_accel_8bit_channels[] = {
  168. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  169. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  170. ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8,
  171. ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1),
  172. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  173. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  174. ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8,
  175. ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1),
  176. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  177. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  178. ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8,
  179. ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1),
  180. IIO_CHAN_SOFT_TIMESTAMP(3)
  181. };
  182. static const struct iio_chan_spec st_accel_12bit_channels[] = {
  183. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  184. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  185. ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16,
  186. ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
  187. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  188. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  189. ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16,
  190. ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
  191. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  192. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  193. ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16,
  194. ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
  195. IIO_CHAN_SOFT_TIMESTAMP(3)
  196. };
  197. static const struct iio_chan_spec st_accel_16bit_channels[] = {
  198. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  199. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  200. ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16,
  201. ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
  202. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  203. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  204. ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16,
  205. ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
  206. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  207. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  208. ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16,
  209. ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
  210. IIO_CHAN_SOFT_TIMESTAMP(3)
  211. };
  212. static const struct st_sensor_settings st_accel_sensors_settings[] = {
  213. {
  214. .wai = ST_ACCEL_1_WAI_EXP,
  215. .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
  216. .sensors_supported = {
  217. [0] = LIS3DH_ACCEL_DEV_NAME,
  218. [1] = LSM303DLHC_ACCEL_DEV_NAME,
  219. [2] = LSM330D_ACCEL_DEV_NAME,
  220. [3] = LSM330DL_ACCEL_DEV_NAME,
  221. [4] = LSM330DLC_ACCEL_DEV_NAME,
  222. [5] = LSM303AGR_ACCEL_DEV_NAME,
  223. },
  224. .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
  225. .odr = {
  226. .addr = ST_ACCEL_1_ODR_ADDR,
  227. .mask = ST_ACCEL_1_ODR_MASK,
  228. .odr_avl = {
  229. { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, },
  230. { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, },
  231. { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, },
  232. { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, },
  233. { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, },
  234. { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, },
  235. { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, },
  236. { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, },
  237. },
  238. },
  239. .pw = {
  240. .addr = ST_ACCEL_1_ODR_ADDR,
  241. .mask = ST_ACCEL_1_ODR_MASK,
  242. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  243. },
  244. .enable_axis = {
  245. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  246. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  247. },
  248. .fs = {
  249. .addr = ST_ACCEL_1_FS_ADDR,
  250. .mask = ST_ACCEL_1_FS_MASK,
  251. .fs_avl = {
  252. [0] = {
  253. .num = ST_ACCEL_FS_AVL_2G,
  254. .value = ST_ACCEL_1_FS_AVL_2_VAL,
  255. .gain = ST_ACCEL_1_FS_AVL_2_GAIN,
  256. },
  257. [1] = {
  258. .num = ST_ACCEL_FS_AVL_4G,
  259. .value = ST_ACCEL_1_FS_AVL_4_VAL,
  260. .gain = ST_ACCEL_1_FS_AVL_4_GAIN,
  261. },
  262. [2] = {
  263. .num = ST_ACCEL_FS_AVL_8G,
  264. .value = ST_ACCEL_1_FS_AVL_8_VAL,
  265. .gain = ST_ACCEL_1_FS_AVL_8_GAIN,
  266. },
  267. [3] = {
  268. .num = ST_ACCEL_FS_AVL_16G,
  269. .value = ST_ACCEL_1_FS_AVL_16_VAL,
  270. .gain = ST_ACCEL_1_FS_AVL_16_GAIN,
  271. },
  272. },
  273. },
  274. .bdu = {
  275. .addr = ST_ACCEL_1_BDU_ADDR,
  276. .mask = ST_ACCEL_1_BDU_MASK,
  277. },
  278. .drdy_irq = {
  279. .addr = ST_ACCEL_1_DRDY_IRQ_ADDR,
  280. .mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK,
  281. .mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK,
  282. },
  283. .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT,
  284. .bootime = 2,
  285. },
  286. {
  287. .wai = ST_ACCEL_2_WAI_EXP,
  288. .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
  289. .sensors_supported = {
  290. [0] = LIS331DLH_ACCEL_DEV_NAME,
  291. [1] = LSM303DL_ACCEL_DEV_NAME,
  292. [2] = LSM303DLH_ACCEL_DEV_NAME,
  293. [3] = LSM303DLM_ACCEL_DEV_NAME,
  294. },
  295. .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
  296. .odr = {
  297. .addr = ST_ACCEL_2_ODR_ADDR,
  298. .mask = ST_ACCEL_2_ODR_MASK,
  299. .odr_avl = {
  300. { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, },
  301. { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, },
  302. { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, },
  303. { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, },
  304. },
  305. },
  306. .pw = {
  307. .addr = ST_ACCEL_2_PW_ADDR,
  308. .mask = ST_ACCEL_2_PW_MASK,
  309. .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
  310. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  311. },
  312. .enable_axis = {
  313. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  314. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  315. },
  316. .fs = {
  317. .addr = ST_ACCEL_2_FS_ADDR,
  318. .mask = ST_ACCEL_2_FS_MASK,
  319. .fs_avl = {
  320. [0] = {
  321. .num = ST_ACCEL_FS_AVL_2G,
  322. .value = ST_ACCEL_2_FS_AVL_2_VAL,
  323. .gain = ST_ACCEL_2_FS_AVL_2_GAIN,
  324. },
  325. [1] = {
  326. .num = ST_ACCEL_FS_AVL_4G,
  327. .value = ST_ACCEL_2_FS_AVL_4_VAL,
  328. .gain = ST_ACCEL_2_FS_AVL_4_GAIN,
  329. },
  330. [2] = {
  331. .num = ST_ACCEL_FS_AVL_8G,
  332. .value = ST_ACCEL_2_FS_AVL_8_VAL,
  333. .gain = ST_ACCEL_2_FS_AVL_8_GAIN,
  334. },
  335. },
  336. },
  337. .bdu = {
  338. .addr = ST_ACCEL_2_BDU_ADDR,
  339. .mask = ST_ACCEL_2_BDU_MASK,
  340. },
  341. .drdy_irq = {
  342. .addr = ST_ACCEL_2_DRDY_IRQ_ADDR,
  343. .mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK,
  344. .mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK,
  345. },
  346. .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT,
  347. .bootime = 2,
  348. },
  349. {
  350. .wai = ST_ACCEL_3_WAI_EXP,
  351. .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
  352. .sensors_supported = {
  353. [0] = LSM330_ACCEL_DEV_NAME,
  354. },
  355. .ch = (struct iio_chan_spec *)st_accel_16bit_channels,
  356. .odr = {
  357. .addr = ST_ACCEL_3_ODR_ADDR,
  358. .mask = ST_ACCEL_3_ODR_MASK,
  359. .odr_avl = {
  360. { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL },
  361. { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, },
  362. { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, },
  363. { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, },
  364. { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, },
  365. { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, },
  366. { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, },
  367. { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, },
  368. { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, },
  369. { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, },
  370. },
  371. },
  372. .pw = {
  373. .addr = ST_ACCEL_3_ODR_ADDR,
  374. .mask = ST_ACCEL_3_ODR_MASK,
  375. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  376. },
  377. .enable_axis = {
  378. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  379. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  380. },
  381. .fs = {
  382. .addr = ST_ACCEL_3_FS_ADDR,
  383. .mask = ST_ACCEL_3_FS_MASK,
  384. .fs_avl = {
  385. [0] = {
  386. .num = ST_ACCEL_FS_AVL_2G,
  387. .value = ST_ACCEL_3_FS_AVL_2_VAL,
  388. .gain = ST_ACCEL_3_FS_AVL_2_GAIN,
  389. },
  390. [1] = {
  391. .num = ST_ACCEL_FS_AVL_4G,
  392. .value = ST_ACCEL_3_FS_AVL_4_VAL,
  393. .gain = ST_ACCEL_3_FS_AVL_4_GAIN,
  394. },
  395. [2] = {
  396. .num = ST_ACCEL_FS_AVL_6G,
  397. .value = ST_ACCEL_3_FS_AVL_6_VAL,
  398. .gain = ST_ACCEL_3_FS_AVL_6_GAIN,
  399. },
  400. [3] = {
  401. .num = ST_ACCEL_FS_AVL_8G,
  402. .value = ST_ACCEL_3_FS_AVL_8_VAL,
  403. .gain = ST_ACCEL_3_FS_AVL_8_GAIN,
  404. },
  405. [4] = {
  406. .num = ST_ACCEL_FS_AVL_16G,
  407. .value = ST_ACCEL_3_FS_AVL_16_VAL,
  408. .gain = ST_ACCEL_3_FS_AVL_16_GAIN,
  409. },
  410. },
  411. },
  412. .bdu = {
  413. .addr = ST_ACCEL_3_BDU_ADDR,
  414. .mask = ST_ACCEL_3_BDU_MASK,
  415. },
  416. .drdy_irq = {
  417. .addr = ST_ACCEL_3_DRDY_IRQ_ADDR,
  418. .mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK,
  419. .mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK,
  420. .ig1 = {
  421. .en_addr = ST_ACCEL_3_IG1_EN_ADDR,
  422. .en_mask = ST_ACCEL_3_IG1_EN_MASK,
  423. },
  424. },
  425. .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT,
  426. .bootime = 2,
  427. },
  428. {
  429. .wai = ST_ACCEL_4_WAI_EXP,
  430. .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
  431. .sensors_supported = {
  432. [0] = LIS3LV02DL_ACCEL_DEV_NAME,
  433. },
  434. .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
  435. .odr = {
  436. .addr = ST_ACCEL_4_ODR_ADDR,
  437. .mask = ST_ACCEL_4_ODR_MASK,
  438. .odr_avl = {
  439. { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL },
  440. { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, },
  441. { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, },
  442. { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, },
  443. },
  444. },
  445. .pw = {
  446. .addr = ST_ACCEL_4_PW_ADDR,
  447. .mask = ST_ACCEL_4_PW_MASK,
  448. .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
  449. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  450. },
  451. .enable_axis = {
  452. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  453. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  454. },
  455. .fs = {
  456. .addr = ST_ACCEL_4_FS_ADDR,
  457. .mask = ST_ACCEL_4_FS_MASK,
  458. .fs_avl = {
  459. [0] = {
  460. .num = ST_ACCEL_FS_AVL_2G,
  461. .value = ST_ACCEL_4_FS_AVL_2_VAL,
  462. .gain = ST_ACCEL_4_FS_AVL_2_GAIN,
  463. },
  464. [1] = {
  465. .num = ST_ACCEL_FS_AVL_6G,
  466. .value = ST_ACCEL_4_FS_AVL_6_VAL,
  467. .gain = ST_ACCEL_4_FS_AVL_6_GAIN,
  468. },
  469. },
  470. },
  471. .bdu = {
  472. .addr = ST_ACCEL_4_BDU_ADDR,
  473. .mask = ST_ACCEL_4_BDU_MASK,
  474. },
  475. .drdy_irq = {
  476. .addr = ST_ACCEL_4_DRDY_IRQ_ADDR,
  477. .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK,
  478. .ig1 = {
  479. .en_addr = ST_ACCEL_4_IG1_EN_ADDR,
  480. .en_mask = ST_ACCEL_4_IG1_EN_MASK,
  481. },
  482. },
  483. .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
  484. .bootime = 2, /* guess */
  485. },
  486. {
  487. .wai = ST_ACCEL_5_WAI_EXP,
  488. .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
  489. .sensors_supported = {
  490. [0] = LIS331DL_ACCEL_DEV_NAME,
  491. },
  492. .ch = (struct iio_chan_spec *)st_accel_8bit_channels,
  493. .odr = {
  494. .addr = ST_ACCEL_5_ODR_ADDR,
  495. .mask = ST_ACCEL_5_ODR_MASK,
  496. .odr_avl = {
  497. { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL },
  498. { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, },
  499. },
  500. },
  501. .pw = {
  502. .addr = ST_ACCEL_5_PW_ADDR,
  503. .mask = ST_ACCEL_5_PW_MASK,
  504. .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
  505. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  506. },
  507. .enable_axis = {
  508. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  509. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  510. },
  511. .fs = {
  512. .addr = ST_ACCEL_5_FS_ADDR,
  513. .mask = ST_ACCEL_5_FS_MASK,
  514. .fs_avl = {
  515. [0] = {
  516. .num = ST_ACCEL_FS_AVL_2G,
  517. .value = ST_ACCEL_5_FS_AVL_2_VAL,
  518. .gain = ST_ACCEL_5_FS_AVL_2_GAIN,
  519. },
  520. [1] = {
  521. .num = ST_ACCEL_FS_AVL_8G,
  522. .value = ST_ACCEL_5_FS_AVL_8_VAL,
  523. .gain = ST_ACCEL_5_FS_AVL_8_GAIN,
  524. },
  525. },
  526. },
  527. .drdy_irq = {
  528. .addr = ST_ACCEL_5_DRDY_IRQ_ADDR,
  529. .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK,
  530. .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK,
  531. },
  532. .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT,
  533. .bootime = 2, /* guess */
  534. },
  535. };
  536. static int st_accel_read_raw(struct iio_dev *indio_dev,
  537. struct iio_chan_spec const *ch, int *val,
  538. int *val2, long mask)
  539. {
  540. int err;
  541. struct st_sensor_data *adata = iio_priv(indio_dev);
  542. switch (mask) {
  543. case IIO_CHAN_INFO_RAW:
  544. err = st_sensors_read_info_raw(indio_dev, ch, val);
  545. if (err < 0)
  546. goto read_error;
  547. return IIO_VAL_INT;
  548. case IIO_CHAN_INFO_SCALE:
  549. *val = 0;
  550. *val2 = adata->current_fullscale->gain;
  551. return IIO_VAL_INT_PLUS_MICRO;
  552. case IIO_CHAN_INFO_SAMP_FREQ:
  553. *val = adata->odr;
  554. return IIO_VAL_INT;
  555. default:
  556. return -EINVAL;
  557. }
  558. read_error:
  559. return err;
  560. }
  561. static int st_accel_write_raw(struct iio_dev *indio_dev,
  562. struct iio_chan_spec const *chan, int val, int val2, long mask)
  563. {
  564. int err;
  565. switch (mask) {
  566. case IIO_CHAN_INFO_SCALE:
  567. err = st_sensors_set_fullscale_by_gain(indio_dev, val2);
  568. break;
  569. case IIO_CHAN_INFO_SAMP_FREQ:
  570. if (val2)
  571. return -EINVAL;
  572. mutex_lock(&indio_dev->mlock);
  573. err = st_sensors_set_odr(indio_dev, val);
  574. mutex_unlock(&indio_dev->mlock);
  575. return err;
  576. default:
  577. return -EINVAL;
  578. }
  579. return err;
  580. }
  581. static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL();
  582. static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available);
  583. static struct attribute *st_accel_attributes[] = {
  584. &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
  585. &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
  586. NULL,
  587. };
  588. static const struct attribute_group st_accel_attribute_group = {
  589. .attrs = st_accel_attributes,
  590. };
  591. static const struct iio_info accel_info = {
  592. .driver_module = THIS_MODULE,
  593. .attrs = &st_accel_attribute_group,
  594. .read_raw = &st_accel_read_raw,
  595. .write_raw = &st_accel_write_raw,
  596. };
  597. #ifdef CONFIG_IIO_TRIGGER
  598. static const struct iio_trigger_ops st_accel_trigger_ops = {
  599. .owner = THIS_MODULE,
  600. .set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,
  601. };
  602. #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops)
  603. #else
  604. #define ST_ACCEL_TRIGGER_OPS NULL
  605. #endif
  606. int st_accel_common_probe(struct iio_dev *indio_dev)
  607. {
  608. struct st_sensor_data *adata = iio_priv(indio_dev);
  609. int irq = adata->get_irq_data_ready(indio_dev);
  610. int err;
  611. indio_dev->modes = INDIO_DIRECT_MODE;
  612. indio_dev->info = &accel_info;
  613. mutex_init(&adata->tb.buf_lock);
  614. st_sensors_power_enable(indio_dev);
  615. err = st_sensors_check_device_support(indio_dev,
  616. ARRAY_SIZE(st_accel_sensors_settings),
  617. st_accel_sensors_settings);
  618. if (err < 0)
  619. return err;
  620. adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS;
  621. adata->multiread_bit = adata->sensor_settings->multi_read_bit;
  622. indio_dev->channels = adata->sensor_settings->ch;
  623. indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS;
  624. adata->current_fullscale = (struct st_sensor_fullscale_avl *)
  625. &adata->sensor_settings->fs.fs_avl[0];
  626. adata->odr = adata->sensor_settings->odr.odr_avl[0].hz;
  627. if (!adata->dev->platform_data)
  628. adata->dev->platform_data =
  629. (struct st_sensors_platform_data *)&default_accel_pdata;
  630. err = st_sensors_init_sensor(indio_dev, adata->dev->platform_data);
  631. if (err < 0)
  632. return err;
  633. err = st_accel_allocate_ring(indio_dev);
  634. if (err < 0)
  635. return err;
  636. if (irq > 0) {
  637. err = st_sensors_allocate_trigger(indio_dev,
  638. ST_ACCEL_TRIGGER_OPS);
  639. if (err < 0)
  640. goto st_accel_probe_trigger_error;
  641. }
  642. err = iio_device_register(indio_dev);
  643. if (err)
  644. goto st_accel_device_register_error;
  645. dev_info(&indio_dev->dev, "registered accelerometer %s\n",
  646. indio_dev->name);
  647. return 0;
  648. st_accel_device_register_error:
  649. if (irq > 0)
  650. st_sensors_deallocate_trigger(indio_dev);
  651. st_accel_probe_trigger_error:
  652. st_accel_deallocate_ring(indio_dev);
  653. return err;
  654. }
  655. EXPORT_SYMBOL(st_accel_common_probe);
  656. void st_accel_common_remove(struct iio_dev *indio_dev)
  657. {
  658. struct st_sensor_data *adata = iio_priv(indio_dev);
  659. st_sensors_power_disable(indio_dev);
  660. iio_device_unregister(indio_dev);
  661. if (adata->get_irq_data_ready(indio_dev) > 0)
  662. st_sensors_deallocate_trigger(indio_dev);
  663. st_accel_deallocate_ring(indio_dev);
  664. }
  665. EXPORT_SYMBOL(st_accel_common_remove);
  666. MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
  667. MODULE_DESCRIPTION("STMicroelectronics accelerometers driver");
  668. MODULE_LICENSE("GPL v2");