virtgpu_vq.c 17 KB

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  1. /*
  2. * Copyright (C) 2015 Red Hat, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Authors:
  6. * Dave Airlie <airlied@redhat.com>
  7. * Gerd Hoffmann <kraxel@redhat.com>
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a
  10. * copy of this software and associated documentation files (the "Software"),
  11. * to deal in the Software without restriction, including without limitation
  12. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13. * and/or sell copies of the Software, and to permit persons to whom the
  14. * Software is furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice (including the next
  17. * paragraph) shall be included in all copies or substantial portions of the
  18. * Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  21. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  22. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  23. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  24. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  25. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  26. * OTHER DEALINGS IN THE SOFTWARE.
  27. */
  28. #include <drm/drmP.h>
  29. #include "virtgpu_drv.h"
  30. #include <linux/virtio.h>
  31. #include <linux/virtio_config.h>
  32. #include <linux/virtio_ring.h>
  33. #define MAX_INLINE_CMD_SIZE 96
  34. #define MAX_INLINE_RESP_SIZE 24
  35. #define VBUFFER_SIZE (sizeof(struct virtio_gpu_vbuffer) \
  36. + MAX_INLINE_CMD_SIZE \
  37. + MAX_INLINE_RESP_SIZE)
  38. void virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
  39. uint32_t *resid)
  40. {
  41. int handle;
  42. idr_preload(GFP_KERNEL);
  43. spin_lock(&vgdev->resource_idr_lock);
  44. handle = idr_alloc(&vgdev->resource_idr, NULL, 1, 0, GFP_NOWAIT);
  45. spin_unlock(&vgdev->resource_idr_lock);
  46. idr_preload_end();
  47. *resid = handle;
  48. }
  49. void virtio_gpu_resource_id_put(struct virtio_gpu_device *vgdev, uint32_t id)
  50. {
  51. spin_lock(&vgdev->resource_idr_lock);
  52. idr_remove(&vgdev->resource_idr, id);
  53. spin_unlock(&vgdev->resource_idr_lock);
  54. }
  55. void virtio_gpu_ctrl_ack(struct virtqueue *vq)
  56. {
  57. struct drm_device *dev = vq->vdev->priv;
  58. struct virtio_gpu_device *vgdev = dev->dev_private;
  59. schedule_work(&vgdev->ctrlq.dequeue_work);
  60. }
  61. void virtio_gpu_cursor_ack(struct virtqueue *vq)
  62. {
  63. struct drm_device *dev = vq->vdev->priv;
  64. struct virtio_gpu_device *vgdev = dev->dev_private;
  65. schedule_work(&vgdev->cursorq.dequeue_work);
  66. }
  67. int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev)
  68. {
  69. struct virtio_gpu_vbuffer *vbuf;
  70. int i, size, count = 0;
  71. void *ptr;
  72. INIT_LIST_HEAD(&vgdev->free_vbufs);
  73. spin_lock_init(&vgdev->free_vbufs_lock);
  74. count += virtqueue_get_vring_size(vgdev->ctrlq.vq);
  75. count += virtqueue_get_vring_size(vgdev->cursorq.vq);
  76. size = count * VBUFFER_SIZE;
  77. DRM_INFO("virtio vbuffers: %d bufs, %zdB each, %dkB total.\n",
  78. count, VBUFFER_SIZE, size / 1024);
  79. vgdev->vbufs = kzalloc(size, GFP_KERNEL);
  80. if (!vgdev->vbufs)
  81. return -ENOMEM;
  82. for (i = 0, ptr = vgdev->vbufs;
  83. i < count;
  84. i++, ptr += VBUFFER_SIZE) {
  85. vbuf = ptr;
  86. list_add(&vbuf->list, &vgdev->free_vbufs);
  87. }
  88. return 0;
  89. }
  90. void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev)
  91. {
  92. struct virtio_gpu_vbuffer *vbuf;
  93. int i, count = 0;
  94. count += virtqueue_get_vring_size(vgdev->ctrlq.vq);
  95. count += virtqueue_get_vring_size(vgdev->cursorq.vq);
  96. spin_lock(&vgdev->free_vbufs_lock);
  97. for (i = 0; i < count; i++) {
  98. if (WARN_ON(list_empty(&vgdev->free_vbufs)))
  99. return;
  100. vbuf = list_first_entry(&vgdev->free_vbufs,
  101. struct virtio_gpu_vbuffer, list);
  102. list_del(&vbuf->list);
  103. }
  104. spin_unlock(&vgdev->free_vbufs_lock);
  105. kfree(vgdev->vbufs);
  106. }
  107. static struct virtio_gpu_vbuffer*
  108. virtio_gpu_get_vbuf(struct virtio_gpu_device *vgdev,
  109. int size, int resp_size, void *resp_buf,
  110. virtio_gpu_resp_cb resp_cb)
  111. {
  112. struct virtio_gpu_vbuffer *vbuf;
  113. spin_lock(&vgdev->free_vbufs_lock);
  114. BUG_ON(list_empty(&vgdev->free_vbufs));
  115. vbuf = list_first_entry(&vgdev->free_vbufs,
  116. struct virtio_gpu_vbuffer, list);
  117. list_del(&vbuf->list);
  118. spin_unlock(&vgdev->free_vbufs_lock);
  119. memset(vbuf, 0, VBUFFER_SIZE);
  120. BUG_ON(size > MAX_INLINE_CMD_SIZE);
  121. vbuf->buf = (void *)vbuf + sizeof(*vbuf);
  122. vbuf->size = size;
  123. vbuf->resp_cb = resp_cb;
  124. vbuf->resp_size = resp_size;
  125. if (resp_size <= MAX_INLINE_RESP_SIZE)
  126. vbuf->resp_buf = (void *)vbuf->buf + size;
  127. else
  128. vbuf->resp_buf = resp_buf;
  129. BUG_ON(!vbuf->resp_buf);
  130. return vbuf;
  131. }
  132. static void *virtio_gpu_alloc_cmd(struct virtio_gpu_device *vgdev,
  133. struct virtio_gpu_vbuffer **vbuffer_p,
  134. int size)
  135. {
  136. struct virtio_gpu_vbuffer *vbuf;
  137. vbuf = virtio_gpu_get_vbuf(vgdev, size,
  138. sizeof(struct virtio_gpu_ctrl_hdr),
  139. NULL, NULL);
  140. if (IS_ERR(vbuf)) {
  141. *vbuffer_p = NULL;
  142. return ERR_CAST(vbuf);
  143. }
  144. *vbuffer_p = vbuf;
  145. return vbuf->buf;
  146. }
  147. static struct virtio_gpu_update_cursor*
  148. virtio_gpu_alloc_cursor(struct virtio_gpu_device *vgdev,
  149. struct virtio_gpu_vbuffer **vbuffer_p)
  150. {
  151. struct virtio_gpu_vbuffer *vbuf;
  152. vbuf = virtio_gpu_get_vbuf
  153. (vgdev, sizeof(struct virtio_gpu_update_cursor),
  154. 0, NULL, NULL);
  155. if (IS_ERR(vbuf)) {
  156. *vbuffer_p = NULL;
  157. return ERR_CAST(vbuf);
  158. }
  159. *vbuffer_p = vbuf;
  160. return (struct virtio_gpu_update_cursor *)vbuf->buf;
  161. }
  162. static void *virtio_gpu_alloc_cmd_resp(struct virtio_gpu_device *vgdev,
  163. virtio_gpu_resp_cb cb,
  164. struct virtio_gpu_vbuffer **vbuffer_p,
  165. int cmd_size, int resp_size,
  166. void *resp_buf)
  167. {
  168. struct virtio_gpu_vbuffer *vbuf;
  169. vbuf = virtio_gpu_get_vbuf(vgdev, cmd_size,
  170. resp_size, resp_buf, cb);
  171. if (IS_ERR(vbuf)) {
  172. *vbuffer_p = NULL;
  173. return ERR_CAST(vbuf);
  174. }
  175. *vbuffer_p = vbuf;
  176. return (struct virtio_gpu_command *)vbuf->buf;
  177. }
  178. static void free_vbuf(struct virtio_gpu_device *vgdev,
  179. struct virtio_gpu_vbuffer *vbuf)
  180. {
  181. if (vbuf->resp_size > MAX_INLINE_RESP_SIZE)
  182. kfree(vbuf->resp_buf);
  183. kfree(vbuf->data_buf);
  184. spin_lock(&vgdev->free_vbufs_lock);
  185. list_add(&vbuf->list, &vgdev->free_vbufs);
  186. spin_unlock(&vgdev->free_vbufs_lock);
  187. }
  188. static void reclaim_vbufs(struct virtqueue *vq, struct list_head *reclaim_list)
  189. {
  190. struct virtio_gpu_vbuffer *vbuf;
  191. unsigned int len;
  192. int freed = 0;
  193. while ((vbuf = virtqueue_get_buf(vq, &len))) {
  194. list_add_tail(&vbuf->list, reclaim_list);
  195. freed++;
  196. }
  197. if (freed == 0)
  198. DRM_DEBUG("Huh? zero vbufs reclaimed");
  199. }
  200. void virtio_gpu_dequeue_ctrl_func(struct work_struct *work)
  201. {
  202. struct virtio_gpu_device *vgdev =
  203. container_of(work, struct virtio_gpu_device,
  204. ctrlq.dequeue_work);
  205. struct list_head reclaim_list;
  206. struct virtio_gpu_vbuffer *entry, *tmp;
  207. struct virtio_gpu_ctrl_hdr *resp;
  208. u64 fence_id = 0;
  209. INIT_LIST_HEAD(&reclaim_list);
  210. spin_lock(&vgdev->ctrlq.qlock);
  211. do {
  212. virtqueue_disable_cb(vgdev->ctrlq.vq);
  213. reclaim_vbufs(vgdev->ctrlq.vq, &reclaim_list);
  214. } while (!virtqueue_enable_cb(vgdev->ctrlq.vq));
  215. spin_unlock(&vgdev->ctrlq.qlock);
  216. list_for_each_entry_safe(entry, tmp, &reclaim_list, list) {
  217. resp = (struct virtio_gpu_ctrl_hdr *)entry->resp_buf;
  218. if (resp->type != cpu_to_le32(VIRTIO_GPU_RESP_OK_NODATA))
  219. DRM_DEBUG("response 0x%x\n", le32_to_cpu(resp->type));
  220. if (resp->flags & cpu_to_le32(VIRTIO_GPU_FLAG_FENCE)) {
  221. u64 f = le64_to_cpu(resp->fence_id);
  222. if (fence_id > f) {
  223. DRM_ERROR("%s: Oops: fence %llx -> %llx\n",
  224. __func__, fence_id, f);
  225. } else {
  226. fence_id = f;
  227. }
  228. }
  229. if (entry->resp_cb)
  230. entry->resp_cb(vgdev, entry);
  231. list_del(&entry->list);
  232. free_vbuf(vgdev, entry);
  233. }
  234. wake_up(&vgdev->ctrlq.ack_queue);
  235. if (fence_id)
  236. virtio_gpu_fence_event_process(vgdev, fence_id);
  237. }
  238. void virtio_gpu_dequeue_cursor_func(struct work_struct *work)
  239. {
  240. struct virtio_gpu_device *vgdev =
  241. container_of(work, struct virtio_gpu_device,
  242. cursorq.dequeue_work);
  243. struct list_head reclaim_list;
  244. struct virtio_gpu_vbuffer *entry, *tmp;
  245. INIT_LIST_HEAD(&reclaim_list);
  246. spin_lock(&vgdev->cursorq.qlock);
  247. do {
  248. virtqueue_disable_cb(vgdev->cursorq.vq);
  249. reclaim_vbufs(vgdev->cursorq.vq, &reclaim_list);
  250. } while (!virtqueue_enable_cb(vgdev->cursorq.vq));
  251. spin_unlock(&vgdev->cursorq.qlock);
  252. list_for_each_entry_safe(entry, tmp, &reclaim_list, list) {
  253. list_del(&entry->list);
  254. free_vbuf(vgdev, entry);
  255. }
  256. wake_up(&vgdev->cursorq.ack_queue);
  257. }
  258. static int virtio_gpu_queue_ctrl_buffer(struct virtio_gpu_device *vgdev,
  259. struct virtio_gpu_vbuffer *vbuf)
  260. {
  261. struct virtqueue *vq = vgdev->ctrlq.vq;
  262. struct scatterlist *sgs[3], vcmd, vout, vresp;
  263. int outcnt = 0, incnt = 0;
  264. int ret;
  265. if (!vgdev->vqs_ready)
  266. return -ENODEV;
  267. sg_init_one(&vcmd, vbuf->buf, vbuf->size);
  268. sgs[outcnt+incnt] = &vcmd;
  269. outcnt++;
  270. if (vbuf->data_size) {
  271. sg_init_one(&vout, vbuf->data_buf, vbuf->data_size);
  272. sgs[outcnt + incnt] = &vout;
  273. outcnt++;
  274. }
  275. if (vbuf->resp_size) {
  276. sg_init_one(&vresp, vbuf->resp_buf, vbuf->resp_size);
  277. sgs[outcnt + incnt] = &vresp;
  278. incnt++;
  279. }
  280. spin_lock(&vgdev->ctrlq.qlock);
  281. retry:
  282. ret = virtqueue_add_sgs(vq, sgs, outcnt, incnt, vbuf, GFP_ATOMIC);
  283. if (ret == -ENOSPC) {
  284. spin_unlock(&vgdev->ctrlq.qlock);
  285. wait_event(vgdev->ctrlq.ack_queue, vq->num_free);
  286. spin_lock(&vgdev->ctrlq.qlock);
  287. goto retry;
  288. } else {
  289. virtqueue_kick(vq);
  290. }
  291. spin_unlock(&vgdev->ctrlq.qlock);
  292. if (!ret)
  293. ret = vq->num_free;
  294. return ret;
  295. }
  296. static int virtio_gpu_queue_cursor(struct virtio_gpu_device *vgdev,
  297. struct virtio_gpu_vbuffer *vbuf)
  298. {
  299. struct virtqueue *vq = vgdev->cursorq.vq;
  300. struct scatterlist *sgs[1], ccmd;
  301. int ret;
  302. int outcnt;
  303. if (!vgdev->vqs_ready)
  304. return -ENODEV;
  305. sg_init_one(&ccmd, vbuf->buf, vbuf->size);
  306. sgs[0] = &ccmd;
  307. outcnt = 1;
  308. spin_lock(&vgdev->cursorq.qlock);
  309. retry:
  310. ret = virtqueue_add_sgs(vq, sgs, outcnt, 0, vbuf, GFP_ATOMIC);
  311. if (ret == -ENOSPC) {
  312. spin_unlock(&vgdev->cursorq.qlock);
  313. wait_event(vgdev->cursorq.ack_queue, vq->num_free);
  314. spin_lock(&vgdev->cursorq.qlock);
  315. goto retry;
  316. } else {
  317. virtqueue_kick(vq);
  318. }
  319. spin_unlock(&vgdev->cursorq.qlock);
  320. if (!ret)
  321. ret = vq->num_free;
  322. return ret;
  323. }
  324. /* just create gem objects for userspace and long lived objects,
  325. just use dma_alloced pages for the queue objects? */
  326. /* create a basic resource */
  327. void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
  328. uint32_t resource_id,
  329. uint32_t format,
  330. uint32_t width,
  331. uint32_t height)
  332. {
  333. struct virtio_gpu_resource_create_2d *cmd_p;
  334. struct virtio_gpu_vbuffer *vbuf;
  335. cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
  336. memset(cmd_p, 0, sizeof(*cmd_p));
  337. cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_CREATE_2D);
  338. cmd_p->resource_id = cpu_to_le32(resource_id);
  339. cmd_p->format = cpu_to_le32(format);
  340. cmd_p->width = cpu_to_le32(width);
  341. cmd_p->height = cpu_to_le32(height);
  342. virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
  343. }
  344. void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
  345. uint32_t resource_id)
  346. {
  347. struct virtio_gpu_resource_unref *cmd_p;
  348. struct virtio_gpu_vbuffer *vbuf;
  349. cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
  350. memset(cmd_p, 0, sizeof(*cmd_p));
  351. cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_UNREF);
  352. cmd_p->resource_id = cpu_to_le32(resource_id);
  353. virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
  354. }
  355. void virtio_gpu_cmd_resource_inval_backing(struct virtio_gpu_device *vgdev,
  356. uint32_t resource_id)
  357. {
  358. struct virtio_gpu_resource_detach_backing *cmd_p;
  359. struct virtio_gpu_vbuffer *vbuf;
  360. cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
  361. memset(cmd_p, 0, sizeof(*cmd_p));
  362. cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING);
  363. cmd_p->resource_id = cpu_to_le32(resource_id);
  364. virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
  365. }
  366. void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
  367. uint32_t scanout_id, uint32_t resource_id,
  368. uint32_t width, uint32_t height,
  369. uint32_t x, uint32_t y)
  370. {
  371. struct virtio_gpu_set_scanout *cmd_p;
  372. struct virtio_gpu_vbuffer *vbuf;
  373. cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
  374. memset(cmd_p, 0, sizeof(*cmd_p));
  375. cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_SET_SCANOUT);
  376. cmd_p->resource_id = cpu_to_le32(resource_id);
  377. cmd_p->scanout_id = cpu_to_le32(scanout_id);
  378. cmd_p->r.width = cpu_to_le32(width);
  379. cmd_p->r.height = cpu_to_le32(height);
  380. cmd_p->r.x = cpu_to_le32(x);
  381. cmd_p->r.y = cpu_to_le32(y);
  382. virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
  383. }
  384. void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
  385. uint32_t resource_id,
  386. uint32_t x, uint32_t y,
  387. uint32_t width, uint32_t height)
  388. {
  389. struct virtio_gpu_resource_flush *cmd_p;
  390. struct virtio_gpu_vbuffer *vbuf;
  391. cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
  392. memset(cmd_p, 0, sizeof(*cmd_p));
  393. cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_FLUSH);
  394. cmd_p->resource_id = cpu_to_le32(resource_id);
  395. cmd_p->r.width = cpu_to_le32(width);
  396. cmd_p->r.height = cpu_to_le32(height);
  397. cmd_p->r.x = cpu_to_le32(x);
  398. cmd_p->r.y = cpu_to_le32(y);
  399. virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
  400. }
  401. void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
  402. uint32_t resource_id, uint64_t offset,
  403. __le32 width, __le32 height,
  404. __le32 x, __le32 y,
  405. struct virtio_gpu_fence **fence)
  406. {
  407. struct virtio_gpu_transfer_to_host_2d *cmd_p;
  408. struct virtio_gpu_vbuffer *vbuf;
  409. cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
  410. memset(cmd_p, 0, sizeof(*cmd_p));
  411. cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D);
  412. cmd_p->resource_id = cpu_to_le32(resource_id);
  413. cmd_p->offset = cpu_to_le64(offset);
  414. cmd_p->r.width = width;
  415. cmd_p->r.height = height;
  416. cmd_p->r.x = x;
  417. cmd_p->r.y = y;
  418. if (fence)
  419. virtio_gpu_fence_emit(vgdev, &cmd_p->hdr, fence);
  420. virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
  421. }
  422. static void
  423. virtio_gpu_cmd_resource_attach_backing(struct virtio_gpu_device *vgdev,
  424. uint32_t resource_id,
  425. struct virtio_gpu_mem_entry *ents,
  426. uint32_t nents,
  427. struct virtio_gpu_fence **fence)
  428. {
  429. struct virtio_gpu_resource_attach_backing *cmd_p;
  430. struct virtio_gpu_vbuffer *vbuf;
  431. cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
  432. memset(cmd_p, 0, sizeof(*cmd_p));
  433. cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING);
  434. cmd_p->resource_id = cpu_to_le32(resource_id);
  435. cmd_p->nr_entries = cpu_to_le32(nents);
  436. vbuf->data_buf = ents;
  437. vbuf->data_size = sizeof(*ents) * nents;
  438. if (fence)
  439. virtio_gpu_fence_emit(vgdev, &cmd_p->hdr, fence);
  440. virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
  441. }
  442. static void virtio_gpu_cmd_get_display_info_cb(struct virtio_gpu_device *vgdev,
  443. struct virtio_gpu_vbuffer *vbuf)
  444. {
  445. struct virtio_gpu_resp_display_info *resp =
  446. (struct virtio_gpu_resp_display_info *)vbuf->resp_buf;
  447. int i;
  448. spin_lock(&vgdev->display_info_lock);
  449. for (i = 0; i < vgdev->num_scanouts; i++) {
  450. vgdev->outputs[i].info = resp->pmodes[i];
  451. if (resp->pmodes[i].enabled) {
  452. DRM_DEBUG("output %d: %dx%d+%d+%d", i,
  453. le32_to_cpu(resp->pmodes[i].r.width),
  454. le32_to_cpu(resp->pmodes[i].r.height),
  455. le32_to_cpu(resp->pmodes[i].r.x),
  456. le32_to_cpu(resp->pmodes[i].r.y));
  457. } else {
  458. DRM_DEBUG("output %d: disabled", i);
  459. }
  460. }
  461. vgdev->display_info_pending = false;
  462. spin_unlock(&vgdev->display_info_lock);
  463. wake_up(&vgdev->resp_wq);
  464. if (!drm_helper_hpd_irq_event(vgdev->ddev))
  465. drm_kms_helper_hotplug_event(vgdev->ddev);
  466. }
  467. int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev)
  468. {
  469. struct virtio_gpu_ctrl_hdr *cmd_p;
  470. struct virtio_gpu_vbuffer *vbuf;
  471. void *resp_buf;
  472. resp_buf = kzalloc(sizeof(struct virtio_gpu_resp_display_info),
  473. GFP_KERNEL);
  474. if (!resp_buf)
  475. return -ENOMEM;
  476. cmd_p = virtio_gpu_alloc_cmd_resp
  477. (vgdev, &virtio_gpu_cmd_get_display_info_cb, &vbuf,
  478. sizeof(*cmd_p), sizeof(struct virtio_gpu_resp_display_info),
  479. resp_buf);
  480. memset(cmd_p, 0, sizeof(*cmd_p));
  481. vgdev->display_info_pending = true;
  482. cmd_p->type = cpu_to_le32(VIRTIO_GPU_CMD_GET_DISPLAY_INFO);
  483. virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
  484. return 0;
  485. }
  486. int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
  487. struct virtio_gpu_object *obj,
  488. uint32_t resource_id,
  489. struct virtio_gpu_fence **fence)
  490. {
  491. struct virtio_gpu_mem_entry *ents;
  492. struct scatterlist *sg;
  493. int si;
  494. if (!obj->pages) {
  495. int ret;
  496. ret = virtio_gpu_object_get_sg_table(vgdev, obj);
  497. if (ret)
  498. return ret;
  499. }
  500. /* gets freed when the ring has consumed it */
  501. ents = kmalloc_array(obj->pages->nents,
  502. sizeof(struct virtio_gpu_mem_entry),
  503. GFP_KERNEL);
  504. if (!ents) {
  505. DRM_ERROR("failed to allocate ent list\n");
  506. return -ENOMEM;
  507. }
  508. for_each_sg(obj->pages->sgl, sg, obj->pages->nents, si) {
  509. ents[si].addr = cpu_to_le64(sg_phys(sg));
  510. ents[si].length = cpu_to_le32(sg->length);
  511. ents[si].padding = 0;
  512. }
  513. virtio_gpu_cmd_resource_attach_backing(vgdev, resource_id,
  514. ents, obj->pages->nents,
  515. fence);
  516. obj->hw_res_handle = resource_id;
  517. return 0;
  518. }
  519. void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
  520. struct virtio_gpu_output *output)
  521. {
  522. struct virtio_gpu_vbuffer *vbuf;
  523. struct virtio_gpu_update_cursor *cur_p;
  524. output->cursor.pos.scanout_id = cpu_to_le32(output->index);
  525. cur_p = virtio_gpu_alloc_cursor(vgdev, &vbuf);
  526. memcpy(cur_p, &output->cursor, sizeof(output->cursor));
  527. virtio_gpu_queue_cursor(vgdev, vbuf);
  528. }