drm.c 27 KB

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  1. /*
  2. * Copyright (C) 2012 Avionic Design GmbH
  3. * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/host1x.h>
  10. #include <linux/iommu.h>
  11. #include <drm/drm_atomic.h>
  12. #include <drm/drm_atomic_helper.h>
  13. #include "drm.h"
  14. #include "gem.h"
  15. #define DRIVER_NAME "tegra"
  16. #define DRIVER_DESC "NVIDIA Tegra graphics"
  17. #define DRIVER_DATE "20120330"
  18. #define DRIVER_MAJOR 0
  19. #define DRIVER_MINOR 0
  20. #define DRIVER_PATCHLEVEL 0
  21. struct tegra_drm_file {
  22. struct list_head contexts;
  23. };
  24. static void tegra_atomic_schedule(struct tegra_drm *tegra,
  25. struct drm_atomic_state *state)
  26. {
  27. tegra->commit.state = state;
  28. schedule_work(&tegra->commit.work);
  29. }
  30. static void tegra_atomic_complete(struct tegra_drm *tegra,
  31. struct drm_atomic_state *state)
  32. {
  33. struct drm_device *drm = tegra->drm;
  34. /*
  35. * Everything below can be run asynchronously without the need to grab
  36. * any modeset locks at all under one condition: It must be guaranteed
  37. * that the asynchronous work has either been cancelled (if the driver
  38. * supports it, which at least requires that the framebuffers get
  39. * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
  40. * before the new state gets committed on the software side with
  41. * drm_atomic_helper_swap_state().
  42. *
  43. * This scheme allows new atomic state updates to be prepared and
  44. * checked in parallel to the asynchronous completion of the previous
  45. * update. Which is important since compositors need to figure out the
  46. * composition of the next frame right after having submitted the
  47. * current layout.
  48. */
  49. drm_atomic_helper_commit_modeset_disables(drm, state);
  50. drm_atomic_helper_commit_planes(drm, state);
  51. drm_atomic_helper_commit_modeset_enables(drm, state);
  52. drm_atomic_helper_wait_for_vblanks(drm, state);
  53. drm_atomic_helper_cleanup_planes(drm, state);
  54. drm_atomic_state_free(state);
  55. }
  56. static void tegra_atomic_work(struct work_struct *work)
  57. {
  58. struct tegra_drm *tegra = container_of(work, struct tegra_drm,
  59. commit.work);
  60. tegra_atomic_complete(tegra, tegra->commit.state);
  61. }
  62. static int tegra_atomic_commit(struct drm_device *drm,
  63. struct drm_atomic_state *state, bool async)
  64. {
  65. struct tegra_drm *tegra = drm->dev_private;
  66. int err;
  67. err = drm_atomic_helper_prepare_planes(drm, state);
  68. if (err)
  69. return err;
  70. /* serialize outstanding asynchronous commits */
  71. mutex_lock(&tegra->commit.lock);
  72. flush_work(&tegra->commit.work);
  73. /*
  74. * This is the point of no return - everything below never fails except
  75. * when the hw goes bonghits. Which means we can commit the new state on
  76. * the software side now.
  77. */
  78. drm_atomic_helper_swap_state(drm, state);
  79. if (async)
  80. tegra_atomic_schedule(tegra, state);
  81. else
  82. tegra_atomic_complete(tegra, state);
  83. mutex_unlock(&tegra->commit.lock);
  84. return 0;
  85. }
  86. static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
  87. .fb_create = tegra_fb_create,
  88. #ifdef CONFIG_DRM_TEGRA_FBDEV
  89. .output_poll_changed = tegra_fb_output_poll_changed,
  90. #endif
  91. .atomic_check = drm_atomic_helper_check,
  92. .atomic_commit = tegra_atomic_commit,
  93. };
  94. static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
  95. {
  96. struct host1x_device *device = to_host1x_device(drm->dev);
  97. struct tegra_drm *tegra;
  98. int err;
  99. tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
  100. if (!tegra)
  101. return -ENOMEM;
  102. if (iommu_present(&platform_bus_type)) {
  103. struct iommu_domain_geometry *geometry;
  104. u64 start, end;
  105. tegra->domain = iommu_domain_alloc(&platform_bus_type);
  106. if (!tegra->domain) {
  107. err = -ENOMEM;
  108. goto free;
  109. }
  110. geometry = &tegra->domain->geometry;
  111. start = geometry->aperture_start;
  112. end = geometry->aperture_end;
  113. DRM_DEBUG("IOMMU context initialized (aperture: %#llx-%#llx)\n",
  114. start, end);
  115. drm_mm_init(&tegra->mm, start, end - start + 1);
  116. }
  117. mutex_init(&tegra->clients_lock);
  118. INIT_LIST_HEAD(&tegra->clients);
  119. mutex_init(&tegra->commit.lock);
  120. INIT_WORK(&tegra->commit.work, tegra_atomic_work);
  121. drm->dev_private = tegra;
  122. tegra->drm = drm;
  123. drm_mode_config_init(drm);
  124. drm->mode_config.min_width = 0;
  125. drm->mode_config.min_height = 0;
  126. drm->mode_config.max_width = 4096;
  127. drm->mode_config.max_height = 4096;
  128. drm->mode_config.funcs = &tegra_drm_mode_funcs;
  129. err = tegra_drm_fb_prepare(drm);
  130. if (err < 0)
  131. goto config;
  132. drm_kms_helper_poll_init(drm);
  133. err = host1x_device_init(device);
  134. if (err < 0)
  135. goto fbdev;
  136. /*
  137. * We don't use the drm_irq_install() helpers provided by the DRM
  138. * core, so we need to set this manually in order to allow the
  139. * DRM_IOCTL_WAIT_VBLANK to operate correctly.
  140. */
  141. drm->irq_enabled = true;
  142. /* syncpoints are used for full 32-bit hardware VBLANK counters */
  143. drm->max_vblank_count = 0xffffffff;
  144. drm->vblank_disable_allowed = true;
  145. err = drm_vblank_init(drm, drm->mode_config.num_crtc);
  146. if (err < 0)
  147. goto device;
  148. drm_mode_config_reset(drm);
  149. err = tegra_drm_fb_init(drm);
  150. if (err < 0)
  151. goto vblank;
  152. return 0;
  153. vblank:
  154. drm_vblank_cleanup(drm);
  155. device:
  156. host1x_device_exit(device);
  157. fbdev:
  158. drm_kms_helper_poll_fini(drm);
  159. tegra_drm_fb_free(drm);
  160. config:
  161. drm_mode_config_cleanup(drm);
  162. if (tegra->domain) {
  163. iommu_domain_free(tegra->domain);
  164. drm_mm_takedown(&tegra->mm);
  165. }
  166. free:
  167. kfree(tegra);
  168. return err;
  169. }
  170. static int tegra_drm_unload(struct drm_device *drm)
  171. {
  172. struct host1x_device *device = to_host1x_device(drm->dev);
  173. struct tegra_drm *tegra = drm->dev_private;
  174. int err;
  175. drm_kms_helper_poll_fini(drm);
  176. tegra_drm_fb_exit(drm);
  177. drm_mode_config_cleanup(drm);
  178. drm_vblank_cleanup(drm);
  179. err = host1x_device_exit(device);
  180. if (err < 0)
  181. return err;
  182. if (tegra->domain) {
  183. iommu_domain_free(tegra->domain);
  184. drm_mm_takedown(&tegra->mm);
  185. }
  186. kfree(tegra);
  187. return 0;
  188. }
  189. static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
  190. {
  191. struct tegra_drm_file *fpriv;
  192. fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
  193. if (!fpriv)
  194. return -ENOMEM;
  195. INIT_LIST_HEAD(&fpriv->contexts);
  196. filp->driver_priv = fpriv;
  197. return 0;
  198. }
  199. static void tegra_drm_context_free(struct tegra_drm_context *context)
  200. {
  201. context->client->ops->close_channel(context);
  202. kfree(context);
  203. }
  204. static void tegra_drm_lastclose(struct drm_device *drm)
  205. {
  206. #ifdef CONFIG_DRM_TEGRA_FBDEV
  207. struct tegra_drm *tegra = drm->dev_private;
  208. tegra_fbdev_restore_mode(tegra->fbdev);
  209. #endif
  210. }
  211. static struct host1x_bo *
  212. host1x_bo_lookup(struct drm_device *drm, struct drm_file *file, u32 handle)
  213. {
  214. struct drm_gem_object *gem;
  215. struct tegra_bo *bo;
  216. gem = drm_gem_object_lookup(drm, file, handle);
  217. if (!gem)
  218. return NULL;
  219. mutex_lock(&drm->struct_mutex);
  220. drm_gem_object_unreference(gem);
  221. mutex_unlock(&drm->struct_mutex);
  222. bo = to_tegra_bo(gem);
  223. return &bo->base;
  224. }
  225. static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
  226. struct drm_tegra_reloc __user *src,
  227. struct drm_device *drm,
  228. struct drm_file *file)
  229. {
  230. u32 cmdbuf, target;
  231. int err;
  232. err = get_user(cmdbuf, &src->cmdbuf.handle);
  233. if (err < 0)
  234. return err;
  235. err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
  236. if (err < 0)
  237. return err;
  238. err = get_user(target, &src->target.handle);
  239. if (err < 0)
  240. return err;
  241. err = get_user(dest->target.offset, &src->target.offset);
  242. if (err < 0)
  243. return err;
  244. err = get_user(dest->shift, &src->shift);
  245. if (err < 0)
  246. return err;
  247. dest->cmdbuf.bo = host1x_bo_lookup(drm, file, cmdbuf);
  248. if (!dest->cmdbuf.bo)
  249. return -ENOENT;
  250. dest->target.bo = host1x_bo_lookup(drm, file, target);
  251. if (!dest->target.bo)
  252. return -ENOENT;
  253. return 0;
  254. }
  255. int tegra_drm_submit(struct tegra_drm_context *context,
  256. struct drm_tegra_submit *args, struct drm_device *drm,
  257. struct drm_file *file)
  258. {
  259. unsigned int num_cmdbufs = args->num_cmdbufs;
  260. unsigned int num_relocs = args->num_relocs;
  261. unsigned int num_waitchks = args->num_waitchks;
  262. struct drm_tegra_cmdbuf __user *cmdbufs =
  263. (void __user *)(uintptr_t)args->cmdbufs;
  264. struct drm_tegra_reloc __user *relocs =
  265. (void __user *)(uintptr_t)args->relocs;
  266. struct drm_tegra_waitchk __user *waitchks =
  267. (void __user *)(uintptr_t)args->waitchks;
  268. struct drm_tegra_syncpt syncpt;
  269. struct host1x_job *job;
  270. int err;
  271. /* We don't yet support other than one syncpt_incr struct per submit */
  272. if (args->num_syncpts != 1)
  273. return -EINVAL;
  274. job = host1x_job_alloc(context->channel, args->num_cmdbufs,
  275. args->num_relocs, args->num_waitchks);
  276. if (!job)
  277. return -ENOMEM;
  278. job->num_relocs = args->num_relocs;
  279. job->num_waitchk = args->num_waitchks;
  280. job->client = (u32)args->context;
  281. job->class = context->client->base.class;
  282. job->serialize = true;
  283. while (num_cmdbufs) {
  284. struct drm_tegra_cmdbuf cmdbuf;
  285. struct host1x_bo *bo;
  286. if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
  287. err = -EFAULT;
  288. goto fail;
  289. }
  290. bo = host1x_bo_lookup(drm, file, cmdbuf.handle);
  291. if (!bo) {
  292. err = -ENOENT;
  293. goto fail;
  294. }
  295. host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
  296. num_cmdbufs--;
  297. cmdbufs++;
  298. }
  299. /* copy and resolve relocations from submit */
  300. while (num_relocs--) {
  301. err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
  302. &relocs[num_relocs], drm,
  303. file);
  304. if (err < 0)
  305. goto fail;
  306. }
  307. if (copy_from_user(job->waitchk, waitchks,
  308. sizeof(*waitchks) * num_waitchks)) {
  309. err = -EFAULT;
  310. goto fail;
  311. }
  312. if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
  313. sizeof(syncpt))) {
  314. err = -EFAULT;
  315. goto fail;
  316. }
  317. job->is_addr_reg = context->client->ops->is_addr_reg;
  318. job->syncpt_incrs = syncpt.incrs;
  319. job->syncpt_id = syncpt.id;
  320. job->timeout = 10000;
  321. if (args->timeout && args->timeout < 10000)
  322. job->timeout = args->timeout;
  323. err = host1x_job_pin(job, context->client->base.dev);
  324. if (err)
  325. goto fail;
  326. err = host1x_job_submit(job);
  327. if (err)
  328. goto fail_submit;
  329. args->fence = job->syncpt_end;
  330. host1x_job_put(job);
  331. return 0;
  332. fail_submit:
  333. host1x_job_unpin(job);
  334. fail:
  335. host1x_job_put(job);
  336. return err;
  337. }
  338. #ifdef CONFIG_DRM_TEGRA_STAGING
  339. static struct tegra_drm_context *tegra_drm_get_context(__u64 context)
  340. {
  341. return (struct tegra_drm_context *)(uintptr_t)context;
  342. }
  343. static bool tegra_drm_file_owns_context(struct tegra_drm_file *file,
  344. struct tegra_drm_context *context)
  345. {
  346. struct tegra_drm_context *ctx;
  347. list_for_each_entry(ctx, &file->contexts, list)
  348. if (ctx == context)
  349. return true;
  350. return false;
  351. }
  352. static int tegra_gem_create(struct drm_device *drm, void *data,
  353. struct drm_file *file)
  354. {
  355. struct drm_tegra_gem_create *args = data;
  356. struct tegra_bo *bo;
  357. bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
  358. &args->handle);
  359. if (IS_ERR(bo))
  360. return PTR_ERR(bo);
  361. return 0;
  362. }
  363. static int tegra_gem_mmap(struct drm_device *drm, void *data,
  364. struct drm_file *file)
  365. {
  366. struct drm_tegra_gem_mmap *args = data;
  367. struct drm_gem_object *gem;
  368. struct tegra_bo *bo;
  369. gem = drm_gem_object_lookup(drm, file, args->handle);
  370. if (!gem)
  371. return -EINVAL;
  372. bo = to_tegra_bo(gem);
  373. args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
  374. drm_gem_object_unreference(gem);
  375. return 0;
  376. }
  377. static int tegra_syncpt_read(struct drm_device *drm, void *data,
  378. struct drm_file *file)
  379. {
  380. struct host1x *host = dev_get_drvdata(drm->dev->parent);
  381. struct drm_tegra_syncpt_read *args = data;
  382. struct host1x_syncpt *sp;
  383. sp = host1x_syncpt_get(host, args->id);
  384. if (!sp)
  385. return -EINVAL;
  386. args->value = host1x_syncpt_read_min(sp);
  387. return 0;
  388. }
  389. static int tegra_syncpt_incr(struct drm_device *drm, void *data,
  390. struct drm_file *file)
  391. {
  392. struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
  393. struct drm_tegra_syncpt_incr *args = data;
  394. struct host1x_syncpt *sp;
  395. sp = host1x_syncpt_get(host1x, args->id);
  396. if (!sp)
  397. return -EINVAL;
  398. return host1x_syncpt_incr(sp);
  399. }
  400. static int tegra_syncpt_wait(struct drm_device *drm, void *data,
  401. struct drm_file *file)
  402. {
  403. struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
  404. struct drm_tegra_syncpt_wait *args = data;
  405. struct host1x_syncpt *sp;
  406. sp = host1x_syncpt_get(host1x, args->id);
  407. if (!sp)
  408. return -EINVAL;
  409. return host1x_syncpt_wait(sp, args->thresh, args->timeout,
  410. &args->value);
  411. }
  412. static int tegra_open_channel(struct drm_device *drm, void *data,
  413. struct drm_file *file)
  414. {
  415. struct tegra_drm_file *fpriv = file->driver_priv;
  416. struct tegra_drm *tegra = drm->dev_private;
  417. struct drm_tegra_open_channel *args = data;
  418. struct tegra_drm_context *context;
  419. struct tegra_drm_client *client;
  420. int err = -ENODEV;
  421. context = kzalloc(sizeof(*context), GFP_KERNEL);
  422. if (!context)
  423. return -ENOMEM;
  424. list_for_each_entry(client, &tegra->clients, list)
  425. if (client->base.class == args->client) {
  426. err = client->ops->open_channel(client, context);
  427. if (err)
  428. break;
  429. list_add(&context->list, &fpriv->contexts);
  430. args->context = (uintptr_t)context;
  431. context->client = client;
  432. return 0;
  433. }
  434. kfree(context);
  435. return err;
  436. }
  437. static int tegra_close_channel(struct drm_device *drm, void *data,
  438. struct drm_file *file)
  439. {
  440. struct tegra_drm_file *fpriv = file->driver_priv;
  441. struct drm_tegra_close_channel *args = data;
  442. struct tegra_drm_context *context;
  443. context = tegra_drm_get_context(args->context);
  444. if (!tegra_drm_file_owns_context(fpriv, context))
  445. return -EINVAL;
  446. list_del(&context->list);
  447. tegra_drm_context_free(context);
  448. return 0;
  449. }
  450. static int tegra_get_syncpt(struct drm_device *drm, void *data,
  451. struct drm_file *file)
  452. {
  453. struct tegra_drm_file *fpriv = file->driver_priv;
  454. struct drm_tegra_get_syncpt *args = data;
  455. struct tegra_drm_context *context;
  456. struct host1x_syncpt *syncpt;
  457. context = tegra_drm_get_context(args->context);
  458. if (!tegra_drm_file_owns_context(fpriv, context))
  459. return -ENODEV;
  460. if (args->index >= context->client->base.num_syncpts)
  461. return -EINVAL;
  462. syncpt = context->client->base.syncpts[args->index];
  463. args->id = host1x_syncpt_id(syncpt);
  464. return 0;
  465. }
  466. static int tegra_submit(struct drm_device *drm, void *data,
  467. struct drm_file *file)
  468. {
  469. struct tegra_drm_file *fpriv = file->driver_priv;
  470. struct drm_tegra_submit *args = data;
  471. struct tegra_drm_context *context;
  472. context = tegra_drm_get_context(args->context);
  473. if (!tegra_drm_file_owns_context(fpriv, context))
  474. return -ENODEV;
  475. return context->client->ops->submit(context, args, drm, file);
  476. }
  477. static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
  478. struct drm_file *file)
  479. {
  480. struct tegra_drm_file *fpriv = file->driver_priv;
  481. struct drm_tegra_get_syncpt_base *args = data;
  482. struct tegra_drm_context *context;
  483. struct host1x_syncpt_base *base;
  484. struct host1x_syncpt *syncpt;
  485. context = tegra_drm_get_context(args->context);
  486. if (!tegra_drm_file_owns_context(fpriv, context))
  487. return -ENODEV;
  488. if (args->syncpt >= context->client->base.num_syncpts)
  489. return -EINVAL;
  490. syncpt = context->client->base.syncpts[args->syncpt];
  491. base = host1x_syncpt_get_base(syncpt);
  492. if (!base)
  493. return -ENXIO;
  494. args->id = host1x_syncpt_base_id(base);
  495. return 0;
  496. }
  497. static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
  498. struct drm_file *file)
  499. {
  500. struct drm_tegra_gem_set_tiling *args = data;
  501. enum tegra_bo_tiling_mode mode;
  502. struct drm_gem_object *gem;
  503. unsigned long value = 0;
  504. struct tegra_bo *bo;
  505. switch (args->mode) {
  506. case DRM_TEGRA_GEM_TILING_MODE_PITCH:
  507. mode = TEGRA_BO_TILING_MODE_PITCH;
  508. if (args->value != 0)
  509. return -EINVAL;
  510. break;
  511. case DRM_TEGRA_GEM_TILING_MODE_TILED:
  512. mode = TEGRA_BO_TILING_MODE_TILED;
  513. if (args->value != 0)
  514. return -EINVAL;
  515. break;
  516. case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
  517. mode = TEGRA_BO_TILING_MODE_BLOCK;
  518. if (args->value > 5)
  519. return -EINVAL;
  520. value = args->value;
  521. break;
  522. default:
  523. return -EINVAL;
  524. }
  525. gem = drm_gem_object_lookup(drm, file, args->handle);
  526. if (!gem)
  527. return -ENOENT;
  528. bo = to_tegra_bo(gem);
  529. bo->tiling.mode = mode;
  530. bo->tiling.value = value;
  531. drm_gem_object_unreference(gem);
  532. return 0;
  533. }
  534. static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
  535. struct drm_file *file)
  536. {
  537. struct drm_tegra_gem_get_tiling *args = data;
  538. struct drm_gem_object *gem;
  539. struct tegra_bo *bo;
  540. int err = 0;
  541. gem = drm_gem_object_lookup(drm, file, args->handle);
  542. if (!gem)
  543. return -ENOENT;
  544. bo = to_tegra_bo(gem);
  545. switch (bo->tiling.mode) {
  546. case TEGRA_BO_TILING_MODE_PITCH:
  547. args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
  548. args->value = 0;
  549. break;
  550. case TEGRA_BO_TILING_MODE_TILED:
  551. args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
  552. args->value = 0;
  553. break;
  554. case TEGRA_BO_TILING_MODE_BLOCK:
  555. args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
  556. args->value = bo->tiling.value;
  557. break;
  558. default:
  559. err = -EINVAL;
  560. break;
  561. }
  562. drm_gem_object_unreference(gem);
  563. return err;
  564. }
  565. static int tegra_gem_set_flags(struct drm_device *drm, void *data,
  566. struct drm_file *file)
  567. {
  568. struct drm_tegra_gem_set_flags *args = data;
  569. struct drm_gem_object *gem;
  570. struct tegra_bo *bo;
  571. if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
  572. return -EINVAL;
  573. gem = drm_gem_object_lookup(drm, file, args->handle);
  574. if (!gem)
  575. return -ENOENT;
  576. bo = to_tegra_bo(gem);
  577. bo->flags = 0;
  578. if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
  579. bo->flags |= TEGRA_BO_BOTTOM_UP;
  580. drm_gem_object_unreference(gem);
  581. return 0;
  582. }
  583. static int tegra_gem_get_flags(struct drm_device *drm, void *data,
  584. struct drm_file *file)
  585. {
  586. struct drm_tegra_gem_get_flags *args = data;
  587. struct drm_gem_object *gem;
  588. struct tegra_bo *bo;
  589. gem = drm_gem_object_lookup(drm, file, args->handle);
  590. if (!gem)
  591. return -ENOENT;
  592. bo = to_tegra_bo(gem);
  593. args->flags = 0;
  594. if (bo->flags & TEGRA_BO_BOTTOM_UP)
  595. args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
  596. drm_gem_object_unreference(gem);
  597. return 0;
  598. }
  599. #endif
  600. static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
  601. #ifdef CONFIG_DRM_TEGRA_STAGING
  602. DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, DRM_UNLOCKED),
  603. DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, DRM_UNLOCKED),
  604. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, DRM_UNLOCKED),
  605. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, DRM_UNLOCKED),
  606. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, DRM_UNLOCKED),
  607. DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, DRM_UNLOCKED),
  608. DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, DRM_UNLOCKED),
  609. DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, DRM_UNLOCKED),
  610. DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, DRM_UNLOCKED),
  611. DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, DRM_UNLOCKED),
  612. DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, DRM_UNLOCKED),
  613. DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, DRM_UNLOCKED),
  614. DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, DRM_UNLOCKED),
  615. DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, DRM_UNLOCKED),
  616. #endif
  617. };
  618. static const struct file_operations tegra_drm_fops = {
  619. .owner = THIS_MODULE,
  620. .open = drm_open,
  621. .release = drm_release,
  622. .unlocked_ioctl = drm_ioctl,
  623. .mmap = tegra_drm_mmap,
  624. .poll = drm_poll,
  625. .read = drm_read,
  626. #ifdef CONFIG_COMPAT
  627. .compat_ioctl = drm_compat_ioctl,
  628. #endif
  629. .llseek = noop_llseek,
  630. };
  631. static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm,
  632. unsigned int pipe)
  633. {
  634. struct drm_crtc *crtc;
  635. list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) {
  636. if (pipe == drm_crtc_index(crtc))
  637. return crtc;
  638. }
  639. return NULL;
  640. }
  641. static u32 tegra_drm_get_vblank_counter(struct drm_device *drm, int pipe)
  642. {
  643. struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
  644. struct tegra_dc *dc = to_tegra_dc(crtc);
  645. if (!crtc)
  646. return 0;
  647. return tegra_dc_get_vblank_counter(dc);
  648. }
  649. static int tegra_drm_enable_vblank(struct drm_device *drm, int pipe)
  650. {
  651. struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
  652. struct tegra_dc *dc = to_tegra_dc(crtc);
  653. if (!crtc)
  654. return -ENODEV;
  655. tegra_dc_enable_vblank(dc);
  656. return 0;
  657. }
  658. static void tegra_drm_disable_vblank(struct drm_device *drm, int pipe)
  659. {
  660. struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
  661. struct tegra_dc *dc = to_tegra_dc(crtc);
  662. if (crtc)
  663. tegra_dc_disable_vblank(dc);
  664. }
  665. static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
  666. {
  667. struct tegra_drm_file *fpriv = file->driver_priv;
  668. struct tegra_drm_context *context, *tmp;
  669. struct drm_crtc *crtc;
  670. list_for_each_entry(crtc, &drm->mode_config.crtc_list, head)
  671. tegra_dc_cancel_page_flip(crtc, file);
  672. list_for_each_entry_safe(context, tmp, &fpriv->contexts, list)
  673. tegra_drm_context_free(context);
  674. kfree(fpriv);
  675. }
  676. #ifdef CONFIG_DEBUG_FS
  677. static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
  678. {
  679. struct drm_info_node *node = (struct drm_info_node *)s->private;
  680. struct drm_device *drm = node->minor->dev;
  681. struct drm_framebuffer *fb;
  682. mutex_lock(&drm->mode_config.fb_lock);
  683. list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
  684. seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
  685. fb->base.id, fb->width, fb->height, fb->depth,
  686. fb->bits_per_pixel,
  687. atomic_read(&fb->refcount.refcount));
  688. }
  689. mutex_unlock(&drm->mode_config.fb_lock);
  690. return 0;
  691. }
  692. static int tegra_debugfs_iova(struct seq_file *s, void *data)
  693. {
  694. struct drm_info_node *node = (struct drm_info_node *)s->private;
  695. struct drm_device *drm = node->minor->dev;
  696. struct tegra_drm *tegra = drm->dev_private;
  697. return drm_mm_dump_table(s, &tegra->mm);
  698. }
  699. static struct drm_info_list tegra_debugfs_list[] = {
  700. { "framebuffers", tegra_debugfs_framebuffers, 0 },
  701. { "iova", tegra_debugfs_iova, 0 },
  702. };
  703. static int tegra_debugfs_init(struct drm_minor *minor)
  704. {
  705. return drm_debugfs_create_files(tegra_debugfs_list,
  706. ARRAY_SIZE(tegra_debugfs_list),
  707. minor->debugfs_root, minor);
  708. }
  709. static void tegra_debugfs_cleanup(struct drm_minor *minor)
  710. {
  711. drm_debugfs_remove_files(tegra_debugfs_list,
  712. ARRAY_SIZE(tegra_debugfs_list), minor);
  713. }
  714. #endif
  715. static struct drm_driver tegra_drm_driver = {
  716. .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
  717. .load = tegra_drm_load,
  718. .unload = tegra_drm_unload,
  719. .open = tegra_drm_open,
  720. .preclose = tegra_drm_preclose,
  721. .lastclose = tegra_drm_lastclose,
  722. .get_vblank_counter = tegra_drm_get_vblank_counter,
  723. .enable_vblank = tegra_drm_enable_vblank,
  724. .disable_vblank = tegra_drm_disable_vblank,
  725. #if defined(CONFIG_DEBUG_FS)
  726. .debugfs_init = tegra_debugfs_init,
  727. .debugfs_cleanup = tegra_debugfs_cleanup,
  728. #endif
  729. .gem_free_object = tegra_bo_free_object,
  730. .gem_vm_ops = &tegra_bo_vm_ops,
  731. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  732. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  733. .gem_prime_export = tegra_gem_prime_export,
  734. .gem_prime_import = tegra_gem_prime_import,
  735. .dumb_create = tegra_bo_dumb_create,
  736. .dumb_map_offset = tegra_bo_dumb_map_offset,
  737. .dumb_destroy = drm_gem_dumb_destroy,
  738. .ioctls = tegra_drm_ioctls,
  739. .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
  740. .fops = &tegra_drm_fops,
  741. .name = DRIVER_NAME,
  742. .desc = DRIVER_DESC,
  743. .date = DRIVER_DATE,
  744. .major = DRIVER_MAJOR,
  745. .minor = DRIVER_MINOR,
  746. .patchlevel = DRIVER_PATCHLEVEL,
  747. };
  748. int tegra_drm_register_client(struct tegra_drm *tegra,
  749. struct tegra_drm_client *client)
  750. {
  751. mutex_lock(&tegra->clients_lock);
  752. list_add_tail(&client->list, &tegra->clients);
  753. mutex_unlock(&tegra->clients_lock);
  754. return 0;
  755. }
  756. int tegra_drm_unregister_client(struct tegra_drm *tegra,
  757. struct tegra_drm_client *client)
  758. {
  759. mutex_lock(&tegra->clients_lock);
  760. list_del_init(&client->list);
  761. mutex_unlock(&tegra->clients_lock);
  762. return 0;
  763. }
  764. static int host1x_drm_probe(struct host1x_device *dev)
  765. {
  766. struct drm_driver *driver = &tegra_drm_driver;
  767. struct drm_device *drm;
  768. int err;
  769. drm = drm_dev_alloc(driver, &dev->dev);
  770. if (!drm)
  771. return -ENOMEM;
  772. drm_dev_set_unique(drm, dev_name(&dev->dev));
  773. dev_set_drvdata(&dev->dev, drm);
  774. err = drm_dev_register(drm, 0);
  775. if (err < 0)
  776. goto unref;
  777. DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
  778. driver->major, driver->minor, driver->patchlevel,
  779. driver->date, drm->primary->index);
  780. return 0;
  781. unref:
  782. drm_dev_unref(drm);
  783. return err;
  784. }
  785. static int host1x_drm_remove(struct host1x_device *dev)
  786. {
  787. struct drm_device *drm = dev_get_drvdata(&dev->dev);
  788. drm_dev_unregister(drm);
  789. drm_dev_unref(drm);
  790. return 0;
  791. }
  792. #ifdef CONFIG_PM_SLEEP
  793. static int host1x_drm_suspend(struct device *dev)
  794. {
  795. struct drm_device *drm = dev_get_drvdata(dev);
  796. drm_kms_helper_poll_disable(drm);
  797. return 0;
  798. }
  799. static int host1x_drm_resume(struct device *dev)
  800. {
  801. struct drm_device *drm = dev_get_drvdata(dev);
  802. drm_kms_helper_poll_enable(drm);
  803. return 0;
  804. }
  805. #endif
  806. static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
  807. host1x_drm_resume);
  808. static const struct of_device_id host1x_drm_subdevs[] = {
  809. { .compatible = "nvidia,tegra20-dc", },
  810. { .compatible = "nvidia,tegra20-hdmi", },
  811. { .compatible = "nvidia,tegra20-gr2d", },
  812. { .compatible = "nvidia,tegra20-gr3d", },
  813. { .compatible = "nvidia,tegra30-dc", },
  814. { .compatible = "nvidia,tegra30-hdmi", },
  815. { .compatible = "nvidia,tegra30-gr2d", },
  816. { .compatible = "nvidia,tegra30-gr3d", },
  817. { .compatible = "nvidia,tegra114-dsi", },
  818. { .compatible = "nvidia,tegra114-hdmi", },
  819. { .compatible = "nvidia,tegra114-gr3d", },
  820. { .compatible = "nvidia,tegra124-dc", },
  821. { .compatible = "nvidia,tegra124-sor", },
  822. { .compatible = "nvidia,tegra124-hdmi", },
  823. { .compatible = "nvidia,tegra124-dsi", },
  824. { .compatible = "nvidia,tegra132-dsi", },
  825. { .compatible = "nvidia,tegra210-dc", },
  826. { .compatible = "nvidia,tegra210-dsi", },
  827. { .compatible = "nvidia,tegra210-sor", },
  828. { .compatible = "nvidia,tegra210-sor1", },
  829. { /* sentinel */ }
  830. };
  831. static struct host1x_driver host1x_drm_driver = {
  832. .driver = {
  833. .name = "drm",
  834. .pm = &host1x_drm_pm_ops,
  835. },
  836. .probe = host1x_drm_probe,
  837. .remove = host1x_drm_remove,
  838. .subdevs = host1x_drm_subdevs,
  839. };
  840. static int __init host1x_drm_init(void)
  841. {
  842. int err;
  843. err = host1x_driver_register(&host1x_drm_driver);
  844. if (err < 0)
  845. return err;
  846. err = platform_driver_register(&tegra_dc_driver);
  847. if (err < 0)
  848. goto unregister_host1x;
  849. err = platform_driver_register(&tegra_dsi_driver);
  850. if (err < 0)
  851. goto unregister_dc;
  852. err = platform_driver_register(&tegra_sor_driver);
  853. if (err < 0)
  854. goto unregister_dsi;
  855. err = platform_driver_register(&tegra_hdmi_driver);
  856. if (err < 0)
  857. goto unregister_sor;
  858. err = platform_driver_register(&tegra_dpaux_driver);
  859. if (err < 0)
  860. goto unregister_hdmi;
  861. err = platform_driver_register(&tegra_gr2d_driver);
  862. if (err < 0)
  863. goto unregister_dpaux;
  864. err = platform_driver_register(&tegra_gr3d_driver);
  865. if (err < 0)
  866. goto unregister_gr2d;
  867. return 0;
  868. unregister_gr2d:
  869. platform_driver_unregister(&tegra_gr2d_driver);
  870. unregister_dpaux:
  871. platform_driver_unregister(&tegra_dpaux_driver);
  872. unregister_hdmi:
  873. platform_driver_unregister(&tegra_hdmi_driver);
  874. unregister_sor:
  875. platform_driver_unregister(&tegra_sor_driver);
  876. unregister_dsi:
  877. platform_driver_unregister(&tegra_dsi_driver);
  878. unregister_dc:
  879. platform_driver_unregister(&tegra_dc_driver);
  880. unregister_host1x:
  881. host1x_driver_unregister(&host1x_drm_driver);
  882. return err;
  883. }
  884. module_init(host1x_drm_init);
  885. static void __exit host1x_drm_exit(void)
  886. {
  887. platform_driver_unregister(&tegra_gr3d_driver);
  888. platform_driver_unregister(&tegra_gr2d_driver);
  889. platform_driver_unregister(&tegra_dpaux_driver);
  890. platform_driver_unregister(&tegra_hdmi_driver);
  891. platform_driver_unregister(&tegra_sor_driver);
  892. platform_driver_unregister(&tegra_dsi_driver);
  893. platform_driver_unregister(&tegra_dc_driver);
  894. host1x_driver_unregister(&host1x_drm_driver);
  895. }
  896. module_exit(host1x_drm_exit);
  897. MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
  898. MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
  899. MODULE_LICENSE("GPL v2");