intel_opregion.c 28 KB

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  1. /*
  2. * Copyright 2008 Intel Corporation <hong.liu@intel.com>
  3. * Copyright 2008 Red Hat <mjg@redhat.com>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  20. * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  22. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  23. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  24. * SOFTWARE.
  25. *
  26. */
  27. #include <linux/acpi.h>
  28. #include <acpi/video.h>
  29. #include <drm/drmP.h>
  30. #include <drm/i915_drm.h>
  31. #include "i915_drv.h"
  32. #include "intel_drv.h"
  33. #define PCI_ASLE 0xe4
  34. #define PCI_ASLS 0xfc
  35. #define PCI_SWSCI 0xe8
  36. #define PCI_SWSCI_SCISEL (1 << 15)
  37. #define PCI_SWSCI_GSSCIE (1 << 0)
  38. #define OPREGION_HEADER_OFFSET 0
  39. #define OPREGION_ACPI_OFFSET 0x100
  40. #define ACPI_CLID 0x01ac /* current lid state indicator */
  41. #define ACPI_CDCK 0x01b0 /* current docking state indicator */
  42. #define OPREGION_SWSCI_OFFSET 0x200
  43. #define OPREGION_ASLE_OFFSET 0x300
  44. #define OPREGION_VBT_OFFSET 0x400
  45. #define OPREGION_SIGNATURE "IntelGraphicsMem"
  46. #define MBOX_ACPI (1<<0)
  47. #define MBOX_SWSCI (1<<1)
  48. #define MBOX_ASLE (1<<2)
  49. #define MBOX_ASLE_EXT (1<<4)
  50. struct opregion_header {
  51. u8 signature[16];
  52. u32 size;
  53. u32 opregion_ver;
  54. u8 bios_ver[32];
  55. u8 vbios_ver[16];
  56. u8 driver_ver[16];
  57. u32 mboxes;
  58. u32 driver_model;
  59. u32 pcon;
  60. u8 dver[32];
  61. u8 rsvd[124];
  62. } __packed;
  63. /* OpRegion mailbox #1: public ACPI methods */
  64. struct opregion_acpi {
  65. u32 drdy; /* driver readiness */
  66. u32 csts; /* notification status */
  67. u32 cevt; /* current event */
  68. u8 rsvd1[20];
  69. u32 didl[8]; /* supported display devices ID list */
  70. u32 cpdl[8]; /* currently presented display list */
  71. u32 cadl[8]; /* currently active display list */
  72. u32 nadl[8]; /* next active devices list */
  73. u32 aslp; /* ASL sleep time-out */
  74. u32 tidx; /* toggle table index */
  75. u32 chpd; /* current hotplug enable indicator */
  76. u32 clid; /* current lid state*/
  77. u32 cdck; /* current docking state */
  78. u32 sxsw; /* Sx state resume */
  79. u32 evts; /* ASL supported events */
  80. u32 cnot; /* current OS notification */
  81. u32 nrdy; /* driver status */
  82. u32 did2[7]; /* extended supported display devices ID list */
  83. u32 cpd2[7]; /* extended attached display devices list */
  84. u8 rsvd2[4];
  85. } __packed;
  86. /* OpRegion mailbox #2: SWSCI */
  87. struct opregion_swsci {
  88. u32 scic; /* SWSCI command|status|data */
  89. u32 parm; /* command parameters */
  90. u32 dslp; /* driver sleep time-out */
  91. u8 rsvd[244];
  92. } __packed;
  93. /* OpRegion mailbox #3: ASLE */
  94. struct opregion_asle {
  95. u32 ardy; /* driver readiness */
  96. u32 aslc; /* ASLE interrupt command */
  97. u32 tche; /* technology enabled indicator */
  98. u32 alsi; /* current ALS illuminance reading */
  99. u32 bclp; /* backlight brightness to set */
  100. u32 pfit; /* panel fitting state */
  101. u32 cblv; /* current brightness level */
  102. u16 bclm[20]; /* backlight level duty cycle mapping table */
  103. u32 cpfm; /* current panel fitting mode */
  104. u32 epfm; /* enabled panel fitting modes */
  105. u8 plut[74]; /* panel LUT and identifier */
  106. u32 pfmb; /* PWM freq and min brightness */
  107. u32 cddv; /* color correction default values */
  108. u32 pcft; /* power conservation features */
  109. u32 srot; /* supported rotation angles */
  110. u32 iuer; /* IUER events */
  111. u64 fdss;
  112. u32 fdsp;
  113. u32 stat;
  114. u8 rsvd[70];
  115. } __packed;
  116. /* Driver readiness indicator */
  117. #define ASLE_ARDY_READY (1 << 0)
  118. #define ASLE_ARDY_NOT_READY (0 << 0)
  119. /* ASLE Interrupt Command (ASLC) bits */
  120. #define ASLC_SET_ALS_ILLUM (1 << 0)
  121. #define ASLC_SET_BACKLIGHT (1 << 1)
  122. #define ASLC_SET_PFIT (1 << 2)
  123. #define ASLC_SET_PWM_FREQ (1 << 3)
  124. #define ASLC_SUPPORTED_ROTATION_ANGLES (1 << 4)
  125. #define ASLC_BUTTON_ARRAY (1 << 5)
  126. #define ASLC_CONVERTIBLE_INDICATOR (1 << 6)
  127. #define ASLC_DOCKING_INDICATOR (1 << 7)
  128. #define ASLC_ISCT_STATE_CHANGE (1 << 8)
  129. #define ASLC_REQ_MSK 0x1ff
  130. /* response bits */
  131. #define ASLC_ALS_ILLUM_FAILED (1 << 10)
  132. #define ASLC_BACKLIGHT_FAILED (1 << 12)
  133. #define ASLC_PFIT_FAILED (1 << 14)
  134. #define ASLC_PWM_FREQ_FAILED (1 << 16)
  135. #define ASLC_ROTATION_ANGLES_FAILED (1 << 18)
  136. #define ASLC_BUTTON_ARRAY_FAILED (1 << 20)
  137. #define ASLC_CONVERTIBLE_FAILED (1 << 22)
  138. #define ASLC_DOCKING_FAILED (1 << 24)
  139. #define ASLC_ISCT_STATE_FAILED (1 << 26)
  140. /* Technology enabled indicator */
  141. #define ASLE_TCHE_ALS_EN (1 << 0)
  142. #define ASLE_TCHE_BLC_EN (1 << 1)
  143. #define ASLE_TCHE_PFIT_EN (1 << 2)
  144. #define ASLE_TCHE_PFMB_EN (1 << 3)
  145. /* ASLE backlight brightness to set */
  146. #define ASLE_BCLP_VALID (1<<31)
  147. #define ASLE_BCLP_MSK (~(1<<31))
  148. /* ASLE panel fitting request */
  149. #define ASLE_PFIT_VALID (1<<31)
  150. #define ASLE_PFIT_CENTER (1<<0)
  151. #define ASLE_PFIT_STRETCH_TEXT (1<<1)
  152. #define ASLE_PFIT_STRETCH_GFX (1<<2)
  153. /* PWM frequency and minimum brightness */
  154. #define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
  155. #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
  156. #define ASLE_PFMB_PWM_MASK (0x7ffffe00)
  157. #define ASLE_PFMB_PWM_VALID (1<<31)
  158. #define ASLE_CBLV_VALID (1<<31)
  159. /* IUER */
  160. #define ASLE_IUER_DOCKING (1 << 7)
  161. #define ASLE_IUER_CONVERTIBLE (1 << 6)
  162. #define ASLE_IUER_ROTATION_LOCK_BTN (1 << 4)
  163. #define ASLE_IUER_VOLUME_DOWN_BTN (1 << 3)
  164. #define ASLE_IUER_VOLUME_UP_BTN (1 << 2)
  165. #define ASLE_IUER_WINDOWS_BTN (1 << 1)
  166. #define ASLE_IUER_POWER_BTN (1 << 0)
  167. /* Software System Control Interrupt (SWSCI) */
  168. #define SWSCI_SCIC_INDICATOR (1 << 0)
  169. #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT 1
  170. #define SWSCI_SCIC_MAIN_FUNCTION_MASK (0xf << 1)
  171. #define SWSCI_SCIC_SUB_FUNCTION_SHIFT 8
  172. #define SWSCI_SCIC_SUB_FUNCTION_MASK (0xff << 8)
  173. #define SWSCI_SCIC_EXIT_PARAMETER_SHIFT 8
  174. #define SWSCI_SCIC_EXIT_PARAMETER_MASK (0xff << 8)
  175. #define SWSCI_SCIC_EXIT_STATUS_SHIFT 5
  176. #define SWSCI_SCIC_EXIT_STATUS_MASK (7 << 5)
  177. #define SWSCI_SCIC_EXIT_STATUS_SUCCESS 1
  178. #define SWSCI_FUNCTION_CODE(main, sub) \
  179. ((main) << SWSCI_SCIC_MAIN_FUNCTION_SHIFT | \
  180. (sub) << SWSCI_SCIC_SUB_FUNCTION_SHIFT)
  181. /* SWSCI: Get BIOS Data (GBDA) */
  182. #define SWSCI_GBDA 4
  183. #define SWSCI_GBDA_SUPPORTED_CALLS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 0)
  184. #define SWSCI_GBDA_REQUESTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 1)
  185. #define SWSCI_GBDA_BOOT_DISPLAY_PREF SWSCI_FUNCTION_CODE(SWSCI_GBDA, 4)
  186. #define SWSCI_GBDA_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 5)
  187. #define SWSCI_GBDA_TV_STANDARD SWSCI_FUNCTION_CODE(SWSCI_GBDA, 6)
  188. #define SWSCI_GBDA_INTERNAL_GRAPHICS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 7)
  189. #define SWSCI_GBDA_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_GBDA, 10)
  190. /* SWSCI: System BIOS Callbacks (SBCB) */
  191. #define SWSCI_SBCB 6
  192. #define SWSCI_SBCB_SUPPORTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 0)
  193. #define SWSCI_SBCB_INIT_COMPLETION SWSCI_FUNCTION_CODE(SWSCI_SBCB, 1)
  194. #define SWSCI_SBCB_PRE_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 3)
  195. #define SWSCI_SBCB_POST_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 4)
  196. #define SWSCI_SBCB_DISPLAY_SWITCH SWSCI_FUNCTION_CODE(SWSCI_SBCB, 5)
  197. #define SWSCI_SBCB_SET_TV_FORMAT SWSCI_FUNCTION_CODE(SWSCI_SBCB, 6)
  198. #define SWSCI_SBCB_ADAPTER_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 7)
  199. #define SWSCI_SBCB_DISPLAY_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 8)
  200. #define SWSCI_SBCB_SET_BOOT_DISPLAY SWSCI_FUNCTION_CODE(SWSCI_SBCB, 9)
  201. #define SWSCI_SBCB_SET_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 10)
  202. #define SWSCI_SBCB_SET_INTERNAL_GFX SWSCI_FUNCTION_CODE(SWSCI_SBCB, 11)
  203. #define SWSCI_SBCB_POST_HIRES_TO_DOS_FS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 16)
  204. #define SWSCI_SBCB_SUSPEND_RESUME SWSCI_FUNCTION_CODE(SWSCI_SBCB, 17)
  205. #define SWSCI_SBCB_SET_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 18)
  206. #define SWSCI_SBCB_POST_VBE_PM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 19)
  207. #define SWSCI_SBCB_ENABLE_DISABLE_AUDIO SWSCI_FUNCTION_CODE(SWSCI_SBCB, 21)
  208. #define ACPI_OTHER_OUTPUT (0<<8)
  209. #define ACPI_VGA_OUTPUT (1<<8)
  210. #define ACPI_TV_OUTPUT (2<<8)
  211. #define ACPI_DIGITAL_OUTPUT (3<<8)
  212. #define ACPI_LVDS_OUTPUT (4<<8)
  213. #define MAX_DSLP 1500
  214. #ifdef CONFIG_ACPI
  215. static int swsci(struct drm_device *dev, u32 function, u32 parm, u32 *parm_out)
  216. {
  217. struct drm_i915_private *dev_priv = dev->dev_private;
  218. struct opregion_swsci __iomem *swsci = dev_priv->opregion.swsci;
  219. u32 main_function, sub_function, scic;
  220. u16 pci_swsci;
  221. u32 dslp;
  222. if (!swsci)
  223. return -ENODEV;
  224. main_function = (function & SWSCI_SCIC_MAIN_FUNCTION_MASK) >>
  225. SWSCI_SCIC_MAIN_FUNCTION_SHIFT;
  226. sub_function = (function & SWSCI_SCIC_SUB_FUNCTION_MASK) >>
  227. SWSCI_SCIC_SUB_FUNCTION_SHIFT;
  228. /* Check if we can call the function. See swsci_setup for details. */
  229. if (main_function == SWSCI_SBCB) {
  230. if ((dev_priv->opregion.swsci_sbcb_sub_functions &
  231. (1 << sub_function)) == 0)
  232. return -EINVAL;
  233. } else if (main_function == SWSCI_GBDA) {
  234. if ((dev_priv->opregion.swsci_gbda_sub_functions &
  235. (1 << sub_function)) == 0)
  236. return -EINVAL;
  237. }
  238. /* Driver sleep timeout in ms. */
  239. dslp = ioread32(&swsci->dslp);
  240. if (!dslp) {
  241. /* The spec says 2ms should be the default, but it's too small
  242. * for some machines. */
  243. dslp = 50;
  244. } else if (dslp > MAX_DSLP) {
  245. /* Hey bios, trust must be earned. */
  246. DRM_INFO_ONCE("ACPI BIOS requests an excessive sleep of %u ms, "
  247. "using %u ms instead\n", dslp, MAX_DSLP);
  248. dslp = MAX_DSLP;
  249. }
  250. /* The spec tells us to do this, but we are the only user... */
  251. scic = ioread32(&swsci->scic);
  252. if (scic & SWSCI_SCIC_INDICATOR) {
  253. DRM_DEBUG_DRIVER("SWSCI request already in progress\n");
  254. return -EBUSY;
  255. }
  256. scic = function | SWSCI_SCIC_INDICATOR;
  257. iowrite32(parm, &swsci->parm);
  258. iowrite32(scic, &swsci->scic);
  259. /* Ensure SCI event is selected and event trigger is cleared. */
  260. pci_read_config_word(dev->pdev, PCI_SWSCI, &pci_swsci);
  261. if (!(pci_swsci & PCI_SWSCI_SCISEL) || (pci_swsci & PCI_SWSCI_GSSCIE)) {
  262. pci_swsci |= PCI_SWSCI_SCISEL;
  263. pci_swsci &= ~PCI_SWSCI_GSSCIE;
  264. pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci);
  265. }
  266. /* Use event trigger to tell bios to check the mail. */
  267. pci_swsci |= PCI_SWSCI_GSSCIE;
  268. pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci);
  269. /* Poll for the result. */
  270. #define C (((scic = ioread32(&swsci->scic)) & SWSCI_SCIC_INDICATOR) == 0)
  271. if (wait_for(C, dslp)) {
  272. DRM_DEBUG_DRIVER("SWSCI request timed out\n");
  273. return -ETIMEDOUT;
  274. }
  275. scic = (scic & SWSCI_SCIC_EXIT_STATUS_MASK) >>
  276. SWSCI_SCIC_EXIT_STATUS_SHIFT;
  277. /* Note: scic == 0 is an error! */
  278. if (scic != SWSCI_SCIC_EXIT_STATUS_SUCCESS) {
  279. DRM_DEBUG_DRIVER("SWSCI request error %u\n", scic);
  280. return -EIO;
  281. }
  282. if (parm_out)
  283. *parm_out = ioread32(&swsci->parm);
  284. return 0;
  285. #undef C
  286. }
  287. #define DISPLAY_TYPE_CRT 0
  288. #define DISPLAY_TYPE_TV 1
  289. #define DISPLAY_TYPE_EXTERNAL_FLAT_PANEL 2
  290. #define DISPLAY_TYPE_INTERNAL_FLAT_PANEL 3
  291. int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder,
  292. bool enable)
  293. {
  294. struct drm_device *dev = intel_encoder->base.dev;
  295. u32 parm = 0;
  296. u32 type = 0;
  297. u32 port;
  298. /* don't care about old stuff for now */
  299. if (!HAS_DDI(dev))
  300. return 0;
  301. port = intel_ddi_get_encoder_port(intel_encoder);
  302. if (port == PORT_E) {
  303. port = 0;
  304. } else {
  305. parm |= 1 << port;
  306. port++;
  307. }
  308. if (!enable)
  309. parm |= 4 << 8;
  310. switch (intel_encoder->type) {
  311. case INTEL_OUTPUT_ANALOG:
  312. type = DISPLAY_TYPE_CRT;
  313. break;
  314. case INTEL_OUTPUT_UNKNOWN:
  315. case INTEL_OUTPUT_DISPLAYPORT:
  316. case INTEL_OUTPUT_HDMI:
  317. case INTEL_OUTPUT_DP_MST:
  318. type = DISPLAY_TYPE_EXTERNAL_FLAT_PANEL;
  319. break;
  320. case INTEL_OUTPUT_EDP:
  321. type = DISPLAY_TYPE_INTERNAL_FLAT_PANEL;
  322. break;
  323. default:
  324. WARN_ONCE(1, "unsupported intel_encoder type %d\n",
  325. intel_encoder->type);
  326. return -EINVAL;
  327. }
  328. parm |= type << (16 + port * 3);
  329. return swsci(dev, SWSCI_SBCB_DISPLAY_POWER_STATE, parm, NULL);
  330. }
  331. static const struct {
  332. pci_power_t pci_power_state;
  333. u32 parm;
  334. } power_state_map[] = {
  335. { PCI_D0, 0x00 },
  336. { PCI_D1, 0x01 },
  337. { PCI_D2, 0x02 },
  338. { PCI_D3hot, 0x04 },
  339. { PCI_D3cold, 0x04 },
  340. };
  341. int intel_opregion_notify_adapter(struct drm_device *dev, pci_power_t state)
  342. {
  343. int i;
  344. if (!HAS_DDI(dev))
  345. return 0;
  346. for (i = 0; i < ARRAY_SIZE(power_state_map); i++) {
  347. if (state == power_state_map[i].pci_power_state)
  348. return swsci(dev, SWSCI_SBCB_ADAPTER_POWER_STATE,
  349. power_state_map[i].parm, NULL);
  350. }
  351. return -EINVAL;
  352. }
  353. static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
  354. {
  355. struct drm_i915_private *dev_priv = dev->dev_private;
  356. struct intel_connector *intel_connector;
  357. struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
  358. DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp);
  359. if (acpi_video_get_backlight_type() == acpi_backlight_native) {
  360. DRM_DEBUG_KMS("opregion backlight request ignored\n");
  361. return 0;
  362. }
  363. if (!(bclp & ASLE_BCLP_VALID))
  364. return ASLC_BACKLIGHT_FAILED;
  365. bclp &= ASLE_BCLP_MSK;
  366. if (bclp > 255)
  367. return ASLC_BACKLIGHT_FAILED;
  368. drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  369. /*
  370. * Update backlight on all connectors that support backlight (usually
  371. * only one).
  372. */
  373. DRM_DEBUG_KMS("updating opregion backlight %d/255\n", bclp);
  374. list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head)
  375. intel_panel_set_backlight_acpi(intel_connector, bclp, 255);
  376. iowrite32(DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID, &asle->cblv);
  377. drm_modeset_unlock(&dev->mode_config.connection_mutex);
  378. return 0;
  379. }
  380. static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
  381. {
  382. /* alsi is the current ALS reading in lux. 0 indicates below sensor
  383. range, 0xffff indicates above sensor range. 1-0xfffe are valid */
  384. DRM_DEBUG_DRIVER("Illum is not supported\n");
  385. return ASLC_ALS_ILLUM_FAILED;
  386. }
  387. static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
  388. {
  389. DRM_DEBUG_DRIVER("PWM freq is not supported\n");
  390. return ASLC_PWM_FREQ_FAILED;
  391. }
  392. static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
  393. {
  394. /* Panel fitting is currently controlled by the X code, so this is a
  395. noop until modesetting support works fully */
  396. DRM_DEBUG_DRIVER("Pfit is not supported\n");
  397. return ASLC_PFIT_FAILED;
  398. }
  399. static u32 asle_set_supported_rotation_angles(struct drm_device *dev, u32 srot)
  400. {
  401. DRM_DEBUG_DRIVER("SROT is not supported\n");
  402. return ASLC_ROTATION_ANGLES_FAILED;
  403. }
  404. static u32 asle_set_button_array(struct drm_device *dev, u32 iuer)
  405. {
  406. if (!iuer)
  407. DRM_DEBUG_DRIVER("Button array event is not supported (nothing)\n");
  408. if (iuer & ASLE_IUER_ROTATION_LOCK_BTN)
  409. DRM_DEBUG_DRIVER("Button array event is not supported (rotation lock)\n");
  410. if (iuer & ASLE_IUER_VOLUME_DOWN_BTN)
  411. DRM_DEBUG_DRIVER("Button array event is not supported (volume down)\n");
  412. if (iuer & ASLE_IUER_VOLUME_UP_BTN)
  413. DRM_DEBUG_DRIVER("Button array event is not supported (volume up)\n");
  414. if (iuer & ASLE_IUER_WINDOWS_BTN)
  415. DRM_DEBUG_DRIVER("Button array event is not supported (windows)\n");
  416. if (iuer & ASLE_IUER_POWER_BTN)
  417. DRM_DEBUG_DRIVER("Button array event is not supported (power)\n");
  418. return ASLC_BUTTON_ARRAY_FAILED;
  419. }
  420. static u32 asle_set_convertible(struct drm_device *dev, u32 iuer)
  421. {
  422. if (iuer & ASLE_IUER_CONVERTIBLE)
  423. DRM_DEBUG_DRIVER("Convertible is not supported (clamshell)\n");
  424. else
  425. DRM_DEBUG_DRIVER("Convertible is not supported (slate)\n");
  426. return ASLC_CONVERTIBLE_FAILED;
  427. }
  428. static u32 asle_set_docking(struct drm_device *dev, u32 iuer)
  429. {
  430. if (iuer & ASLE_IUER_DOCKING)
  431. DRM_DEBUG_DRIVER("Docking is not supported (docked)\n");
  432. else
  433. DRM_DEBUG_DRIVER("Docking is not supported (undocked)\n");
  434. return ASLC_DOCKING_FAILED;
  435. }
  436. static u32 asle_isct_state(struct drm_device *dev)
  437. {
  438. DRM_DEBUG_DRIVER("ISCT is not supported\n");
  439. return ASLC_ISCT_STATE_FAILED;
  440. }
  441. static void asle_work(struct work_struct *work)
  442. {
  443. struct intel_opregion *opregion =
  444. container_of(work, struct intel_opregion, asle_work);
  445. struct drm_i915_private *dev_priv =
  446. container_of(opregion, struct drm_i915_private, opregion);
  447. struct drm_device *dev = dev_priv->dev;
  448. struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
  449. u32 aslc_stat = 0;
  450. u32 aslc_req;
  451. if (!asle)
  452. return;
  453. aslc_req = ioread32(&asle->aslc);
  454. if (!(aslc_req & ASLC_REQ_MSK)) {
  455. DRM_DEBUG_DRIVER("No request on ASLC interrupt 0x%08x\n",
  456. aslc_req);
  457. return;
  458. }
  459. if (aslc_req & ASLC_SET_ALS_ILLUM)
  460. aslc_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi));
  461. if (aslc_req & ASLC_SET_BACKLIGHT)
  462. aslc_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));
  463. if (aslc_req & ASLC_SET_PFIT)
  464. aslc_stat |= asle_set_pfit(dev, ioread32(&asle->pfit));
  465. if (aslc_req & ASLC_SET_PWM_FREQ)
  466. aslc_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));
  467. if (aslc_req & ASLC_SUPPORTED_ROTATION_ANGLES)
  468. aslc_stat |= asle_set_supported_rotation_angles(dev,
  469. ioread32(&asle->srot));
  470. if (aslc_req & ASLC_BUTTON_ARRAY)
  471. aslc_stat |= asle_set_button_array(dev, ioread32(&asle->iuer));
  472. if (aslc_req & ASLC_CONVERTIBLE_INDICATOR)
  473. aslc_stat |= asle_set_convertible(dev, ioread32(&asle->iuer));
  474. if (aslc_req & ASLC_DOCKING_INDICATOR)
  475. aslc_stat |= asle_set_docking(dev, ioread32(&asle->iuer));
  476. if (aslc_req & ASLC_ISCT_STATE_CHANGE)
  477. aslc_stat |= asle_isct_state(dev);
  478. iowrite32(aslc_stat, &asle->aslc);
  479. }
  480. void intel_opregion_asle_intr(struct drm_device *dev)
  481. {
  482. struct drm_i915_private *dev_priv = dev->dev_private;
  483. if (dev_priv->opregion.asle)
  484. schedule_work(&dev_priv->opregion.asle_work);
  485. }
  486. #define ACPI_EV_DISPLAY_SWITCH (1<<0)
  487. #define ACPI_EV_LID (1<<1)
  488. #define ACPI_EV_DOCK (1<<2)
  489. static struct intel_opregion *system_opregion;
  490. static int intel_opregion_video_event(struct notifier_block *nb,
  491. unsigned long val, void *data)
  492. {
  493. /* The only video events relevant to opregion are 0x80. These indicate
  494. either a docking event, lid switch or display switch request. In
  495. Linux, these are handled by the dock, button and video drivers.
  496. */
  497. struct opregion_acpi __iomem *acpi;
  498. struct acpi_bus_event *event = data;
  499. int ret = NOTIFY_OK;
  500. if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0)
  501. return NOTIFY_DONE;
  502. if (!system_opregion)
  503. return NOTIFY_DONE;
  504. acpi = system_opregion->acpi;
  505. if (event->type == 0x80 &&
  506. (ioread32(&acpi->cevt) & 1) == 0)
  507. ret = NOTIFY_BAD;
  508. iowrite32(0, &acpi->csts);
  509. return ret;
  510. }
  511. static struct notifier_block intel_opregion_notifier = {
  512. .notifier_call = intel_opregion_video_event,
  513. };
  514. /*
  515. * Initialise the DIDL field in opregion. This passes a list of devices to
  516. * the firmware. Values are defined by section B.4.2 of the ACPI specification
  517. * (version 3)
  518. */
  519. static u32 get_did(struct intel_opregion *opregion, int i)
  520. {
  521. u32 did;
  522. if (i < ARRAY_SIZE(opregion->acpi->didl)) {
  523. did = ioread32(&opregion->acpi->didl[i]);
  524. } else {
  525. i -= ARRAY_SIZE(opregion->acpi->didl);
  526. if (WARN_ON(i >= ARRAY_SIZE(opregion->acpi->did2)))
  527. return 0;
  528. did = ioread32(&opregion->acpi->did2[i]);
  529. }
  530. return did;
  531. }
  532. static void set_did(struct intel_opregion *opregion, int i, u32 val)
  533. {
  534. if (i < ARRAY_SIZE(opregion->acpi->didl)) {
  535. iowrite32(val, &opregion->acpi->didl[i]);
  536. } else {
  537. i -= ARRAY_SIZE(opregion->acpi->didl);
  538. if (WARN_ON(i >= ARRAY_SIZE(opregion->acpi->did2)))
  539. return;
  540. iowrite32(val, &opregion->acpi->did2[i]);
  541. }
  542. }
  543. static void intel_didl_outputs(struct drm_device *dev)
  544. {
  545. struct drm_i915_private *dev_priv = dev->dev_private;
  546. struct intel_opregion *opregion = &dev_priv->opregion;
  547. struct drm_connector *connector;
  548. acpi_handle handle;
  549. struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL;
  550. unsigned long long device_id;
  551. acpi_status status;
  552. u32 temp, max_outputs;
  553. int i = 0;
  554. handle = ACPI_HANDLE(&dev->pdev->dev);
  555. if (!handle || acpi_bus_get_device(handle, &acpi_dev))
  556. return;
  557. if (acpi_is_video_device(handle))
  558. acpi_video_bus = acpi_dev;
  559. else {
  560. list_for_each_entry(acpi_cdev, &acpi_dev->children, node) {
  561. if (acpi_is_video_device(acpi_cdev->handle)) {
  562. acpi_video_bus = acpi_cdev;
  563. break;
  564. }
  565. }
  566. }
  567. if (!acpi_video_bus) {
  568. DRM_ERROR("No ACPI video bus found\n");
  569. return;
  570. }
  571. /*
  572. * In theory, did2, the extended didl, gets added at opregion version
  573. * 3.0. In practice, however, we're supposed to set it for earlier
  574. * versions as well, since a BIOS that doesn't understand did2 should
  575. * not look at it anyway. Use a variable so we can tweak this if a need
  576. * arises later.
  577. */
  578. max_outputs = ARRAY_SIZE(opregion->acpi->didl) +
  579. ARRAY_SIZE(opregion->acpi->did2);
  580. list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) {
  581. if (i >= max_outputs) {
  582. DRM_DEBUG_KMS("More than %u outputs detected via ACPI\n",
  583. max_outputs);
  584. return;
  585. }
  586. status = acpi_evaluate_integer(acpi_cdev->handle, "_ADR",
  587. NULL, &device_id);
  588. if (ACPI_SUCCESS(status)) {
  589. if (!device_id)
  590. goto blind_set;
  591. set_did(opregion, i++, (u32)(device_id & 0x0f0f));
  592. }
  593. }
  594. end:
  595. DRM_DEBUG_KMS("%d outputs detected\n", i);
  596. /* If fewer than max outputs, the list must be null terminated */
  597. if (i < max_outputs)
  598. set_did(opregion, i, 0);
  599. return;
  600. blind_set:
  601. i = 0;
  602. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  603. int output_type = ACPI_OTHER_OUTPUT;
  604. if (i >= max_outputs) {
  605. DRM_DEBUG_KMS("More than %u outputs in connector list\n",
  606. max_outputs);
  607. return;
  608. }
  609. switch (connector->connector_type) {
  610. case DRM_MODE_CONNECTOR_VGA:
  611. case DRM_MODE_CONNECTOR_DVIA:
  612. output_type = ACPI_VGA_OUTPUT;
  613. break;
  614. case DRM_MODE_CONNECTOR_Composite:
  615. case DRM_MODE_CONNECTOR_SVIDEO:
  616. case DRM_MODE_CONNECTOR_Component:
  617. case DRM_MODE_CONNECTOR_9PinDIN:
  618. output_type = ACPI_TV_OUTPUT;
  619. break;
  620. case DRM_MODE_CONNECTOR_DVII:
  621. case DRM_MODE_CONNECTOR_DVID:
  622. case DRM_MODE_CONNECTOR_DisplayPort:
  623. case DRM_MODE_CONNECTOR_HDMIA:
  624. case DRM_MODE_CONNECTOR_HDMIB:
  625. output_type = ACPI_DIGITAL_OUTPUT;
  626. break;
  627. case DRM_MODE_CONNECTOR_LVDS:
  628. output_type = ACPI_LVDS_OUTPUT;
  629. break;
  630. }
  631. temp = get_did(opregion, i);
  632. set_did(opregion, i, temp | (1 << 31) | output_type | i);
  633. i++;
  634. }
  635. goto end;
  636. }
  637. static void intel_setup_cadls(struct drm_device *dev)
  638. {
  639. struct drm_i915_private *dev_priv = dev->dev_private;
  640. struct intel_opregion *opregion = &dev_priv->opregion;
  641. int i = 0;
  642. u32 disp_id;
  643. /* Initialize the CADL field by duplicating the DIDL values.
  644. * Technically, this is not always correct as display outputs may exist,
  645. * but not active. This initialization is necessary for some Clevo
  646. * laptops that check this field before processing the brightness and
  647. * display switching hotkeys. Just like DIDL, CADL is NULL-terminated if
  648. * there are less than eight devices. */
  649. do {
  650. disp_id = get_did(opregion, i);
  651. iowrite32(disp_id, &opregion->acpi->cadl[i]);
  652. } while (++i < 8 && disp_id != 0);
  653. }
  654. void intel_opregion_init(struct drm_device *dev)
  655. {
  656. struct drm_i915_private *dev_priv = dev->dev_private;
  657. struct intel_opregion *opregion = &dev_priv->opregion;
  658. if (!opregion->header)
  659. return;
  660. if (opregion->acpi) {
  661. intel_didl_outputs(dev);
  662. intel_setup_cadls(dev);
  663. /* Notify BIOS we are ready to handle ACPI video ext notifs.
  664. * Right now, all the events are handled by the ACPI video module.
  665. * We don't actually need to do anything with them. */
  666. iowrite32(0, &opregion->acpi->csts);
  667. iowrite32(1, &opregion->acpi->drdy);
  668. system_opregion = opregion;
  669. register_acpi_notifier(&intel_opregion_notifier);
  670. }
  671. if (opregion->asle) {
  672. iowrite32(ASLE_TCHE_BLC_EN, &opregion->asle->tche);
  673. iowrite32(ASLE_ARDY_READY, &opregion->asle->ardy);
  674. }
  675. }
  676. void intel_opregion_fini(struct drm_device *dev)
  677. {
  678. struct drm_i915_private *dev_priv = dev->dev_private;
  679. struct intel_opregion *opregion = &dev_priv->opregion;
  680. if (!opregion->header)
  681. return;
  682. if (opregion->asle)
  683. iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy);
  684. cancel_work_sync(&dev_priv->opregion.asle_work);
  685. if (opregion->acpi) {
  686. iowrite32(0, &opregion->acpi->drdy);
  687. system_opregion = NULL;
  688. unregister_acpi_notifier(&intel_opregion_notifier);
  689. }
  690. /* just clear all opregion memory pointers now */
  691. iounmap(opregion->header);
  692. opregion->header = NULL;
  693. opregion->acpi = NULL;
  694. opregion->swsci = NULL;
  695. opregion->asle = NULL;
  696. opregion->vbt = NULL;
  697. opregion->lid_state = NULL;
  698. }
  699. static void swsci_setup(struct drm_device *dev)
  700. {
  701. struct drm_i915_private *dev_priv = dev->dev_private;
  702. struct intel_opregion *opregion = &dev_priv->opregion;
  703. bool requested_callbacks = false;
  704. u32 tmp;
  705. /* Sub-function code 0 is okay, let's allow them. */
  706. opregion->swsci_gbda_sub_functions = 1;
  707. opregion->swsci_sbcb_sub_functions = 1;
  708. /* We use GBDA to ask for supported GBDA calls. */
  709. if (swsci(dev, SWSCI_GBDA_SUPPORTED_CALLS, 0, &tmp) == 0) {
  710. /* make the bits match the sub-function codes */
  711. tmp <<= 1;
  712. opregion->swsci_gbda_sub_functions |= tmp;
  713. }
  714. /*
  715. * We also use GBDA to ask for _requested_ SBCB callbacks. The driver
  716. * must not call interfaces that are not specifically requested by the
  717. * bios.
  718. */
  719. if (swsci(dev, SWSCI_GBDA_REQUESTED_CALLBACKS, 0, &tmp) == 0) {
  720. /* here, the bits already match sub-function codes */
  721. opregion->swsci_sbcb_sub_functions |= tmp;
  722. requested_callbacks = true;
  723. }
  724. /*
  725. * But we use SBCB to ask for _supported_ SBCB calls. This does not mean
  726. * the callback is _requested_. But we still can't call interfaces that
  727. * are not requested.
  728. */
  729. if (swsci(dev, SWSCI_SBCB_SUPPORTED_CALLBACKS, 0, &tmp) == 0) {
  730. /* make the bits match the sub-function codes */
  731. u32 low = tmp & 0x7ff;
  732. u32 high = tmp & ~0xfff; /* bit 11 is reserved */
  733. tmp = (high << 4) | (low << 1) | 1;
  734. /* best guess what to do with supported wrt requested */
  735. if (requested_callbacks) {
  736. u32 req = opregion->swsci_sbcb_sub_functions;
  737. if ((req & tmp) != req)
  738. DRM_DEBUG_DRIVER("SWSCI BIOS requested (%08x) SBCB callbacks that are not supported (%08x)\n", req, tmp);
  739. /* XXX: for now, trust the requested callbacks */
  740. /* opregion->swsci_sbcb_sub_functions &= tmp; */
  741. } else {
  742. opregion->swsci_sbcb_sub_functions |= tmp;
  743. }
  744. }
  745. DRM_DEBUG_DRIVER("SWSCI GBDA callbacks %08x, SBCB callbacks %08x\n",
  746. opregion->swsci_gbda_sub_functions,
  747. opregion->swsci_sbcb_sub_functions);
  748. }
  749. #else /* CONFIG_ACPI */
  750. static inline void swsci_setup(struct drm_device *dev) {}
  751. #endif /* CONFIG_ACPI */
  752. int intel_opregion_setup(struct drm_device *dev)
  753. {
  754. struct drm_i915_private *dev_priv = dev->dev_private;
  755. struct intel_opregion *opregion = &dev_priv->opregion;
  756. void __iomem *base;
  757. u32 asls, mboxes;
  758. char buf[sizeof(OPREGION_SIGNATURE)];
  759. int err = 0;
  760. BUILD_BUG_ON(sizeof(struct opregion_header) != 0x100);
  761. BUILD_BUG_ON(sizeof(struct opregion_acpi) != 0x100);
  762. BUILD_BUG_ON(sizeof(struct opregion_swsci) != 0x100);
  763. BUILD_BUG_ON(sizeof(struct opregion_asle) != 0x100);
  764. pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
  765. DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
  766. if (asls == 0) {
  767. DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n");
  768. return -ENOTSUPP;
  769. }
  770. #ifdef CONFIG_ACPI
  771. INIT_WORK(&opregion->asle_work, asle_work);
  772. #endif
  773. base = acpi_os_ioremap(asls, OPREGION_SIZE);
  774. if (!base)
  775. return -ENOMEM;
  776. memcpy_fromio(buf, base, sizeof(buf));
  777. if (memcmp(buf, OPREGION_SIGNATURE, 16)) {
  778. DRM_DEBUG_DRIVER("opregion signature mismatch\n");
  779. err = -EINVAL;
  780. goto err_out;
  781. }
  782. opregion->header = base;
  783. opregion->vbt = base + OPREGION_VBT_OFFSET;
  784. opregion->lid_state = base + ACPI_CLID;
  785. mboxes = ioread32(&opregion->header->mboxes);
  786. if (mboxes & MBOX_ACPI) {
  787. DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
  788. opregion->acpi = base + OPREGION_ACPI_OFFSET;
  789. }
  790. if (mboxes & MBOX_SWSCI) {
  791. DRM_DEBUG_DRIVER("SWSCI supported\n");
  792. opregion->swsci = base + OPREGION_SWSCI_OFFSET;
  793. swsci_setup(dev);
  794. }
  795. if (mboxes & MBOX_ASLE) {
  796. DRM_DEBUG_DRIVER("ASLE supported\n");
  797. opregion->asle = base + OPREGION_ASLE_OFFSET;
  798. iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy);
  799. }
  800. return 0;
  801. err_out:
  802. iounmap(base);
  803. return err;
  804. }