intel_lvds.c 33 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_atomic_helper.h>
  35. #include <drm/drm_crtc.h>
  36. #include <drm/drm_edid.h>
  37. #include "intel_drv.h"
  38. #include <drm/i915_drm.h>
  39. #include "i915_drv.h"
  40. #include <linux/acpi.h>
  41. /* Private structure for the integrated LVDS support */
  42. struct intel_lvds_connector {
  43. struct intel_connector base;
  44. struct notifier_block lid_notifier;
  45. };
  46. struct intel_lvds_encoder {
  47. struct intel_encoder base;
  48. bool is_dual_link;
  49. u32 reg;
  50. u32 a3_power;
  51. struct intel_lvds_connector *attached_connector;
  52. };
  53. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  54. {
  55. return container_of(encoder, struct intel_lvds_encoder, base.base);
  56. }
  57. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  58. {
  59. return container_of(connector, struct intel_lvds_connector, base.base);
  60. }
  61. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  62. enum pipe *pipe)
  63. {
  64. struct drm_device *dev = encoder->base.dev;
  65. struct drm_i915_private *dev_priv = dev->dev_private;
  66. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  67. enum intel_display_power_domain power_domain;
  68. u32 tmp;
  69. power_domain = intel_display_port_power_domain(encoder);
  70. if (!intel_display_power_is_enabled(dev_priv, power_domain))
  71. return false;
  72. tmp = I915_READ(lvds_encoder->reg);
  73. if (!(tmp & LVDS_PORT_EN))
  74. return false;
  75. if (HAS_PCH_CPT(dev))
  76. *pipe = PORT_TO_PIPE_CPT(tmp);
  77. else
  78. *pipe = PORT_TO_PIPE(tmp);
  79. return true;
  80. }
  81. static void intel_lvds_get_config(struct intel_encoder *encoder,
  82. struct intel_crtc_state *pipe_config)
  83. {
  84. struct drm_device *dev = encoder->base.dev;
  85. struct drm_i915_private *dev_priv = dev->dev_private;
  86. u32 lvds_reg, tmp, flags = 0;
  87. int dotclock;
  88. if (HAS_PCH_SPLIT(dev))
  89. lvds_reg = PCH_LVDS;
  90. else
  91. lvds_reg = LVDS;
  92. tmp = I915_READ(lvds_reg);
  93. if (tmp & LVDS_HSYNC_POLARITY)
  94. flags |= DRM_MODE_FLAG_NHSYNC;
  95. else
  96. flags |= DRM_MODE_FLAG_PHSYNC;
  97. if (tmp & LVDS_VSYNC_POLARITY)
  98. flags |= DRM_MODE_FLAG_NVSYNC;
  99. else
  100. flags |= DRM_MODE_FLAG_PVSYNC;
  101. pipe_config->base.adjusted_mode.flags |= flags;
  102. /* gen2/3 store dither state in pfit control, needs to match */
  103. if (INTEL_INFO(dev)->gen < 4) {
  104. tmp = I915_READ(PFIT_CONTROL);
  105. pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
  106. }
  107. dotclock = pipe_config->port_clock;
  108. if (HAS_PCH_SPLIT(dev_priv->dev))
  109. ironlake_check_encoder_dotclock(pipe_config, dotclock);
  110. pipe_config->base.adjusted_mode.crtc_clock = dotclock;
  111. }
  112. static void intel_pre_enable_lvds(struct intel_encoder *encoder)
  113. {
  114. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  115. struct drm_device *dev = encoder->base.dev;
  116. struct drm_i915_private *dev_priv = dev->dev_private;
  117. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  118. const struct drm_display_mode *adjusted_mode =
  119. &crtc->config->base.adjusted_mode;
  120. int pipe = crtc->pipe;
  121. u32 temp;
  122. if (HAS_PCH_SPLIT(dev)) {
  123. assert_fdi_rx_pll_disabled(dev_priv, pipe);
  124. assert_shared_dpll_disabled(dev_priv,
  125. intel_crtc_to_shared_dpll(crtc));
  126. } else {
  127. assert_pll_disabled(dev_priv, pipe);
  128. }
  129. temp = I915_READ(lvds_encoder->reg);
  130. temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  131. if (HAS_PCH_CPT(dev)) {
  132. temp &= ~PORT_TRANS_SEL_MASK;
  133. temp |= PORT_TRANS_SEL_CPT(pipe);
  134. } else {
  135. if (pipe == 1) {
  136. temp |= LVDS_PIPEB_SELECT;
  137. } else {
  138. temp &= ~LVDS_PIPEB_SELECT;
  139. }
  140. }
  141. /* set the corresponsding LVDS_BORDER bit */
  142. temp &= ~LVDS_BORDER_ENABLE;
  143. temp |= crtc->config->gmch_pfit.lvds_border_bits;
  144. /* Set the B0-B3 data pairs corresponding to whether we're going to
  145. * set the DPLLs for dual-channel mode or not.
  146. */
  147. if (lvds_encoder->is_dual_link)
  148. temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  149. else
  150. temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  151. /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  152. * appropriately here, but we need to look more thoroughly into how
  153. * panels behave in the two modes. For now, let's just maintain the
  154. * value we got from the BIOS.
  155. */
  156. temp &= ~LVDS_A3_POWER_MASK;
  157. temp |= lvds_encoder->a3_power;
  158. /* Set the dithering flag on LVDS as needed, note that there is no
  159. * special lvds dither control bit on pch-split platforms, dithering is
  160. * only controlled through the PIPECONF reg. */
  161. if (INTEL_INFO(dev)->gen == 4) {
  162. /* Bspec wording suggests that LVDS port dithering only exists
  163. * for 18bpp panels. */
  164. if (crtc->config->dither && crtc->config->pipe_bpp == 18)
  165. temp |= LVDS_ENABLE_DITHER;
  166. else
  167. temp &= ~LVDS_ENABLE_DITHER;
  168. }
  169. temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  170. if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
  171. temp |= LVDS_HSYNC_POLARITY;
  172. if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
  173. temp |= LVDS_VSYNC_POLARITY;
  174. I915_WRITE(lvds_encoder->reg, temp);
  175. }
  176. /**
  177. * Sets the power state for the panel.
  178. */
  179. static void intel_enable_lvds(struct intel_encoder *encoder)
  180. {
  181. struct drm_device *dev = encoder->base.dev;
  182. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  183. struct intel_connector *intel_connector =
  184. &lvds_encoder->attached_connector->base;
  185. struct drm_i915_private *dev_priv = dev->dev_private;
  186. u32 ctl_reg, stat_reg;
  187. if (HAS_PCH_SPLIT(dev)) {
  188. ctl_reg = PCH_PP_CONTROL;
  189. stat_reg = PCH_PP_STATUS;
  190. } else {
  191. ctl_reg = PP_CONTROL;
  192. stat_reg = PP_STATUS;
  193. }
  194. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  195. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  196. POSTING_READ(lvds_encoder->reg);
  197. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  198. DRM_ERROR("timed out waiting for panel to power on\n");
  199. intel_panel_enable_backlight(intel_connector);
  200. }
  201. static void intel_disable_lvds(struct intel_encoder *encoder)
  202. {
  203. struct drm_device *dev = encoder->base.dev;
  204. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  205. struct drm_i915_private *dev_priv = dev->dev_private;
  206. u32 ctl_reg, stat_reg;
  207. if (HAS_PCH_SPLIT(dev)) {
  208. ctl_reg = PCH_PP_CONTROL;
  209. stat_reg = PCH_PP_STATUS;
  210. } else {
  211. ctl_reg = PP_CONTROL;
  212. stat_reg = PP_STATUS;
  213. }
  214. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  215. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  216. DRM_ERROR("timed out waiting for panel to power off\n");
  217. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  218. POSTING_READ(lvds_encoder->reg);
  219. }
  220. static void gmch_disable_lvds(struct intel_encoder *encoder)
  221. {
  222. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  223. struct intel_connector *intel_connector =
  224. &lvds_encoder->attached_connector->base;
  225. intel_panel_disable_backlight(intel_connector);
  226. intel_disable_lvds(encoder);
  227. }
  228. static void pch_disable_lvds(struct intel_encoder *encoder)
  229. {
  230. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  231. struct intel_connector *intel_connector =
  232. &lvds_encoder->attached_connector->base;
  233. intel_panel_disable_backlight(intel_connector);
  234. }
  235. static void pch_post_disable_lvds(struct intel_encoder *encoder)
  236. {
  237. intel_disable_lvds(encoder);
  238. }
  239. static enum drm_mode_status
  240. intel_lvds_mode_valid(struct drm_connector *connector,
  241. struct drm_display_mode *mode)
  242. {
  243. struct intel_connector *intel_connector = to_intel_connector(connector);
  244. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  245. if (mode->hdisplay > fixed_mode->hdisplay)
  246. return MODE_PANEL;
  247. if (mode->vdisplay > fixed_mode->vdisplay)
  248. return MODE_PANEL;
  249. return MODE_OK;
  250. }
  251. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  252. struct intel_crtc_state *pipe_config)
  253. {
  254. struct drm_device *dev = intel_encoder->base.dev;
  255. struct intel_lvds_encoder *lvds_encoder =
  256. to_lvds_encoder(&intel_encoder->base);
  257. struct intel_connector *intel_connector =
  258. &lvds_encoder->attached_connector->base;
  259. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  260. struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
  261. unsigned int lvds_bpp;
  262. /* Should never happen!! */
  263. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  264. DRM_ERROR("Can't support LVDS on pipe A\n");
  265. return false;
  266. }
  267. if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
  268. lvds_bpp = 8*3;
  269. else
  270. lvds_bpp = 6*3;
  271. if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
  272. DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  273. pipe_config->pipe_bpp, lvds_bpp);
  274. pipe_config->pipe_bpp = lvds_bpp;
  275. }
  276. /*
  277. * We have timings from the BIOS for the panel, put them in
  278. * to the adjusted mode. The CRTC will be set up for this mode,
  279. * with the panel scaling set up to source from the H/VDisplay
  280. * of the original mode.
  281. */
  282. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  283. adjusted_mode);
  284. if (HAS_PCH_SPLIT(dev)) {
  285. pipe_config->has_pch_encoder = true;
  286. intel_pch_panel_fitting(intel_crtc, pipe_config,
  287. intel_connector->panel.fitting_mode);
  288. } else {
  289. intel_gmch_panel_fitting(intel_crtc, pipe_config,
  290. intel_connector->panel.fitting_mode);
  291. }
  292. /*
  293. * XXX: It would be nice to support lower refresh rates on the
  294. * panels to reduce power consumption, and perhaps match the
  295. * user's requested refresh rate.
  296. */
  297. return true;
  298. }
  299. /**
  300. * Detect the LVDS connection.
  301. *
  302. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  303. * connected and closed means disconnected. We also send hotplug events as
  304. * needed, using lid status notification from the input layer.
  305. */
  306. static enum drm_connector_status
  307. intel_lvds_detect(struct drm_connector *connector, bool force)
  308. {
  309. struct drm_device *dev = connector->dev;
  310. enum drm_connector_status status;
  311. DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  312. connector->base.id, connector->name);
  313. status = intel_panel_detect(dev);
  314. if (status != connector_status_unknown)
  315. return status;
  316. return connector_status_connected;
  317. }
  318. /**
  319. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  320. */
  321. static int intel_lvds_get_modes(struct drm_connector *connector)
  322. {
  323. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  324. struct drm_device *dev = connector->dev;
  325. struct drm_display_mode *mode;
  326. /* use cached edid if we have one */
  327. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  328. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  329. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  330. if (mode == NULL)
  331. return 0;
  332. drm_mode_probed_add(connector, mode);
  333. return 1;
  334. }
  335. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  336. {
  337. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  338. return 1;
  339. }
  340. /* The GPU hangs up on these systems if modeset is performed on LID open */
  341. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  342. {
  343. .callback = intel_no_modeset_on_lid_dmi_callback,
  344. .ident = "Toshiba Tecra A11",
  345. .matches = {
  346. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  347. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  348. },
  349. },
  350. { } /* terminating entry */
  351. };
  352. /*
  353. * Lid events. Note the use of 'modeset':
  354. * - we set it to MODESET_ON_LID_OPEN on lid close,
  355. * and set it to MODESET_DONE on open
  356. * - we use it as a "only once" bit (ie we ignore
  357. * duplicate events where it was already properly set)
  358. * - the suspend/resume paths will set it to
  359. * MODESET_SUSPENDED and ignore the lid open event,
  360. * because they restore the mode ("lid open").
  361. */
  362. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  363. void *unused)
  364. {
  365. struct intel_lvds_connector *lvds_connector =
  366. container_of(nb, struct intel_lvds_connector, lid_notifier);
  367. struct drm_connector *connector = &lvds_connector->base.base;
  368. struct drm_device *dev = connector->dev;
  369. struct drm_i915_private *dev_priv = dev->dev_private;
  370. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  371. return NOTIFY_OK;
  372. mutex_lock(&dev_priv->modeset_restore_lock);
  373. if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  374. goto exit;
  375. /*
  376. * check and update the status of LVDS connector after receiving
  377. * the LID nofication event.
  378. */
  379. connector->status = connector->funcs->detect(connector, false);
  380. /* Don't force modeset on machines where it causes a GPU lockup */
  381. if (dmi_check_system(intel_no_modeset_on_lid))
  382. goto exit;
  383. if (!acpi_lid_open()) {
  384. /* do modeset on next lid open event */
  385. dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  386. goto exit;
  387. }
  388. if (dev_priv->modeset_restore == MODESET_DONE)
  389. goto exit;
  390. /*
  391. * Some old platform's BIOS love to wreak havoc while the lid is closed.
  392. * We try to detect this here and undo any damage. The split for PCH
  393. * platforms is rather conservative and a bit arbitrary expect that on
  394. * those platforms VGA disabling requires actual legacy VGA I/O access,
  395. * and as part of the cleanup in the hw state restore we also redisable
  396. * the vga plane.
  397. */
  398. if (!HAS_PCH_SPLIT(dev)) {
  399. drm_modeset_lock_all(dev);
  400. intel_display_resume(dev);
  401. drm_modeset_unlock_all(dev);
  402. }
  403. dev_priv->modeset_restore = MODESET_DONE;
  404. exit:
  405. mutex_unlock(&dev_priv->modeset_restore_lock);
  406. return NOTIFY_OK;
  407. }
  408. /**
  409. * intel_lvds_destroy - unregister and free LVDS structures
  410. * @connector: connector to free
  411. *
  412. * Unregister the DDC bus for this connector then free the driver private
  413. * structure.
  414. */
  415. static void intel_lvds_destroy(struct drm_connector *connector)
  416. {
  417. struct intel_lvds_connector *lvds_connector =
  418. to_lvds_connector(connector);
  419. if (lvds_connector->lid_notifier.notifier_call)
  420. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  421. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  422. kfree(lvds_connector->base.edid);
  423. intel_panel_fini(&lvds_connector->base.panel);
  424. drm_connector_cleanup(connector);
  425. kfree(connector);
  426. }
  427. static int intel_lvds_set_property(struct drm_connector *connector,
  428. struct drm_property *property,
  429. uint64_t value)
  430. {
  431. struct intel_connector *intel_connector = to_intel_connector(connector);
  432. struct drm_device *dev = connector->dev;
  433. if (property == dev->mode_config.scaling_mode_property) {
  434. struct drm_crtc *crtc;
  435. if (value == DRM_MODE_SCALE_NONE) {
  436. DRM_DEBUG_KMS("no scaling not supported\n");
  437. return -EINVAL;
  438. }
  439. if (intel_connector->panel.fitting_mode == value) {
  440. /* the LVDS scaling property is not changed */
  441. return 0;
  442. }
  443. intel_connector->panel.fitting_mode = value;
  444. crtc = intel_attached_encoder(connector)->base.crtc;
  445. if (crtc && crtc->state->enable) {
  446. /*
  447. * If the CRTC is enabled, the display will be changed
  448. * according to the new panel fitting mode.
  449. */
  450. intel_crtc_restore_mode(crtc);
  451. }
  452. }
  453. return 0;
  454. }
  455. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  456. .get_modes = intel_lvds_get_modes,
  457. .mode_valid = intel_lvds_mode_valid,
  458. .best_encoder = intel_best_encoder,
  459. };
  460. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  461. .dpms = drm_atomic_helper_connector_dpms,
  462. .detect = intel_lvds_detect,
  463. .fill_modes = drm_helper_probe_single_connector_modes,
  464. .set_property = intel_lvds_set_property,
  465. .atomic_get_property = intel_connector_atomic_get_property,
  466. .destroy = intel_lvds_destroy,
  467. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  468. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  469. };
  470. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  471. .destroy = intel_encoder_destroy,
  472. };
  473. static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  474. {
  475. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  476. return 1;
  477. }
  478. /* These systems claim to have LVDS, but really don't */
  479. static const struct dmi_system_id intel_no_lvds[] = {
  480. {
  481. .callback = intel_no_lvds_dmi_callback,
  482. .ident = "Apple Mac Mini (Core series)",
  483. .matches = {
  484. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  485. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  486. },
  487. },
  488. {
  489. .callback = intel_no_lvds_dmi_callback,
  490. .ident = "Apple Mac Mini (Core 2 series)",
  491. .matches = {
  492. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  493. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  494. },
  495. },
  496. {
  497. .callback = intel_no_lvds_dmi_callback,
  498. .ident = "MSI IM-945GSE-A",
  499. .matches = {
  500. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  501. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  502. },
  503. },
  504. {
  505. .callback = intel_no_lvds_dmi_callback,
  506. .ident = "Dell Studio Hybrid",
  507. .matches = {
  508. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  509. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  510. },
  511. },
  512. {
  513. .callback = intel_no_lvds_dmi_callback,
  514. .ident = "Dell OptiPlex FX170",
  515. .matches = {
  516. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  517. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  518. },
  519. },
  520. {
  521. .callback = intel_no_lvds_dmi_callback,
  522. .ident = "AOpen Mini PC",
  523. .matches = {
  524. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  525. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  526. },
  527. },
  528. {
  529. .callback = intel_no_lvds_dmi_callback,
  530. .ident = "AOpen Mini PC MP915",
  531. .matches = {
  532. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  533. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  534. },
  535. },
  536. {
  537. .callback = intel_no_lvds_dmi_callback,
  538. .ident = "AOpen i915GMm-HFS",
  539. .matches = {
  540. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  541. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  542. },
  543. },
  544. {
  545. .callback = intel_no_lvds_dmi_callback,
  546. .ident = "AOpen i45GMx-I",
  547. .matches = {
  548. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  549. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  550. },
  551. },
  552. {
  553. .callback = intel_no_lvds_dmi_callback,
  554. .ident = "Aopen i945GTt-VFA",
  555. .matches = {
  556. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  557. },
  558. },
  559. {
  560. .callback = intel_no_lvds_dmi_callback,
  561. .ident = "Clientron U800",
  562. .matches = {
  563. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  564. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  565. },
  566. },
  567. {
  568. .callback = intel_no_lvds_dmi_callback,
  569. .ident = "Clientron E830",
  570. .matches = {
  571. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  572. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  573. },
  574. },
  575. {
  576. .callback = intel_no_lvds_dmi_callback,
  577. .ident = "Asus EeeBox PC EB1007",
  578. .matches = {
  579. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  580. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  581. },
  582. },
  583. {
  584. .callback = intel_no_lvds_dmi_callback,
  585. .ident = "Asus AT5NM10T-I",
  586. .matches = {
  587. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  588. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  589. },
  590. },
  591. {
  592. .callback = intel_no_lvds_dmi_callback,
  593. .ident = "Hewlett-Packard HP t5740",
  594. .matches = {
  595. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  596. DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  597. },
  598. },
  599. {
  600. .callback = intel_no_lvds_dmi_callback,
  601. .ident = "Hewlett-Packard t5745",
  602. .matches = {
  603. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  604. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  605. },
  606. },
  607. {
  608. .callback = intel_no_lvds_dmi_callback,
  609. .ident = "Hewlett-Packard st5747",
  610. .matches = {
  611. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  612. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  613. },
  614. },
  615. {
  616. .callback = intel_no_lvds_dmi_callback,
  617. .ident = "MSI Wind Box DC500",
  618. .matches = {
  619. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  620. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  621. },
  622. },
  623. {
  624. .callback = intel_no_lvds_dmi_callback,
  625. .ident = "Gigabyte GA-D525TUD",
  626. .matches = {
  627. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  628. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  629. },
  630. },
  631. {
  632. .callback = intel_no_lvds_dmi_callback,
  633. .ident = "Supermicro X7SPA-H",
  634. .matches = {
  635. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  636. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  637. },
  638. },
  639. {
  640. .callback = intel_no_lvds_dmi_callback,
  641. .ident = "Fujitsu Esprimo Q900",
  642. .matches = {
  643. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  644. DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  645. },
  646. },
  647. {
  648. .callback = intel_no_lvds_dmi_callback,
  649. .ident = "Intel D410PT",
  650. .matches = {
  651. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  652. DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
  653. },
  654. },
  655. {
  656. .callback = intel_no_lvds_dmi_callback,
  657. .ident = "Intel D425KT",
  658. .matches = {
  659. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  660. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
  661. },
  662. },
  663. {
  664. .callback = intel_no_lvds_dmi_callback,
  665. .ident = "Intel D510MO",
  666. .matches = {
  667. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  668. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
  669. },
  670. },
  671. {
  672. .callback = intel_no_lvds_dmi_callback,
  673. .ident = "Intel D525MW",
  674. .matches = {
  675. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  676. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
  677. },
  678. },
  679. { } /* terminating entry */
  680. };
  681. /*
  682. * Enumerate the child dev array parsed from VBT to check whether
  683. * the LVDS is present.
  684. * If it is present, return 1.
  685. * If it is not present, return false.
  686. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  687. */
  688. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  689. u8 *i2c_pin)
  690. {
  691. struct drm_i915_private *dev_priv = dev->dev_private;
  692. int i;
  693. if (!dev_priv->vbt.child_dev_num)
  694. return true;
  695. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  696. union child_device_config *uchild = dev_priv->vbt.child_dev + i;
  697. struct old_child_dev_config *child = &uchild->old;
  698. /* If the device type is not LFP, continue.
  699. * We have to check both the new identifiers as well as the
  700. * old for compatibility with some BIOSes.
  701. */
  702. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  703. child->device_type != DEVICE_TYPE_LFP)
  704. continue;
  705. if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
  706. *i2c_pin = child->i2c_pin;
  707. /* However, we cannot trust the BIOS writers to populate
  708. * the VBT correctly. Since LVDS requires additional
  709. * information from AIM blocks, a non-zero addin offset is
  710. * a good indicator that the LVDS is actually present.
  711. */
  712. if (child->addin_offset)
  713. return true;
  714. /* But even then some BIOS writers perform some black magic
  715. * and instantiate the device without reference to any
  716. * additional data. Trust that if the VBT was written into
  717. * the OpRegion then they have validated the LVDS's existence.
  718. */
  719. if (dev_priv->opregion.vbt)
  720. return true;
  721. }
  722. return false;
  723. }
  724. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  725. {
  726. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  727. return 1;
  728. }
  729. static const struct dmi_system_id intel_dual_link_lvds[] = {
  730. {
  731. .callback = intel_dual_link_lvds_callback,
  732. .ident = "Apple MacBook Pro 15\" (2010)",
  733. .matches = {
  734. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  735. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
  736. },
  737. },
  738. {
  739. .callback = intel_dual_link_lvds_callback,
  740. .ident = "Apple MacBook Pro 15\" (2011)",
  741. .matches = {
  742. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  743. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  744. },
  745. },
  746. {
  747. .callback = intel_dual_link_lvds_callback,
  748. .ident = "Apple MacBook Pro 15\" (2012)",
  749. .matches = {
  750. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  751. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
  752. },
  753. },
  754. { } /* terminating entry */
  755. };
  756. bool intel_is_dual_link_lvds(struct drm_device *dev)
  757. {
  758. struct intel_encoder *encoder;
  759. struct intel_lvds_encoder *lvds_encoder;
  760. for_each_intel_encoder(dev, encoder) {
  761. if (encoder->type == INTEL_OUTPUT_LVDS) {
  762. lvds_encoder = to_lvds_encoder(&encoder->base);
  763. return lvds_encoder->is_dual_link;
  764. }
  765. }
  766. return false;
  767. }
  768. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  769. {
  770. struct drm_device *dev = lvds_encoder->base.base.dev;
  771. unsigned int val;
  772. struct drm_i915_private *dev_priv = dev->dev_private;
  773. /* use the module option value if specified */
  774. if (i915.lvds_channel_mode > 0)
  775. return i915.lvds_channel_mode == 2;
  776. /* single channel LVDS is limited to 112 MHz */
  777. if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
  778. > 112999)
  779. return true;
  780. if (dmi_check_system(intel_dual_link_lvds))
  781. return true;
  782. /* BIOS should set the proper LVDS register value at boot, but
  783. * in reality, it doesn't set the value when the lid is closed;
  784. * we need to check "the value to be set" in VBT when LVDS
  785. * register is uninitialized.
  786. */
  787. val = I915_READ(lvds_encoder->reg);
  788. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  789. val = dev_priv->vbt.bios_lvds_val;
  790. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  791. }
  792. static bool intel_lvds_supported(struct drm_device *dev)
  793. {
  794. /* With the introduction of the PCH we gained a dedicated
  795. * LVDS presence pin, use it. */
  796. if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  797. return true;
  798. /* Otherwise LVDS was only attached to mobile products,
  799. * except for the inglorious 830gm */
  800. if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  801. return true;
  802. return false;
  803. }
  804. /**
  805. * intel_lvds_init - setup LVDS connectors on this device
  806. * @dev: drm device
  807. *
  808. * Create the connector, register the LVDS DDC bus, and try to figure out what
  809. * modes we can display on the LVDS panel (if present).
  810. */
  811. void intel_lvds_init(struct drm_device *dev)
  812. {
  813. struct drm_i915_private *dev_priv = dev->dev_private;
  814. struct intel_lvds_encoder *lvds_encoder;
  815. struct intel_encoder *intel_encoder;
  816. struct intel_lvds_connector *lvds_connector;
  817. struct intel_connector *intel_connector;
  818. struct drm_connector *connector;
  819. struct drm_encoder *encoder;
  820. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  821. struct drm_display_mode *fixed_mode = NULL;
  822. struct drm_display_mode *downclock_mode = NULL;
  823. struct edid *edid;
  824. struct drm_crtc *crtc;
  825. u32 lvds;
  826. int pipe;
  827. u8 pin;
  828. /*
  829. * Unlock registers and just leave them unlocked. Do this before
  830. * checking quirk lists to avoid bogus WARNINGs.
  831. */
  832. if (HAS_PCH_SPLIT(dev)) {
  833. I915_WRITE(PCH_PP_CONTROL,
  834. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  835. } else {
  836. I915_WRITE(PP_CONTROL,
  837. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  838. }
  839. if (!intel_lvds_supported(dev))
  840. return;
  841. /* Skip init on machines we know falsely report LVDS */
  842. if (dmi_check_system(intel_no_lvds))
  843. return;
  844. if (HAS_PCH_SPLIT(dev)) {
  845. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  846. return;
  847. if (dev_priv->vbt.edp_support) {
  848. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  849. return;
  850. }
  851. }
  852. pin = GMBUS_PIN_PANEL;
  853. if (!lvds_is_present_in_vbt(dev, &pin)) {
  854. u32 reg = HAS_PCH_SPLIT(dev) ? PCH_LVDS : LVDS;
  855. if ((I915_READ(reg) & LVDS_PORT_EN) == 0) {
  856. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  857. return;
  858. }
  859. DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
  860. }
  861. lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
  862. if (!lvds_encoder)
  863. return;
  864. lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
  865. if (!lvds_connector) {
  866. kfree(lvds_encoder);
  867. return;
  868. }
  869. if (intel_connector_init(&lvds_connector->base) < 0) {
  870. kfree(lvds_connector);
  871. kfree(lvds_encoder);
  872. return;
  873. }
  874. lvds_encoder->attached_connector = lvds_connector;
  875. intel_encoder = &lvds_encoder->base;
  876. encoder = &intel_encoder->base;
  877. intel_connector = &lvds_connector->base;
  878. connector = &intel_connector->base;
  879. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  880. DRM_MODE_CONNECTOR_LVDS);
  881. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  882. DRM_MODE_ENCODER_LVDS);
  883. intel_encoder->enable = intel_enable_lvds;
  884. intel_encoder->pre_enable = intel_pre_enable_lvds;
  885. intel_encoder->compute_config = intel_lvds_compute_config;
  886. if (HAS_PCH_SPLIT(dev_priv)) {
  887. intel_encoder->disable = pch_disable_lvds;
  888. intel_encoder->post_disable = pch_post_disable_lvds;
  889. } else {
  890. intel_encoder->disable = gmch_disable_lvds;
  891. }
  892. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  893. intel_encoder->get_config = intel_lvds_get_config;
  894. intel_connector->get_hw_state = intel_connector_get_hw_state;
  895. intel_connector->unregister = intel_connector_unregister;
  896. intel_connector_attach_encoder(intel_connector, intel_encoder);
  897. intel_encoder->type = INTEL_OUTPUT_LVDS;
  898. intel_encoder->cloneable = 0;
  899. if (HAS_PCH_SPLIT(dev))
  900. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  901. else if (IS_GEN4(dev))
  902. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  903. else
  904. intel_encoder->crtc_mask = (1 << 1);
  905. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  906. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  907. connector->interlace_allowed = false;
  908. connector->doublescan_allowed = false;
  909. if (HAS_PCH_SPLIT(dev)) {
  910. lvds_encoder->reg = PCH_LVDS;
  911. } else {
  912. lvds_encoder->reg = LVDS;
  913. }
  914. /* create the scaling mode property */
  915. drm_mode_create_scaling_mode_property(dev);
  916. drm_object_attach_property(&connector->base,
  917. dev->mode_config.scaling_mode_property,
  918. DRM_MODE_SCALE_ASPECT);
  919. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  920. /*
  921. * LVDS discovery:
  922. * 1) check for EDID on DDC
  923. * 2) check for VBT data
  924. * 3) check to see if LVDS is already on
  925. * if none of the above, no panel
  926. * 4) make sure lid is open
  927. * if closed, act like it's not there for now
  928. */
  929. /*
  930. * Attempt to get the fixed panel mode from DDC. Assume that the
  931. * preferred mode is the right one.
  932. */
  933. mutex_lock(&dev->mode_config.mutex);
  934. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  935. if (edid) {
  936. if (drm_add_edid_modes(connector, edid)) {
  937. drm_mode_connector_update_edid_property(connector,
  938. edid);
  939. } else {
  940. kfree(edid);
  941. edid = ERR_PTR(-EINVAL);
  942. }
  943. } else {
  944. edid = ERR_PTR(-ENOENT);
  945. }
  946. lvds_connector->base.edid = edid;
  947. if (IS_ERR_OR_NULL(edid)) {
  948. /* Didn't get an EDID, so
  949. * Set wide sync ranges so we get all modes
  950. * handed to valid_mode for checking
  951. */
  952. connector->display_info.min_vfreq = 0;
  953. connector->display_info.max_vfreq = 200;
  954. connector->display_info.min_hfreq = 0;
  955. connector->display_info.max_hfreq = 200;
  956. }
  957. list_for_each_entry(scan, &connector->probed_modes, head) {
  958. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  959. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  960. drm_mode_debug_printmodeline(scan);
  961. fixed_mode = drm_mode_duplicate(dev, scan);
  962. if (fixed_mode)
  963. goto out;
  964. }
  965. }
  966. /* Failed to get EDID, what about VBT? */
  967. if (dev_priv->vbt.lfp_lvds_vbt_mode) {
  968. DRM_DEBUG_KMS("using mode from VBT: ");
  969. drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
  970. fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
  971. if (fixed_mode) {
  972. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  973. goto out;
  974. }
  975. }
  976. /*
  977. * If we didn't get EDID, try checking if the panel is already turned
  978. * on. If so, assume that whatever is currently programmed is the
  979. * correct mode.
  980. */
  981. /* Ironlake: FIXME if still fail, not try pipe mode now */
  982. if (HAS_PCH_SPLIT(dev))
  983. goto failed;
  984. lvds = I915_READ(LVDS);
  985. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  986. crtc = intel_get_crtc_for_pipe(dev, pipe);
  987. if (crtc && (lvds & LVDS_PORT_EN)) {
  988. fixed_mode = intel_crtc_mode_get(dev, crtc);
  989. if (fixed_mode) {
  990. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  991. drm_mode_debug_printmodeline(fixed_mode);
  992. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  993. goto out;
  994. }
  995. }
  996. /* If we still don't have a mode after all that, give up. */
  997. if (!fixed_mode)
  998. goto failed;
  999. out:
  1000. mutex_unlock(&dev->mode_config.mutex);
  1001. intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
  1002. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  1003. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  1004. lvds_encoder->is_dual_link ? "dual" : "single");
  1005. lvds_encoder->a3_power = I915_READ(lvds_encoder->reg) &
  1006. LVDS_A3_POWER_MASK;
  1007. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  1008. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  1009. DRM_DEBUG_KMS("lid notifier registration failed\n");
  1010. lvds_connector->lid_notifier.notifier_call = NULL;
  1011. }
  1012. drm_connector_register(connector);
  1013. intel_panel_setup_backlight(connector, INVALID_PIPE);
  1014. return;
  1015. failed:
  1016. mutex_unlock(&dev->mode_config.mutex);
  1017. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1018. drm_connector_cleanup(connector);
  1019. drm_encoder_cleanup(encoder);
  1020. kfree(lvds_encoder);
  1021. kfree(lvds_connector);
  1022. return;
  1023. }