intel_bios.c 39 KB

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  1. /*
  2. * Copyright © 2006 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. *
  26. */
  27. #include <linux/dmi.h>
  28. #include <drm/drm_dp_helper.h>
  29. #include <drm/drmP.h>
  30. #include <drm/i915_drm.h>
  31. #include "i915_drv.h"
  32. #include "intel_bios.h"
  33. #define SLAVE_ADDR1 0x70
  34. #define SLAVE_ADDR2 0x72
  35. static int panel_type;
  36. static const void *
  37. find_section(const void *_bdb, int section_id)
  38. {
  39. const struct bdb_header *bdb = _bdb;
  40. const u8 *base = _bdb;
  41. int index = 0;
  42. u32 total, current_size;
  43. u8 current_id;
  44. /* skip to first section */
  45. index += bdb->header_size;
  46. total = bdb->bdb_size;
  47. /* walk the sections looking for section_id */
  48. while (index + 3 < total) {
  49. current_id = *(base + index);
  50. index++;
  51. current_size = *((const u16 *)(base + index));
  52. index += 2;
  53. /* The MIPI Sequence Block v3+ has a separate size field. */
  54. if (current_id == BDB_MIPI_SEQUENCE && *(base + index) >= 3)
  55. current_size = *((const u32 *)(base + index + 1));
  56. if (index + current_size > total)
  57. return NULL;
  58. if (current_id == section_id)
  59. return base + index;
  60. index += current_size;
  61. }
  62. return NULL;
  63. }
  64. static u16
  65. get_blocksize(const void *p)
  66. {
  67. u16 *block_ptr, block_size;
  68. block_ptr = (u16 *)((char *)p - 2);
  69. block_size = *block_ptr;
  70. return block_size;
  71. }
  72. static void
  73. fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
  74. const struct lvds_dvo_timing *dvo_timing)
  75. {
  76. panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
  77. dvo_timing->hactive_lo;
  78. panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
  79. ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
  80. panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
  81. dvo_timing->hsync_pulse_width;
  82. panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
  83. ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
  84. panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
  85. dvo_timing->vactive_lo;
  86. panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
  87. dvo_timing->vsync_off;
  88. panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
  89. dvo_timing->vsync_pulse_width;
  90. panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
  91. ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
  92. panel_fixed_mode->clock = dvo_timing->clock * 10;
  93. panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
  94. if (dvo_timing->hsync_positive)
  95. panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
  96. else
  97. panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
  98. if (dvo_timing->vsync_positive)
  99. panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
  100. else
  101. panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
  102. /* Some VBTs have bogus h/vtotal values */
  103. if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
  104. panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
  105. if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
  106. panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
  107. drm_mode_set_name(panel_fixed_mode);
  108. }
  109. static const struct lvds_dvo_timing *
  110. get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
  111. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
  112. int index)
  113. {
  114. /*
  115. * the size of fp_timing varies on the different platform.
  116. * So calculate the DVO timing relative offset in LVDS data
  117. * entry to get the DVO timing entry
  118. */
  119. int lfp_data_size =
  120. lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
  121. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
  122. int dvo_timing_offset =
  123. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
  124. lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
  125. char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
  126. return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
  127. }
  128. /* get lvds_fp_timing entry
  129. * this function may return NULL if the corresponding entry is invalid
  130. */
  131. static const struct lvds_fp_timing *
  132. get_lvds_fp_timing(const struct bdb_header *bdb,
  133. const struct bdb_lvds_lfp_data *data,
  134. const struct bdb_lvds_lfp_data_ptrs *ptrs,
  135. int index)
  136. {
  137. size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
  138. u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
  139. size_t ofs;
  140. if (index >= ARRAY_SIZE(ptrs->ptr))
  141. return NULL;
  142. ofs = ptrs->ptr[index].fp_timing_offset;
  143. if (ofs < data_ofs ||
  144. ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
  145. return NULL;
  146. return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
  147. }
  148. /* Try to find integrated panel data */
  149. static void
  150. parse_lfp_panel_data(struct drm_i915_private *dev_priv,
  151. const struct bdb_header *bdb)
  152. {
  153. const struct bdb_lvds_options *lvds_options;
  154. const struct bdb_lvds_lfp_data *lvds_lfp_data;
  155. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
  156. const struct lvds_dvo_timing *panel_dvo_timing;
  157. const struct lvds_fp_timing *fp_timing;
  158. struct drm_display_mode *panel_fixed_mode;
  159. int drrs_mode;
  160. lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
  161. if (!lvds_options)
  162. return;
  163. dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
  164. if (lvds_options->panel_type == 0xff)
  165. return;
  166. panel_type = lvds_options->panel_type;
  167. drrs_mode = (lvds_options->dps_panel_type_bits
  168. >> (panel_type * 2)) & MODE_MASK;
  169. /*
  170. * VBT has static DRRS = 0 and seamless DRRS = 2.
  171. * The below piece of code is required to adjust vbt.drrs_type
  172. * to match the enum drrs_support_type.
  173. */
  174. switch (drrs_mode) {
  175. case 0:
  176. dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
  177. DRM_DEBUG_KMS("DRRS supported mode is static\n");
  178. break;
  179. case 2:
  180. dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
  181. DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
  182. break;
  183. default:
  184. dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
  185. DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
  186. break;
  187. }
  188. lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
  189. if (!lvds_lfp_data)
  190. return;
  191. lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
  192. if (!lvds_lfp_data_ptrs)
  193. return;
  194. dev_priv->vbt.lvds_vbt = 1;
  195. panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
  196. lvds_lfp_data_ptrs,
  197. lvds_options->panel_type);
  198. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  199. if (!panel_fixed_mode)
  200. return;
  201. fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
  202. dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
  203. DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
  204. drm_mode_debug_printmodeline(panel_fixed_mode);
  205. fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
  206. lvds_lfp_data_ptrs,
  207. lvds_options->panel_type);
  208. if (fp_timing) {
  209. /* check the resolution, just to be sure */
  210. if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
  211. fp_timing->y_res == panel_fixed_mode->vdisplay) {
  212. dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
  213. DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
  214. dev_priv->vbt.bios_lvds_val);
  215. }
  216. }
  217. }
  218. static void
  219. parse_lfp_backlight(struct drm_i915_private *dev_priv,
  220. const struct bdb_header *bdb)
  221. {
  222. const struct bdb_lfp_backlight_data *backlight_data;
  223. const struct bdb_lfp_backlight_data_entry *entry;
  224. backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
  225. if (!backlight_data)
  226. return;
  227. if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
  228. DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
  229. backlight_data->entry_size);
  230. return;
  231. }
  232. entry = &backlight_data->data[panel_type];
  233. dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
  234. if (!dev_priv->vbt.backlight.present) {
  235. DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
  236. entry->type);
  237. return;
  238. }
  239. dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
  240. dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
  241. dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
  242. DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
  243. "active %s, min brightness %u, level %u\n",
  244. dev_priv->vbt.backlight.pwm_freq_hz,
  245. dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
  246. dev_priv->vbt.backlight.min_brightness,
  247. backlight_data->level[panel_type]);
  248. }
  249. /* Try to find sdvo panel data */
  250. static void
  251. parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
  252. const struct bdb_header *bdb)
  253. {
  254. const struct lvds_dvo_timing *dvo_timing;
  255. struct drm_display_mode *panel_fixed_mode;
  256. int index;
  257. index = i915.vbt_sdvo_panel_type;
  258. if (index == -2) {
  259. DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
  260. return;
  261. }
  262. if (index == -1) {
  263. const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
  264. sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
  265. if (!sdvo_lvds_options)
  266. return;
  267. index = sdvo_lvds_options->panel_type;
  268. }
  269. dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
  270. if (!dvo_timing)
  271. return;
  272. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  273. if (!panel_fixed_mode)
  274. return;
  275. fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
  276. dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
  277. DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
  278. drm_mode_debug_printmodeline(panel_fixed_mode);
  279. }
  280. static int intel_bios_ssc_frequency(struct drm_device *dev,
  281. bool alternate)
  282. {
  283. switch (INTEL_INFO(dev)->gen) {
  284. case 2:
  285. return alternate ? 66667 : 48000;
  286. case 3:
  287. case 4:
  288. return alternate ? 100000 : 96000;
  289. default:
  290. return alternate ? 100000 : 120000;
  291. }
  292. }
  293. static void
  294. parse_general_features(struct drm_i915_private *dev_priv,
  295. const struct bdb_header *bdb)
  296. {
  297. struct drm_device *dev = dev_priv->dev;
  298. const struct bdb_general_features *general;
  299. general = find_section(bdb, BDB_GENERAL_FEATURES);
  300. if (general) {
  301. dev_priv->vbt.int_tv_support = general->int_tv_support;
  302. dev_priv->vbt.int_crt_support = general->int_crt_support;
  303. dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
  304. dev_priv->vbt.lvds_ssc_freq =
  305. intel_bios_ssc_frequency(dev, general->ssc_freq);
  306. dev_priv->vbt.display_clock_mode = general->display_clock_mode;
  307. dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
  308. DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
  309. dev_priv->vbt.int_tv_support,
  310. dev_priv->vbt.int_crt_support,
  311. dev_priv->vbt.lvds_use_ssc,
  312. dev_priv->vbt.lvds_ssc_freq,
  313. dev_priv->vbt.display_clock_mode,
  314. dev_priv->vbt.fdi_rx_polarity_inverted);
  315. }
  316. }
  317. static void
  318. parse_general_definitions(struct drm_i915_private *dev_priv,
  319. const struct bdb_header *bdb)
  320. {
  321. const struct bdb_general_definitions *general;
  322. general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  323. if (general) {
  324. u16 block_size = get_blocksize(general);
  325. if (block_size >= sizeof(*general)) {
  326. int bus_pin = general->crt_ddc_gmbus_pin;
  327. DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
  328. if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
  329. dev_priv->vbt.crt_ddc_pin = bus_pin;
  330. } else {
  331. DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
  332. block_size);
  333. }
  334. }
  335. }
  336. static const union child_device_config *
  337. child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
  338. {
  339. return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
  340. }
  341. static void
  342. parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
  343. const struct bdb_header *bdb)
  344. {
  345. struct sdvo_device_mapping *p_mapping;
  346. const struct bdb_general_definitions *p_defs;
  347. const struct old_child_dev_config *child; /* legacy */
  348. int i, child_device_num, count;
  349. u16 block_size;
  350. p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  351. if (!p_defs) {
  352. DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
  353. return;
  354. }
  355. /*
  356. * Only parse SDVO mappings when the general definitions block child
  357. * device size matches that of the *legacy* child device config
  358. * struct. Thus, SDVO mapping will be skipped for newer VBT.
  359. */
  360. if (p_defs->child_dev_size != sizeof(*child)) {
  361. DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
  362. return;
  363. }
  364. /* get the block size of general definitions */
  365. block_size = get_blocksize(p_defs);
  366. /* get the number of child device */
  367. child_device_num = (block_size - sizeof(*p_defs)) /
  368. p_defs->child_dev_size;
  369. count = 0;
  370. for (i = 0; i < child_device_num; i++) {
  371. child = &child_device_ptr(p_defs, i)->old;
  372. if (!child->device_type) {
  373. /* skip the device block if device type is invalid */
  374. continue;
  375. }
  376. if (child->slave_addr != SLAVE_ADDR1 &&
  377. child->slave_addr != SLAVE_ADDR2) {
  378. /*
  379. * If the slave address is neither 0x70 nor 0x72,
  380. * it is not a SDVO device. Skip it.
  381. */
  382. continue;
  383. }
  384. if (child->dvo_port != DEVICE_PORT_DVOB &&
  385. child->dvo_port != DEVICE_PORT_DVOC) {
  386. /* skip the incorrect SDVO port */
  387. DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
  388. continue;
  389. }
  390. DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
  391. " %s port\n",
  392. child->slave_addr,
  393. (child->dvo_port == DEVICE_PORT_DVOB) ?
  394. "SDVOB" : "SDVOC");
  395. p_mapping = &(dev_priv->sdvo_mappings[child->dvo_port - 1]);
  396. if (!p_mapping->initialized) {
  397. p_mapping->dvo_port = child->dvo_port;
  398. p_mapping->slave_addr = child->slave_addr;
  399. p_mapping->dvo_wiring = child->dvo_wiring;
  400. p_mapping->ddc_pin = child->ddc_pin;
  401. p_mapping->i2c_pin = child->i2c_pin;
  402. p_mapping->initialized = 1;
  403. DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
  404. p_mapping->dvo_port,
  405. p_mapping->slave_addr,
  406. p_mapping->dvo_wiring,
  407. p_mapping->ddc_pin,
  408. p_mapping->i2c_pin);
  409. } else {
  410. DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
  411. "two SDVO device.\n");
  412. }
  413. if (child->slave2_addr) {
  414. /* Maybe this is a SDVO device with multiple inputs */
  415. /* And the mapping info is not added */
  416. DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
  417. " is a SDVO device with multiple inputs.\n");
  418. }
  419. count++;
  420. }
  421. if (!count) {
  422. /* No SDVO device info is found */
  423. DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
  424. }
  425. return;
  426. }
  427. static void
  428. parse_driver_features(struct drm_i915_private *dev_priv,
  429. const struct bdb_header *bdb)
  430. {
  431. const struct bdb_driver_features *driver;
  432. driver = find_section(bdb, BDB_DRIVER_FEATURES);
  433. if (!driver)
  434. return;
  435. if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
  436. dev_priv->vbt.edp_support = 1;
  437. if (driver->dual_frequency)
  438. dev_priv->render_reclock_avail = true;
  439. DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
  440. /*
  441. * If DRRS is not supported, drrs_type has to be set to 0.
  442. * This is because, VBT is configured in such a way that
  443. * static DRRS is 0 and DRRS not supported is represented by
  444. * driver->drrs_enabled=false
  445. */
  446. if (!driver->drrs_enabled)
  447. dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
  448. }
  449. static void
  450. parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
  451. {
  452. const struct bdb_edp *edp;
  453. const struct edp_power_seq *edp_pps;
  454. const struct edp_link_params *edp_link_params;
  455. edp = find_section(bdb, BDB_EDP);
  456. if (!edp) {
  457. if (dev_priv->vbt.edp_support)
  458. DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
  459. return;
  460. }
  461. switch ((edp->color_depth >> (panel_type * 2)) & 3) {
  462. case EDP_18BPP:
  463. dev_priv->vbt.edp_bpp = 18;
  464. break;
  465. case EDP_24BPP:
  466. dev_priv->vbt.edp_bpp = 24;
  467. break;
  468. case EDP_30BPP:
  469. dev_priv->vbt.edp_bpp = 30;
  470. break;
  471. }
  472. /* Get the eDP sequencing and link info */
  473. edp_pps = &edp->power_seqs[panel_type];
  474. edp_link_params = &edp->link_params[panel_type];
  475. dev_priv->vbt.edp_pps = *edp_pps;
  476. switch (edp_link_params->rate) {
  477. case EDP_RATE_1_62:
  478. dev_priv->vbt.edp_rate = DP_LINK_BW_1_62;
  479. break;
  480. case EDP_RATE_2_7:
  481. dev_priv->vbt.edp_rate = DP_LINK_BW_2_7;
  482. break;
  483. default:
  484. DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
  485. edp_link_params->rate);
  486. break;
  487. }
  488. switch (edp_link_params->lanes) {
  489. case EDP_LANE_1:
  490. dev_priv->vbt.edp_lanes = 1;
  491. break;
  492. case EDP_LANE_2:
  493. dev_priv->vbt.edp_lanes = 2;
  494. break;
  495. case EDP_LANE_4:
  496. dev_priv->vbt.edp_lanes = 4;
  497. break;
  498. default:
  499. DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
  500. edp_link_params->lanes);
  501. break;
  502. }
  503. switch (edp_link_params->preemphasis) {
  504. case EDP_PREEMPHASIS_NONE:
  505. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
  506. break;
  507. case EDP_PREEMPHASIS_3_5dB:
  508. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
  509. break;
  510. case EDP_PREEMPHASIS_6dB:
  511. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
  512. break;
  513. case EDP_PREEMPHASIS_9_5dB:
  514. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
  515. break;
  516. default:
  517. DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
  518. edp_link_params->preemphasis);
  519. break;
  520. }
  521. switch (edp_link_params->vswing) {
  522. case EDP_VSWING_0_4V:
  523. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
  524. break;
  525. case EDP_VSWING_0_6V:
  526. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
  527. break;
  528. case EDP_VSWING_0_8V:
  529. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
  530. break;
  531. case EDP_VSWING_1_2V:
  532. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
  533. break;
  534. default:
  535. DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
  536. edp_link_params->vswing);
  537. break;
  538. }
  539. if (bdb->version >= 173) {
  540. uint8_t vswing;
  541. /* Don't read from VBT if module parameter has valid value*/
  542. if (i915.edp_vswing) {
  543. dev_priv->edp_low_vswing = i915.edp_vswing == 1;
  544. } else {
  545. vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
  546. dev_priv->edp_low_vswing = vswing == 0;
  547. }
  548. }
  549. }
  550. static void
  551. parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
  552. {
  553. const struct bdb_psr *psr;
  554. const struct psr_table *psr_table;
  555. psr = find_section(bdb, BDB_PSR);
  556. if (!psr) {
  557. DRM_DEBUG_KMS("No PSR BDB found.\n");
  558. return;
  559. }
  560. psr_table = &psr->psr_table[panel_type];
  561. dev_priv->vbt.psr.full_link = psr_table->full_link;
  562. dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
  563. /* Allowed VBT values goes from 0 to 15 */
  564. dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
  565. psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
  566. switch (psr_table->lines_to_wait) {
  567. case 0:
  568. dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
  569. break;
  570. case 1:
  571. dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
  572. break;
  573. case 2:
  574. dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
  575. break;
  576. case 3:
  577. dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
  578. break;
  579. default:
  580. DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
  581. psr_table->lines_to_wait);
  582. break;
  583. }
  584. dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
  585. dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
  586. }
  587. static u8 *goto_next_sequence(u8 *data, int *size)
  588. {
  589. u16 len;
  590. int tmp = *size;
  591. if (--tmp < 0)
  592. return NULL;
  593. /* goto first element */
  594. data++;
  595. while (1) {
  596. switch (*data) {
  597. case MIPI_SEQ_ELEM_SEND_PKT:
  598. /*
  599. * skip by this element payload size
  600. * skip elem id, command flag and data type
  601. */
  602. tmp -= 5;
  603. if (tmp < 0)
  604. return NULL;
  605. data += 3;
  606. len = *((u16 *)data);
  607. tmp -= len;
  608. if (tmp < 0)
  609. return NULL;
  610. /* skip by len */
  611. data = data + 2 + len;
  612. break;
  613. case MIPI_SEQ_ELEM_DELAY:
  614. /* skip by elem id, and delay is 4 bytes */
  615. tmp -= 5;
  616. if (tmp < 0)
  617. return NULL;
  618. data += 5;
  619. break;
  620. case MIPI_SEQ_ELEM_GPIO:
  621. tmp -= 3;
  622. if (tmp < 0)
  623. return NULL;
  624. data += 3;
  625. break;
  626. default:
  627. DRM_ERROR("Unknown element\n");
  628. return NULL;
  629. }
  630. /* end of sequence ? */
  631. if (*data == 0)
  632. break;
  633. }
  634. /* goto next sequence or end of block byte */
  635. if (--tmp < 0)
  636. return NULL;
  637. data++;
  638. /* update amount of data left for the sequence block to be parsed */
  639. *size = tmp;
  640. return data;
  641. }
  642. static void
  643. parse_mipi(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
  644. {
  645. const struct bdb_mipi_config *start;
  646. const struct bdb_mipi_sequence *sequence;
  647. const struct mipi_config *config;
  648. const struct mipi_pps_data *pps;
  649. u8 *data;
  650. const u8 *seq_data;
  651. int i, panel_id, seq_size;
  652. u16 block_size;
  653. /* parse MIPI blocks only if LFP type is MIPI */
  654. if (!dev_priv->vbt.has_mipi)
  655. return;
  656. /* Initialize this to undefined indicating no generic MIPI support */
  657. dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
  658. /* Block #40 is already parsed and panel_fixed_mode is
  659. * stored in dev_priv->lfp_lvds_vbt_mode
  660. * resuse this when needed
  661. */
  662. /* Parse #52 for panel index used from panel_type already
  663. * parsed
  664. */
  665. start = find_section(bdb, BDB_MIPI_CONFIG);
  666. if (!start) {
  667. DRM_DEBUG_KMS("No MIPI config BDB found");
  668. return;
  669. }
  670. DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
  671. panel_type);
  672. /*
  673. * get hold of the correct configuration block and pps data as per
  674. * the panel_type as index
  675. */
  676. config = &start->config[panel_type];
  677. pps = &start->pps[panel_type];
  678. /* store as of now full data. Trim when we realise all is not needed */
  679. dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
  680. if (!dev_priv->vbt.dsi.config)
  681. return;
  682. dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
  683. if (!dev_priv->vbt.dsi.pps) {
  684. kfree(dev_priv->vbt.dsi.config);
  685. return;
  686. }
  687. /* We have mandatory mipi config blocks. Initialize as generic panel */
  688. dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
  689. /* Check if we have sequence block as well */
  690. sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
  691. if (!sequence) {
  692. DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
  693. return;
  694. }
  695. /* Fail gracefully for forward incompatible sequence block. */
  696. if (sequence->version >= 3) {
  697. DRM_ERROR("Unable to parse MIPI Sequence Block v3+\n");
  698. return;
  699. }
  700. DRM_DEBUG_DRIVER("Found MIPI sequence block\n");
  701. block_size = get_blocksize(sequence);
  702. /*
  703. * parse the sequence block for individual sequences
  704. */
  705. dev_priv->vbt.dsi.seq_version = sequence->version;
  706. seq_data = &sequence->data[0];
  707. /*
  708. * sequence block is variable length and hence we need to parse and
  709. * get the sequence data for specific panel id
  710. */
  711. for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) {
  712. panel_id = *seq_data;
  713. seq_size = *((u16 *) (seq_data + 1));
  714. if (panel_id == panel_type)
  715. break;
  716. /* skip the sequence including seq header of 3 bytes */
  717. seq_data = seq_data + 3 + seq_size;
  718. if ((seq_data - &sequence->data[0]) > block_size) {
  719. DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n");
  720. return;
  721. }
  722. }
  723. if (i == MAX_MIPI_CONFIGURATIONS) {
  724. DRM_ERROR("Sequence block detected but no valid configuration\n");
  725. return;
  726. }
  727. /* check if found sequence is completely within the sequence block
  728. * just being paranoid */
  729. if (seq_size > block_size) {
  730. DRM_ERROR("Corrupted sequence/size, bailing out\n");
  731. return;
  732. }
  733. /* skip the panel id(1 byte) and seq size(2 bytes) */
  734. dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL);
  735. if (!dev_priv->vbt.dsi.data)
  736. return;
  737. /*
  738. * loop into the sequence data and split into multiple sequneces
  739. * There are only 5 types of sequences as of now
  740. */
  741. data = dev_priv->vbt.dsi.data;
  742. dev_priv->vbt.dsi.size = seq_size;
  743. /* two consecutive 0x00 indicate end of all sequences */
  744. while (1) {
  745. int seq_id = *data;
  746. if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) {
  747. dev_priv->vbt.dsi.sequence[seq_id] = data;
  748. DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id);
  749. } else {
  750. DRM_ERROR("undefined sequence\n");
  751. goto err;
  752. }
  753. /* partial parsing to skip elements */
  754. data = goto_next_sequence(data, &seq_size);
  755. if (data == NULL) {
  756. DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n");
  757. goto err;
  758. }
  759. if (*data == 0)
  760. break; /* end of sequence reached */
  761. }
  762. DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n");
  763. return;
  764. err:
  765. kfree(dev_priv->vbt.dsi.data);
  766. dev_priv->vbt.dsi.data = NULL;
  767. /* error during parsing so set all pointers to null
  768. * because of partial parsing */
  769. memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
  770. }
  771. static u8 translate_iboost(u8 val)
  772. {
  773. static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
  774. if (val >= ARRAY_SIZE(mapping)) {
  775. DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
  776. return 0;
  777. }
  778. return mapping[val];
  779. }
  780. static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
  781. const struct bdb_header *bdb)
  782. {
  783. union child_device_config *it, *child = NULL;
  784. struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
  785. uint8_t hdmi_level_shift;
  786. int i, j;
  787. bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
  788. uint8_t aux_channel, ddc_pin;
  789. /* Each DDI port can have more than one value on the "DVO Port" field,
  790. * so look for all the possible values for each port and abort if more
  791. * than one is found. */
  792. int dvo_ports[][3] = {
  793. {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
  794. {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
  795. {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
  796. {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
  797. {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
  798. };
  799. /* Find the child device to use, abort if more than one found. */
  800. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  801. it = dev_priv->vbt.child_dev + i;
  802. for (j = 0; j < 3; j++) {
  803. if (dvo_ports[port][j] == -1)
  804. break;
  805. if (it->common.dvo_port == dvo_ports[port][j]) {
  806. if (child) {
  807. DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
  808. port_name(port));
  809. return;
  810. }
  811. child = it;
  812. }
  813. }
  814. }
  815. if (!child)
  816. return;
  817. aux_channel = child->raw[25];
  818. ddc_pin = child->common.ddc_pin;
  819. is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
  820. is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
  821. is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
  822. is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
  823. is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
  824. info->supports_dvi = is_dvi;
  825. info->supports_hdmi = is_hdmi;
  826. info->supports_dp = is_dp;
  827. DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
  828. port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
  829. if (is_edp && is_dvi)
  830. DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
  831. port_name(port));
  832. if (is_crt && port != PORT_E)
  833. DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
  834. if (is_crt && (is_dvi || is_dp))
  835. DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
  836. port_name(port));
  837. if (is_dvi && (port == PORT_A || port == PORT_E))
  838. DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
  839. if (!is_dvi && !is_dp && !is_crt)
  840. DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
  841. port_name(port));
  842. if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
  843. DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
  844. if (is_dvi) {
  845. if (port == PORT_E) {
  846. info->alternate_ddc_pin = ddc_pin;
  847. /* if DDIE share ddc pin with other port, then
  848. * dvi/hdmi couldn't exist on the shared port.
  849. * Otherwise they share the same ddc bin and system
  850. * couldn't communicate with them seperately. */
  851. if (ddc_pin == DDC_PIN_B) {
  852. dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;
  853. dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;
  854. } else if (ddc_pin == DDC_PIN_C) {
  855. dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;
  856. dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0;
  857. } else if (ddc_pin == DDC_PIN_D) {
  858. dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0;
  859. dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0;
  860. }
  861. } else if (ddc_pin == DDC_PIN_B && port != PORT_B)
  862. DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
  863. else if (ddc_pin == DDC_PIN_C && port != PORT_C)
  864. DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
  865. else if (ddc_pin == DDC_PIN_D && port != PORT_D)
  866. DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
  867. }
  868. if (is_dp) {
  869. if (port == PORT_E) {
  870. info->alternate_aux_channel = aux_channel;
  871. /* if DDIE share aux channel with other port, then
  872. * DP couldn't exist on the shared port. Otherwise
  873. * they share the same aux channel and system
  874. * couldn't communicate with them seperately. */
  875. if (aux_channel == DP_AUX_A)
  876. dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0;
  877. else if (aux_channel == DP_AUX_B)
  878. dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0;
  879. else if (aux_channel == DP_AUX_C)
  880. dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0;
  881. else if (aux_channel == DP_AUX_D)
  882. dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0;
  883. }
  884. else if (aux_channel == DP_AUX_A && port != PORT_A)
  885. DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
  886. else if (aux_channel == DP_AUX_B && port != PORT_B)
  887. DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
  888. else if (aux_channel == DP_AUX_C && port != PORT_C)
  889. DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
  890. else if (aux_channel == DP_AUX_D && port != PORT_D)
  891. DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
  892. }
  893. if (bdb->version >= 158) {
  894. /* The VBT HDMI level shift values match the table we have. */
  895. hdmi_level_shift = child->raw[7] & 0xF;
  896. DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
  897. port_name(port),
  898. hdmi_level_shift);
  899. info->hdmi_level_shift = hdmi_level_shift;
  900. }
  901. /* Parse the I_boost config for SKL and above */
  902. if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) {
  903. info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
  904. DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
  905. port_name(port), info->dp_boost_level);
  906. info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4);
  907. DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
  908. port_name(port), info->hdmi_boost_level);
  909. }
  910. }
  911. static void parse_ddi_ports(struct drm_i915_private *dev_priv,
  912. const struct bdb_header *bdb)
  913. {
  914. struct drm_device *dev = dev_priv->dev;
  915. enum port port;
  916. if (!HAS_DDI(dev))
  917. return;
  918. if (!dev_priv->vbt.child_dev_num)
  919. return;
  920. if (bdb->version < 155)
  921. return;
  922. for (port = PORT_A; port < I915_MAX_PORTS; port++)
  923. parse_ddi_port(dev_priv, port, bdb);
  924. }
  925. static void
  926. parse_device_mapping(struct drm_i915_private *dev_priv,
  927. const struct bdb_header *bdb)
  928. {
  929. const struct bdb_general_definitions *p_defs;
  930. const union child_device_config *p_child;
  931. union child_device_config *child_dev_ptr;
  932. int i, child_device_num, count;
  933. u8 expected_size;
  934. u16 block_size;
  935. p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  936. if (!p_defs) {
  937. DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
  938. return;
  939. }
  940. if (bdb->version < 195) {
  941. expected_size = sizeof(struct old_child_dev_config);
  942. } else if (bdb->version == 195) {
  943. expected_size = 37;
  944. } else if (bdb->version <= 197) {
  945. expected_size = 38;
  946. } else {
  947. expected_size = 38;
  948. BUILD_BUG_ON(sizeof(*p_child) < 38);
  949. DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
  950. bdb->version, expected_size);
  951. }
  952. /* The legacy sized child device config is the minimum we need. */
  953. if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) {
  954. DRM_ERROR("Child device config size %u is too small.\n",
  955. p_defs->child_dev_size);
  956. return;
  957. }
  958. /* Flag an error for unexpected size, but continue anyway. */
  959. if (p_defs->child_dev_size != expected_size)
  960. DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
  961. p_defs->child_dev_size, expected_size, bdb->version);
  962. /* get the block size of general definitions */
  963. block_size = get_blocksize(p_defs);
  964. /* get the number of child device */
  965. child_device_num = (block_size - sizeof(*p_defs)) /
  966. p_defs->child_dev_size;
  967. count = 0;
  968. /* get the number of child device that is present */
  969. for (i = 0; i < child_device_num; i++) {
  970. p_child = child_device_ptr(p_defs, i);
  971. if (!p_child->common.device_type) {
  972. /* skip the device block if device type is invalid */
  973. continue;
  974. }
  975. count++;
  976. }
  977. if (!count) {
  978. DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
  979. return;
  980. }
  981. dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
  982. if (!dev_priv->vbt.child_dev) {
  983. DRM_DEBUG_KMS("No memory space for child device\n");
  984. return;
  985. }
  986. dev_priv->vbt.child_dev_num = count;
  987. count = 0;
  988. for (i = 0; i < child_device_num; i++) {
  989. p_child = child_device_ptr(p_defs, i);
  990. if (!p_child->common.device_type) {
  991. /* skip the device block if device type is invalid */
  992. continue;
  993. }
  994. if (p_child->common.dvo_port >= DVO_PORT_MIPIA
  995. && p_child->common.dvo_port <= DVO_PORT_MIPID
  996. &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) {
  997. DRM_DEBUG_KMS("Found MIPI as LFP\n");
  998. dev_priv->vbt.has_mipi = 1;
  999. dev_priv->vbt.dsi.port = p_child->common.dvo_port;
  1000. }
  1001. child_dev_ptr = dev_priv->vbt.child_dev + count;
  1002. count++;
  1003. /*
  1004. * Copy as much as we know (sizeof) and is available
  1005. * (child_dev_size) of the child device. Accessing the data must
  1006. * depend on VBT version.
  1007. */
  1008. memcpy(child_dev_ptr, p_child,
  1009. min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
  1010. }
  1011. return;
  1012. }
  1013. static void
  1014. init_vbt_defaults(struct drm_i915_private *dev_priv)
  1015. {
  1016. struct drm_device *dev = dev_priv->dev;
  1017. enum port port;
  1018. dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
  1019. /* Default to having backlight */
  1020. dev_priv->vbt.backlight.present = true;
  1021. /* LFP panel data */
  1022. dev_priv->vbt.lvds_dither = 1;
  1023. dev_priv->vbt.lvds_vbt = 0;
  1024. /* SDVO panel data */
  1025. dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
  1026. /* general features */
  1027. dev_priv->vbt.int_tv_support = 1;
  1028. dev_priv->vbt.int_crt_support = 1;
  1029. /* Default to using SSC */
  1030. dev_priv->vbt.lvds_use_ssc = 1;
  1031. /*
  1032. * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
  1033. * clock for LVDS.
  1034. */
  1035. dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev,
  1036. !HAS_PCH_SPLIT(dev));
  1037. DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
  1038. for (port = PORT_A; port < I915_MAX_PORTS; port++) {
  1039. struct ddi_vbt_port_info *info =
  1040. &dev_priv->vbt.ddi_port_info[port];
  1041. info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
  1042. info->supports_dvi = (port != PORT_A && port != PORT_E);
  1043. info->supports_hdmi = info->supports_dvi;
  1044. info->supports_dp = (port != PORT_E);
  1045. }
  1046. }
  1047. static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
  1048. {
  1049. DRM_DEBUG_KMS("Falling back to manually reading VBT from "
  1050. "VBIOS ROM for %s\n",
  1051. id->ident);
  1052. return 1;
  1053. }
  1054. static const struct dmi_system_id intel_no_opregion_vbt[] = {
  1055. {
  1056. .callback = intel_no_opregion_vbt_callback,
  1057. .ident = "ThinkCentre A57",
  1058. .matches = {
  1059. DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
  1060. DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
  1061. },
  1062. },
  1063. { }
  1064. };
  1065. static const struct bdb_header *validate_vbt(const void __iomem *_base,
  1066. size_t size,
  1067. const void __iomem *_vbt,
  1068. const char *source)
  1069. {
  1070. /*
  1071. * This is the one place where we explicitly discard the address space
  1072. * (__iomem) of the BIOS/VBT. (And this will cause a sparse complaint.)
  1073. * From now on everything is based on 'base', and treated as regular
  1074. * memory.
  1075. */
  1076. const void *base = (const void *) _base;
  1077. size_t offset = _vbt - _base;
  1078. const struct vbt_header *vbt = base + offset;
  1079. const struct bdb_header *bdb;
  1080. if (offset + sizeof(struct vbt_header) > size) {
  1081. DRM_DEBUG_DRIVER("VBT header incomplete\n");
  1082. return NULL;
  1083. }
  1084. if (memcmp(vbt->signature, "$VBT", 4)) {
  1085. DRM_DEBUG_DRIVER("VBT invalid signature\n");
  1086. return NULL;
  1087. }
  1088. offset += vbt->bdb_offset;
  1089. if (offset + sizeof(struct bdb_header) > size) {
  1090. DRM_DEBUG_DRIVER("BDB header incomplete\n");
  1091. return NULL;
  1092. }
  1093. bdb = base + offset;
  1094. if (offset + bdb->bdb_size > size) {
  1095. DRM_DEBUG_DRIVER("BDB incomplete\n");
  1096. return NULL;
  1097. }
  1098. DRM_DEBUG_KMS("Using VBT from %s: %20s\n",
  1099. source, vbt->signature);
  1100. return bdb;
  1101. }
  1102. static const struct bdb_header *find_vbt(void __iomem *bios, size_t size)
  1103. {
  1104. const struct bdb_header *bdb = NULL;
  1105. size_t i;
  1106. /* Scour memory looking for the VBT signature. */
  1107. for (i = 0; i + 4 < size; i++) {
  1108. if (ioread32(bios + i) == *((const u32 *) "$VBT")) {
  1109. bdb = validate_vbt(bios, size, bios + i, "PCI ROM");
  1110. break;
  1111. }
  1112. }
  1113. return bdb;
  1114. }
  1115. /**
  1116. * intel_parse_bios - find VBT and initialize settings from the BIOS
  1117. * @dev: DRM device
  1118. *
  1119. * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
  1120. * to appropriate values.
  1121. *
  1122. * Returns 0 on success, nonzero on failure.
  1123. */
  1124. int
  1125. intel_parse_bios(struct drm_device *dev)
  1126. {
  1127. struct drm_i915_private *dev_priv = dev->dev_private;
  1128. struct pci_dev *pdev = dev->pdev;
  1129. const struct bdb_header *bdb = NULL;
  1130. u8 __iomem *bios = NULL;
  1131. if (HAS_PCH_NOP(dev))
  1132. return -ENODEV;
  1133. init_vbt_defaults(dev_priv);
  1134. /* XXX Should this validation be moved to intel_opregion.c? */
  1135. if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt)
  1136. bdb = validate_vbt(dev_priv->opregion.header, OPREGION_SIZE,
  1137. dev_priv->opregion.vbt, "OpRegion");
  1138. if (bdb == NULL) {
  1139. size_t size;
  1140. bios = pci_map_rom(pdev, &size);
  1141. if (!bios)
  1142. return -1;
  1143. bdb = find_vbt(bios, size);
  1144. if (!bdb) {
  1145. pci_unmap_rom(pdev, bios);
  1146. return -1;
  1147. }
  1148. }
  1149. /* Grab useful general definitions */
  1150. parse_general_features(dev_priv, bdb);
  1151. parse_general_definitions(dev_priv, bdb);
  1152. parse_lfp_panel_data(dev_priv, bdb);
  1153. parse_lfp_backlight(dev_priv, bdb);
  1154. parse_sdvo_panel_data(dev_priv, bdb);
  1155. parse_sdvo_device_mapping(dev_priv, bdb);
  1156. parse_device_mapping(dev_priv, bdb);
  1157. parse_driver_features(dev_priv, bdb);
  1158. parse_edp(dev_priv, bdb);
  1159. parse_psr(dev_priv, bdb);
  1160. parse_mipi(dev_priv, bdb);
  1161. parse_ddi_ports(dev_priv, bdb);
  1162. if (bios)
  1163. pci_unmap_rom(pdev, bios);
  1164. return 0;
  1165. }
  1166. /* Ensure that vital registers have been initialised, even if the BIOS
  1167. * is absent or just failing to do its job.
  1168. */
  1169. void intel_setup_bios(struct drm_device *dev)
  1170. {
  1171. struct drm_i915_private *dev_priv = dev->dev_private;
  1172. /* Set the Panel Power On/Off timings if uninitialized. */
  1173. if (!HAS_PCH_SPLIT(dev) &&
  1174. I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
  1175. /* Set T2 to 40ms and T5 to 200ms */
  1176. I915_WRITE(PP_ON_DELAYS, 0x019007d0);
  1177. /* Set T3 to 35ms and Tx to 200ms */
  1178. I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
  1179. }
  1180. }