gpio-adp5588.c 11 KB

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  1. /*
  2. * GPIO Chip driver for Analog Devices
  3. * ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
  4. *
  5. * Copyright 2009-2010 Analog Devices Inc.
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/module.h>
  10. #include <linux/kernel.h>
  11. #include <linux/slab.h>
  12. #include <linux/init.h>
  13. #include <linux/i2c.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/irq.h>
  17. #include <linux/i2c/adp5588.h>
  18. #define DRV_NAME "adp5588-gpio"
  19. /*
  20. * Early pre 4.0 Silicon required to delay readout by at least 25ms,
  21. * since the Event Counter Register updated 25ms after the interrupt
  22. * asserted.
  23. */
  24. #define WA_DELAYED_READOUT_REVID(rev) ((rev) < 4)
  25. struct adp5588_gpio {
  26. struct i2c_client *client;
  27. struct gpio_chip gpio_chip;
  28. struct mutex lock; /* protect cached dir, dat_out */
  29. /* protect serialized access to the interrupt controller bus */
  30. struct mutex irq_lock;
  31. unsigned gpio_start;
  32. unsigned irq_base;
  33. uint8_t dat_out[3];
  34. uint8_t dir[3];
  35. uint8_t int_lvl[3];
  36. uint8_t int_en[3];
  37. uint8_t irq_mask[3];
  38. uint8_t irq_stat[3];
  39. };
  40. static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
  41. {
  42. int ret = i2c_smbus_read_byte_data(client, reg);
  43. if (ret < 0)
  44. dev_err(&client->dev, "Read Error\n");
  45. return ret;
  46. }
  47. static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
  48. {
  49. int ret = i2c_smbus_write_byte_data(client, reg, val);
  50. if (ret < 0)
  51. dev_err(&client->dev, "Write Error\n");
  52. return ret;
  53. }
  54. static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
  55. {
  56. struct adp5588_gpio *dev =
  57. container_of(chip, struct adp5588_gpio, gpio_chip);
  58. unsigned bank = ADP5588_BANK(off);
  59. unsigned bit = ADP5588_BIT(off);
  60. int val;
  61. mutex_lock(&dev->lock);
  62. if (dev->dir[bank] & bit)
  63. val = dev->dat_out[bank];
  64. else
  65. val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);
  66. mutex_unlock(&dev->lock);
  67. return !!(val & bit);
  68. }
  69. static void adp5588_gpio_set_value(struct gpio_chip *chip,
  70. unsigned off, int val)
  71. {
  72. unsigned bank, bit;
  73. struct adp5588_gpio *dev =
  74. container_of(chip, struct adp5588_gpio, gpio_chip);
  75. bank = ADP5588_BANK(off);
  76. bit = ADP5588_BIT(off);
  77. mutex_lock(&dev->lock);
  78. if (val)
  79. dev->dat_out[bank] |= bit;
  80. else
  81. dev->dat_out[bank] &= ~bit;
  82. adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
  83. dev->dat_out[bank]);
  84. mutex_unlock(&dev->lock);
  85. }
  86. static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
  87. {
  88. int ret;
  89. unsigned bank;
  90. struct adp5588_gpio *dev =
  91. container_of(chip, struct adp5588_gpio, gpio_chip);
  92. bank = ADP5588_BANK(off);
  93. mutex_lock(&dev->lock);
  94. dev->dir[bank] &= ~ADP5588_BIT(off);
  95. ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
  96. mutex_unlock(&dev->lock);
  97. return ret;
  98. }
  99. static int adp5588_gpio_direction_output(struct gpio_chip *chip,
  100. unsigned off, int val)
  101. {
  102. int ret;
  103. unsigned bank, bit;
  104. struct adp5588_gpio *dev =
  105. container_of(chip, struct adp5588_gpio, gpio_chip);
  106. bank = ADP5588_BANK(off);
  107. bit = ADP5588_BIT(off);
  108. mutex_lock(&dev->lock);
  109. dev->dir[bank] |= bit;
  110. if (val)
  111. dev->dat_out[bank] |= bit;
  112. else
  113. dev->dat_out[bank] &= ~bit;
  114. ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
  115. dev->dat_out[bank]);
  116. ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
  117. dev->dir[bank]);
  118. mutex_unlock(&dev->lock);
  119. return ret;
  120. }
  121. #ifdef CONFIG_GPIO_ADP5588_IRQ
  122. static int adp5588_gpio_to_irq(struct gpio_chip *chip, unsigned off)
  123. {
  124. struct adp5588_gpio *dev =
  125. container_of(chip, struct adp5588_gpio, gpio_chip);
  126. return dev->irq_base + off;
  127. }
  128. static void adp5588_irq_bus_lock(struct irq_data *d)
  129. {
  130. struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
  131. mutex_lock(&dev->irq_lock);
  132. }
  133. /*
  134. * genirq core code can issue chip->mask/unmask from atomic context.
  135. * This doesn't work for slow busses where an access needs to sleep.
  136. * bus_sync_unlock() is therefore called outside the atomic context,
  137. * syncs the current irq mask state with the slow external controller
  138. * and unlocks the bus.
  139. */
  140. static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
  141. {
  142. struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
  143. int i;
  144. for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++)
  145. if (dev->int_en[i] ^ dev->irq_mask[i]) {
  146. dev->int_en[i] = dev->irq_mask[i];
  147. adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i,
  148. dev->int_en[i]);
  149. }
  150. mutex_unlock(&dev->irq_lock);
  151. }
  152. static void adp5588_irq_mask(struct irq_data *d)
  153. {
  154. struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
  155. unsigned gpio = d->irq - dev->irq_base;
  156. dev->irq_mask[ADP5588_BANK(gpio)] &= ~ADP5588_BIT(gpio);
  157. }
  158. static void adp5588_irq_unmask(struct irq_data *d)
  159. {
  160. struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
  161. unsigned gpio = d->irq - dev->irq_base;
  162. dev->irq_mask[ADP5588_BANK(gpio)] |= ADP5588_BIT(gpio);
  163. }
  164. static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
  165. {
  166. struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
  167. uint16_t gpio = d->irq - dev->irq_base;
  168. unsigned bank, bit;
  169. if ((type & IRQ_TYPE_EDGE_BOTH)) {
  170. dev_err(&dev->client->dev, "irq %d: unsupported type %d\n",
  171. d->irq, type);
  172. return -EINVAL;
  173. }
  174. bank = ADP5588_BANK(gpio);
  175. bit = ADP5588_BIT(gpio);
  176. if (type & IRQ_TYPE_LEVEL_HIGH)
  177. dev->int_lvl[bank] |= bit;
  178. else if (type & IRQ_TYPE_LEVEL_LOW)
  179. dev->int_lvl[bank] &= ~bit;
  180. else
  181. return -EINVAL;
  182. adp5588_gpio_direction_input(&dev->gpio_chip, gpio);
  183. adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + bank,
  184. dev->int_lvl[bank]);
  185. return 0;
  186. }
  187. static struct irq_chip adp5588_irq_chip = {
  188. .name = "adp5588",
  189. .irq_mask = adp5588_irq_mask,
  190. .irq_unmask = adp5588_irq_unmask,
  191. .irq_bus_lock = adp5588_irq_bus_lock,
  192. .irq_bus_sync_unlock = adp5588_irq_bus_sync_unlock,
  193. .irq_set_type = adp5588_irq_set_type,
  194. };
  195. static int adp5588_gpio_read_intstat(struct i2c_client *client, u8 *buf)
  196. {
  197. int ret = i2c_smbus_read_i2c_block_data(client, GPIO_INT_STAT1, 3, buf);
  198. if (ret < 0)
  199. dev_err(&client->dev, "Read INT_STAT Error\n");
  200. return ret;
  201. }
  202. static irqreturn_t adp5588_irq_handler(int irq, void *devid)
  203. {
  204. struct adp5588_gpio *dev = devid;
  205. unsigned status, bank, bit, pending;
  206. int ret;
  207. status = adp5588_gpio_read(dev->client, INT_STAT);
  208. if (status & ADP5588_GPI_INT) {
  209. ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat);
  210. if (ret < 0)
  211. memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat));
  212. for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO);
  213. bank++, bit = 0) {
  214. pending = dev->irq_stat[bank] & dev->irq_mask[bank];
  215. while (pending) {
  216. if (pending & (1 << bit)) {
  217. handle_nested_irq(dev->irq_base +
  218. (bank << 3) + bit);
  219. pending &= ~(1 << bit);
  220. }
  221. bit++;
  222. }
  223. }
  224. }
  225. adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */
  226. return IRQ_HANDLED;
  227. }
  228. static int adp5588_irq_setup(struct adp5588_gpio *dev)
  229. {
  230. struct i2c_client *client = dev->client;
  231. struct adp5588_gpio_platform_data *pdata =
  232. dev_get_platdata(&client->dev);
  233. unsigned gpio;
  234. int ret;
  235. adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
  236. adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */
  237. adp5588_gpio_read_intstat(client, dev->irq_stat); /* read to clear */
  238. dev->irq_base = pdata->irq_base;
  239. mutex_init(&dev->irq_lock);
  240. for (gpio = 0; gpio < dev->gpio_chip.ngpio; gpio++) {
  241. int irq = gpio + dev->irq_base;
  242. irq_set_chip_data(irq, dev);
  243. irq_set_chip_and_handler(irq, &adp5588_irq_chip,
  244. handle_level_irq);
  245. irq_set_nested_thread(irq, 1);
  246. irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
  247. }
  248. ret = request_threaded_irq(client->irq,
  249. NULL,
  250. adp5588_irq_handler,
  251. IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
  252. dev_name(&client->dev), dev);
  253. if (ret) {
  254. dev_err(&client->dev, "failed to request irq %d\n",
  255. client->irq);
  256. goto out;
  257. }
  258. dev->gpio_chip.to_irq = adp5588_gpio_to_irq;
  259. adp5588_gpio_write(client, CFG,
  260. ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_GPI_INT);
  261. return 0;
  262. out:
  263. dev->irq_base = 0;
  264. return ret;
  265. }
  266. static void adp5588_irq_teardown(struct adp5588_gpio *dev)
  267. {
  268. if (dev->irq_base)
  269. free_irq(dev->client->irq, dev);
  270. }
  271. #else
  272. static int adp5588_irq_setup(struct adp5588_gpio *dev)
  273. {
  274. struct i2c_client *client = dev->client;
  275. dev_warn(&client->dev, "interrupt support not compiled in\n");
  276. return 0;
  277. }
  278. static void adp5588_irq_teardown(struct adp5588_gpio *dev)
  279. {
  280. }
  281. #endif /* CONFIG_GPIO_ADP5588_IRQ */
  282. static int adp5588_gpio_probe(struct i2c_client *client,
  283. const struct i2c_device_id *id)
  284. {
  285. struct adp5588_gpio_platform_data *pdata =
  286. dev_get_platdata(&client->dev);
  287. struct adp5588_gpio *dev;
  288. struct gpio_chip *gc;
  289. int ret, i, revid;
  290. if (!pdata) {
  291. dev_err(&client->dev, "missing platform data\n");
  292. return -ENODEV;
  293. }
  294. if (!i2c_check_functionality(client->adapter,
  295. I2C_FUNC_SMBUS_BYTE_DATA)) {
  296. dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
  297. return -EIO;
  298. }
  299. dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
  300. if (!dev)
  301. return -ENOMEM;
  302. dev->client = client;
  303. gc = &dev->gpio_chip;
  304. gc->direction_input = adp5588_gpio_direction_input;
  305. gc->direction_output = adp5588_gpio_direction_output;
  306. gc->get = adp5588_gpio_get_value;
  307. gc->set = adp5588_gpio_set_value;
  308. gc->can_sleep = true;
  309. gc->base = pdata->gpio_start;
  310. gc->ngpio = ADP5588_MAXGPIO;
  311. gc->label = client->name;
  312. gc->owner = THIS_MODULE;
  313. gc->names = pdata->names;
  314. mutex_init(&dev->lock);
  315. ret = adp5588_gpio_read(dev->client, DEV_ID);
  316. if (ret < 0)
  317. goto err;
  318. revid = ret & ADP5588_DEVICE_ID_MASK;
  319. for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
  320. dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
  321. dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
  322. ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
  323. ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
  324. (pdata->pullup_dis_mask >> (8 * i)) & 0xFF);
  325. ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
  326. if (ret)
  327. goto err;
  328. }
  329. if (pdata->irq_base) {
  330. if (WA_DELAYED_READOUT_REVID(revid)) {
  331. dev_warn(&client->dev, "GPIO int not supported\n");
  332. } else {
  333. ret = adp5588_irq_setup(dev);
  334. if (ret)
  335. goto err;
  336. }
  337. }
  338. ret = gpiochip_add(&dev->gpio_chip);
  339. if (ret)
  340. goto err_irq;
  341. dev_info(&client->dev, "IRQ Base: %d Rev.: %d\n",
  342. pdata->irq_base, revid);
  343. if (pdata->setup) {
  344. ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
  345. if (ret < 0)
  346. dev_warn(&client->dev, "setup failed, %d\n", ret);
  347. }
  348. i2c_set_clientdata(client, dev);
  349. return 0;
  350. err_irq:
  351. adp5588_irq_teardown(dev);
  352. err:
  353. return ret;
  354. }
  355. static int adp5588_gpio_remove(struct i2c_client *client)
  356. {
  357. struct adp5588_gpio_platform_data *pdata =
  358. dev_get_platdata(&client->dev);
  359. struct adp5588_gpio *dev = i2c_get_clientdata(client);
  360. int ret;
  361. if (pdata->teardown) {
  362. ret = pdata->teardown(client,
  363. dev->gpio_chip.base, dev->gpio_chip.ngpio,
  364. pdata->context);
  365. if (ret < 0) {
  366. dev_err(&client->dev, "teardown failed %d\n", ret);
  367. return ret;
  368. }
  369. }
  370. if (dev->irq_base)
  371. free_irq(dev->client->irq, dev);
  372. gpiochip_remove(&dev->gpio_chip);
  373. return 0;
  374. }
  375. static const struct i2c_device_id adp5588_gpio_id[] = {
  376. {DRV_NAME, 0},
  377. {}
  378. };
  379. MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
  380. static struct i2c_driver adp5588_gpio_driver = {
  381. .driver = {
  382. .name = DRV_NAME,
  383. },
  384. .probe = adp5588_gpio_probe,
  385. .remove = adp5588_gpio_remove,
  386. .id_table = adp5588_gpio_id,
  387. };
  388. module_i2c_driver(adp5588_gpio_driver);
  389. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  390. MODULE_DESCRIPTION("GPIO ADP5588 Driver");
  391. MODULE_LICENSE("GPL");