process.c 20 KB

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  1. /*
  2. * Copyright 2010 Tilera Corporation. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation, version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11. * NON INFRINGEMENT. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/sched.h>
  15. #include <linux/preempt.h>
  16. #include <linux/module.h>
  17. #include <linux/fs.h>
  18. #include <linux/kprobes.h>
  19. #include <linux/elfcore.h>
  20. #include <linux/tick.h>
  21. #include <linux/init.h>
  22. #include <linux/mm.h>
  23. #include <linux/compat.h>
  24. #include <linux/hardirq.h>
  25. #include <linux/syscalls.h>
  26. #include <linux/kernel.h>
  27. #include <linux/tracehook.h>
  28. #include <linux/signal.h>
  29. #include <linux/delay.h>
  30. #include <linux/context_tracking.h>
  31. #include <asm/stack.h>
  32. #include <asm/switch_to.h>
  33. #include <asm/homecache.h>
  34. #include <asm/syscalls.h>
  35. #include <asm/traps.h>
  36. #include <asm/setup.h>
  37. #include <asm/uaccess.h>
  38. #ifdef CONFIG_HARDWALL
  39. #include <asm/hardwall.h>
  40. #endif
  41. #include <arch/chip.h>
  42. #include <arch/abi.h>
  43. #include <arch/sim_def.h>
  44. /*
  45. * Use the (x86) "idle=poll" option to prefer low latency when leaving the
  46. * idle loop over low power while in the idle loop, e.g. if we have
  47. * one thread per core and we want to get threads out of futex waits fast.
  48. */
  49. static int __init idle_setup(char *str)
  50. {
  51. if (!str)
  52. return -EINVAL;
  53. if (!strcmp(str, "poll")) {
  54. pr_info("using polling idle threads\n");
  55. cpu_idle_poll_ctrl(true);
  56. return 0;
  57. } else if (!strcmp(str, "halt")) {
  58. return 0;
  59. }
  60. return -1;
  61. }
  62. early_param("idle", idle_setup);
  63. void arch_cpu_idle(void)
  64. {
  65. __this_cpu_write(irq_stat.idle_timestamp, jiffies);
  66. _cpu_idle();
  67. }
  68. /*
  69. * Release a thread_info structure
  70. */
  71. void arch_release_thread_info(struct thread_info *info)
  72. {
  73. struct single_step_state *step_state = info->step_state;
  74. if (step_state) {
  75. /*
  76. * FIXME: we don't munmap step_state->buffer
  77. * because the mm_struct for this process (info->task->mm)
  78. * has already been zeroed in exit_mm(). Keeping a
  79. * reference to it here seems like a bad move, so this
  80. * means we can't munmap() the buffer, and therefore if we
  81. * ptrace multiple threads in a process, we will slowly
  82. * leak user memory. (Note that as soon as the last
  83. * thread in a process dies, we will reclaim all user
  84. * memory including single-step buffers in the usual way.)
  85. * We should either assign a kernel VA to this buffer
  86. * somehow, or we should associate the buffer(s) with the
  87. * mm itself so we can clean them up that way.
  88. */
  89. kfree(step_state);
  90. }
  91. }
  92. static void save_arch_state(struct thread_struct *t);
  93. int copy_thread(unsigned long clone_flags, unsigned long sp,
  94. unsigned long arg, struct task_struct *p)
  95. {
  96. struct pt_regs *childregs = task_pt_regs(p);
  97. unsigned long ksp;
  98. unsigned long *callee_regs;
  99. /*
  100. * Set up the stack and stack pointer appropriately for the
  101. * new child to find itself woken up in __switch_to().
  102. * The callee-saved registers must be on the stack to be read;
  103. * the new task will then jump to assembly support to handle
  104. * calling schedule_tail(), etc., and (for userspace tasks)
  105. * returning to the context set up in the pt_regs.
  106. */
  107. ksp = (unsigned long) childregs;
  108. ksp -= C_ABI_SAVE_AREA_SIZE; /* interrupt-entry save area */
  109. ((long *)ksp)[0] = ((long *)ksp)[1] = 0;
  110. ksp -= CALLEE_SAVED_REGS_COUNT * sizeof(unsigned long);
  111. callee_regs = (unsigned long *)ksp;
  112. ksp -= C_ABI_SAVE_AREA_SIZE; /* __switch_to() save area */
  113. ((long *)ksp)[0] = ((long *)ksp)[1] = 0;
  114. p->thread.ksp = ksp;
  115. /* Record the pid of the task that created this one. */
  116. p->thread.creator_pid = current->pid;
  117. if (unlikely(p->flags & PF_KTHREAD)) {
  118. /* kernel thread */
  119. memset(childregs, 0, sizeof(struct pt_regs));
  120. memset(&callee_regs[2], 0,
  121. (CALLEE_SAVED_REGS_COUNT - 2) * sizeof(unsigned long));
  122. callee_regs[0] = sp; /* r30 = function */
  123. callee_regs[1] = arg; /* r31 = arg */
  124. p->thread.pc = (unsigned long) ret_from_kernel_thread;
  125. return 0;
  126. }
  127. /*
  128. * Start new thread in ret_from_fork so it schedules properly
  129. * and then return from interrupt like the parent.
  130. */
  131. p->thread.pc = (unsigned long) ret_from_fork;
  132. /*
  133. * Do not clone step state from the parent; each thread
  134. * must make its own lazily.
  135. */
  136. task_thread_info(p)->step_state = NULL;
  137. #ifdef __tilegx__
  138. /*
  139. * Do not clone unalign jit fixup from the parent; each thread
  140. * must allocate its own on demand.
  141. */
  142. task_thread_info(p)->unalign_jit_base = NULL;
  143. #endif
  144. /*
  145. * Copy the registers onto the kernel stack so the
  146. * return-from-interrupt code will reload it into registers.
  147. */
  148. *childregs = *current_pt_regs();
  149. childregs->regs[0] = 0; /* return value is zero */
  150. if (sp)
  151. childregs->sp = sp; /* override with new user stack pointer */
  152. memcpy(callee_regs, &childregs->regs[CALLEE_SAVED_FIRST_REG],
  153. CALLEE_SAVED_REGS_COUNT * sizeof(unsigned long));
  154. /* Save user stack top pointer so we can ID the stack vm area later. */
  155. p->thread.usp0 = childregs->sp;
  156. /*
  157. * If CLONE_SETTLS is set, set "tp" in the new task to "r4",
  158. * which is passed in as arg #5 to sys_clone().
  159. */
  160. if (clone_flags & CLONE_SETTLS)
  161. childregs->tp = childregs->regs[4];
  162. #if CHIP_HAS_TILE_DMA()
  163. /*
  164. * No DMA in the new thread. We model this on the fact that
  165. * fork() clears the pending signals, alarms, and aio for the child.
  166. */
  167. memset(&p->thread.tile_dma_state, 0, sizeof(struct tile_dma_state));
  168. memset(&p->thread.dma_async_tlb, 0, sizeof(struct async_tlb));
  169. #endif
  170. /* New thread has its miscellaneous processor state bits clear. */
  171. p->thread.proc_status = 0;
  172. #ifdef CONFIG_HARDWALL
  173. /* New thread does not own any networks. */
  174. memset(&p->thread.hardwall[0], 0,
  175. sizeof(struct hardwall_task) * HARDWALL_TYPES);
  176. #endif
  177. /*
  178. * Start the new thread with the current architecture state
  179. * (user interrupt masks, etc.).
  180. */
  181. save_arch_state(&p->thread);
  182. return 0;
  183. }
  184. int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
  185. {
  186. task_thread_info(tsk)->align_ctl = val;
  187. return 0;
  188. }
  189. int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
  190. {
  191. return put_user(task_thread_info(tsk)->align_ctl,
  192. (unsigned int __user *)adr);
  193. }
  194. static struct task_struct corrupt_current = { .comm = "<corrupt>" };
  195. /*
  196. * Return "current" if it looks plausible, or else a pointer to a dummy.
  197. * This can be helpful if we are just trying to emit a clean panic.
  198. */
  199. struct task_struct *validate_current(void)
  200. {
  201. struct task_struct *tsk = current;
  202. if (unlikely((unsigned long)tsk < PAGE_OFFSET ||
  203. (high_memory && (void *)tsk > high_memory) ||
  204. ((unsigned long)tsk & (__alignof__(*tsk) - 1)) != 0)) {
  205. pr_err("Corrupt 'current' %p (sp %#lx)\n", tsk, stack_pointer);
  206. tsk = &corrupt_current;
  207. }
  208. return tsk;
  209. }
  210. /* Take and return the pointer to the previous task, for schedule_tail(). */
  211. struct task_struct *sim_notify_fork(struct task_struct *prev)
  212. {
  213. struct task_struct *tsk = current;
  214. __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_FORK_PARENT |
  215. (tsk->thread.creator_pid << _SIM_CONTROL_OPERATOR_BITS));
  216. __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_FORK |
  217. (tsk->pid << _SIM_CONTROL_OPERATOR_BITS));
  218. return prev;
  219. }
  220. int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
  221. {
  222. struct pt_regs *ptregs = task_pt_regs(tsk);
  223. elf_core_copy_regs(regs, ptregs);
  224. return 1;
  225. }
  226. #if CHIP_HAS_TILE_DMA()
  227. /* Allow user processes to access the DMA SPRs */
  228. void grant_dma_mpls(void)
  229. {
  230. #if CONFIG_KERNEL_PL == 2
  231. __insn_mtspr(SPR_MPL_DMA_CPL_SET_1, 1);
  232. __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1, 1);
  233. #else
  234. __insn_mtspr(SPR_MPL_DMA_CPL_SET_0, 1);
  235. __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_0, 1);
  236. #endif
  237. }
  238. /* Forbid user processes from accessing the DMA SPRs */
  239. void restrict_dma_mpls(void)
  240. {
  241. #if CONFIG_KERNEL_PL == 2
  242. __insn_mtspr(SPR_MPL_DMA_CPL_SET_2, 1);
  243. __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_2, 1);
  244. #else
  245. __insn_mtspr(SPR_MPL_DMA_CPL_SET_1, 1);
  246. __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1, 1);
  247. #endif
  248. }
  249. /* Pause the DMA engine, then save off its state registers. */
  250. static void save_tile_dma_state(struct tile_dma_state *dma)
  251. {
  252. unsigned long state = __insn_mfspr(SPR_DMA_USER_STATUS);
  253. unsigned long post_suspend_state;
  254. /* If we're running, suspend the engine. */
  255. if ((state & DMA_STATUS_MASK) == SPR_DMA_STATUS__RUNNING_MASK)
  256. __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__SUSPEND_MASK);
  257. /*
  258. * Wait for the engine to idle, then save regs. Note that we
  259. * want to record the "running" bit from before suspension,
  260. * and the "done" bit from after, so that we can properly
  261. * distinguish a case where the user suspended the engine from
  262. * the case where the kernel suspended as part of the context
  263. * swap.
  264. */
  265. do {
  266. post_suspend_state = __insn_mfspr(SPR_DMA_USER_STATUS);
  267. } while (post_suspend_state & SPR_DMA_STATUS__BUSY_MASK);
  268. dma->src = __insn_mfspr(SPR_DMA_SRC_ADDR);
  269. dma->src_chunk = __insn_mfspr(SPR_DMA_SRC_CHUNK_ADDR);
  270. dma->dest = __insn_mfspr(SPR_DMA_DST_ADDR);
  271. dma->dest_chunk = __insn_mfspr(SPR_DMA_DST_CHUNK_ADDR);
  272. dma->strides = __insn_mfspr(SPR_DMA_STRIDE);
  273. dma->chunk_size = __insn_mfspr(SPR_DMA_CHUNK_SIZE);
  274. dma->byte = __insn_mfspr(SPR_DMA_BYTE);
  275. dma->status = (state & SPR_DMA_STATUS__RUNNING_MASK) |
  276. (post_suspend_state & SPR_DMA_STATUS__DONE_MASK);
  277. }
  278. /* Restart a DMA that was running before we were context-switched out. */
  279. static void restore_tile_dma_state(struct thread_struct *t)
  280. {
  281. const struct tile_dma_state *dma = &t->tile_dma_state;
  282. /*
  283. * The only way to restore the done bit is to run a zero
  284. * length transaction.
  285. */
  286. if ((dma->status & SPR_DMA_STATUS__DONE_MASK) &&
  287. !(__insn_mfspr(SPR_DMA_USER_STATUS) & SPR_DMA_STATUS__DONE_MASK)) {
  288. __insn_mtspr(SPR_DMA_BYTE, 0);
  289. __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
  290. while (__insn_mfspr(SPR_DMA_USER_STATUS) &
  291. SPR_DMA_STATUS__BUSY_MASK)
  292. ;
  293. }
  294. __insn_mtspr(SPR_DMA_SRC_ADDR, dma->src);
  295. __insn_mtspr(SPR_DMA_SRC_CHUNK_ADDR, dma->src_chunk);
  296. __insn_mtspr(SPR_DMA_DST_ADDR, dma->dest);
  297. __insn_mtspr(SPR_DMA_DST_CHUNK_ADDR, dma->dest_chunk);
  298. __insn_mtspr(SPR_DMA_STRIDE, dma->strides);
  299. __insn_mtspr(SPR_DMA_CHUNK_SIZE, dma->chunk_size);
  300. __insn_mtspr(SPR_DMA_BYTE, dma->byte);
  301. /*
  302. * Restart the engine if we were running and not done.
  303. * Clear a pending async DMA fault that we were waiting on return
  304. * to user space to execute, since we expect the DMA engine
  305. * to regenerate those faults for us now. Note that we don't
  306. * try to clear the TIF_ASYNC_TLB flag, since it's relatively
  307. * harmless if set, and it covers both DMA and the SN processor.
  308. */
  309. if ((dma->status & DMA_STATUS_MASK) == SPR_DMA_STATUS__RUNNING_MASK) {
  310. t->dma_async_tlb.fault_num = 0;
  311. __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
  312. }
  313. }
  314. #endif
  315. static void save_arch_state(struct thread_struct *t)
  316. {
  317. #if CHIP_HAS_SPLIT_INTR_MASK()
  318. t->interrupt_mask = __insn_mfspr(SPR_INTERRUPT_MASK_0_0) |
  319. ((u64)__insn_mfspr(SPR_INTERRUPT_MASK_0_1) << 32);
  320. #else
  321. t->interrupt_mask = __insn_mfspr(SPR_INTERRUPT_MASK_0);
  322. #endif
  323. t->ex_context[0] = __insn_mfspr(SPR_EX_CONTEXT_0_0);
  324. t->ex_context[1] = __insn_mfspr(SPR_EX_CONTEXT_0_1);
  325. t->system_save[0] = __insn_mfspr(SPR_SYSTEM_SAVE_0_0);
  326. t->system_save[1] = __insn_mfspr(SPR_SYSTEM_SAVE_0_1);
  327. t->system_save[2] = __insn_mfspr(SPR_SYSTEM_SAVE_0_2);
  328. t->system_save[3] = __insn_mfspr(SPR_SYSTEM_SAVE_0_3);
  329. t->intctrl_0 = __insn_mfspr(SPR_INTCTRL_0_STATUS);
  330. t->proc_status = __insn_mfspr(SPR_PROC_STATUS);
  331. #if !CHIP_HAS_FIXED_INTVEC_BASE()
  332. t->interrupt_vector_base = __insn_mfspr(SPR_INTERRUPT_VECTOR_BASE_0);
  333. #endif
  334. t->tile_rtf_hwm = __insn_mfspr(SPR_TILE_RTF_HWM);
  335. #if CHIP_HAS_DSTREAM_PF()
  336. t->dstream_pf = __insn_mfspr(SPR_DSTREAM_PF);
  337. #endif
  338. }
  339. static void restore_arch_state(const struct thread_struct *t)
  340. {
  341. #if CHIP_HAS_SPLIT_INTR_MASK()
  342. __insn_mtspr(SPR_INTERRUPT_MASK_0_0, (u32) t->interrupt_mask);
  343. __insn_mtspr(SPR_INTERRUPT_MASK_0_1, t->interrupt_mask >> 32);
  344. #else
  345. __insn_mtspr(SPR_INTERRUPT_MASK_0, t->interrupt_mask);
  346. #endif
  347. __insn_mtspr(SPR_EX_CONTEXT_0_0, t->ex_context[0]);
  348. __insn_mtspr(SPR_EX_CONTEXT_0_1, t->ex_context[1]);
  349. __insn_mtspr(SPR_SYSTEM_SAVE_0_0, t->system_save[0]);
  350. __insn_mtspr(SPR_SYSTEM_SAVE_0_1, t->system_save[1]);
  351. __insn_mtspr(SPR_SYSTEM_SAVE_0_2, t->system_save[2]);
  352. __insn_mtspr(SPR_SYSTEM_SAVE_0_3, t->system_save[3]);
  353. __insn_mtspr(SPR_INTCTRL_0_STATUS, t->intctrl_0);
  354. __insn_mtspr(SPR_PROC_STATUS, t->proc_status);
  355. #if !CHIP_HAS_FIXED_INTVEC_BASE()
  356. __insn_mtspr(SPR_INTERRUPT_VECTOR_BASE_0, t->interrupt_vector_base);
  357. #endif
  358. __insn_mtspr(SPR_TILE_RTF_HWM, t->tile_rtf_hwm);
  359. #if CHIP_HAS_DSTREAM_PF()
  360. __insn_mtspr(SPR_DSTREAM_PF, t->dstream_pf);
  361. #endif
  362. }
  363. void _prepare_arch_switch(struct task_struct *next)
  364. {
  365. #if CHIP_HAS_TILE_DMA()
  366. struct tile_dma_state *dma = &current->thread.tile_dma_state;
  367. if (dma->enabled)
  368. save_tile_dma_state(dma);
  369. #endif
  370. }
  371. struct task_struct *__sched _switch_to(struct task_struct *prev,
  372. struct task_struct *next)
  373. {
  374. /* DMA state is already saved; save off other arch state. */
  375. save_arch_state(&prev->thread);
  376. #if CHIP_HAS_TILE_DMA()
  377. /*
  378. * Restore DMA in new task if desired.
  379. * Note that it is only safe to restart here since interrupts
  380. * are disabled, so we can't take any DMATLB miss or access
  381. * interrupts before we have finished switching stacks.
  382. */
  383. if (next->thread.tile_dma_state.enabled) {
  384. restore_tile_dma_state(&next->thread);
  385. grant_dma_mpls();
  386. } else {
  387. restrict_dma_mpls();
  388. }
  389. #endif
  390. /* Restore other arch state. */
  391. restore_arch_state(&next->thread);
  392. #ifdef CONFIG_HARDWALL
  393. /* Enable or disable access to the network registers appropriately. */
  394. hardwall_switch_tasks(prev, next);
  395. #endif
  396. /* Notify the simulator of task exit. */
  397. if (unlikely(prev->state == TASK_DEAD))
  398. __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_EXIT |
  399. (prev->pid << _SIM_CONTROL_OPERATOR_BITS));
  400. /*
  401. * Switch kernel SP, PC, and callee-saved registers.
  402. * In the context of the new task, return the old task pointer
  403. * (i.e. the task that actually called __switch_to).
  404. * Pass the value to use for SYSTEM_SAVE_K_0 when we reset our sp.
  405. */
  406. return __switch_to(prev, next, next_current_ksp0(next));
  407. }
  408. /*
  409. * This routine is called on return from interrupt if any of the
  410. * TIF_WORK_MASK flags are set in thread_info->flags. It is
  411. * entered with interrupts disabled so we don't miss an event
  412. * that modified the thread_info flags. If any flag is set, we
  413. * handle it and return, and the calling assembly code will
  414. * re-disable interrupts, reload the thread flags, and call back
  415. * if more flags need to be handled.
  416. *
  417. * We return whether we need to check the thread_info flags again
  418. * or not. Note that we don't clear TIF_SINGLESTEP here, so it's
  419. * important that it be tested last, and then claim that we don't
  420. * need to recheck the flags.
  421. */
  422. int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)
  423. {
  424. /* If we enter in kernel mode, do nothing and exit the caller loop. */
  425. if (!user_mode(regs))
  426. return 0;
  427. user_exit();
  428. /* Enable interrupts; they are disabled again on return to caller. */
  429. local_irq_enable();
  430. if (thread_info_flags & _TIF_NEED_RESCHED) {
  431. schedule();
  432. return 1;
  433. }
  434. #if CHIP_HAS_TILE_DMA()
  435. if (thread_info_flags & _TIF_ASYNC_TLB) {
  436. do_async_page_fault(regs);
  437. return 1;
  438. }
  439. #endif
  440. if (thread_info_flags & _TIF_SIGPENDING) {
  441. do_signal(regs);
  442. return 1;
  443. }
  444. if (thread_info_flags & _TIF_NOTIFY_RESUME) {
  445. clear_thread_flag(TIF_NOTIFY_RESUME);
  446. tracehook_notify_resume(regs);
  447. return 1;
  448. }
  449. if (thread_info_flags & _TIF_SINGLESTEP)
  450. single_step_once(regs);
  451. user_enter();
  452. return 0;
  453. }
  454. unsigned long get_wchan(struct task_struct *p)
  455. {
  456. struct KBacktraceIterator kbt;
  457. if (!p || p == current || p->state == TASK_RUNNING)
  458. return 0;
  459. for (KBacktraceIterator_init(&kbt, p, NULL);
  460. !KBacktraceIterator_end(&kbt);
  461. KBacktraceIterator_next(&kbt)) {
  462. if (!in_sched_functions(kbt.it.pc))
  463. return kbt.it.pc;
  464. }
  465. return 0;
  466. }
  467. /* Flush thread state. */
  468. void flush_thread(void)
  469. {
  470. /* Nothing */
  471. }
  472. /*
  473. * Free current thread data structures etc..
  474. */
  475. void exit_thread(void)
  476. {
  477. #ifdef CONFIG_HARDWALL
  478. /*
  479. * Remove the task from the list of tasks that are associated
  480. * with any live hardwalls. (If the task that is exiting held
  481. * the last reference to a hardwall fd, it would already have
  482. * been released and deactivated at this point.)
  483. */
  484. hardwall_deactivate_all(current);
  485. #endif
  486. }
  487. void tile_show_regs(struct pt_regs *regs)
  488. {
  489. int i;
  490. #ifdef __tilegx__
  491. for (i = 0; i < 17; i++)
  492. pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT" r%-2d: "REGFMT"\n",
  493. i, regs->regs[i], i+18, regs->regs[i+18],
  494. i+36, regs->regs[i+36]);
  495. pr_err(" r17: "REGFMT" r35: "REGFMT" tp : "REGFMT"\n",
  496. regs->regs[17], regs->regs[35], regs->tp);
  497. pr_err(" sp : "REGFMT" lr : "REGFMT"\n", regs->sp, regs->lr);
  498. #else
  499. for (i = 0; i < 13; i++)
  500. pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT
  501. " r%-2d: "REGFMT" r%-2d: "REGFMT"\n",
  502. i, regs->regs[i], i+14, regs->regs[i+14],
  503. i+27, regs->regs[i+27], i+40, regs->regs[i+40]);
  504. pr_err(" r13: "REGFMT" tp : "REGFMT" sp : "REGFMT" lr : "REGFMT"\n",
  505. regs->regs[13], regs->tp, regs->sp, regs->lr);
  506. #endif
  507. pr_err(" pc : "REGFMT" ex1: %ld faultnum: %ld flags:%s%s%s%s\n",
  508. regs->pc, regs->ex1, regs->faultnum,
  509. is_compat_task() ? " compat" : "",
  510. (regs->flags & PT_FLAGS_DISABLE_IRQ) ? " noirq" : "",
  511. !(regs->flags & PT_FLAGS_CALLER_SAVES) ? " nocallersave" : "",
  512. (regs->flags & PT_FLAGS_RESTORE_REGS) ? " restoreregs" : "");
  513. }
  514. void show_regs(struct pt_regs *regs)
  515. {
  516. struct KBacktraceIterator kbt;
  517. show_regs_print_info(KERN_DEFAULT);
  518. tile_show_regs(regs);
  519. KBacktraceIterator_init(&kbt, NULL, regs);
  520. tile_show_stack(&kbt);
  521. }
  522. /* To ensure stack dump on tiles occurs one by one. */
  523. static DEFINE_SPINLOCK(backtrace_lock);
  524. /* To ensure no backtrace occurs before all of the stack dump are done. */
  525. static atomic_t backtrace_cpus;
  526. /* The cpu mask to avoid reentrance. */
  527. static struct cpumask backtrace_mask;
  528. void do_nmi_dump_stack(struct pt_regs *regs)
  529. {
  530. int is_idle = is_idle_task(current) && !in_interrupt();
  531. int cpu;
  532. nmi_enter();
  533. cpu = smp_processor_id();
  534. if (WARN_ON_ONCE(!cpumask_test_and_clear_cpu(cpu, &backtrace_mask)))
  535. goto done;
  536. spin_lock(&backtrace_lock);
  537. if (is_idle)
  538. pr_info("CPU: %d idle\n", cpu);
  539. else
  540. show_regs(regs);
  541. spin_unlock(&backtrace_lock);
  542. atomic_dec(&backtrace_cpus);
  543. done:
  544. nmi_exit();
  545. }
  546. #ifdef __tilegx__
  547. void arch_trigger_all_cpu_backtrace(bool self)
  548. {
  549. struct cpumask mask;
  550. HV_Coord tile;
  551. unsigned int timeout;
  552. int cpu;
  553. int ongoing;
  554. HV_NMI_Info info[NR_CPUS];
  555. ongoing = atomic_cmpxchg(&backtrace_cpus, 0, num_online_cpus() - 1);
  556. if (ongoing != 0) {
  557. pr_err("Trying to do all-cpu backtrace.\n");
  558. pr_err("But another all-cpu backtrace is ongoing (%d cpus left)\n",
  559. ongoing);
  560. if (self) {
  561. pr_err("Reporting the stack on this cpu only.\n");
  562. dump_stack();
  563. }
  564. return;
  565. }
  566. cpumask_copy(&mask, cpu_online_mask);
  567. cpumask_clear_cpu(smp_processor_id(), &mask);
  568. cpumask_copy(&backtrace_mask, &mask);
  569. /* Backtrace for myself first. */
  570. if (self)
  571. dump_stack();
  572. /* Tentatively dump stack on remote tiles via NMI. */
  573. timeout = 100;
  574. while (!cpumask_empty(&mask) && timeout) {
  575. for_each_cpu(cpu, &mask) {
  576. tile.x = cpu_x(cpu);
  577. tile.y = cpu_y(cpu);
  578. info[cpu] = hv_send_nmi(tile, TILE_NMI_DUMP_STACK, 0);
  579. if (info[cpu].result == HV_NMI_RESULT_OK)
  580. cpumask_clear_cpu(cpu, &mask);
  581. }
  582. mdelay(10);
  583. timeout--;
  584. }
  585. /* Warn about cpus stuck in ICS and decrement their counts here. */
  586. if (!cpumask_empty(&mask)) {
  587. for_each_cpu(cpu, &mask) {
  588. switch (info[cpu].result) {
  589. case HV_NMI_RESULT_FAIL_ICS:
  590. pr_warn("Skipping stack dump of cpu %d in ICS at pc %#llx\n",
  591. cpu, info[cpu].pc);
  592. break;
  593. case HV_NMI_RESULT_FAIL_HV:
  594. pr_warn("Skipping stack dump of cpu %d in hypervisor\n",
  595. cpu);
  596. break;
  597. case HV_ENOSYS:
  598. pr_warn("Hypervisor too old to allow remote stack dumps.\n");
  599. goto skip_for_each;
  600. default: /* should not happen */
  601. pr_warn("Skipping stack dump of cpu %d [%d,%#llx]\n",
  602. cpu, info[cpu].result, info[cpu].pc);
  603. break;
  604. }
  605. }
  606. skip_for_each:
  607. atomic_sub(cpumask_weight(&mask), &backtrace_cpus);
  608. }
  609. }
  610. #endif /* __tilegx_ */