entry.S 4.5 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
  7. * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  8. * Copyright (C) 2001 MIPS Technologies, Inc.
  9. */
  10. #include <asm/asm.h>
  11. #include <asm/asmmacro.h>
  12. #include <asm/compiler.h>
  13. #include <asm/regdef.h>
  14. #include <asm/mipsregs.h>
  15. #include <asm/stackframe.h>
  16. #include <asm/isadep.h>
  17. #include <asm/thread_info.h>
  18. #include <asm/war.h>
  19. #ifndef CONFIG_PREEMPT
  20. #define resume_kernel restore_all
  21. #else
  22. #define __ret_from_irq ret_from_exception
  23. #endif
  24. .text
  25. .align 5
  26. #ifndef CONFIG_PREEMPT
  27. FEXPORT(ret_from_exception)
  28. local_irq_disable # preempt stop
  29. b __ret_from_irq
  30. #endif
  31. FEXPORT(ret_from_irq)
  32. LONG_S s0, TI_REGS($28)
  33. FEXPORT(__ret_from_irq)
  34. /*
  35. * We can be coming here from a syscall done in the kernel space,
  36. * e.g. a failed kernel_execve().
  37. */
  38. resume_userspace_check:
  39. LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
  40. andi t0, t0, KU_USER
  41. beqz t0, resume_kernel
  42. resume_userspace:
  43. local_irq_disable # make sure we dont miss an
  44. # interrupt setting need_resched
  45. # between sampling and return
  46. #ifdef CONFIG_MIPSR2_TO_R6_EMULATOR
  47. lw k0, TI_R2_EMUL_RET($28)
  48. bnez k0, restore_all_from_r2_emul
  49. #endif
  50. LONG_L a2, TI_FLAGS($28) # current->work
  51. andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
  52. bnez t0, work_pending
  53. j restore_all
  54. #ifdef CONFIG_PREEMPT
  55. resume_kernel:
  56. local_irq_disable
  57. lw t0, TI_PRE_COUNT($28)
  58. bnez t0, restore_all
  59. need_resched:
  60. LONG_L t0, TI_FLAGS($28)
  61. andi t1, t0, _TIF_NEED_RESCHED
  62. beqz t1, restore_all
  63. LONG_L t0, PT_STATUS(sp) # Interrupts off?
  64. andi t0, 1
  65. beqz t0, restore_all
  66. jal preempt_schedule_irq
  67. b need_resched
  68. #endif
  69. FEXPORT(ret_from_kernel_thread)
  70. jal schedule_tail # a0 = struct task_struct *prev
  71. move a0, s1
  72. jal s0
  73. j syscall_exit
  74. FEXPORT(ret_from_fork)
  75. jal schedule_tail # a0 = struct task_struct *prev
  76. FEXPORT(syscall_exit)
  77. local_irq_disable # make sure need_resched and
  78. # signals dont change between
  79. # sampling and return
  80. LONG_L a2, TI_FLAGS($28) # current->work
  81. li t0, _TIF_ALLWORK_MASK
  82. and t0, a2, t0
  83. bnez t0, syscall_exit_work
  84. restore_all: # restore full frame
  85. .set noat
  86. RESTORE_TEMP
  87. RESTORE_AT
  88. RESTORE_STATIC
  89. restore_partial: # restore partial frame
  90. #ifdef CONFIG_TRACE_IRQFLAGS
  91. SAVE_STATIC
  92. SAVE_AT
  93. SAVE_TEMP
  94. LONG_L v0, PT_STATUS(sp)
  95. #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
  96. and v0, ST0_IEP
  97. #else
  98. and v0, ST0_IE
  99. #endif
  100. beqz v0, 1f
  101. jal trace_hardirqs_on
  102. b 2f
  103. 1: jal trace_hardirqs_off
  104. 2:
  105. RESTORE_TEMP
  106. RESTORE_AT
  107. RESTORE_STATIC
  108. #endif
  109. RESTORE_SOME
  110. RESTORE_SP_AND_RET
  111. .set at
  112. #ifdef CONFIG_MIPSR2_TO_R6_EMULATOR
  113. restore_all_from_r2_emul: # restore full frame
  114. .set noat
  115. sw zero, TI_R2_EMUL_RET($28) # reset it
  116. RESTORE_TEMP
  117. RESTORE_AT
  118. RESTORE_STATIC
  119. RESTORE_SOME
  120. LONG_L sp, PT_R29(sp)
  121. eretnc
  122. .set at
  123. #endif
  124. work_pending:
  125. andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
  126. beqz t0, work_notifysig
  127. work_resched:
  128. jal schedule
  129. local_irq_disable # make sure need_resched and
  130. # signals dont change between
  131. # sampling and return
  132. LONG_L a2, TI_FLAGS($28)
  133. andi t0, a2, _TIF_WORK_MASK # is there any work to be done
  134. # other than syscall tracing?
  135. beqz t0, restore_all
  136. andi t0, a2, _TIF_NEED_RESCHED
  137. bnez t0, work_resched
  138. work_notifysig: # deal with pending signals and
  139. # notify-resume requests
  140. move a0, sp
  141. li a1, 0
  142. jal do_notify_resume # a2 already loaded
  143. j resume_userspace_check
  144. FEXPORT(syscall_exit_partial)
  145. local_irq_disable # make sure need_resched doesn't
  146. # change between and return
  147. LONG_L a2, TI_FLAGS($28) # current->work
  148. li t0, _TIF_ALLWORK_MASK
  149. and t0, a2
  150. beqz t0, restore_partial
  151. SAVE_STATIC
  152. syscall_exit_work:
  153. LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
  154. andi t0, t0, KU_USER
  155. beqz t0, resume_kernel
  156. li t0, _TIF_WORK_SYSCALL_EXIT
  157. and t0, a2 # a2 is preloaded with TI_FLAGS
  158. beqz t0, work_pending # trace bit set?
  159. local_irq_enable # could let syscall_trace_leave()
  160. # call schedule() instead
  161. move a0, sp
  162. jal syscall_trace_leave
  163. b resume_userspace
  164. #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) || \
  165. defined(CONFIG_MIPS_MT)
  166. /*
  167. * MIPS32R2 Instruction Hazard Barrier - must be called
  168. *
  169. * For C code use the inline version named instruction_hazard().
  170. */
  171. LEAF(mips_ihb)
  172. .set MIPS_ISA_LEVEL_RAW
  173. jr.hb ra
  174. nop
  175. END(mips_ihb)
  176. #endif /* CONFIG_CPU_MIPSR2 or CONFIG_CPU_MIPSR6 or CONFIG_MIPS_MT */