board-n8x0.c 13 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-n8x0.c
  3. *
  4. * Copyright (C) 2005-2009 Nokia Corporation
  5. * Author: Juha Yrjola <juha.yrjola@nokia.com>
  6. *
  7. * Modified from mach-omap2/board-generic.c
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/init.h>
  17. #include <linux/io.h>
  18. #include <linux/irq.h>
  19. #include <linux/stddef.h>
  20. #include <linux/i2c.h>
  21. #include <linux/spi/spi.h>
  22. #include <linux/usb/musb.h>
  23. #include <linux/mmc/host.h>
  24. #include <linux/platform_data/spi-omap2-mcspi.h>
  25. #include <linux/platform_data/mmc-omap.h>
  26. #include <linux/mfd/menelaus.h>
  27. #include <sound/tlv320aic3x.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach-types.h>
  30. #include "common.h"
  31. #include "mmc.h"
  32. #include "soc.h"
  33. #include "common-board-devices.h"
  34. #define TUSB6010_ASYNC_CS 1
  35. #define TUSB6010_SYNC_CS 4
  36. #define TUSB6010_GPIO_INT 58
  37. #define TUSB6010_GPIO_ENABLE 0
  38. #define TUSB6010_DMACHAN 0x3f
  39. #define NOKIA_N810_WIMAX (1 << 2)
  40. #define NOKIA_N810 (1 << 1)
  41. #define NOKIA_N800 (1 << 0)
  42. static u32 board_caps;
  43. #define board_is_n800() (board_caps & NOKIA_N800)
  44. #define board_is_n810() (board_caps & NOKIA_N810)
  45. #define board_is_n810_wimax() (board_caps & NOKIA_N810_WIMAX)
  46. static void board_check_revision(void)
  47. {
  48. if (of_have_populated_dt()) {
  49. if (of_machine_is_compatible("nokia,n800"))
  50. board_caps = NOKIA_N800;
  51. else if (of_machine_is_compatible("nokia,n810"))
  52. board_caps = NOKIA_N810;
  53. else if (of_machine_is_compatible("nokia,n810-wimax"))
  54. board_caps = NOKIA_N810_WIMAX;
  55. }
  56. if (!board_caps)
  57. pr_err("Unknown board\n");
  58. }
  59. #if defined(CONFIG_USB_MUSB_TUSB6010) || defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  60. /*
  61. * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
  62. * 1.5 V voltage regulators of PM companion chip. Companion chip will then
  63. * provide then PGOOD signal to TUSB6010 which will release it from reset.
  64. */
  65. static int tusb_set_power(int state)
  66. {
  67. int i, retval = 0;
  68. if (state) {
  69. gpio_set_value(TUSB6010_GPIO_ENABLE, 1);
  70. msleep(1);
  71. /* Wait until TUSB6010 pulls INT pin down */
  72. i = 100;
  73. while (i && gpio_get_value(TUSB6010_GPIO_INT)) {
  74. msleep(1);
  75. i--;
  76. }
  77. if (!i) {
  78. printk(KERN_ERR "tusb: powerup failed\n");
  79. retval = -ENODEV;
  80. }
  81. } else {
  82. gpio_set_value(TUSB6010_GPIO_ENABLE, 0);
  83. msleep(10);
  84. }
  85. return retval;
  86. }
  87. static struct musb_hdrc_config musb_config = {
  88. .multipoint = 1,
  89. .dyn_fifo = 1,
  90. .num_eps = 16,
  91. .ram_bits = 12,
  92. };
  93. static struct musb_hdrc_platform_data tusb_data = {
  94. .mode = MUSB_OTG,
  95. .set_power = tusb_set_power,
  96. .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */
  97. .power = 100, /* Max 100 mA VBUS for host mode */
  98. .config = &musb_config,
  99. };
  100. static void __init n8x0_usb_init(void)
  101. {
  102. int ret = 0;
  103. static char announce[] __initdata = KERN_INFO "TUSB 6010\n";
  104. /* PM companion chip power control pin */
  105. ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW,
  106. "TUSB6010 enable");
  107. if (ret != 0) {
  108. printk(KERN_ERR "Could not get TUSB power GPIO%i\n",
  109. TUSB6010_GPIO_ENABLE);
  110. return;
  111. }
  112. tusb_set_power(0);
  113. ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2,
  114. TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
  115. TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
  116. if (ret != 0)
  117. goto err;
  118. printk(announce);
  119. return;
  120. err:
  121. gpio_free(TUSB6010_GPIO_ENABLE);
  122. }
  123. #else
  124. static void __init n8x0_usb_init(void) {}
  125. #endif /*CONFIG_USB_MUSB_TUSB6010 */
  126. static struct omap2_mcspi_device_config p54spi_mcspi_config = {
  127. .turbo_mode = 0,
  128. };
  129. static struct spi_board_info n800_spi_board_info[] __initdata = {
  130. {
  131. .modalias = "p54spi",
  132. .bus_num = 2,
  133. .chip_select = 0,
  134. .max_speed_hz = 48000000,
  135. .controller_data = &p54spi_mcspi_config,
  136. },
  137. };
  138. #if defined(CONFIG_MENELAUS) && \
  139. (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE))
  140. /*
  141. * On both N800 and N810, only the first of the two MMC controllers is in use.
  142. * The two MMC slots are multiplexed via Menelaus companion chip over I2C.
  143. * On N800, both slots are powered via Menelaus. On N810, only one of the
  144. * slots is powered via Menelaus. The N810 EMMC is powered via GPIO.
  145. *
  146. * VMMC slot 1 on both N800 and N810
  147. * VDCDC3_APE and VMCS2_APE slot 2 on N800
  148. * GPIO23 and GPIO9 slot 2 EMMC on N810
  149. *
  150. */
  151. #define N8X0_SLOT_SWITCH_GPIO 96
  152. #define N810_EMMC_VSD_GPIO 23
  153. #define N810_EMMC_VIO_GPIO 9
  154. static int slot1_cover_open;
  155. static int slot2_cover_open;
  156. static struct device *mmc_device;
  157. static int n8x0_mmc_switch_slot(struct device *dev, int slot)
  158. {
  159. #ifdef CONFIG_MMC_DEBUG
  160. dev_dbg(dev, "Choose slot %d\n", slot + 1);
  161. #endif
  162. gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot);
  163. return 0;
  164. }
  165. static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot,
  166. int power_on, int vdd)
  167. {
  168. int mV;
  169. #ifdef CONFIG_MMC_DEBUG
  170. dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
  171. power_on ? "on" : "off", vdd);
  172. #endif
  173. if (slot == 0) {
  174. if (!power_on)
  175. return menelaus_set_vmmc(0);
  176. switch (1 << vdd) {
  177. case MMC_VDD_33_34:
  178. case MMC_VDD_32_33:
  179. case MMC_VDD_31_32:
  180. mV = 3100;
  181. break;
  182. case MMC_VDD_30_31:
  183. mV = 3000;
  184. break;
  185. case MMC_VDD_28_29:
  186. mV = 2800;
  187. break;
  188. case MMC_VDD_165_195:
  189. mV = 1850;
  190. break;
  191. default:
  192. BUG();
  193. }
  194. return menelaus_set_vmmc(mV);
  195. } else {
  196. if (!power_on)
  197. return menelaus_set_vdcdc(3, 0);
  198. switch (1 << vdd) {
  199. case MMC_VDD_33_34:
  200. case MMC_VDD_32_33:
  201. mV = 3300;
  202. break;
  203. case MMC_VDD_30_31:
  204. case MMC_VDD_29_30:
  205. mV = 3000;
  206. break;
  207. case MMC_VDD_28_29:
  208. case MMC_VDD_27_28:
  209. mV = 2800;
  210. break;
  211. case MMC_VDD_24_25:
  212. case MMC_VDD_23_24:
  213. mV = 2400;
  214. break;
  215. case MMC_VDD_22_23:
  216. case MMC_VDD_21_22:
  217. mV = 2200;
  218. break;
  219. case MMC_VDD_20_21:
  220. mV = 2000;
  221. break;
  222. case MMC_VDD_165_195:
  223. mV = 1800;
  224. break;
  225. default:
  226. BUG();
  227. }
  228. return menelaus_set_vdcdc(3, mV);
  229. }
  230. return 0;
  231. }
  232. static void n810_set_power_emmc(struct device *dev,
  233. int power_on)
  234. {
  235. dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off");
  236. if (power_on) {
  237. gpio_set_value(N810_EMMC_VSD_GPIO, 1);
  238. msleep(1);
  239. gpio_set_value(N810_EMMC_VIO_GPIO, 1);
  240. msleep(1);
  241. } else {
  242. gpio_set_value(N810_EMMC_VIO_GPIO, 0);
  243. msleep(50);
  244. gpio_set_value(N810_EMMC_VSD_GPIO, 0);
  245. msleep(50);
  246. }
  247. }
  248. static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on,
  249. int vdd)
  250. {
  251. if (board_is_n800() || slot == 0)
  252. return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd);
  253. n810_set_power_emmc(dev, power_on);
  254. return 0;
  255. }
  256. static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
  257. {
  258. int r;
  259. dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1,
  260. bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
  261. BUG_ON(slot != 0 && slot != 1);
  262. slot++;
  263. switch (bus_mode) {
  264. case MMC_BUSMODE_OPENDRAIN:
  265. r = menelaus_set_mmc_opendrain(slot, 1);
  266. break;
  267. case MMC_BUSMODE_PUSHPULL:
  268. r = menelaus_set_mmc_opendrain(slot, 0);
  269. break;
  270. default:
  271. BUG();
  272. }
  273. if (r != 0 && printk_ratelimit())
  274. dev_err(dev, "MMC: unable to set bus mode for slot %d\n",
  275. slot);
  276. return r;
  277. }
  278. static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
  279. {
  280. slot++;
  281. BUG_ON(slot != 1 && slot != 2);
  282. if (slot == 1)
  283. return slot1_cover_open;
  284. else
  285. return slot2_cover_open;
  286. }
  287. static void n8x0_mmc_callback(void *data, u8 card_mask)
  288. {
  289. int bit, *openp, index;
  290. if (board_is_n800()) {
  291. bit = 1 << 1;
  292. openp = &slot2_cover_open;
  293. index = 1;
  294. } else {
  295. bit = 1;
  296. openp = &slot1_cover_open;
  297. index = 0;
  298. }
  299. if (card_mask & bit)
  300. *openp = 1;
  301. else
  302. *openp = 0;
  303. #ifdef CONFIG_MMC_OMAP
  304. omap_mmc_notify_cover_event(mmc_device, index, *openp);
  305. #else
  306. pr_warn("MMC: notify cover event not available\n");
  307. #endif
  308. }
  309. static int n8x0_mmc_late_init(struct device *dev)
  310. {
  311. int r, bit, *openp;
  312. int vs2sel;
  313. mmc_device = dev;
  314. r = menelaus_set_slot_sel(1);
  315. if (r < 0)
  316. return r;
  317. if (board_is_n800())
  318. vs2sel = 0;
  319. else
  320. vs2sel = 2;
  321. r = menelaus_set_mmc_slot(2, 0, vs2sel, 1);
  322. if (r < 0)
  323. return r;
  324. n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */
  325. n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16);
  326. r = menelaus_set_mmc_slot(1, 1, 0, 1);
  327. if (r < 0)
  328. return r;
  329. r = menelaus_set_mmc_slot(2, 1, vs2sel, 1);
  330. if (r < 0)
  331. return r;
  332. r = menelaus_get_slot_pin_states();
  333. if (r < 0)
  334. return r;
  335. if (board_is_n800()) {
  336. bit = 1 << 1;
  337. openp = &slot2_cover_open;
  338. } else {
  339. bit = 1;
  340. openp = &slot1_cover_open;
  341. slot2_cover_open = 0;
  342. }
  343. /* All slot pin bits seem to be inversed until first switch change */
  344. if (r == 0xf || r == (0xf & ~bit))
  345. r = ~r;
  346. if (r & bit)
  347. *openp = 1;
  348. else
  349. *openp = 0;
  350. r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL);
  351. return r;
  352. }
  353. static void n8x0_mmc_shutdown(struct device *dev)
  354. {
  355. int vs2sel;
  356. if (board_is_n800())
  357. vs2sel = 0;
  358. else
  359. vs2sel = 2;
  360. menelaus_set_mmc_slot(1, 0, 0, 0);
  361. menelaus_set_mmc_slot(2, 0, vs2sel, 0);
  362. }
  363. static void n8x0_mmc_cleanup(struct device *dev)
  364. {
  365. menelaus_unregister_mmc_callback();
  366. gpio_free(N8X0_SLOT_SWITCH_GPIO);
  367. if (board_is_n810()) {
  368. gpio_free(N810_EMMC_VSD_GPIO);
  369. gpio_free(N810_EMMC_VIO_GPIO);
  370. }
  371. }
  372. /*
  373. * MMC controller1 has two slots that are multiplexed via I2C.
  374. * MMC controller2 is not in use.
  375. */
  376. static struct omap_mmc_platform_data mmc1_data = {
  377. .nr_slots = 0,
  378. .switch_slot = n8x0_mmc_switch_slot,
  379. .init = n8x0_mmc_late_init,
  380. .cleanup = n8x0_mmc_cleanup,
  381. .shutdown = n8x0_mmc_shutdown,
  382. .max_freq = 24000000,
  383. .slots[0] = {
  384. .wires = 4,
  385. .set_power = n8x0_mmc_set_power,
  386. .set_bus_mode = n8x0_mmc_set_bus_mode,
  387. .get_cover_state = n8x0_mmc_get_cover_state,
  388. .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 |
  389. MMC_VDD_32_33 | MMC_VDD_33_34,
  390. .name = "internal",
  391. },
  392. .slots[1] = {
  393. .set_power = n8x0_mmc_set_power,
  394. .set_bus_mode = n8x0_mmc_set_bus_mode,
  395. .get_cover_state = n8x0_mmc_get_cover_state,
  396. .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 |
  397. MMC_VDD_21_22 | MMC_VDD_22_23 |
  398. MMC_VDD_23_24 | MMC_VDD_24_25 |
  399. MMC_VDD_27_28 | MMC_VDD_28_29 |
  400. MMC_VDD_29_30 | MMC_VDD_30_31 |
  401. MMC_VDD_32_33 | MMC_VDD_33_34,
  402. .name = "external",
  403. },
  404. };
  405. static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
  406. static struct gpio n810_emmc_gpios[] __initdata = {
  407. { N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" },
  408. { N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" },
  409. };
  410. static void __init n8x0_mmc_init(void)
  411. {
  412. int err;
  413. if (board_is_n810()) {
  414. mmc1_data.slots[0].name = "external";
  415. /*
  416. * Some Samsung Movinand chips do not like open-ended
  417. * multi-block reads and fall to braind-dead state
  418. * while doing so. Reducing the number of blocks in
  419. * the transfer or delays in clock disable do not help
  420. */
  421. mmc1_data.slots[1].name = "internal";
  422. mmc1_data.slots[1].ban_openended = 1;
  423. }
  424. err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW,
  425. "MMC slot switch");
  426. if (err)
  427. return;
  428. if (board_is_n810()) {
  429. err = gpio_request_array(n810_emmc_gpios,
  430. ARRAY_SIZE(n810_emmc_gpios));
  431. if (err) {
  432. gpio_free(N8X0_SLOT_SWITCH_GPIO);
  433. return;
  434. }
  435. }
  436. mmc1_data.nr_slots = 2;
  437. mmc_data[0] = &mmc1_data;
  438. }
  439. #else
  440. static struct omap_mmc_platform_data mmc1_data;
  441. void __init n8x0_mmc_init(void)
  442. {
  443. }
  444. #endif /* CONFIG_MMC_OMAP */
  445. #ifdef CONFIG_MENELAUS
  446. static int n8x0_auto_sleep_regulators(void)
  447. {
  448. u32 val;
  449. int ret;
  450. val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \
  451. | EN_VAUX_SLEEP | EN_VIO_SLEEP \
  452. | EN_VMEM_SLEEP | EN_DC3_SLEEP \
  453. | EN_VC_SLEEP | EN_DC2_SLEEP;
  454. ret = menelaus_set_regulator_sleep(1, val);
  455. if (ret < 0) {
  456. pr_err("Could not set regulators to sleep on menelaus: %u\n",
  457. ret);
  458. return ret;
  459. }
  460. return 0;
  461. }
  462. static int n8x0_auto_voltage_scale(void)
  463. {
  464. int ret;
  465. ret = menelaus_set_vcore_hw(1400, 1050);
  466. if (ret < 0) {
  467. pr_err("Could not set VCORE voltage on menelaus: %u\n", ret);
  468. return ret;
  469. }
  470. return 0;
  471. }
  472. static int n8x0_menelaus_late_init(struct device *dev)
  473. {
  474. int ret;
  475. ret = n8x0_auto_voltage_scale();
  476. if (ret < 0)
  477. return ret;
  478. ret = n8x0_auto_sleep_regulators();
  479. if (ret < 0)
  480. return ret;
  481. return 0;
  482. }
  483. #else
  484. static int n8x0_menelaus_late_init(struct device *dev)
  485. {
  486. return 0;
  487. }
  488. #endif
  489. struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
  490. .late_init = n8x0_menelaus_late_init,
  491. };
  492. struct aic3x_pdata n810_aic33_data __initdata = {
  493. .gpio_reset = 118,
  494. };
  495. static int __init n8x0_late_initcall(void)
  496. {
  497. if (!board_caps)
  498. return -ENODEV;
  499. n8x0_mmc_init();
  500. n8x0_usb_init();
  501. return 0;
  502. }
  503. omap_late_initcall(n8x0_late_initcall);
  504. /*
  505. * Legacy init pdata init for n8x0. Note that we want to follow the
  506. * I2C bus numbering starting at 0 for device tree like other omaps.
  507. */
  508. void * __init n8x0_legacy_init(void)
  509. {
  510. board_check_revision();
  511. spi_register_board_info(n800_spi_board_info,
  512. ARRAY_SIZE(n800_spi_board_info));
  513. return &mmc1_data;
  514. }