cppc_acpi.c 19 KB

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  1. /*
  2. * CPPC (Collaborative Processor Performance Control) methods used by CPUfreq drivers.
  3. *
  4. * (C) Copyright 2014, 2015 Linaro Ltd.
  5. * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; version 2
  10. * of the License.
  11. *
  12. * CPPC describes a few methods for controlling CPU performance using
  13. * information from a per CPU table called CPC. This table is described in
  14. * the ACPI v5.0+ specification. The table consists of a list of
  15. * registers which may be memory mapped or hardware registers and also may
  16. * include some static integer values.
  17. *
  18. * CPU performance is on an abstract continuous scale as against a discretized
  19. * P-state scale which is tied to CPU frequency only. In brief, the basic
  20. * operation involves:
  21. *
  22. * - OS makes a CPU performance request. (Can provide min and max bounds)
  23. *
  24. * - Platform (such as BMC) is free to optimize request within requested bounds
  25. * depending on power/thermal budgets etc.
  26. *
  27. * - Platform conveys its decision back to OS
  28. *
  29. * The communication between OS and platform occurs through another medium
  30. * called (PCC) Platform Communication Channel. This is a generic mailbox like
  31. * mechanism which includes doorbell semantics to indicate register updates.
  32. * See drivers/mailbox/pcc.c for details on PCC.
  33. *
  34. * Finer details about the PCC and CPPC spec are available in the ACPI v5.1 and
  35. * above specifications.
  36. */
  37. #define pr_fmt(fmt) "ACPI CPPC: " fmt
  38. #include <linux/cpufreq.h>
  39. #include <linux/delay.h>
  40. #include <acpi/cppc_acpi.h>
  41. /*
  42. * Lock to provide mutually exclusive access to the PCC
  43. * channel. e.g. When the remote updates the shared region
  44. * with new data, the reader needs to be protected from
  45. * other CPUs activity on the same channel.
  46. */
  47. static DEFINE_SPINLOCK(pcc_lock);
  48. /*
  49. * The cpc_desc structure contains the ACPI register details
  50. * as described in the per CPU _CPC tables. The details
  51. * include the type of register (e.g. PCC, System IO, FFH etc.)
  52. * and destination addresses which lets us READ/WRITE CPU performance
  53. * information using the appropriate I/O methods.
  54. */
  55. static DEFINE_PER_CPU(struct cpc_desc *, cpc_desc_ptr);
  56. /* This layer handles all the PCC specifics for CPPC. */
  57. static struct mbox_chan *pcc_channel;
  58. static void __iomem *pcc_comm_addr;
  59. static u64 comm_base_addr;
  60. static int pcc_subspace_idx = -1;
  61. static u16 pcc_cmd_delay;
  62. static bool pcc_channel_acquired;
  63. /*
  64. * Arbitrary Retries in case the remote processor is slow to respond
  65. * to PCC commands.
  66. */
  67. #define NUM_RETRIES 500
  68. static int send_pcc_cmd(u16 cmd)
  69. {
  70. int retries, result = -EIO;
  71. struct acpi_pcct_hw_reduced *pcct_ss = pcc_channel->con_priv;
  72. struct acpi_pcct_shared_memory *generic_comm_base =
  73. (struct acpi_pcct_shared_memory *) pcc_comm_addr;
  74. u32 cmd_latency = pcct_ss->latency;
  75. /* Min time OS should wait before sending next command. */
  76. udelay(pcc_cmd_delay);
  77. /* Write to the shared comm region. */
  78. writew(cmd, &generic_comm_base->command);
  79. /* Flip CMD COMPLETE bit */
  80. writew(0, &generic_comm_base->status);
  81. /* Ring doorbell */
  82. result = mbox_send_message(pcc_channel, &cmd);
  83. if (result < 0) {
  84. pr_err("Err sending PCC mbox message. cmd:%d, ret:%d\n",
  85. cmd, result);
  86. return result;
  87. }
  88. /* Wait for a nominal time to let platform process command. */
  89. udelay(cmd_latency);
  90. /* Retry in case the remote processor was too slow to catch up. */
  91. for (retries = NUM_RETRIES; retries > 0; retries--) {
  92. if (readw_relaxed(&generic_comm_base->status) & PCC_CMD_COMPLETE) {
  93. result = 0;
  94. break;
  95. }
  96. }
  97. mbox_client_txdone(pcc_channel, result);
  98. return result;
  99. }
  100. static void cppc_chan_tx_done(struct mbox_client *cl, void *msg, int ret)
  101. {
  102. if (ret)
  103. pr_debug("TX did not complete: CMD sent:%x, ret:%d\n",
  104. *(u16 *)msg, ret);
  105. else
  106. pr_debug("TX completed. CMD sent:%x, ret:%d\n",
  107. *(u16 *)msg, ret);
  108. }
  109. struct mbox_client cppc_mbox_cl = {
  110. .tx_done = cppc_chan_tx_done,
  111. .knows_txdone = true,
  112. };
  113. static int acpi_get_psd(struct cpc_desc *cpc_ptr, acpi_handle handle)
  114. {
  115. int result = -EFAULT;
  116. acpi_status status = AE_OK;
  117. struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
  118. struct acpi_buffer format = {sizeof("NNNNN"), "NNNNN"};
  119. struct acpi_buffer state = {0, NULL};
  120. union acpi_object *psd = NULL;
  121. struct acpi_psd_package *pdomain;
  122. status = acpi_evaluate_object_typed(handle, "_PSD", NULL, &buffer,
  123. ACPI_TYPE_PACKAGE);
  124. if (ACPI_FAILURE(status))
  125. return -ENODEV;
  126. psd = buffer.pointer;
  127. if (!psd || psd->package.count != 1) {
  128. pr_debug("Invalid _PSD data\n");
  129. goto end;
  130. }
  131. pdomain = &(cpc_ptr->domain_info);
  132. state.length = sizeof(struct acpi_psd_package);
  133. state.pointer = pdomain;
  134. status = acpi_extract_package(&(psd->package.elements[0]),
  135. &format, &state);
  136. if (ACPI_FAILURE(status)) {
  137. pr_debug("Invalid _PSD data for CPU:%d\n", cpc_ptr->cpu_id);
  138. goto end;
  139. }
  140. if (pdomain->num_entries != ACPI_PSD_REV0_ENTRIES) {
  141. pr_debug("Unknown _PSD:num_entries for CPU:%d\n", cpc_ptr->cpu_id);
  142. goto end;
  143. }
  144. if (pdomain->revision != ACPI_PSD_REV0_REVISION) {
  145. pr_debug("Unknown _PSD:revision for CPU: %d\n", cpc_ptr->cpu_id);
  146. goto end;
  147. }
  148. if (pdomain->coord_type != DOMAIN_COORD_TYPE_SW_ALL &&
  149. pdomain->coord_type != DOMAIN_COORD_TYPE_SW_ANY &&
  150. pdomain->coord_type != DOMAIN_COORD_TYPE_HW_ALL) {
  151. pr_debug("Invalid _PSD:coord_type for CPU:%d\n", cpc_ptr->cpu_id);
  152. goto end;
  153. }
  154. result = 0;
  155. end:
  156. kfree(buffer.pointer);
  157. return result;
  158. }
  159. /**
  160. * acpi_get_psd_map - Map the CPUs in a common freq domain.
  161. * @all_cpu_data: Ptrs to CPU specific CPPC data including PSD info.
  162. *
  163. * Return: 0 for success or negative value for err.
  164. */
  165. int acpi_get_psd_map(struct cpudata **all_cpu_data)
  166. {
  167. int count_target;
  168. int retval = 0;
  169. unsigned int i, j;
  170. cpumask_var_t covered_cpus;
  171. struct cpudata *pr, *match_pr;
  172. struct acpi_psd_package *pdomain;
  173. struct acpi_psd_package *match_pdomain;
  174. struct cpc_desc *cpc_ptr, *match_cpc_ptr;
  175. if (!zalloc_cpumask_var(&covered_cpus, GFP_KERNEL))
  176. return -ENOMEM;
  177. /*
  178. * Now that we have _PSD data from all CPUs, lets setup P-state
  179. * domain info.
  180. */
  181. for_each_possible_cpu(i) {
  182. pr = all_cpu_data[i];
  183. if (!pr)
  184. continue;
  185. if (cpumask_test_cpu(i, covered_cpus))
  186. continue;
  187. cpc_ptr = per_cpu(cpc_desc_ptr, i);
  188. if (!cpc_ptr)
  189. continue;
  190. pdomain = &(cpc_ptr->domain_info);
  191. cpumask_set_cpu(i, pr->shared_cpu_map);
  192. cpumask_set_cpu(i, covered_cpus);
  193. if (pdomain->num_processors <= 1)
  194. continue;
  195. /* Validate the Domain info */
  196. count_target = pdomain->num_processors;
  197. if (pdomain->coord_type == DOMAIN_COORD_TYPE_SW_ALL)
  198. pr->shared_type = CPUFREQ_SHARED_TYPE_ALL;
  199. else if (pdomain->coord_type == DOMAIN_COORD_TYPE_HW_ALL)
  200. pr->shared_type = CPUFREQ_SHARED_TYPE_HW;
  201. else if (pdomain->coord_type == DOMAIN_COORD_TYPE_SW_ANY)
  202. pr->shared_type = CPUFREQ_SHARED_TYPE_ANY;
  203. for_each_possible_cpu(j) {
  204. if (i == j)
  205. continue;
  206. match_cpc_ptr = per_cpu(cpc_desc_ptr, j);
  207. if (!match_cpc_ptr)
  208. continue;
  209. match_pdomain = &(match_cpc_ptr->domain_info);
  210. if (match_pdomain->domain != pdomain->domain)
  211. continue;
  212. /* Here i and j are in the same domain */
  213. if (match_pdomain->num_processors != count_target) {
  214. retval = -EFAULT;
  215. goto err_ret;
  216. }
  217. if (pdomain->coord_type != match_pdomain->coord_type) {
  218. retval = -EFAULT;
  219. goto err_ret;
  220. }
  221. cpumask_set_cpu(j, covered_cpus);
  222. cpumask_set_cpu(j, pr->shared_cpu_map);
  223. }
  224. for_each_possible_cpu(j) {
  225. if (i == j)
  226. continue;
  227. match_pr = all_cpu_data[j];
  228. if (!match_pr)
  229. continue;
  230. match_cpc_ptr = per_cpu(cpc_desc_ptr, j);
  231. if (!match_cpc_ptr)
  232. continue;
  233. match_pdomain = &(match_cpc_ptr->domain_info);
  234. if (match_pdomain->domain != pdomain->domain)
  235. continue;
  236. match_pr->shared_type = pr->shared_type;
  237. cpumask_copy(match_pr->shared_cpu_map,
  238. pr->shared_cpu_map);
  239. }
  240. }
  241. err_ret:
  242. for_each_possible_cpu(i) {
  243. pr = all_cpu_data[i];
  244. if (!pr)
  245. continue;
  246. /* Assume no coordination on any error parsing domain info */
  247. if (retval) {
  248. cpumask_clear(pr->shared_cpu_map);
  249. cpumask_set_cpu(i, pr->shared_cpu_map);
  250. pr->shared_type = CPUFREQ_SHARED_TYPE_ALL;
  251. }
  252. }
  253. free_cpumask_var(covered_cpus);
  254. return retval;
  255. }
  256. EXPORT_SYMBOL_GPL(acpi_get_psd_map);
  257. static int register_pcc_channel(unsigned pcc_subspace_idx)
  258. {
  259. struct acpi_pcct_subspace *cppc_ss;
  260. unsigned int len;
  261. if (pcc_subspace_idx >= 0) {
  262. pcc_channel = pcc_mbox_request_channel(&cppc_mbox_cl,
  263. pcc_subspace_idx);
  264. if (IS_ERR(pcc_channel)) {
  265. pr_err("Failed to find PCC communication channel\n");
  266. return -ENODEV;
  267. }
  268. /*
  269. * The PCC mailbox controller driver should
  270. * have parsed the PCCT (global table of all
  271. * PCC channels) and stored pointers to the
  272. * subspace communication region in con_priv.
  273. */
  274. cppc_ss = pcc_channel->con_priv;
  275. if (!cppc_ss) {
  276. pr_err("No PCC subspace found for CPPC\n");
  277. return -ENODEV;
  278. }
  279. /*
  280. * This is the shared communication region
  281. * for the OS and Platform to communicate over.
  282. */
  283. comm_base_addr = cppc_ss->base_address;
  284. len = cppc_ss->length;
  285. pcc_cmd_delay = cppc_ss->min_turnaround_time;
  286. pcc_comm_addr = acpi_os_ioremap(comm_base_addr, len);
  287. if (!pcc_comm_addr) {
  288. pr_err("Failed to ioremap PCC comm region mem\n");
  289. return -ENOMEM;
  290. }
  291. /* Set flag so that we dont come here for each CPU. */
  292. pcc_channel_acquired = true;
  293. }
  294. return 0;
  295. }
  296. /*
  297. * An example CPC table looks like the following.
  298. *
  299. * Name(_CPC, Package()
  300. * {
  301. * 17,
  302. * NumEntries
  303. * 1,
  304. * // Revision
  305. * ResourceTemplate(){Register(PCC, 32, 0, 0x120, 2)},
  306. * // Highest Performance
  307. * ResourceTemplate(){Register(PCC, 32, 0, 0x124, 2)},
  308. * // Nominal Performance
  309. * ResourceTemplate(){Register(PCC, 32, 0, 0x128, 2)},
  310. * // Lowest Nonlinear Performance
  311. * ResourceTemplate(){Register(PCC, 32, 0, 0x12C, 2)},
  312. * // Lowest Performance
  313. * ResourceTemplate(){Register(PCC, 32, 0, 0x130, 2)},
  314. * // Guaranteed Performance Register
  315. * ResourceTemplate(){Register(PCC, 32, 0, 0x110, 2)},
  316. * // Desired Performance Register
  317. * ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)},
  318. * ..
  319. * ..
  320. * ..
  321. *
  322. * }
  323. * Each Register() encodes how to access that specific register.
  324. * e.g. a sample PCC entry has the following encoding:
  325. *
  326. * Register (
  327. * PCC,
  328. * AddressSpaceKeyword
  329. * 8,
  330. * //RegisterBitWidth
  331. * 8,
  332. * //RegisterBitOffset
  333. * 0x30,
  334. * //RegisterAddress
  335. * 9
  336. * //AccessSize (subspace ID)
  337. * 0
  338. * )
  339. * }
  340. */
  341. /**
  342. * acpi_cppc_processor_probe - Search for per CPU _CPC objects.
  343. * @pr: Ptr to acpi_processor containing this CPUs logical Id.
  344. *
  345. * Return: 0 for success or negative value for err.
  346. */
  347. int acpi_cppc_processor_probe(struct acpi_processor *pr)
  348. {
  349. struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
  350. union acpi_object *out_obj, *cpc_obj;
  351. struct cpc_desc *cpc_ptr;
  352. struct cpc_reg *gas_t;
  353. acpi_handle handle = pr->handle;
  354. unsigned int num_ent, i, cpc_rev;
  355. acpi_status status;
  356. int ret = -EFAULT;
  357. /* Parse the ACPI _CPC table for this cpu. */
  358. status = acpi_evaluate_object_typed(handle, "_CPC", NULL, &output,
  359. ACPI_TYPE_PACKAGE);
  360. if (ACPI_FAILURE(status)) {
  361. ret = -ENODEV;
  362. goto out_buf_free;
  363. }
  364. out_obj = (union acpi_object *) output.pointer;
  365. cpc_ptr = kzalloc(sizeof(struct cpc_desc), GFP_KERNEL);
  366. if (!cpc_ptr) {
  367. ret = -ENOMEM;
  368. goto out_buf_free;
  369. }
  370. /* First entry is NumEntries. */
  371. cpc_obj = &out_obj->package.elements[0];
  372. if (cpc_obj->type == ACPI_TYPE_INTEGER) {
  373. num_ent = cpc_obj->integer.value;
  374. } else {
  375. pr_debug("Unexpected entry type(%d) for NumEntries\n",
  376. cpc_obj->type);
  377. goto out_free;
  378. }
  379. /* Only support CPPCv2. Bail otherwise. */
  380. if (num_ent != CPPC_NUM_ENT) {
  381. pr_debug("Firmware exports %d entries. Expected: %d\n",
  382. num_ent, CPPC_NUM_ENT);
  383. goto out_free;
  384. }
  385. /* Second entry should be revision. */
  386. cpc_obj = &out_obj->package.elements[1];
  387. if (cpc_obj->type == ACPI_TYPE_INTEGER) {
  388. cpc_rev = cpc_obj->integer.value;
  389. } else {
  390. pr_debug("Unexpected entry type(%d) for Revision\n",
  391. cpc_obj->type);
  392. goto out_free;
  393. }
  394. if (cpc_rev != CPPC_REV) {
  395. pr_debug("Firmware exports revision:%d. Expected:%d\n",
  396. cpc_rev, CPPC_REV);
  397. goto out_free;
  398. }
  399. /* Iterate through remaining entries in _CPC */
  400. for (i = 2; i < num_ent; i++) {
  401. cpc_obj = &out_obj->package.elements[i];
  402. if (cpc_obj->type == ACPI_TYPE_INTEGER) {
  403. cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_INTEGER;
  404. cpc_ptr->cpc_regs[i-2].cpc_entry.int_value = cpc_obj->integer.value;
  405. } else if (cpc_obj->type == ACPI_TYPE_BUFFER) {
  406. gas_t = (struct cpc_reg *)
  407. cpc_obj->buffer.pointer;
  408. /*
  409. * The PCC Subspace index is encoded inside
  410. * the CPC table entries. The same PCC index
  411. * will be used for all the PCC entries,
  412. * so extract it only once.
  413. */
  414. if (gas_t->space_id == ACPI_ADR_SPACE_PLATFORM_COMM) {
  415. if (pcc_subspace_idx < 0)
  416. pcc_subspace_idx = gas_t->access_width;
  417. else if (pcc_subspace_idx != gas_t->access_width) {
  418. pr_debug("Mismatched PCC ids.\n");
  419. goto out_free;
  420. }
  421. } else if (gas_t->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
  422. /* Support only PCC and SYS MEM type regs */
  423. pr_debug("Unsupported register type: %d\n", gas_t->space_id);
  424. goto out_free;
  425. }
  426. cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_BUFFER;
  427. memcpy(&cpc_ptr->cpc_regs[i-2].cpc_entry.reg, gas_t, sizeof(*gas_t));
  428. } else {
  429. pr_debug("Err in entry:%d in CPC table of CPU:%d \n", i, pr->id);
  430. goto out_free;
  431. }
  432. }
  433. /* Store CPU Logical ID */
  434. cpc_ptr->cpu_id = pr->id;
  435. /* Plug it into this CPUs CPC descriptor. */
  436. per_cpu(cpc_desc_ptr, pr->id) = cpc_ptr;
  437. /* Parse PSD data for this CPU */
  438. ret = acpi_get_psd(cpc_ptr, handle);
  439. if (ret)
  440. goto out_free;
  441. /* Register PCC channel once for all CPUs. */
  442. if (!pcc_channel_acquired) {
  443. ret = register_pcc_channel(pcc_subspace_idx);
  444. if (ret)
  445. goto out_free;
  446. }
  447. /* Everything looks okay */
  448. pr_debug("Parsed CPC struct for CPU: %d\n", pr->id);
  449. kfree(output.pointer);
  450. return 0;
  451. out_free:
  452. cpc_ptr = per_cpu(cpc_desc_ptr, pr->id);
  453. kfree(cpc_ptr);
  454. out_buf_free:
  455. kfree(output.pointer);
  456. return ret;
  457. }
  458. EXPORT_SYMBOL_GPL(acpi_cppc_processor_probe);
  459. /**
  460. * acpi_cppc_processor_exit - Cleanup CPC structs.
  461. * @pr: Ptr to acpi_processor containing this CPUs logical Id.
  462. *
  463. * Return: Void
  464. */
  465. void acpi_cppc_processor_exit(struct acpi_processor *pr)
  466. {
  467. struct cpc_desc *cpc_ptr;
  468. cpc_ptr = per_cpu(cpc_desc_ptr, pr->id);
  469. kfree(cpc_ptr);
  470. }
  471. EXPORT_SYMBOL_GPL(acpi_cppc_processor_exit);
  472. static u64 get_phys_addr(struct cpc_reg *reg)
  473. {
  474. /* PCC communication addr space begins at byte offset 0x8. */
  475. if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM)
  476. return (u64)comm_base_addr + 0x8 + reg->address;
  477. else
  478. return reg->address;
  479. }
  480. static void cpc_read(struct cpc_reg *reg, u64 *val)
  481. {
  482. u64 addr = get_phys_addr(reg);
  483. acpi_os_read_memory((acpi_physical_address)addr,
  484. val, reg->bit_width);
  485. }
  486. static void cpc_write(struct cpc_reg *reg, u64 val)
  487. {
  488. u64 addr = get_phys_addr(reg);
  489. acpi_os_write_memory((acpi_physical_address)addr,
  490. val, reg->bit_width);
  491. }
  492. /**
  493. * cppc_get_perf_caps - Get a CPUs performance capabilities.
  494. * @cpunum: CPU from which to get capabilities info.
  495. * @perf_caps: ptr to cppc_perf_caps. See cppc_acpi.h
  496. *
  497. * Return: 0 for success with perf_caps populated else -ERRNO.
  498. */
  499. int cppc_get_perf_caps(int cpunum, struct cppc_perf_caps *perf_caps)
  500. {
  501. struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpunum);
  502. struct cpc_register_resource *highest_reg, *lowest_reg, *ref_perf,
  503. *nom_perf;
  504. u64 high, low, ref, nom;
  505. int ret = 0;
  506. if (!cpc_desc) {
  507. pr_debug("No CPC descriptor for CPU:%d\n", cpunum);
  508. return -ENODEV;
  509. }
  510. highest_reg = &cpc_desc->cpc_regs[HIGHEST_PERF];
  511. lowest_reg = &cpc_desc->cpc_regs[LOWEST_PERF];
  512. ref_perf = &cpc_desc->cpc_regs[REFERENCE_PERF];
  513. nom_perf = &cpc_desc->cpc_regs[NOMINAL_PERF];
  514. spin_lock(&pcc_lock);
  515. /* Are any of the regs PCC ?*/
  516. if ((highest_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) ||
  517. (lowest_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) ||
  518. (ref_perf->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) ||
  519. (nom_perf->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM)) {
  520. /* Ring doorbell once to update PCC subspace */
  521. if (send_pcc_cmd(CMD_READ)) {
  522. ret = -EIO;
  523. goto out_err;
  524. }
  525. }
  526. cpc_read(&highest_reg->cpc_entry.reg, &high);
  527. perf_caps->highest_perf = high;
  528. cpc_read(&lowest_reg->cpc_entry.reg, &low);
  529. perf_caps->lowest_perf = low;
  530. cpc_read(&ref_perf->cpc_entry.reg, &ref);
  531. perf_caps->reference_perf = ref;
  532. cpc_read(&nom_perf->cpc_entry.reg, &nom);
  533. perf_caps->nominal_perf = nom;
  534. if (!ref)
  535. perf_caps->reference_perf = perf_caps->nominal_perf;
  536. if (!high || !low || !nom)
  537. ret = -EFAULT;
  538. out_err:
  539. spin_unlock(&pcc_lock);
  540. return ret;
  541. }
  542. EXPORT_SYMBOL_GPL(cppc_get_perf_caps);
  543. /**
  544. * cppc_get_perf_ctrs - Read a CPUs performance feedback counters.
  545. * @cpunum: CPU from which to read counters.
  546. * @perf_fb_ctrs: ptr to cppc_perf_fb_ctrs. See cppc_acpi.h
  547. *
  548. * Return: 0 for success with perf_fb_ctrs populated else -ERRNO.
  549. */
  550. int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
  551. {
  552. struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpunum);
  553. struct cpc_register_resource *delivered_reg, *reference_reg;
  554. u64 delivered, reference;
  555. int ret = 0;
  556. if (!cpc_desc) {
  557. pr_debug("No CPC descriptor for CPU:%d\n", cpunum);
  558. return -ENODEV;
  559. }
  560. delivered_reg = &cpc_desc->cpc_regs[DELIVERED_CTR];
  561. reference_reg = &cpc_desc->cpc_regs[REFERENCE_CTR];
  562. spin_lock(&pcc_lock);
  563. /* Are any of the regs PCC ?*/
  564. if ((delivered_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) ||
  565. (reference_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM)) {
  566. /* Ring doorbell once to update PCC subspace */
  567. if (send_pcc_cmd(CMD_READ)) {
  568. ret = -EIO;
  569. goto out_err;
  570. }
  571. }
  572. cpc_read(&delivered_reg->cpc_entry.reg, &delivered);
  573. cpc_read(&reference_reg->cpc_entry.reg, &reference);
  574. if (!delivered || !reference) {
  575. ret = -EFAULT;
  576. goto out_err;
  577. }
  578. perf_fb_ctrs->delivered = delivered;
  579. perf_fb_ctrs->reference = reference;
  580. perf_fb_ctrs->delivered -= perf_fb_ctrs->prev_delivered;
  581. perf_fb_ctrs->reference -= perf_fb_ctrs->prev_reference;
  582. perf_fb_ctrs->prev_delivered = delivered;
  583. perf_fb_ctrs->prev_reference = reference;
  584. out_err:
  585. spin_unlock(&pcc_lock);
  586. return ret;
  587. }
  588. EXPORT_SYMBOL_GPL(cppc_get_perf_ctrs);
  589. /**
  590. * cppc_set_perf - Set a CPUs performance controls.
  591. * @cpu: CPU for which to set performance controls.
  592. * @perf_ctrls: ptr to cppc_perf_ctrls. See cppc_acpi.h
  593. *
  594. * Return: 0 for success, -ERRNO otherwise.
  595. */
  596. int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
  597. {
  598. struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);
  599. struct cpc_register_resource *desired_reg;
  600. int ret = 0;
  601. if (!cpc_desc) {
  602. pr_debug("No CPC descriptor for CPU:%d\n", cpu);
  603. return -ENODEV;
  604. }
  605. desired_reg = &cpc_desc->cpc_regs[DESIRED_PERF];
  606. spin_lock(&pcc_lock);
  607. /*
  608. * Skip writing MIN/MAX until Linux knows how to come up with
  609. * useful values.
  610. */
  611. cpc_write(&desired_reg->cpc_entry.reg, perf_ctrls->desired_perf);
  612. /* Is this a PCC reg ?*/
  613. if (desired_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) {
  614. /* Ring doorbell so Remote can get our perf request. */
  615. if (send_pcc_cmd(CMD_WRITE))
  616. ret = -EIO;
  617. }
  618. spin_unlock(&pcc_lock);
  619. return ret;
  620. }
  621. EXPORT_SYMBOL_GPL(cppc_set_perf);