amdgpu_sync.c 8.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387
  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Christian König <christian.koenig@amd.com>
  29. */
  30. #include <drm/drmP.h>
  31. #include "amdgpu.h"
  32. #include "amdgpu_trace.h"
  33. struct amdgpu_sync_entry {
  34. struct hlist_node node;
  35. struct fence *fence;
  36. };
  37. static struct kmem_cache *amdgpu_sync_slab;
  38. /**
  39. * amdgpu_sync_create - zero init sync object
  40. *
  41. * @sync: sync object to initialize
  42. *
  43. * Just clear the sync object for now.
  44. */
  45. void amdgpu_sync_create(struct amdgpu_sync *sync)
  46. {
  47. hash_init(sync->fences);
  48. sync->last_vm_update = NULL;
  49. }
  50. /**
  51. * amdgpu_sync_same_dev - test if fence belong to us
  52. *
  53. * @adev: amdgpu device to use for the test
  54. * @f: fence to test
  55. *
  56. * Test if the fence was issued by us.
  57. */
  58. static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, struct fence *f)
  59. {
  60. struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
  61. if (s_fence) {
  62. struct amdgpu_ring *ring;
  63. ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
  64. return ring->adev == adev;
  65. }
  66. return false;
  67. }
  68. /**
  69. * amdgpu_sync_get_owner - extract the owner of a fence
  70. *
  71. * @fence: fence get the owner from
  72. *
  73. * Extract who originally created the fence.
  74. */
  75. static void *amdgpu_sync_get_owner(struct fence *f)
  76. {
  77. struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
  78. if (s_fence)
  79. return s_fence->owner;
  80. return AMDGPU_FENCE_OWNER_UNDEFINED;
  81. }
  82. /**
  83. * amdgpu_sync_keep_later - Keep the later fence
  84. *
  85. * @keep: existing fence to test
  86. * @fence: new fence
  87. *
  88. * Either keep the existing fence or the new one, depending which one is later.
  89. */
  90. static void amdgpu_sync_keep_later(struct fence **keep, struct fence *fence)
  91. {
  92. if (*keep && fence_is_later(*keep, fence))
  93. return;
  94. fence_put(*keep);
  95. *keep = fence_get(fence);
  96. }
  97. /**
  98. * amdgpu_sync_add_later - add the fence to the hash
  99. *
  100. * @sync: sync object to add the fence to
  101. * @f: fence to add
  102. *
  103. * Tries to add the fence to an existing hash entry. Returns true when an entry
  104. * was found, false otherwise.
  105. */
  106. static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct fence *f)
  107. {
  108. struct amdgpu_sync_entry *e;
  109. hash_for_each_possible(sync->fences, e, node, f->context) {
  110. if (unlikely(e->fence->context != f->context))
  111. continue;
  112. amdgpu_sync_keep_later(&e->fence, f);
  113. return true;
  114. }
  115. return false;
  116. }
  117. /**
  118. * amdgpu_sync_fence - remember to sync to this fence
  119. *
  120. * @sync: sync object to add fence to
  121. * @fence: fence to sync to
  122. *
  123. */
  124. int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
  125. struct fence *f)
  126. {
  127. struct amdgpu_sync_entry *e;
  128. if (!f)
  129. return 0;
  130. if (amdgpu_sync_same_dev(adev, f) &&
  131. amdgpu_sync_get_owner(f) == AMDGPU_FENCE_OWNER_VM)
  132. amdgpu_sync_keep_later(&sync->last_vm_update, f);
  133. if (amdgpu_sync_add_later(sync, f))
  134. return 0;
  135. e = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
  136. if (!e)
  137. return -ENOMEM;
  138. hash_add(sync->fences, &e->node, f->context);
  139. e->fence = fence_get(f);
  140. return 0;
  141. }
  142. /**
  143. * amdgpu_sync_resv - sync to a reservation object
  144. *
  145. * @sync: sync object to add fences from reservation object to
  146. * @resv: reservation object with embedded fence
  147. * @shared: true if we should only sync to the exclusive fence
  148. *
  149. * Sync to the fence
  150. */
  151. int amdgpu_sync_resv(struct amdgpu_device *adev,
  152. struct amdgpu_sync *sync,
  153. struct reservation_object *resv,
  154. void *owner)
  155. {
  156. struct reservation_object_list *flist;
  157. struct fence *f;
  158. void *fence_owner;
  159. unsigned i;
  160. int r = 0;
  161. if (resv == NULL)
  162. return -EINVAL;
  163. /* always sync to the exclusive fence */
  164. f = reservation_object_get_excl(resv);
  165. r = amdgpu_sync_fence(adev, sync, f);
  166. flist = reservation_object_get_list(resv);
  167. if (!flist || r)
  168. return r;
  169. for (i = 0; i < flist->shared_count; ++i) {
  170. f = rcu_dereference_protected(flist->shared[i],
  171. reservation_object_held(resv));
  172. if (amdgpu_sync_same_dev(adev, f)) {
  173. /* VM updates are only interesting
  174. * for other VM updates and moves.
  175. */
  176. fence_owner = amdgpu_sync_get_owner(f);
  177. if ((owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
  178. (fence_owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
  179. ((owner == AMDGPU_FENCE_OWNER_VM) !=
  180. (fence_owner == AMDGPU_FENCE_OWNER_VM)))
  181. continue;
  182. /* Ignore fence from the same owner as
  183. * long as it isn't undefined.
  184. */
  185. if (owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
  186. fence_owner == owner)
  187. continue;
  188. }
  189. r = amdgpu_sync_fence(adev, sync, f);
  190. if (r)
  191. break;
  192. }
  193. return r;
  194. }
  195. /**
  196. * amdgpu_sync_is_idle - test if all fences are signaled
  197. *
  198. * @sync: the sync object
  199. *
  200. * Returns true if all fences in the sync object are signaled.
  201. */
  202. bool amdgpu_sync_is_idle(struct amdgpu_sync *sync)
  203. {
  204. struct amdgpu_sync_entry *e;
  205. struct hlist_node *tmp;
  206. int i;
  207. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  208. struct fence *f = e->fence;
  209. if (fence_is_signaled(f)) {
  210. hash_del(&e->node);
  211. fence_put(f);
  212. kmem_cache_free(amdgpu_sync_slab, e);
  213. continue;
  214. }
  215. return false;
  216. }
  217. return true;
  218. }
  219. /**
  220. * amdgpu_sync_cycle_fences - move fences from one sync object into another
  221. *
  222. * @dst: the destination sync object
  223. * @src: the source sync object
  224. * @fence: fence to add to source
  225. *
  226. * Remove all fences from source and put them into destination and add
  227. * fence as new one into source.
  228. */
  229. int amdgpu_sync_cycle_fences(struct amdgpu_sync *dst, struct amdgpu_sync *src,
  230. struct fence *fence)
  231. {
  232. struct amdgpu_sync_entry *e, *newone;
  233. struct hlist_node *tmp;
  234. int i;
  235. /* Allocate the new entry before moving the old ones */
  236. newone = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
  237. if (!newone)
  238. return -ENOMEM;
  239. hash_for_each_safe(src->fences, i, tmp, e, node) {
  240. struct fence *f = e->fence;
  241. hash_del(&e->node);
  242. if (fence_is_signaled(f)) {
  243. fence_put(f);
  244. kmem_cache_free(amdgpu_sync_slab, e);
  245. continue;
  246. }
  247. if (amdgpu_sync_add_later(dst, f)) {
  248. kmem_cache_free(amdgpu_sync_slab, e);
  249. continue;
  250. }
  251. hash_add(dst->fences, &e->node, f->context);
  252. }
  253. hash_add(src->fences, &newone->node, fence->context);
  254. newone->fence = fence_get(fence);
  255. return 0;
  256. }
  257. struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)
  258. {
  259. struct amdgpu_sync_entry *e;
  260. struct hlist_node *tmp;
  261. struct fence *f;
  262. int i;
  263. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  264. f = e->fence;
  265. hash_del(&e->node);
  266. kmem_cache_free(amdgpu_sync_slab, e);
  267. if (!fence_is_signaled(f))
  268. return f;
  269. fence_put(f);
  270. }
  271. return NULL;
  272. }
  273. int amdgpu_sync_wait(struct amdgpu_sync *sync)
  274. {
  275. struct amdgpu_sync_entry *e;
  276. struct hlist_node *tmp;
  277. int i, r;
  278. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  279. r = fence_wait(e->fence, false);
  280. if (r)
  281. return r;
  282. hash_del(&e->node);
  283. fence_put(e->fence);
  284. kmem_cache_free(amdgpu_sync_slab, e);
  285. }
  286. return 0;
  287. }
  288. /**
  289. * amdgpu_sync_free - free the sync object
  290. *
  291. * @sync: sync object to use
  292. *
  293. * Free the sync object.
  294. */
  295. void amdgpu_sync_free(struct amdgpu_sync *sync)
  296. {
  297. struct amdgpu_sync_entry *e;
  298. struct hlist_node *tmp;
  299. unsigned i;
  300. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  301. hash_del(&e->node);
  302. fence_put(e->fence);
  303. kmem_cache_free(amdgpu_sync_slab, e);
  304. }
  305. fence_put(sync->last_vm_update);
  306. }
  307. /**
  308. * amdgpu_sync_init - init sync object subsystem
  309. *
  310. * Allocate the slab allocator.
  311. */
  312. int amdgpu_sync_init(void)
  313. {
  314. amdgpu_sync_slab = kmem_cache_create(
  315. "amdgpu_sync", sizeof(struct amdgpu_sync_entry), 0,
  316. SLAB_HWCACHE_ALIGN, NULL);
  317. if (!amdgpu_sync_slab)
  318. return -ENOMEM;
  319. return 0;
  320. }
  321. /**
  322. * amdgpu_sync_fini - fini sync object subsystem
  323. *
  324. * Free the slab allocator.
  325. */
  326. void amdgpu_sync_fini(void)
  327. {
  328. kmem_cache_destroy(amdgpu_sync_slab);
  329. }