amdgpu_mn.c 9.1 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Christian König <christian.koenig@amd.com>
  29. */
  30. #include <linux/firmware.h>
  31. #include <linux/module.h>
  32. #include <linux/mmu_notifier.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm.h>
  35. #include "amdgpu.h"
  36. struct amdgpu_mn {
  37. /* constant after initialisation */
  38. struct amdgpu_device *adev;
  39. struct mm_struct *mm;
  40. struct mmu_notifier mn;
  41. /* only used on destruction */
  42. struct work_struct work;
  43. /* protected by adev->mn_lock */
  44. struct hlist_node node;
  45. /* objects protected by lock */
  46. struct mutex lock;
  47. struct rb_root objects;
  48. };
  49. struct amdgpu_mn_node {
  50. struct interval_tree_node it;
  51. struct list_head bos;
  52. };
  53. /**
  54. * amdgpu_mn_destroy - destroy the rmn
  55. *
  56. * @work: previously sheduled work item
  57. *
  58. * Lazy destroys the notifier from a work item
  59. */
  60. static void amdgpu_mn_destroy(struct work_struct *work)
  61. {
  62. struct amdgpu_mn *rmn = container_of(work, struct amdgpu_mn, work);
  63. struct amdgpu_device *adev = rmn->adev;
  64. struct amdgpu_mn_node *node, *next_node;
  65. struct amdgpu_bo *bo, *next_bo;
  66. mutex_lock(&adev->mn_lock);
  67. mutex_lock(&rmn->lock);
  68. hash_del(&rmn->node);
  69. rbtree_postorder_for_each_entry_safe(node, next_node, &rmn->objects,
  70. it.rb) {
  71. list_for_each_entry_safe(bo, next_bo, &node->bos, mn_list) {
  72. bo->mn = NULL;
  73. list_del_init(&bo->mn_list);
  74. }
  75. kfree(node);
  76. }
  77. mutex_unlock(&rmn->lock);
  78. mutex_unlock(&adev->mn_lock);
  79. mmu_notifier_unregister_no_release(&rmn->mn, rmn->mm);
  80. kfree(rmn);
  81. }
  82. /**
  83. * amdgpu_mn_release - callback to notify about mm destruction
  84. *
  85. * @mn: our notifier
  86. * @mn: the mm this callback is about
  87. *
  88. * Shedule a work item to lazy destroy our notifier.
  89. */
  90. static void amdgpu_mn_release(struct mmu_notifier *mn,
  91. struct mm_struct *mm)
  92. {
  93. struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
  94. INIT_WORK(&rmn->work, amdgpu_mn_destroy);
  95. schedule_work(&rmn->work);
  96. }
  97. /**
  98. * amdgpu_mn_invalidate_node - unmap all BOs of a node
  99. *
  100. * @node: the node with the BOs to unmap
  101. *
  102. * We block for all BOs and unmap them by move them
  103. * into system domain again.
  104. */
  105. static void amdgpu_mn_invalidate_node(struct amdgpu_mn_node *node,
  106. unsigned long start,
  107. unsigned long end)
  108. {
  109. struct amdgpu_bo *bo;
  110. long r;
  111. list_for_each_entry(bo, &node->bos, mn_list) {
  112. if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, start, end))
  113. continue;
  114. r = amdgpu_bo_reserve(bo, true);
  115. if (r) {
  116. DRM_ERROR("(%ld) failed to reserve user bo\n", r);
  117. continue;
  118. }
  119. r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
  120. true, false, MAX_SCHEDULE_TIMEOUT);
  121. if (r <= 0)
  122. DRM_ERROR("(%ld) failed to wait for user bo\n", r);
  123. amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_CPU);
  124. r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
  125. if (r)
  126. DRM_ERROR("(%ld) failed to validate user bo\n", r);
  127. amdgpu_bo_unreserve(bo);
  128. }
  129. }
  130. /**
  131. * amdgpu_mn_invalidate_page - callback to notify about mm change
  132. *
  133. * @mn: our notifier
  134. * @mn: the mm this callback is about
  135. * @address: address of invalidate page
  136. *
  137. * Invalidation of a single page. Blocks for all BOs mapping it
  138. * and unmap them by move them into system domain again.
  139. */
  140. static void amdgpu_mn_invalidate_page(struct mmu_notifier *mn,
  141. struct mm_struct *mm,
  142. unsigned long address)
  143. {
  144. struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
  145. struct interval_tree_node *it;
  146. mutex_lock(&rmn->lock);
  147. it = interval_tree_iter_first(&rmn->objects, address, address);
  148. if (it) {
  149. struct amdgpu_mn_node *node;
  150. node = container_of(it, struct amdgpu_mn_node, it);
  151. amdgpu_mn_invalidate_node(node, address, address);
  152. }
  153. mutex_unlock(&rmn->lock);
  154. }
  155. /**
  156. * amdgpu_mn_invalidate_range_start - callback to notify about mm change
  157. *
  158. * @mn: our notifier
  159. * @mn: the mm this callback is about
  160. * @start: start of updated range
  161. * @end: end of updated range
  162. *
  163. * We block for all BOs between start and end to be idle and
  164. * unmap them by move them into system domain again.
  165. */
  166. static void amdgpu_mn_invalidate_range_start(struct mmu_notifier *mn,
  167. struct mm_struct *mm,
  168. unsigned long start,
  169. unsigned long end)
  170. {
  171. struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
  172. struct interval_tree_node *it;
  173. /* notification is exclusive, but interval is inclusive */
  174. end -= 1;
  175. mutex_lock(&rmn->lock);
  176. it = interval_tree_iter_first(&rmn->objects, start, end);
  177. while (it) {
  178. struct amdgpu_mn_node *node;
  179. node = container_of(it, struct amdgpu_mn_node, it);
  180. it = interval_tree_iter_next(it, start, end);
  181. amdgpu_mn_invalidate_node(node, start, end);
  182. }
  183. mutex_unlock(&rmn->lock);
  184. }
  185. static const struct mmu_notifier_ops amdgpu_mn_ops = {
  186. .release = amdgpu_mn_release,
  187. .invalidate_page = amdgpu_mn_invalidate_page,
  188. .invalidate_range_start = amdgpu_mn_invalidate_range_start,
  189. };
  190. /**
  191. * amdgpu_mn_get - create notifier context
  192. *
  193. * @adev: amdgpu device pointer
  194. *
  195. * Creates a notifier context for current->mm.
  196. */
  197. static struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev)
  198. {
  199. struct mm_struct *mm = current->mm;
  200. struct amdgpu_mn *rmn;
  201. int r;
  202. mutex_lock(&adev->mn_lock);
  203. if (down_write_killable(&mm->mmap_sem)) {
  204. mutex_unlock(&adev->mn_lock);
  205. return ERR_PTR(-EINTR);
  206. }
  207. hash_for_each_possible(adev->mn_hash, rmn, node, (unsigned long)mm)
  208. if (rmn->mm == mm)
  209. goto release_locks;
  210. rmn = kzalloc(sizeof(*rmn), GFP_KERNEL);
  211. if (!rmn) {
  212. rmn = ERR_PTR(-ENOMEM);
  213. goto release_locks;
  214. }
  215. rmn->adev = adev;
  216. rmn->mm = mm;
  217. rmn->mn.ops = &amdgpu_mn_ops;
  218. mutex_init(&rmn->lock);
  219. rmn->objects = RB_ROOT;
  220. r = __mmu_notifier_register(&rmn->mn, mm);
  221. if (r)
  222. goto free_rmn;
  223. hash_add(adev->mn_hash, &rmn->node, (unsigned long)mm);
  224. release_locks:
  225. up_write(&mm->mmap_sem);
  226. mutex_unlock(&adev->mn_lock);
  227. return rmn;
  228. free_rmn:
  229. up_write(&mm->mmap_sem);
  230. mutex_unlock(&adev->mn_lock);
  231. kfree(rmn);
  232. return ERR_PTR(r);
  233. }
  234. /**
  235. * amdgpu_mn_register - register a BO for notifier updates
  236. *
  237. * @bo: amdgpu buffer object
  238. * @addr: userptr addr we should monitor
  239. *
  240. * Registers an MMU notifier for the given BO at the specified address.
  241. * Returns 0 on success, -ERRNO if anything goes wrong.
  242. */
  243. int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
  244. {
  245. unsigned long end = addr + amdgpu_bo_size(bo) - 1;
  246. struct amdgpu_device *adev = bo->adev;
  247. struct amdgpu_mn *rmn;
  248. struct amdgpu_mn_node *node = NULL;
  249. struct list_head bos;
  250. struct interval_tree_node *it;
  251. rmn = amdgpu_mn_get(adev);
  252. if (IS_ERR(rmn))
  253. return PTR_ERR(rmn);
  254. INIT_LIST_HEAD(&bos);
  255. mutex_lock(&rmn->lock);
  256. while ((it = interval_tree_iter_first(&rmn->objects, addr, end))) {
  257. kfree(node);
  258. node = container_of(it, struct amdgpu_mn_node, it);
  259. interval_tree_remove(&node->it, &rmn->objects);
  260. addr = min(it->start, addr);
  261. end = max(it->last, end);
  262. list_splice(&node->bos, &bos);
  263. }
  264. if (!node) {
  265. node = kmalloc(sizeof(struct amdgpu_mn_node), GFP_KERNEL);
  266. if (!node) {
  267. mutex_unlock(&rmn->lock);
  268. return -ENOMEM;
  269. }
  270. }
  271. bo->mn = rmn;
  272. node->it.start = addr;
  273. node->it.last = end;
  274. INIT_LIST_HEAD(&node->bos);
  275. list_splice(&bos, &node->bos);
  276. list_add(&bo->mn_list, &node->bos);
  277. interval_tree_insert(&node->it, &rmn->objects);
  278. mutex_unlock(&rmn->lock);
  279. return 0;
  280. }
  281. /**
  282. * amdgpu_mn_unregister - unregister a BO for notifier updates
  283. *
  284. * @bo: amdgpu buffer object
  285. *
  286. * Remove any registration of MMU notifier updates from the buffer object.
  287. */
  288. void amdgpu_mn_unregister(struct amdgpu_bo *bo)
  289. {
  290. struct amdgpu_device *adev = bo->adev;
  291. struct amdgpu_mn *rmn;
  292. struct list_head *head;
  293. mutex_lock(&adev->mn_lock);
  294. rmn = bo->mn;
  295. if (rmn == NULL) {
  296. mutex_unlock(&adev->mn_lock);
  297. return;
  298. }
  299. mutex_lock(&rmn->lock);
  300. /* save the next list entry for later */
  301. head = bo->mn_list.next;
  302. bo->mn = NULL;
  303. list_del(&bo->mn_list);
  304. if (list_empty(head)) {
  305. struct amdgpu_mn_node *node;
  306. node = container_of(head, struct amdgpu_mn_node, bos);
  307. interval_tree_remove(&node->it, &rmn->objects);
  308. kfree(node);
  309. }
  310. mutex_unlock(&rmn->lock);
  311. mutex_unlock(&adev->mn_lock);
  312. }