amdgpu_job.c 5.0 KB

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  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. *
  23. */
  24. #include <linux/kthread.h>
  25. #include <linux/wait.h>
  26. #include <linux/sched.h>
  27. #include <drm/drmP.h>
  28. #include "amdgpu.h"
  29. #include "amdgpu_trace.h"
  30. static void amdgpu_job_free_handler(struct work_struct *ws)
  31. {
  32. struct amdgpu_job *job = container_of(ws, struct amdgpu_job, base.work_free_job);
  33. amd_sched_job_put(&job->base);
  34. }
  35. void amdgpu_job_timeout_func(struct work_struct *work)
  36. {
  37. struct amdgpu_job *job = container_of(work, struct amdgpu_job, base.work_tdr.work);
  38. DRM_ERROR("ring %s timeout, last signaled seq=%u, last emitted seq=%u\n",
  39. job->base.sched->name,
  40. (uint32_t)atomic_read(&job->ring->fence_drv.last_seq),
  41. job->ring->fence_drv.sync_seq);
  42. amd_sched_job_put(&job->base);
  43. }
  44. int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
  45. struct amdgpu_job **job, struct amdgpu_vm *vm)
  46. {
  47. size_t size = sizeof(struct amdgpu_job);
  48. if (num_ibs == 0)
  49. return -EINVAL;
  50. size += sizeof(struct amdgpu_ib) * num_ibs;
  51. *job = kzalloc(size, GFP_KERNEL);
  52. if (!*job)
  53. return -ENOMEM;
  54. (*job)->adev = adev;
  55. (*job)->vm = vm;
  56. (*job)->ibs = (void *)&(*job)[1];
  57. (*job)->num_ibs = num_ibs;
  58. INIT_WORK(&(*job)->base.work_free_job, amdgpu_job_free_handler);
  59. amdgpu_sync_create(&(*job)->sync);
  60. return 0;
  61. }
  62. int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
  63. struct amdgpu_job **job)
  64. {
  65. int r;
  66. r = amdgpu_job_alloc(adev, 1, job, NULL);
  67. if (r)
  68. return r;
  69. r = amdgpu_ib_get(adev, NULL, size, &(*job)->ibs[0]);
  70. if (r)
  71. kfree(*job);
  72. return r;
  73. }
  74. void amdgpu_job_free(struct amdgpu_job *job)
  75. {
  76. unsigned i;
  77. struct fence *f;
  78. /* use sched fence if available */
  79. f = (job->base.s_fence)? &job->base.s_fence->base : job->fence;
  80. for (i = 0; i < job->num_ibs; ++i)
  81. amdgpu_sa_bo_free(job->adev, &job->ibs[i].sa_bo, f);
  82. fence_put(job->fence);
  83. amdgpu_bo_unref(&job->uf_bo);
  84. amdgpu_sync_free(&job->sync);
  85. if (!job->base.use_sched)
  86. kfree(job);
  87. }
  88. void amdgpu_job_free_func(struct kref *refcount)
  89. {
  90. struct amdgpu_job *job = container_of(refcount, struct amdgpu_job, base.refcount);
  91. kfree(job);
  92. }
  93. int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
  94. struct amd_sched_entity *entity, void *owner,
  95. struct fence **f)
  96. {
  97. struct fence *fence;
  98. int r;
  99. job->ring = ring;
  100. if (!f)
  101. return -EINVAL;
  102. r = amd_sched_job_init(&job->base, &ring->sched,
  103. entity, amdgpu_job_timeout_func,
  104. amdgpu_job_free_func, owner, &fence);
  105. if (r)
  106. return r;
  107. job->owner = owner;
  108. job->ctx = entity->fence_context;
  109. *f = fence_get(fence);
  110. amd_sched_entity_push_job(&job->base);
  111. return 0;
  112. }
  113. static struct fence *amdgpu_job_dependency(struct amd_sched_job *sched_job)
  114. {
  115. struct amdgpu_job *job = to_amdgpu_job(sched_job);
  116. struct amdgpu_vm *vm = job->vm;
  117. struct fence *fence = amdgpu_sync_get_fence(&job->sync);
  118. if (fence == NULL && vm && !job->vm_id) {
  119. struct amdgpu_ring *ring = job->ring;
  120. int r;
  121. r = amdgpu_vm_grab_id(vm, ring, &job->sync,
  122. &job->base.s_fence->base,
  123. &job->vm_id, &job->vm_pd_addr);
  124. if (r)
  125. DRM_ERROR("Error getting VM ID (%d)\n", r);
  126. fence = amdgpu_sync_get_fence(&job->sync);
  127. }
  128. return fence;
  129. }
  130. static struct fence *amdgpu_job_run(struct amd_sched_job *sched_job)
  131. {
  132. struct fence *fence = NULL;
  133. struct amdgpu_job *job;
  134. int r;
  135. if (!sched_job) {
  136. DRM_ERROR("job is null\n");
  137. return NULL;
  138. }
  139. job = to_amdgpu_job(sched_job);
  140. r = amdgpu_sync_wait(&job->sync);
  141. if (r) {
  142. DRM_ERROR("failed to sync wait (%d)\n", r);
  143. return NULL;
  144. }
  145. trace_amdgpu_sched_run_job(job);
  146. r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs,
  147. job->sync.last_vm_update, job, &fence);
  148. if (r) {
  149. DRM_ERROR("Error scheduling IBs (%d)\n", r);
  150. goto err;
  151. }
  152. err:
  153. job->fence = fence;
  154. amdgpu_job_free(job);
  155. return fence;
  156. }
  157. const struct amd_sched_backend_ops amdgpu_sched_ops = {
  158. .dependency = amdgpu_job_dependency,
  159. .run_job = amdgpu_job_run,
  160. .begin_job = amd_sched_job_begin,
  161. .finish_job = amd_sched_job_finish,
  162. };