mach-cpuimx27.c 7.8 KB

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  1. /*
  2. * Copyright (C) 2009 Eric Benard - eric@eukrea.com
  3. *
  4. * Based on pcm038.c which is :
  5. * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
  6. * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version 2
  11. * of the License, or (at your option) any later version.
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  20. * MA 02110-1301, USA.
  21. */
  22. #include <linux/i2c.h>
  23. #include <linux/io.h>
  24. #include <linux/mtd/plat-ram.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/serial_8250.h>
  28. #include <linux/usb/otg.h>
  29. #include <linux/usb/ulpi.h>
  30. #include <linux/fsl_devices.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. #include <asm/mach/time.h>
  34. #include <asm/mach/map.h>
  35. #include <mach/eukrea-baseboards.h>
  36. #include <mach/common.h>
  37. #include <mach/hardware.h>
  38. #include <mach/iomux-mx27.h>
  39. #include <mach/mxc_nand.h>
  40. #include <mach/ulpi.h>
  41. #include "devices-imx27.h"
  42. #include "devices.h"
  43. static const int eukrea_cpuimx27_pins[] __initconst = {
  44. /* UART1 */
  45. PE12_PF_UART1_TXD,
  46. PE13_PF_UART1_RXD,
  47. PE14_PF_UART1_CTS,
  48. PE15_PF_UART1_RTS,
  49. /* UART4 */
  50. #if defined(MACH_EUKREA_CPUIMX27_USEUART4)
  51. PB26_AF_UART4_RTS,
  52. PB28_AF_UART4_TXD,
  53. PB29_AF_UART4_CTS,
  54. PB31_AF_UART4_RXD,
  55. #endif
  56. /* FEC */
  57. PD0_AIN_FEC_TXD0,
  58. PD1_AIN_FEC_TXD1,
  59. PD2_AIN_FEC_TXD2,
  60. PD3_AIN_FEC_TXD3,
  61. PD4_AOUT_FEC_RX_ER,
  62. PD5_AOUT_FEC_RXD1,
  63. PD6_AOUT_FEC_RXD2,
  64. PD7_AOUT_FEC_RXD3,
  65. PD8_AF_FEC_MDIO,
  66. PD9_AIN_FEC_MDC,
  67. PD10_AOUT_FEC_CRS,
  68. PD11_AOUT_FEC_TX_CLK,
  69. PD12_AOUT_FEC_RXD0,
  70. PD13_AOUT_FEC_RX_DV,
  71. PD14_AOUT_FEC_RX_CLK,
  72. PD15_AOUT_FEC_COL,
  73. PD16_AIN_FEC_TX_ER,
  74. PF23_AIN_FEC_TX_EN,
  75. /* I2C1 */
  76. PD17_PF_I2C_DATA,
  77. PD18_PF_I2C_CLK,
  78. /* SDHC2 */
  79. #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
  80. PB4_PF_SD2_D0,
  81. PB5_PF_SD2_D1,
  82. PB6_PF_SD2_D2,
  83. PB7_PF_SD2_D3,
  84. PB8_PF_SD2_CMD,
  85. PB9_PF_SD2_CLK,
  86. #endif
  87. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  88. /* Quad UART's IRQ */
  89. GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
  90. GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
  91. GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
  92. GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
  93. #endif
  94. /* OTG */
  95. PC7_PF_USBOTG_DATA5,
  96. PC8_PF_USBOTG_DATA6,
  97. PC9_PF_USBOTG_DATA0,
  98. PC10_PF_USBOTG_DATA2,
  99. PC11_PF_USBOTG_DATA1,
  100. PC12_PF_USBOTG_DATA4,
  101. PC13_PF_USBOTG_DATA3,
  102. PE0_PF_USBOTG_NXT,
  103. PE1_PF_USBOTG_STP,
  104. PE2_PF_USBOTG_DIR,
  105. PE24_PF_USBOTG_CLK,
  106. PE25_PF_USBOTG_DATA7,
  107. /* USBH2 */
  108. PA0_PF_USBH2_CLK,
  109. PA1_PF_USBH2_DIR,
  110. PA2_PF_USBH2_DATA7,
  111. PA3_PF_USBH2_NXT,
  112. PA4_PF_USBH2_STP,
  113. PD19_AF_USBH2_DATA4,
  114. PD20_AF_USBH2_DATA3,
  115. PD21_AF_USBH2_DATA6,
  116. PD22_AF_USBH2_DATA0,
  117. PD23_AF_USBH2_DATA2,
  118. PD24_AF_USBH2_DATA1,
  119. PD26_AF_USBH2_DATA5,
  120. };
  121. static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
  122. .width = 2,
  123. };
  124. static struct resource eukrea_cpuimx27_flash_resource = {
  125. .start = 0xc0000000,
  126. .end = 0xc3ffffff,
  127. .flags = IORESOURCE_MEM,
  128. };
  129. static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
  130. .name = "physmap-flash",
  131. .id = 0,
  132. .dev = {
  133. .platform_data = &eukrea_cpuimx27_flash_data,
  134. },
  135. .num_resources = 1,
  136. .resource = &eukrea_cpuimx27_flash_resource,
  137. };
  138. static const struct imxuart_platform_data uart_pdata __initconst = {
  139. .flags = IMXUART_HAVE_RTSCTS,
  140. };
  141. static const struct mxc_nand_platform_data
  142. cpuimx27_nand_board_info __initconst = {
  143. .width = 1,
  144. .hw_ecc = 1,
  145. };
  146. static struct platform_device *platform_devices[] __initdata = {
  147. &eukrea_cpuimx27_nor_mtd_device,
  148. };
  149. static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
  150. .bitrate = 100000,
  151. };
  152. static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
  153. {
  154. I2C_BOARD_INFO("pcf8563", 0x51),
  155. },
  156. };
  157. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  158. static struct plat_serial8250_port serial_platform_data[] = {
  159. {
  160. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
  161. .irq = IRQ_GPIOB(23),
  162. .uartclk = 14745600,
  163. .regshift = 1,
  164. .iotype = UPIO_MEM,
  165. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  166. }, {
  167. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
  168. .irq = IRQ_GPIOB(22),
  169. .uartclk = 14745600,
  170. .regshift = 1,
  171. .iotype = UPIO_MEM,
  172. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  173. }, {
  174. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
  175. .irq = IRQ_GPIOB(27),
  176. .uartclk = 14745600,
  177. .regshift = 1,
  178. .iotype = UPIO_MEM,
  179. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  180. }, {
  181. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
  182. .irq = IRQ_GPIOB(30),
  183. .uartclk = 14745600,
  184. .regshift = 1,
  185. .iotype = UPIO_MEM,
  186. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  187. }, {
  188. }
  189. };
  190. static struct platform_device serial_device = {
  191. .name = "serial8250",
  192. .id = 0,
  193. .dev = {
  194. .platform_data = serial_platform_data,
  195. },
  196. };
  197. #endif
  198. #if defined(CONFIG_USB_ULPI)
  199. static struct mxc_usbh_platform_data otg_pdata __initdata = {
  200. .portsc = MXC_EHCI_MODE_ULPI,
  201. .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
  202. };
  203. static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
  204. .portsc = MXC_EHCI_MODE_ULPI,
  205. .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
  206. };
  207. #endif
  208. static struct fsl_usb2_platform_data otg_device_pdata = {
  209. .operating_mode = FSL_USB2_DR_DEVICE,
  210. .phy_mode = FSL_USB2_PHY_ULPI,
  211. };
  212. static int otg_mode_host;
  213. static int __init eukrea_cpuimx27_otg_mode(char *options)
  214. {
  215. if (!strcmp(options, "host"))
  216. otg_mode_host = 1;
  217. else if (!strcmp(options, "device"))
  218. otg_mode_host = 0;
  219. else
  220. pr_info("otg_mode neither \"host\" nor \"device\". "
  221. "Defaulting to device\n");
  222. return 0;
  223. }
  224. __setup("otg_mode=", eukrea_cpuimx27_otg_mode);
  225. static void __init eukrea_cpuimx27_init(void)
  226. {
  227. mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
  228. ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
  229. imx27_add_imx_uart0(&uart_pdata);
  230. imx27_add_mxc_nand(&cpuimx27_nand_board_info);
  231. i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
  232. ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
  233. imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);
  234. imx27_add_fec(NULL);
  235. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  236. imx27_add_imx2_wdt(NULL);
  237. imx27_add_mxc_w1(NULL);
  238. #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
  239. /* SDHC2 can be used for Wifi */
  240. imx27_add_mxc_mmc(1, NULL);
  241. #endif
  242. #if defined(MACH_EUKREA_CPUIMX27_USEUART4)
  243. /* in which case UART4 is also used for Bluetooth */
  244. imx27_add_imx_uart3(&uart_pdata);
  245. #endif
  246. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  247. platform_device_register(&serial_device);
  248. #endif
  249. #if defined(CONFIG_USB_ULPI)
  250. if (otg_mode_host) {
  251. otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
  252. ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
  253. imx27_add_mxc_ehci_otg(&otg_pdata);
  254. }
  255. usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
  256. ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
  257. imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
  258. #endif
  259. if (!otg_mode_host)
  260. mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
  261. #ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
  262. eukrea_mbimx27_baseboard_init();
  263. #endif
  264. }
  265. static void __init eukrea_cpuimx27_timer_init(void)
  266. {
  267. mx27_clocks_init(26000000);
  268. }
  269. static struct sys_timer eukrea_cpuimx27_timer = {
  270. .init = eukrea_cpuimx27_timer_init,
  271. };
  272. MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
  273. .boot_params = MX27_PHYS_OFFSET + 0x100,
  274. .map_io = mx27_map_io,
  275. .init_irq = mx27_init_irq,
  276. .init_machine = eukrea_cpuimx27_init,
  277. .timer = &eukrea_cpuimx27_timer,
  278. MACHINE_END