omap_drv.c 19 KB

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  1. /*
  2. * drivers/gpu/drm/omapdrm/omap_drv.c
  3. *
  4. * Copyright (C) 2011 Texas Instruments
  5. * Author: Rob Clark <rob@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <drm/drm_crtc_helper.h>
  20. #include <drm/drm_fb_helper.h>
  21. #include "omap_dmm_tiler.h"
  22. #include "omap_drv.h"
  23. #define DRIVER_NAME MODULE_NAME
  24. #define DRIVER_DESC "OMAP DRM"
  25. #define DRIVER_DATE "20110917"
  26. #define DRIVER_MAJOR 1
  27. #define DRIVER_MINOR 0
  28. #define DRIVER_PATCHLEVEL 0
  29. static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
  30. MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
  31. module_param(num_crtc, int, 0600);
  32. /*
  33. * mode config funcs
  34. */
  35. /* Notes about mapping DSS and DRM entities:
  36. * CRTC: overlay
  37. * encoder: manager.. with some extension to allow one primary CRTC
  38. * and zero or more video CRTC's to be mapped to one encoder?
  39. * connector: dssdev.. manager can be attached/detached from different
  40. * devices
  41. */
  42. static void omap_fb_output_poll_changed(struct drm_device *dev)
  43. {
  44. struct omap_drm_private *priv = dev->dev_private;
  45. DBG("dev=%p", dev);
  46. if (priv->fbdev)
  47. drm_fb_helper_hotplug_event(priv->fbdev);
  48. }
  49. static const struct drm_mode_config_funcs omap_mode_config_funcs = {
  50. .fb_create = omap_framebuffer_create,
  51. .output_poll_changed = omap_fb_output_poll_changed,
  52. };
  53. static int get_connector_type(struct omap_dss_device *dssdev)
  54. {
  55. switch (dssdev->type) {
  56. case OMAP_DISPLAY_TYPE_HDMI:
  57. return DRM_MODE_CONNECTOR_HDMIA;
  58. case OMAP_DISPLAY_TYPE_DVI:
  59. return DRM_MODE_CONNECTOR_DVID;
  60. default:
  61. return DRM_MODE_CONNECTOR_Unknown;
  62. }
  63. }
  64. static bool channel_used(struct drm_device *dev, enum omap_channel channel)
  65. {
  66. struct omap_drm_private *priv = dev->dev_private;
  67. int i;
  68. for (i = 0; i < priv->num_crtcs; i++) {
  69. struct drm_crtc *crtc = priv->crtcs[i];
  70. if (omap_crtc_channel(crtc) == channel)
  71. return true;
  72. }
  73. return false;
  74. }
  75. static void omap_disconnect_dssdevs(void)
  76. {
  77. struct omap_dss_device *dssdev = NULL;
  78. for_each_dss_dev(dssdev)
  79. dssdev->driver->disconnect(dssdev);
  80. }
  81. static int omap_connect_dssdevs(void)
  82. {
  83. int r;
  84. struct omap_dss_device *dssdev = NULL;
  85. bool no_displays = true;
  86. for_each_dss_dev(dssdev) {
  87. r = dssdev->driver->connect(dssdev);
  88. if (r == -EPROBE_DEFER) {
  89. omap_dss_put_device(dssdev);
  90. goto cleanup;
  91. } else if (r) {
  92. dev_warn(dssdev->dev, "could not connect display: %s\n",
  93. dssdev->name);
  94. } else {
  95. no_displays = false;
  96. }
  97. }
  98. if (no_displays)
  99. return -EPROBE_DEFER;
  100. return 0;
  101. cleanup:
  102. /*
  103. * if we are deferring probe, we disconnect the devices we previously
  104. * connected
  105. */
  106. omap_disconnect_dssdevs();
  107. return r;
  108. }
  109. static int omap_modeset_create_crtc(struct drm_device *dev, int id,
  110. enum omap_channel channel)
  111. {
  112. struct omap_drm_private *priv = dev->dev_private;
  113. struct drm_plane *plane;
  114. struct drm_crtc *crtc;
  115. plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
  116. if (IS_ERR(plane))
  117. return PTR_ERR(plane);
  118. crtc = omap_crtc_init(dev, plane, channel, id);
  119. BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
  120. priv->crtcs[id] = crtc;
  121. priv->num_crtcs++;
  122. priv->planes[id] = plane;
  123. priv->num_planes++;
  124. return 0;
  125. }
  126. static int omap_modeset_init_properties(struct drm_device *dev)
  127. {
  128. struct omap_drm_private *priv = dev->dev_private;
  129. if (priv->has_dmm) {
  130. dev->mode_config.rotation_property =
  131. drm_mode_create_rotation_property(dev,
  132. BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
  133. BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) |
  134. BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y));
  135. if (!dev->mode_config.rotation_property)
  136. return -ENOMEM;
  137. }
  138. priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
  139. if (!priv->zorder_prop)
  140. return -ENOMEM;
  141. return 0;
  142. }
  143. static int omap_modeset_init(struct drm_device *dev)
  144. {
  145. struct omap_drm_private *priv = dev->dev_private;
  146. struct omap_dss_device *dssdev = NULL;
  147. int num_ovls = dss_feat_get_num_ovls();
  148. int num_mgrs = dss_feat_get_num_mgrs();
  149. int num_crtcs;
  150. int i, id = 0;
  151. int ret;
  152. drm_mode_config_init(dev);
  153. omap_drm_irq_install(dev);
  154. ret = omap_modeset_init_properties(dev);
  155. if (ret < 0)
  156. return ret;
  157. /*
  158. * We usually don't want to create a CRTC for each manager, at least
  159. * not until we have a way to expose private planes to userspace.
  160. * Otherwise there would not be enough video pipes left for drm planes.
  161. * We use the num_crtc argument to limit the number of crtcs we create.
  162. */
  163. num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
  164. dssdev = NULL;
  165. for_each_dss_dev(dssdev) {
  166. struct drm_connector *connector;
  167. struct drm_encoder *encoder;
  168. enum omap_channel channel;
  169. struct omap_overlay_manager *mgr;
  170. if (!omapdss_device_is_connected(dssdev))
  171. continue;
  172. encoder = omap_encoder_init(dev, dssdev);
  173. if (!encoder) {
  174. dev_err(dev->dev, "could not create encoder: %s\n",
  175. dssdev->name);
  176. return -ENOMEM;
  177. }
  178. connector = omap_connector_init(dev,
  179. get_connector_type(dssdev), dssdev, encoder);
  180. if (!connector) {
  181. dev_err(dev->dev, "could not create connector: %s\n",
  182. dssdev->name);
  183. return -ENOMEM;
  184. }
  185. BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
  186. BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
  187. priv->encoders[priv->num_encoders++] = encoder;
  188. priv->connectors[priv->num_connectors++] = connector;
  189. drm_mode_connector_attach_encoder(connector, encoder);
  190. /*
  191. * if we have reached the limit of the crtcs we are allowed to
  192. * create, let's not try to look for a crtc for this
  193. * panel/encoder and onwards, we will, of course, populate the
  194. * the possible_crtcs field for all the encoders with the final
  195. * set of crtcs we create
  196. */
  197. if (id == num_crtcs)
  198. continue;
  199. /*
  200. * get the recommended DISPC channel for this encoder. For now,
  201. * we only try to get create a crtc out of the recommended, the
  202. * other possible channels to which the encoder can connect are
  203. * not considered.
  204. */
  205. mgr = omapdss_find_mgr_from_display(dssdev);
  206. channel = mgr->id;
  207. /*
  208. * if this channel hasn't already been taken by a previously
  209. * allocated crtc, we create a new crtc for it
  210. */
  211. if (!channel_used(dev, channel)) {
  212. ret = omap_modeset_create_crtc(dev, id, channel);
  213. if (ret < 0) {
  214. dev_err(dev->dev,
  215. "could not create CRTC (channel %u)\n",
  216. channel);
  217. return ret;
  218. }
  219. id++;
  220. }
  221. }
  222. /*
  223. * we have allocated crtcs according to the need of the panels/encoders,
  224. * adding more crtcs here if needed
  225. */
  226. for (; id < num_crtcs; id++) {
  227. /* find a free manager for this crtc */
  228. for (i = 0; i < num_mgrs; i++) {
  229. if (!channel_used(dev, i))
  230. break;
  231. }
  232. if (i == num_mgrs) {
  233. /* this shouldn't really happen */
  234. dev_err(dev->dev, "no managers left for crtc\n");
  235. return -ENOMEM;
  236. }
  237. ret = omap_modeset_create_crtc(dev, id, i);
  238. if (ret < 0) {
  239. dev_err(dev->dev,
  240. "could not create CRTC (channel %u)\n", i);
  241. return ret;
  242. }
  243. }
  244. /*
  245. * Create normal planes for the remaining overlays:
  246. */
  247. for (; id < num_ovls; id++) {
  248. struct drm_plane *plane;
  249. plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
  250. if (IS_ERR(plane))
  251. return PTR_ERR(plane);
  252. BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
  253. priv->planes[priv->num_planes++] = plane;
  254. }
  255. for (i = 0; i < priv->num_encoders; i++) {
  256. struct drm_encoder *encoder = priv->encoders[i];
  257. struct omap_dss_device *dssdev =
  258. omap_encoder_get_dssdev(encoder);
  259. struct omap_dss_device *output;
  260. output = omapdss_find_output_from_display(dssdev);
  261. /* figure out which crtc's we can connect the encoder to: */
  262. encoder->possible_crtcs = 0;
  263. for (id = 0; id < priv->num_crtcs; id++) {
  264. struct drm_crtc *crtc = priv->crtcs[id];
  265. enum omap_channel crtc_channel;
  266. crtc_channel = omap_crtc_channel(crtc);
  267. if (output->dispc_channel == crtc_channel) {
  268. encoder->possible_crtcs |= (1 << id);
  269. break;
  270. }
  271. }
  272. omap_dss_put_device(output);
  273. }
  274. DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
  275. priv->num_planes, priv->num_crtcs, priv->num_encoders,
  276. priv->num_connectors);
  277. dev->mode_config.min_width = 32;
  278. dev->mode_config.min_height = 32;
  279. /* note: eventually will need some cpu_is_omapXYZ() type stuff here
  280. * to fill in these limits properly on different OMAP generations..
  281. */
  282. dev->mode_config.max_width = 2048;
  283. dev->mode_config.max_height = 2048;
  284. dev->mode_config.funcs = &omap_mode_config_funcs;
  285. return 0;
  286. }
  287. static void omap_modeset_free(struct drm_device *dev)
  288. {
  289. drm_mode_config_cleanup(dev);
  290. }
  291. /*
  292. * drm ioctl funcs
  293. */
  294. static int ioctl_get_param(struct drm_device *dev, void *data,
  295. struct drm_file *file_priv)
  296. {
  297. struct omap_drm_private *priv = dev->dev_private;
  298. struct drm_omap_param *args = data;
  299. DBG("%p: param=%llu", dev, args->param);
  300. switch (args->param) {
  301. case OMAP_PARAM_CHIPSET_ID:
  302. args->value = priv->omaprev;
  303. break;
  304. default:
  305. DBG("unknown parameter %lld", args->param);
  306. return -EINVAL;
  307. }
  308. return 0;
  309. }
  310. static int ioctl_set_param(struct drm_device *dev, void *data,
  311. struct drm_file *file_priv)
  312. {
  313. struct drm_omap_param *args = data;
  314. switch (args->param) {
  315. default:
  316. DBG("unknown parameter %lld", args->param);
  317. return -EINVAL;
  318. }
  319. return 0;
  320. }
  321. static int ioctl_gem_new(struct drm_device *dev, void *data,
  322. struct drm_file *file_priv)
  323. {
  324. struct drm_omap_gem_new *args = data;
  325. VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
  326. args->size.bytes, args->flags);
  327. return omap_gem_new_handle(dev, file_priv, args->size,
  328. args->flags, &args->handle);
  329. }
  330. static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
  331. struct drm_file *file_priv)
  332. {
  333. struct drm_omap_gem_cpu_prep *args = data;
  334. struct drm_gem_object *obj;
  335. int ret;
  336. VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
  337. obj = drm_gem_object_lookup(dev, file_priv, args->handle);
  338. if (!obj)
  339. return -ENOENT;
  340. ret = omap_gem_op_sync(obj, args->op);
  341. if (!ret)
  342. ret = omap_gem_op_start(obj, args->op);
  343. drm_gem_object_unreference_unlocked(obj);
  344. return ret;
  345. }
  346. static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
  347. struct drm_file *file_priv)
  348. {
  349. struct drm_omap_gem_cpu_fini *args = data;
  350. struct drm_gem_object *obj;
  351. int ret;
  352. VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
  353. obj = drm_gem_object_lookup(dev, file_priv, args->handle);
  354. if (!obj)
  355. return -ENOENT;
  356. /* XXX flushy, flushy */
  357. ret = 0;
  358. if (!ret)
  359. ret = omap_gem_op_finish(obj, args->op);
  360. drm_gem_object_unreference_unlocked(obj);
  361. return ret;
  362. }
  363. static int ioctl_gem_info(struct drm_device *dev, void *data,
  364. struct drm_file *file_priv)
  365. {
  366. struct drm_omap_gem_info *args = data;
  367. struct drm_gem_object *obj;
  368. int ret = 0;
  369. VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
  370. obj = drm_gem_object_lookup(dev, file_priv, args->handle);
  371. if (!obj)
  372. return -ENOENT;
  373. args->size = omap_gem_mmap_size(obj);
  374. args->offset = omap_gem_mmap_offset(obj);
  375. drm_gem_object_unreference_unlocked(obj);
  376. return ret;
  377. }
  378. static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
  379. DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
  380. DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  381. DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
  382. DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  383. DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  384. DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
  385. };
  386. /*
  387. * drm driver funcs
  388. */
  389. /**
  390. * load - setup chip and create an initial config
  391. * @dev: DRM device
  392. * @flags: startup flags
  393. *
  394. * The driver load routine has to do several things:
  395. * - initialize the memory manager
  396. * - allocate initial config memory
  397. * - setup the DRM framebuffer with the allocated memory
  398. */
  399. static int dev_load(struct drm_device *dev, unsigned long flags)
  400. {
  401. struct omap_drm_platform_data *pdata = dev->dev->platform_data;
  402. struct omap_drm_private *priv;
  403. unsigned int i;
  404. int ret;
  405. DBG("load: dev=%p", dev);
  406. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  407. if (!priv)
  408. return -ENOMEM;
  409. priv->omaprev = pdata->omaprev;
  410. dev->dev_private = priv;
  411. priv->wq = alloc_ordered_workqueue("omapdrm", 0);
  412. spin_lock_init(&priv->list_lock);
  413. INIT_LIST_HEAD(&priv->obj_list);
  414. omap_gem_init(dev);
  415. ret = omap_modeset_init(dev);
  416. if (ret) {
  417. dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
  418. dev->dev_private = NULL;
  419. kfree(priv);
  420. return ret;
  421. }
  422. /* Initialize vblank handling, start with all CRTCs disabled. */
  423. ret = drm_vblank_init(dev, priv->num_crtcs);
  424. if (ret)
  425. dev_warn(dev->dev, "could not init vblank\n");
  426. for (i = 0; i < priv->num_crtcs; i++)
  427. drm_crtc_vblank_off(priv->crtcs[i]);
  428. priv->fbdev = omap_fbdev_init(dev);
  429. if (!priv->fbdev) {
  430. dev_warn(dev->dev, "omap_fbdev_init failed\n");
  431. /* well, limp along without an fbdev.. maybe X11 will work? */
  432. }
  433. /* store off drm_device for use in pm ops */
  434. dev_set_drvdata(dev->dev, dev);
  435. drm_kms_helper_poll_init(dev);
  436. return 0;
  437. }
  438. static int dev_unload(struct drm_device *dev)
  439. {
  440. struct omap_drm_private *priv = dev->dev_private;
  441. DBG("unload: dev=%p", dev);
  442. drm_kms_helper_poll_fini(dev);
  443. if (priv->fbdev)
  444. omap_fbdev_free(dev);
  445. omap_modeset_free(dev);
  446. omap_gem_deinit(dev);
  447. destroy_workqueue(priv->wq);
  448. drm_vblank_cleanup(dev);
  449. omap_drm_irq_uninstall(dev);
  450. kfree(dev->dev_private);
  451. dev->dev_private = NULL;
  452. dev_set_drvdata(dev->dev, NULL);
  453. return 0;
  454. }
  455. static int dev_open(struct drm_device *dev, struct drm_file *file)
  456. {
  457. file->driver_priv = NULL;
  458. DBG("open: dev=%p, file=%p", dev, file);
  459. return 0;
  460. }
  461. /**
  462. * lastclose - clean up after all DRM clients have exited
  463. * @dev: DRM device
  464. *
  465. * Take care of cleaning up after all DRM clients have exited. In the
  466. * mode setting case, we want to restore the kernel's initial mode (just
  467. * in case the last client left us in a bad state).
  468. */
  469. static void dev_lastclose(struct drm_device *dev)
  470. {
  471. int i;
  472. /* we don't support vga-switcheroo.. so just make sure the fbdev
  473. * mode is active
  474. */
  475. struct omap_drm_private *priv = dev->dev_private;
  476. int ret;
  477. DBG("lastclose: dev=%p", dev);
  478. if (dev->mode_config.rotation_property) {
  479. /* need to restore default rotation state.. not sure
  480. * if there is a cleaner way to restore properties to
  481. * default state? Maybe a flag that properties should
  482. * automatically be restored to default state on
  483. * lastclose?
  484. */
  485. for (i = 0; i < priv->num_crtcs; i++) {
  486. drm_object_property_set_value(&priv->crtcs[i]->base,
  487. dev->mode_config.rotation_property, 0);
  488. }
  489. for (i = 0; i < priv->num_planes; i++) {
  490. drm_object_property_set_value(&priv->planes[i]->base,
  491. dev->mode_config.rotation_property, 0);
  492. }
  493. }
  494. if (priv->fbdev) {
  495. ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
  496. if (ret)
  497. DBG("failed to restore crtc mode");
  498. }
  499. }
  500. static void dev_preclose(struct drm_device *dev, struct drm_file *file)
  501. {
  502. struct omap_drm_private *priv = dev->dev_private;
  503. unsigned int i;
  504. DBG("preclose: dev=%p", dev);
  505. for (i = 0; i < priv->num_crtcs; ++i)
  506. omap_crtc_cancel_page_flip(priv->crtcs[i], file);
  507. }
  508. static void dev_postclose(struct drm_device *dev, struct drm_file *file)
  509. {
  510. DBG("postclose: dev=%p, file=%p", dev, file);
  511. }
  512. static const struct vm_operations_struct omap_gem_vm_ops = {
  513. .fault = omap_gem_fault,
  514. .open = drm_gem_vm_open,
  515. .close = drm_gem_vm_close,
  516. };
  517. static const struct file_operations omapdriver_fops = {
  518. .owner = THIS_MODULE,
  519. .open = drm_open,
  520. .unlocked_ioctl = drm_ioctl,
  521. .release = drm_release,
  522. .mmap = omap_gem_mmap,
  523. .poll = drm_poll,
  524. .read = drm_read,
  525. .llseek = noop_llseek,
  526. };
  527. static struct drm_driver omap_drm_driver = {
  528. .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
  529. .load = dev_load,
  530. .unload = dev_unload,
  531. .open = dev_open,
  532. .lastclose = dev_lastclose,
  533. .preclose = dev_preclose,
  534. .postclose = dev_postclose,
  535. .set_busid = drm_platform_set_busid,
  536. .get_vblank_counter = drm_vblank_count,
  537. .enable_vblank = omap_irq_enable_vblank,
  538. .disable_vblank = omap_irq_disable_vblank,
  539. #ifdef CONFIG_DEBUG_FS
  540. .debugfs_init = omap_debugfs_init,
  541. .debugfs_cleanup = omap_debugfs_cleanup,
  542. #endif
  543. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  544. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  545. .gem_prime_export = omap_gem_prime_export,
  546. .gem_prime_import = omap_gem_prime_import,
  547. .gem_free_object = omap_gem_free_object,
  548. .gem_vm_ops = &omap_gem_vm_ops,
  549. .dumb_create = omap_gem_dumb_create,
  550. .dumb_map_offset = omap_gem_dumb_map_offset,
  551. .dumb_destroy = drm_gem_dumb_destroy,
  552. .ioctls = ioctls,
  553. .num_ioctls = DRM_OMAP_NUM_IOCTLS,
  554. .fops = &omapdriver_fops,
  555. .name = DRIVER_NAME,
  556. .desc = DRIVER_DESC,
  557. .date = DRIVER_DATE,
  558. .major = DRIVER_MAJOR,
  559. .minor = DRIVER_MINOR,
  560. .patchlevel = DRIVER_PATCHLEVEL,
  561. };
  562. static int pdev_probe(struct platform_device *device)
  563. {
  564. int r;
  565. if (omapdss_is_initialized() == false)
  566. return -EPROBE_DEFER;
  567. omap_crtc_pre_init();
  568. r = omap_connect_dssdevs();
  569. if (r) {
  570. omap_crtc_pre_uninit();
  571. return r;
  572. }
  573. DBG("%s", device->name);
  574. return drm_platform_init(&omap_drm_driver, device);
  575. }
  576. static int pdev_remove(struct platform_device *device)
  577. {
  578. DBG("");
  579. drm_put_dev(platform_get_drvdata(device));
  580. omap_disconnect_dssdevs();
  581. omap_crtc_pre_uninit();
  582. return 0;
  583. }
  584. #ifdef CONFIG_PM_SLEEP
  585. static int omap_drm_suspend(struct device *dev)
  586. {
  587. struct drm_device *drm_dev = dev_get_drvdata(dev);
  588. drm_kms_helper_poll_disable(drm_dev);
  589. return 0;
  590. }
  591. static int omap_drm_resume(struct device *dev)
  592. {
  593. struct drm_device *drm_dev = dev_get_drvdata(dev);
  594. drm_kms_helper_poll_enable(drm_dev);
  595. return omap_gem_resume(dev);
  596. }
  597. #endif
  598. static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
  599. static struct platform_driver pdev = {
  600. .driver = {
  601. .name = DRIVER_NAME,
  602. .pm = &omapdrm_pm_ops,
  603. },
  604. .probe = pdev_probe,
  605. .remove = pdev_remove,
  606. };
  607. static int __init omap_drm_init(void)
  608. {
  609. int r;
  610. DBG("init");
  611. r = platform_driver_register(&omap_dmm_driver);
  612. if (r) {
  613. pr_err("DMM driver registration failed\n");
  614. return r;
  615. }
  616. r = platform_driver_register(&pdev);
  617. if (r) {
  618. pr_err("omapdrm driver registration failed\n");
  619. platform_driver_unregister(&omap_dmm_driver);
  620. return r;
  621. }
  622. return 0;
  623. }
  624. static void __exit omap_drm_fini(void)
  625. {
  626. DBG("fini");
  627. platform_driver_unregister(&pdev);
  628. platform_driver_unregister(&omap_dmm_driver);
  629. }
  630. /* need late_initcall() so we load after dss_driver's are loaded */
  631. late_initcall(omap_drm_init);
  632. module_exit(omap_drm_fini);
  633. MODULE_AUTHOR("Rob Clark <rob@ti.com>");
  634. MODULE_DESCRIPTION("OMAP DRM Display Driver");
  635. MODULE_ALIAS("platform:" DRIVER_NAME);
  636. MODULE_LICENSE("GPL v2");